xf86-video-intel: 5 commits - configure.ac NEWS src/sna/gen7_render.c src/sna/gen7_render.h src/sna/Makefile.am src/sna/sna_accel.c src/sna/sna_dri.c src/sna/sna.h src/sna/sna_render.h test/Makefile.am
Chris Wilson
ickle at kemper.freedesktop.org
Sat Jul 30 01:27:14 PDT 2011
NEWS | 30
configure.ac | 2
src/sna/Makefile.am | 6
src/sna/gen7_render.c | 3036 ++++++++++++++++++++++++++++++++++++++++++++++++++
src/sna/gen7_render.h | 1716 ++++++++++++++++++++++++++++
src/sna/sna.h | 1
src/sna/sna_accel.c | 10
src/sna/sna_dri.c | 16
src/sna/sna_render.h | 55
test/Makefile.am | 1
10 files changed, 4864 insertions(+), 9 deletions(-)
New commits:
commit 7976f5144d42a03ccd027908252a600db2631054
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date: Sat Jul 30 09:21:36 2011 +0100
NEWS: 2.15.901 snapshot
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
diff --git a/NEWS b/NEWS
index 61866b0..4192e9d 100644
--- a/NEWS
+++ b/NEWS
@@ -1,3 +1,33 @@
+Snapshot 2.15.901 (2011-07-30)
+==============================
+This is the first release candidate in preparation for the upcoming
+2.16.0 release. We will appreciate any feedback we can get from
+testing of this snapshot.
+
+The highlight of this snapshot is the full enabling of IvyBridge with
+acceleration for Render and Xv, along with handling of the shared render
+buffer allocations required for Mesa. Also of note is that deep-color
+support is enabled (for all chipsets), which allows you to drive your
+30-bit monitor at its native colour depth.
+
+Bugs fixed in this snapshot (compared to 2.15.0)
+--------------------------------------------------
+
+* Misuse of the Resource database causing crashes after DRI clients close
+ https://bugs.freedesktop.org/show_bug.cgi?id=37700
+
+* Crash on large strings
+ https://bugs.freedesktop.org/show_bug.cgi?id=36860
+
+* Incorrect rendering for some core drawing operations
+ http://bugs.freedesktop.org/show_bug.cgi?id=28768
+ http://bugs.freedesktop.org/show_bug.cgi?id=28798
+ http://bugs.freedesktop.org/show_bug.cgi?id=28908
+ http://bugs.freedesktop.org/show_bug.cgi?id=29401
+
+* Crash in Xv due to insufficient checks on batch space
+ https://bugs.freedesktop.org/show_bug.cgi?id=36319
+
Release 2.15.0 (2011-04-14)
==============================
We are pleased to announce this major release of the xf86-video-intel
diff --git a/configure.ac b/configure.ac
index 8d0653a..b6091a8 100644
--- a/configure.ac
+++ b/configure.ac
@@ -23,7 +23,7 @@
# Initialize Autoconf
AC_PREREQ([2.63])
AC_INIT([xf86-video-intel],
- [2.15.0],
+ [2.15.901],
[https://bugs.freedesktop.org/enter_bug.cgi?product=xorg],
[xf86-video-intel])
AC_CONFIG_SRCDIR([Makefile.am])
commit 2cfb703bbe7ec043d443452f4fa94f06b1ff7266
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date: Sat Jul 30 09:23:22 2011 +0100
Fix typos for distcheck
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
diff --git a/src/sna/Makefile.am b/src/sna/Makefile.am
index 241c14b..daf4e98 100644
--- a/src/sna/Makefile.am
+++ b/src/sna/Makefile.am
@@ -39,13 +39,13 @@ libsna_la_SOURCES = \
sna_blt.c \
sna_composite.c \
sna_damage.c \
- snd_damage.h \
+ sna_damage.h \
sna_display.c \
sna_driver.c \
- sna_driver.h \
sna_glyphs.c \
sna_gradient.c \
sna_io.c \
+ sna_module.h \
sna_render.c \
sna_render.h \
sna_render_inline.h \
diff --git a/test/Makefile.am b/test/Makefile.am
index 752e997..475cb17 100644
--- a/test/Makefile.am
+++ b/test/Makefile.am
@@ -21,6 +21,7 @@ LDADD = libtest.la @X11_LIBS@
noinst_LTLIBRARIES = libtest.la
libtest_la_SOURCES = \
+ test.h \
test_display.c \
test_image.c \
test_log.c \
commit 6f919264da69ed8bce6f2573629d89962a670783
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date: Sat Jul 30 09:00:06 2011 +0100
sna: Mark the stencil as untiled
In reality, Mesa will be treating it as W-tiling, only we have no way of
communicating that requirement to the kernel (as not only does the
kernel not understand W-tiling, but also the GTT is incapable of fencing
a W-tiled region.).
Ported from Chad Versace's 3e55f3e88.
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
diff --git a/src/sna/sna_dri.c b/src/sna/sna_dri.c
index ec65642..9b0ce20 100644
--- a/src/sna/sna_dri.c
+++ b/src/sna/sna_dri.c
@@ -246,12 +246,22 @@ sna_dri_create_buffer(DrawablePtr drawable,
*
* If we neglect to double the pitch, then
* drm_intel_gem_bo_map_gtt() maps the memory incorrectly.
+ *
+ * The alignment for W-tiling is quite different to the
+ * nominal no-tiling case, so we have to account for
+ * the tiled access pattern explicitly.
+ *
+ * The stencil buffer is W tiled. However, we request from
+ * the kernel a non-tiled buffer because the kernel does
+ * not understand W tiling and the GTT is incapable of
+ * W fencing.
*/
bpp = format ? format : drawable->bitsPerPixel;
bo = kgem_create_2d(&sna->kgem,
- drawable->width,
- drawable->height/2, 2*bpp,
- I915_TILING_Y,
+ ALIGN(drawable->width, 64),
+ ALIGN((drawable->height + 1) / 2, 64),
+ 2*bpp,
+ I915_TILING_NONE,
CREATE_EXACT);
break;
commit 326a84e832c43cc200a32e091b4e60b8b6a4a7c8
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date: Fri Jul 22 11:10:26 2011 +0100
sna: Port IVB acceleration code (Xrender + Xv)
Based on the superlative work by Kenneth Graunke and Xiang, Haihao.
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
diff --git a/src/sna/Makefile.am b/src/sna/Makefile.am
index d76480d..241c14b 100644
--- a/src/sna/Makefile.am
+++ b/src/sna/Makefile.am
@@ -68,6 +68,8 @@ libsna_la_SOURCES = \
gen5_render.h \
gen6_render.c \
gen6_render.h \
+ gen7_render.c \
+ gen7_render.h \
$(NULL)
if DRI
diff --git a/src/sna/gen7_render.c b/src/sna/gen7_render.c
new file mode 100644
index 0000000..502590e
--- /dev/null
+++ b/src/sna/gen7_render.c
@@ -0,0 +1,3036 @@
+/*
+ * Copyright © 2006,2008,2011 Intel Corporation
+ * Copyright © 2007 Red Hat, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Authors:
+ * Wang Zhenyu <zhenyu.z.wang at sna.com>
+ * Eric Anholt <eric at anholt.net>
+ * Carl Worth <cworth at redhat.com>
+ * Keith Packard <keithp at keithp.com>
+ * Chris Wilson <chris at chris-wilson.co.uk>
+ *
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <xf86.h>
+
+#include "sna.h"
+#include "sna_reg.h"
+#include "sna_render.h"
+#include "sna_render_inline.h"
+#include "sna_video.h"
+
+#include "gen7_render.h"
+
+#if DEBUG_RENDER
+#undef DBG
+#define DBG(x) ErrorF x
+#else
+#define NDEBUG 1
+#endif
+
+#define NO_COMPOSITE 0
+#define NO_COPY 0
+#define NO_COPY_BOXES 0
+#define NO_FILL 0
+#define NO_FILL_BOXES 0
+
+#define GEN7_MAX_SIZE 16384
+
+/* XXX Todo
+ *
+ * STR (software tiled rendering) mode. No, really.
+ * 64x32 pixel blocks align with the rendering cache. Worth considering.
+ */
+
+#define is_aligned(x, y) (((x) & ((y) - 1)) == 0)
+
+static const uint32_t ps_kernel_nomask_affine[][4] = {
+#include "exa_wm_src_affine.g7b"
+#include "exa_wm_src_sample_argb.g7b"
+#include "exa_wm_write.g7b"
+};
+
+static const uint32_t ps_kernel_nomask_projective[][4] = {
+#include "exa_wm_src_projective.g7b"
+#include "exa_wm_src_sample_argb.g7b"
+#include "exa_wm_write.g7b"
+};
+
+static const uint32_t ps_kernel_maskca_affine[][4] = {
+#include "exa_wm_src_affine.g7b"
+#include "exa_wm_src_sample_argb.g7b"
+#include "exa_wm_mask_affine.g7b"
+#include "exa_wm_mask_sample_argb.g7b"
+#include "exa_wm_ca.g6b" //#include "exa_wm_ca.g7b"
+#include "exa_wm_write.g7b"
+};
+
+static const uint32_t ps_kernel_maskca_projective[][4] = {
+#include "exa_wm_src_projective.g7b"
+#include "exa_wm_src_sample_argb.g7b"
+#include "exa_wm_mask_projective.g7b"
+#include "exa_wm_mask_sample_argb.g7b"
+#include "exa_wm_ca.g6b" //#include "exa_wm_ca.g7b"
+#include "exa_wm_write.g7b"
+};
+
+static const uint32_t ps_kernel_maskca_srcalpha_affine[][4] = {
+#include "exa_wm_src_affine.g7b"
+#include "exa_wm_src_sample_a.g7b"
+#include "exa_wm_mask_affine.g7b"
+#include "exa_wm_mask_sample_argb.g7b"
+#include "exa_wm_ca_srcalpha.g6b" //#include "exa_wm_ca_srcalpha.g7b"
+#include "exa_wm_write.g7b"
+};
+
+static const uint32_t ps_kernel_maskca_srcalpha_projective[][4] = {
+#include "exa_wm_src_projective.g7b"
+#include "exa_wm_src_sample_a.g7b"
+#include "exa_wm_mask_projective.g7b"
+#include "exa_wm_mask_sample_argb.g7b"
+#include "exa_wm_ca_srcalpha.g6b" //#include "exa_wm_ca_srcalpha.g7b"
+#include "exa_wm_write.g7b"
+};
+
+static const uint32_t ps_kernel_masknoca_affine[][4] = {
+#include "exa_wm_src_affine.g7b"
+#include "exa_wm_src_sample_argb.g7b"
+#include "exa_wm_mask_affine.g7b"
+#include "exa_wm_mask_sample_a.g7b"
+#include "exa_wm_noca.g6b"// #include "exa_wm_noca.g7b"
+#include "exa_wm_write.g7b"
+};
+
+static const uint32_t ps_kernel_masknoca_projective[][4] = {
+#include "exa_wm_src_projective.g7b"
+#include "exa_wm_src_sample_argb.g7b"
+#include "exa_wm_mask_projective.g7b"
+#include "exa_wm_mask_sample_a.g7b"
+#include "exa_wm_noca.g6b" //#include "exa_wm_noca.g7b"
+#include "exa_wm_write.g7b"
+};
+
+static const uint32_t ps_kernel_packed[][4] = {
+#include "exa_wm_src_affine.g7b"
+#include "exa_wm_src_sample_argb.g7b"
+#include "exa_wm_yuv_rgb.g7b"
+#include "exa_wm_write.g7b"
+};
+
+static const uint32_t ps_kernel_planar[][4] = {
+#include "exa_wm_src_affine.g7b"
+#include "exa_wm_src_sample_planar.g7b"
+#include "exa_wm_yuv_rgb.g7b"
+#include "exa_wm_write.g7b"
+};
+
+#define KERNEL(kernel_enum, kernel, masked) \
+ [GEN7_WM_KERNEL_##kernel_enum] = {#kernel_enum, kernel, sizeof(kernel), masked}
+static const struct wm_kernel_info {
+ const char *name;
+ const void *data;
+ unsigned int size;
+ Bool has_mask;
+} wm_kernels[] = {
+ KERNEL(NOMASK, ps_kernel_nomask_affine, FALSE),
+#if 0
+ KERNEL(NOMASK_PROJECTIVE, ps_kernel_nomask_projective, FALSE),
+
+ KERNEL(MASK, ps_kernel_masknoca_affine, TRUE),
+ KERNEL(MASK_PROJECTIVE, ps_kernel_masknoca_projective, TRUE),
+
+ KERNEL(MASKCA, ps_kernel_maskca_affine, TRUE),
+ KERNEL(MASKCA_PROJECTIVE, ps_kernel_maskca_projective, TRUE),
+
+ KERNEL(MASKCA_SRCALPHA, ps_kernel_maskca_srcalpha_affine, TRUE),
+ KERNEL(MASKCA_SRCALPHA_PROJECTIVE, ps_kernel_maskca_srcalpha_projective, TRUE),
+#endif
+
+ KERNEL(VIDEO_PLANAR, ps_kernel_planar, FALSE),
+ KERNEL(VIDEO_PACKED, ps_kernel_packed, FALSE),
+};
+#undef KERNEL
+
+static const struct blendinfo {
+ Bool src_alpha;
+ uint32_t src_blend;
+ uint32_t dst_blend;
+} gen7_blend_op[] = {
+ /* Clear */ {0, GEN7_BLENDFACTOR_ZERO, GEN7_BLENDFACTOR_ZERO},
+ /* Src */ {0, GEN7_BLENDFACTOR_ONE, GEN7_BLENDFACTOR_ZERO},
+ /* Dst */ {0, GEN7_BLENDFACTOR_ZERO, GEN7_BLENDFACTOR_ONE},
+ /* Over */ {1, GEN7_BLENDFACTOR_ONE, GEN7_BLENDFACTOR_INV_SRC_ALPHA},
+ /* OverReverse */ {0, GEN7_BLENDFACTOR_INV_DST_ALPHA, GEN7_BLENDFACTOR_ONE},
+ /* In */ {0, GEN7_BLENDFACTOR_DST_ALPHA, GEN7_BLENDFACTOR_ZERO},
+ /* InReverse */ {1, GEN7_BLENDFACTOR_ZERO, GEN7_BLENDFACTOR_SRC_ALPHA},
+ /* Out */ {0, GEN7_BLENDFACTOR_INV_DST_ALPHA, GEN7_BLENDFACTOR_ZERO},
+ /* OutReverse */ {1, GEN7_BLENDFACTOR_ZERO, GEN7_BLENDFACTOR_INV_SRC_ALPHA},
+ /* Atop */ {1, GEN7_BLENDFACTOR_DST_ALPHA, GEN7_BLENDFACTOR_INV_SRC_ALPHA},
+ /* AtopReverse */ {1, GEN7_BLENDFACTOR_INV_DST_ALPHA, GEN7_BLENDFACTOR_SRC_ALPHA},
+ /* Xor */ {1, GEN7_BLENDFACTOR_INV_DST_ALPHA, GEN7_BLENDFACTOR_INV_SRC_ALPHA},
+ /* Add */ {0, GEN7_BLENDFACTOR_ONE, GEN7_BLENDFACTOR_ONE},
+};
+
+/**
+ * Highest-valued BLENDFACTOR used in gen7_blend_op.
+ *
+ * This leaves out GEN7_BLENDFACTOR_INV_DST_COLOR,
+ * GEN7_BLENDFACTOR_INV_CONST_{COLOR,ALPHA},
+ * GEN7_BLENDFACTOR_INV_SRC1_{COLOR,ALPHA}
+ */
+#define GEN7_BLENDFACTOR_COUNT (GEN7_BLENDFACTOR_INV_DST_ALPHA + 1)
+
+/* FIXME: surface format defined in gen7_defines.h, shared Sampling engine
+ * 1.7.2
+ */
+static const struct formatinfo {
+ CARD32 pict_fmt;
+ uint32_t card_fmt;
+} gen7_tex_formats[] = {
+ {PICT_a8, GEN7_SURFACEFORMAT_A8_UNORM},
+ {PICT_a8r8g8b8, GEN7_SURFACEFORMAT_B8G8R8A8_UNORM},
+ {PICT_x8r8g8b8, GEN7_SURFACEFORMAT_B8G8R8X8_UNORM},
+ {PICT_a8b8g8r8, GEN7_SURFACEFORMAT_R8G8B8A8_UNORM},
+ {PICT_x8b8g8r8, GEN7_SURFACEFORMAT_R8G8B8X8_UNORM},
+ {PICT_r8g8b8, GEN7_SURFACEFORMAT_R8G8B8_UNORM},
+ {PICT_r5g6b5, GEN7_SURFACEFORMAT_B5G6R5_UNORM},
+ {PICT_a1r5g5b5, GEN7_SURFACEFORMAT_B5G5R5A1_UNORM},
+ {PICT_a2r10g10b10, GEN7_SURFACEFORMAT_B10G10R10A2_UNORM},
+ {PICT_x2r10g10b10, GEN7_SURFACEFORMAT_B10G10R10X2_UNORM},
+ {PICT_a2b10g10r10, GEN7_SURFACEFORMAT_R10G10B10A2_UNORM},
+ {PICT_x2r10g10b10, GEN7_SURFACEFORMAT_B10G10R10X2_UNORM},
+ {PICT_a4r4g4b4, GEN7_SURFACEFORMAT_B4G4R4A4_UNORM},
+};
+
+#define GEN7_BLEND_STATE_PADDED_SIZE ALIGN(sizeof(struct gen7_blend_state), 64)
+
+#define BLEND_OFFSET(s, d) \
+ (((s) * GEN7_BLENDFACTOR_COUNT + (d)) * GEN7_BLEND_STATE_PADDED_SIZE)
+
+#define SAMPLER_OFFSET(sf, se, mf, me) \
+ (((((sf) * EXTEND_COUNT + (se)) * FILTER_COUNT + (mf)) * EXTEND_COUNT + (me)) * 2 * sizeof(struct gen7_sampler_state))
+
+#define OUT_BATCH(v) batch_emit(sna, v)
+#define OUT_VERTEX(x,y) vertex_emit_2s(sna, x,y)
+#define OUT_VERTEX_F(v) vertex_emit(sna, v)
+
+static uint32_t gen7_get_blend(int op,
+ Bool has_component_alpha,
+ uint32_t dst_format)
+{
+ uint32_t src, dst;
+
+ src = gen7_blend_op[op].src_blend;
+ dst = gen7_blend_op[op].dst_blend;
+
+ /* If there's no dst alpha channel, adjust the blend op so that
+ * we'll treat it always as 1.
+ */
+ if (PICT_FORMAT_A(dst_format) == 0) {
+ if (src == GEN7_BLENDFACTOR_DST_ALPHA)
+ src = GEN7_BLENDFACTOR_ONE;
+ else if (src == GEN7_BLENDFACTOR_INV_DST_ALPHA)
+ src = GEN7_BLENDFACTOR_ZERO;
+ }
+
+ /* If the source alpha is being used, then we should only be in a
+ * case where the source blend factor is 0, and the source blend
+ * value is the mask channels multiplied by the source picture's alpha.
+ */
+ if (has_component_alpha && gen7_blend_op[op].src_alpha) {
+ if (dst == GEN7_BLENDFACTOR_SRC_ALPHA)
+ dst = GEN7_BLENDFACTOR_SRC_COLOR;
+ else if (dst == GEN7_BLENDFACTOR_INV_SRC_ALPHA)
+ dst = GEN7_BLENDFACTOR_INV_SRC_COLOR;
+ }
+
+ DBG(("blend op=%d, dst=%x [A=%d] => src=%d, dst=%d => offset=%x\n",
+ op, dst_format, PICT_FORMAT_A(dst_format),
+ src, dst, (int)BLEND_OFFSET(src, dst)));
+ return BLEND_OFFSET(src, dst);
+}
+
+static uint32_t gen7_get_dest_format(PictFormat format)
+{
+ switch (format) {
+ default:
+ assert(0);
+ case PICT_a8r8g8b8:
+ case PICT_x8r8g8b8:
+ return GEN7_SURFACEFORMAT_B8G8R8A8_UNORM;
+ case PICT_a8b8g8r8:
+ case PICT_x8b8g8r8:
+ return GEN7_SURFACEFORMAT_R8G8B8A8_UNORM;
+ case PICT_a2r10g10b10:
+ case PICT_x2r10g10b10:
+ return GEN7_SURFACEFORMAT_B10G10R10A2_UNORM;
+ case PICT_r5g6b5:
+ return GEN7_SURFACEFORMAT_B5G6R5_UNORM;
+ case PICT_x1r5g5b5:
+ case PICT_a1r5g5b5:
+ return GEN7_SURFACEFORMAT_B5G5R5A1_UNORM;
+ case PICT_a8:
+ return GEN7_SURFACEFORMAT_A8_UNORM;
+ case PICT_a4r4g4b4:
+ case PICT_x4r4g4b4:
+ return GEN7_SURFACEFORMAT_B4G4R4A4_UNORM;
+ }
+}
+
+static Bool gen7_check_dst_format(PictFormat format)
+{
+ switch (format) {
+ case PICT_a8r8g8b8:
+ case PICT_x8r8g8b8:
+ case PICT_a8b8g8r8:
+ case PICT_x8b8g8r8:
+ case PICT_a2r10g10b10:
+ case PICT_x2r10g10b10:
+ case PICT_r5g6b5:
+ case PICT_x1r5g5b5:
+ case PICT_a1r5g5b5:
+ case PICT_a8:
+ case PICT_a4r4g4b4:
+ case PICT_x4r4g4b4:
+ return TRUE;
+ }
+ return FALSE;
+}
+
+static uint32_t gen7_get_dest_format_for_depth(int depth)
+{
+ switch (depth) {
+ default: assert(0);
+ case 32:
+ case 24: return GEN7_SURFACEFORMAT_B8G8R8A8_UNORM;
+ case 30: return GEN7_SURFACEFORMAT_B10G10R10A2_UNORM;
+ case 16: return GEN7_SURFACEFORMAT_B5G6R5_UNORM;
+ case 8: return GEN7_SURFACEFORMAT_A8_UNORM;
+ }
+}
+
+static uint32_t gen7_get_card_format_for_depth(int depth)
+{
+ switch (depth) {
+ default: assert(0);
+ case 32: return GEN7_SURFACEFORMAT_B8G8R8A8_UNORM;
+ case 30: return GEN7_SURFACEFORMAT_B10G10R10A2_UNORM;
+ case 24: return GEN7_SURFACEFORMAT_B8G8R8X8_UNORM;
+ case 16: return GEN7_SURFACEFORMAT_B5G6R5_UNORM;
+ case 8: return GEN7_SURFACEFORMAT_A8_UNORM;
+ }
+}
+
+static bool gen7_format_is_dst(uint32_t format)
+{
+ switch (format) {
+ case GEN7_SURFACEFORMAT_B8G8R8A8_UNORM:
+ case GEN7_SURFACEFORMAT_R8G8B8A8_UNORM:
+ case GEN7_SURFACEFORMAT_B10G10R10A2_UNORM:
+ case GEN7_SURFACEFORMAT_B5G6R5_UNORM:
+ case GEN7_SURFACEFORMAT_B5G5R5A1_UNORM:
+ case GEN7_SURFACEFORMAT_A8_UNORM:
+ case GEN7_SURFACEFORMAT_B4G4R4A4_UNORM:
+ return true;
+ default:
+ return false;
+ }
+}
+
+static uint32_t gen7_filter(uint32_t filter)
+{
+ switch (filter) {
+ default:
+ assert(0);
+ case PictFilterNearest:
+ return SAMPLER_FILTER_NEAREST;
+ case PictFilterBilinear:
+ return SAMPLER_FILTER_BILINEAR;
+ }
+}
+
+static uint32_t gen7_check_filter(PicturePtr picture)
+{
+ switch (picture->filter) {
+ case PictFilterNearest:
+ case PictFilterBilinear:
+ return TRUE;
+ default:
+ return FALSE;
+ }
+}
+
+static uint32_t gen7_repeat(uint32_t repeat)
+{
+ switch (repeat) {
+ default:
+ assert(0);
+ case RepeatNone:
+ return SAMPLER_EXTEND_NONE;
+ case RepeatNormal:
+ return SAMPLER_EXTEND_REPEAT;
+ case RepeatPad:
+ return SAMPLER_EXTEND_PAD;
+ case RepeatReflect:
+ return SAMPLER_EXTEND_REFLECT;
+ }
+}
+
+static bool gen7_check_repeat(PicturePtr picture)
+{
+ if (!picture->repeat)
+ return TRUE;
+
+ switch (picture->repeatType) {
+ case RepeatNone:
+ case RepeatNormal:
+ case RepeatPad:
+ case RepeatReflect:
+ return TRUE;
+ default:
+ return FALSE;
+ }
+}
+
+static int
+gen7_choose_composite_kernel(int op, Bool has_mask, Bool is_ca, Bool is_affine)
+{
+ int base;
+
+ if (has_mask) {
+ if (is_ca) {
+ if (gen7_blend_op[op].src_alpha)
+ base = GEN7_WM_KERNEL_MASKCA_SRCALPHA;
+ else
+ base = GEN7_WM_KERNEL_MASKCA;
+ } else
+ base = GEN7_WM_KERNEL_MASK;
+ } else
+ base = GEN7_WM_KERNEL_NOMASK;
+
+ return base + !is_affine;
+}
+
+static void
+gen7_emit_sip(struct sna *sna)
+{
+ /* Set system instruction pointer */
+ OUT_BATCH(GEN7_STATE_SIP | 0);
+ OUT_BATCH(0);
+}
+
+static void
+gen7_emit_urb(struct sna *sna)
+{
+ OUT_BATCH(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS | (2 - 2));
+ OUT_BATCH(8); /* in 1KBs */
+
+ /* num of VS entries must be divisible by 8 if size < 9 */
+ OUT_BATCH(GEN7_3DSTATE_URB_VS | (2 - 2));
+ OUT_BATCH((32 << GEN7_URB_ENTRY_NUMBER_SHIFT) | /* at least 32 */
+ (2 - 1) << GEN7_URB_ENTRY_SIZE_SHIFT |
+ (1 << GEN7_URB_STARTING_ADDRESS_SHIFT));
+
+ OUT_BATCH(GEN7_3DSTATE_URB_HS | (2 - 2));
+ OUT_BATCH((0 << GEN7_URB_ENTRY_SIZE_SHIFT) |
+ (2 << GEN7_URB_STARTING_ADDRESS_SHIFT));
+
+ OUT_BATCH(GEN7_3DSTATE_URB_DS | (2 - 2));
+ OUT_BATCH((0 << GEN7_URB_ENTRY_SIZE_SHIFT) |
+ (2 << GEN7_URB_STARTING_ADDRESS_SHIFT));
+
+ OUT_BATCH(GEN7_3DSTATE_URB_GS | (2 - 2));
+ OUT_BATCH((0 << GEN7_URB_ENTRY_SIZE_SHIFT) |
+ (1 << GEN7_URB_STARTING_ADDRESS_SHIFT));
+}
+
+static void
+gen7_emit_state_base_address(struct sna *sna)
+{
+ OUT_BATCH(GEN7_STATE_BASE_ADDRESS | (10 - 2));
+ OUT_BATCH(0); /* general */
+ OUT_BATCH(kgem_add_reloc(&sna->kgem, /* surface */
+ sna->kgem.nbatch,
+ NULL,
+ I915_GEM_DOMAIN_INSTRUCTION << 16,
+ BASE_ADDRESS_MODIFY));
+ OUT_BATCH(kgem_add_reloc(&sna->kgem, /* instruction */
+ sna->kgem.nbatch,
+ sna->render_state.gen7.general_bo,
+ I915_GEM_DOMAIN_INSTRUCTION << 16,
+ BASE_ADDRESS_MODIFY));
+ OUT_BATCH(0); /* indirect */
+ OUT_BATCH(kgem_add_reloc(&sna->kgem,
+ sna->kgem.nbatch,
+ sna->render_state.gen7.general_bo,
+ I915_GEM_DOMAIN_INSTRUCTION << 16,
+ BASE_ADDRESS_MODIFY));
+
+ /* upper bounds, disable */
+ OUT_BATCH(0);
+ OUT_BATCH(BASE_ADDRESS_MODIFY);
+ OUT_BATCH(0);
+ OUT_BATCH(BASE_ADDRESS_MODIFY);
+}
+
+static void
+gen7_disable_vs(struct sna *sna)
+{
+ OUT_BATCH(GEN7_3DSTATE_VS | (6 - 2));
+ OUT_BATCH(0); /* no VS kernel */
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0); /* pass-through */
+
+#if 0
+ OUT_BATCH(GEN7_3DSTATE_CONSTANT_VS | (7 - 2));
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+
+ OUT_BATCH(GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS | (2 - 2));
+ OUT_BATCH(0);
+
+ OUT_BATCH(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS | (2 - 2));
+ OUT_BATCH(0);
+#endif
+}
+
+static void
+gen7_disable_hs(struct sna *sna)
+{
+ OUT_BATCH(GEN7_3DSTATE_HS | (7 - 2));
+ OUT_BATCH(0); /* no HS kernel */
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0); /* pass-through */
+
+#if 0
+ OUT_BATCH(GEN7_3DSTATE_CONSTANT_HS | (7 - 2));
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+
+ OUT_BATCH(GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS | (2 - 2));
+ OUT_BATCH(0);
+
+ OUT_BATCH(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS | (2 - 2));
+ OUT_BATCH(0);
+#endif
+}
+
+static void
+gen7_disable_te(struct sna *sna)
+{
+ OUT_BATCH(GEN7_3DSTATE_TE | (4 - 2));
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+}
+
+static void
+gen7_disable_ds(struct sna *sna)
+{
+ OUT_BATCH(GEN7_3DSTATE_DS | (6 - 2));
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+
+#if 0
+ OUT_BATCH(GEN7_3DSTATE_CONSTANT_DS | (7 - 2));
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+
+ OUT_BATCH(GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS | (2 - 2));
+ OUT_BATCH(0);
+
+ OUT_BATCH(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS | (2 - 2));
+ OUT_BATCH(0);
+#endif
+}
+
+static void
+gen7_disable_gs(struct sna *sna)
+{
+ OUT_BATCH(GEN7_3DSTATE_GS | (7 - 2));
+ OUT_BATCH(0); /* no GS kernel */
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0); /* pass-through */
+
+#if 0
+ OUT_BATCH(GEN7_3DSTATE_CONSTANT_GS | (7 - 2));
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+
+ OUT_BATCH(GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS | (2 - 2));
+ OUT_BATCH(0);
+
+ OUT_BATCH(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS | (2 - 2));
+ OUT_BATCH(0);
+#endif
+}
+
+static void
+gen7_disable_streamout(struct sna *sna)
+{
+ OUT_BATCH(GEN7_3DSTATE_STREAMOUT | (3 - 2));
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+}
+
+static void
+gen7_emit_sf_invariant(struct sna *sna)
+{
+ OUT_BATCH(GEN7_3DSTATE_SF | (7 - 2));
+ OUT_BATCH(0);
+ OUT_BATCH(GEN7_3DSTATE_SF_CULL_NONE);
+ OUT_BATCH(2 << GEN7_3DSTATE_SF_TRIFAN_PROVOKE_SHIFT);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+}
+
+static void
+gen7_emit_cc_invariant(struct sna *sna)
+{
+#if 0 /* unused, no change */
+ OUT_BATCH(GEN7_3DSTATE_CC_STATE_POINTERS | (2 - 2));
+ OUT_BATCH(0);
+
+ OUT_BATCH(GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS | (2 - 2));
+ OUT_BATCH(0);
+#endif
+
+ assert(is_aligned(sna->render_state.gen7.cc_vp, 32));
+ OUT_BATCH(GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC | (2 - 2));
+ OUT_BATCH(sna->render_state.gen7.cc_vp);
+}
+
+static void
+gen7_disable_clip(struct sna *sna)
+{
+ OUT_BATCH(GEN7_3DSTATE_CLIP | (4 - 2));
+ OUT_BATCH(0);
+ OUT_BATCH(0); /* pass-through */
+ OUT_BATCH(0);
+
+ OUT_BATCH(GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CL | (2 - 2));
+ OUT_BATCH(0);
+}
+
+static void
+gen7_emit_wm_invariant(struct sna *sna)
+{
+ OUT_BATCH(GEN7_3DSTATE_WM | (3 - 2));
+ OUT_BATCH(GEN7_WM_DISPATCH_ENABLE |
+ GEN7_WM_PERSPECTIVE_PIXEL_BARYCENTRIC);
+ OUT_BATCH(0);
+
+ OUT_BATCH(GEN7_3DSTATE_CONSTANT_PS | (7 - 2));
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+}
+
+static void
+gen7_emit_null_depth_buffer(struct sna *sna)
+{
+ OUT_BATCH(GEN7_3DSTATE_DEPTH_BUFFER | (7 - 2));
+ OUT_BATCH(GEN7_SURFACE_NULL << GEN7_3DSTATE_DEPTH_BUFFER_TYPE_SHIFT |
+ GEN7_DEPTHFORMAT_D32_FLOAT << GEN7_3DSTATE_DEPTH_BUFFER_FORMAT_SHIFT);
+ OUT_BATCH(0); /* disable depth, stencil and hiz */
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+
+ OUT_BATCH(GEN7_3DSTATE_CLEAR_PARAMS | (3 - 2));
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+}
+
+static void
+gen7_emit_invariant(struct sna *sna)
+{
+ OUT_BATCH(GEN7_PIPELINE_SELECT | PIPELINE_SELECT_3D);
+
+ OUT_BATCH(GEN7_3DSTATE_MULTISAMPLE | (4 - 2));
+ OUT_BATCH(GEN7_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_CENTER |
+ GEN7_3DSTATE_MULTISAMPLE_NUMSAMPLES_1); /* 1 sample/pixel */
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+
+ OUT_BATCH(GEN7_3DSTATE_SAMPLE_MASK | (2 - 2));
+ OUT_BATCH(1);
+
+ gen7_emit_sip(sna);
+ gen7_emit_urb(sna);
+
+ gen7_emit_state_base_address(sna);
+
+ gen7_disable_vs(sna);
+ gen7_disable_hs(sna);
+ gen7_disable_te(sna);
+ gen7_disable_ds(sna);
+ gen7_disable_gs(sna);
+ gen7_disable_clip(sna);
+ gen7_emit_sf_invariant(sna);
+ gen7_emit_wm_invariant(sna);
+ gen7_emit_cc_invariant(sna);
+ gen7_disable_streamout(sna);
+ gen7_emit_null_depth_buffer(sna);
+
+ sna->render_state.gen7.needs_invariant = FALSE;
+}
+
+static bool
+gen7_emit_cc(struct sna *sna, uint32_t blend_offset)
+{
+ struct gen7_render_state *render = &sna->render_state.gen7;
+
+ if (render->blend == blend_offset)
+ return false;
+
+ /* XXX can have upto 8 blend states preload, selectable via
+ * Render Target Index. What other side-effects of Render Target Index?
+ */
+
+ assert (is_aligned(render->cc_blend + blend_offset, 64));
+ OUT_BATCH(GEN7_3DSTATE_BLEND_STATE_POINTERS | (2 - 2));
+ OUT_BATCH((render->cc_blend + blend_offset) | 1);
+
+ render->blend = blend_offset;
+ return true;
+}
+
+static void
+gen7_emit_sampler(struct sna *sna, uint32_t state)
+{
+ assert(state <
+ 2 * sizeof(struct gen7_sampler_state) *
+ FILTER_COUNT * EXTEND_COUNT *
+ FILTER_COUNT * EXTEND_COUNT);
+
+ if (sna->render_state.gen7.samplers == state)
+ return;
+
+ sna->render_state.gen7.samplers = state;
+
+ assert (is_aligned(sna->render_state.gen7.wm_state + state, 32));
+ OUT_BATCH(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS | (2 - 2));
+ OUT_BATCH(sna->render_state.gen7.wm_state + state);
+}
+
+static void
+gen7_emit_sf(struct sna *sna, Bool has_mask)
+{
+ int num_sf_outputs = has_mask ? 2 : 1;
+
+ if (sna->render_state.gen7.num_sf_outputs == num_sf_outputs)
+ return;
+
+ DBG(("%s: num_sf_outputs=%d, read_length=%d, read_offset=%d\n",
+ __FUNCTION__, num_sf_outputs, 1, 0));
+
+ sna->render_state.gen7.num_sf_outputs = num_sf_outputs;
+
+ OUT_BATCH(GEN7_3DSTATE_SBE | (14 - 2));
+ OUT_BATCH(num_sf_outputs << GEN7_SBE_NUM_OUTPUTS_SHIFT |
+ 1 << GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT |
+ 1 << GEN7_SBE_URB_ENTRY_READ_OFFSET_SHIFT);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0); /* dw4 */
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0); /* DW9 */
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+}
+
+static void
+gen7_emit_wm(struct sna *sna, int kernel, int nr_surfaces, int nr_inputs)
+{
+ if (sna->render_state.gen7.kernel == kernel)
+ return;
+
+ sna->render_state.gen7.kernel = kernel;
+
+ DBG(("%s: switching to %s\n", __FUNCTION__, wm_kernels[kernel].name));
+
+ OUT_BATCH(GEN7_3DSTATE_PS | (8 - 2));
+ OUT_BATCH(sna->render_state.gen7.wm_kernel[kernel]);
+ OUT_BATCH(1 << GEN7_PS_SAMPLER_COUNT_SHIFT |
+ nr_surfaces << GEN7_PS_BINDING_TABLE_ENTRY_COUNT_SHIFT);
+ OUT_BATCH(0); /* scratch address */
+ OUT_BATCH((86 - 1) << GEN7_PS_MAX_THREADS_SHIFT |
+ GEN7_PS_ATTRIBUTE_ENABLE |
+ GEN7_PS_16_DISPATCH_ENABLE);
+ OUT_BATCH(6 << GEN7_PS_DISPATCH_START_GRF_SHIFT_0);
+ OUT_BATCH(0); /* kernel 1 */
+ OUT_BATCH(0); /* kernel 2 */
+}
+
+static bool
+gen7_emit_binding_table(struct sna *sna, uint16_t offset)
+{
+ if (sna->render_state.gen7.surface_table == offset)
+ return false;
+
+ /* Binding table pointers */
+ assert(is_aligned(4*offset, 32));
+ OUT_BATCH(GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS | (2 - 2));
+ OUT_BATCH(offset*4);
+
+ sna->render_state.gen7.surface_table = offset;
+ return true;
+}
+
+static void
+gen7_emit_drawing_rectangle(struct sna *sna,
+ const struct sna_composite_op *op,
+ bool force)
+{
+ uint32_t limit = (op->dst.height - 1) << 16 | (op->dst.width - 1);
+ uint32_t offset = (uint16_t)op->dst.y << 16 | (uint16_t)op->dst.x;
+
+ if (!force &&
+ sna->render_state.gen7.drawrect_limit == limit &&
+ sna->render_state.gen7.drawrect_offset == offset)
+ return;
+
+ sna->render_state.gen7.drawrect_offset = offset;
+ sna->render_state.gen7.drawrect_limit = limit;
+
+ OUT_BATCH(GEN7_3DSTATE_DRAWING_RECTANGLE | (4 - 2));
+ OUT_BATCH(0);
+ OUT_BATCH(limit);
+ OUT_BATCH(offset);
+}
+
+static void
+gen7_emit_vertex_elements(struct sna *sna,
+ const struct sna_composite_op *op)
+{
+ /*
+ * vertex data in vertex buffer
+ * position: (x, y)
+ * texture coordinate 0: (u0, v0) if (is_affine is TRUE) else (u0, v0, w0)
+ * texture coordinate 1 if (has_mask is TRUE): same as above
+ */
+ struct gen7_render_state *render = &sna->render_state.gen7;
+ int nelem = op->mask.bo ? 2 : 1;
+ int selem = op->is_affine ? 2 : 3;
+ uint32_t w_component;
+ uint32_t src_format;
+ int id = op->u.gen7.ve_id;
+
+ if (render->ve_id == id)
+ return;
+ render->ve_id = id;
+
+ if (op->is_affine) {
+ src_format = GEN7_SURFACEFORMAT_R32G32_FLOAT;
+ w_component = GEN7_VFCOMPONENT_STORE_1_FLT;
+ } else {
+ src_format = GEN7_SURFACEFORMAT_R32G32B32_FLOAT;
+ w_component = GEN7_VFCOMPONENT_STORE_SRC;
+ }
+
+ /* The VUE layout
+ * dword 0-3: pad (0.0, 0.0, 0.0. 0.0)
+ * dword 4-7: position (x, y, 1.0, 1.0),
+ * dword 8-11: texture coordinate 0 (u0, v0, w0, 1.0)
+ * dword 12-15: texture coordinate 1 (u1, v1, w1, 1.0)
+ *
+ * dword 4-15 are fetched from vertex buffer
+ */
+ OUT_BATCH(GEN7_3DSTATE_VERTEX_ELEMENTS |
+ ((2 * (2 + nelem)) + 1 - 2));
+
+ OUT_BATCH(id << GEN7_VE0_VERTEX_BUFFER_INDEX_SHIFT |
+ GEN7_VE0_VALID |
+ GEN7_SURFACEFORMAT_R32G32B32A32_FLOAT << GEN7_VE0_FORMAT_SHIFT |
+ 0 << GEN7_VE0_OFFSET_SHIFT);
+ OUT_BATCH(GEN7_VFCOMPONENT_STORE_0 << GEN7_VE1_VFCOMPONENT_0_SHIFT |
+ GEN7_VFCOMPONENT_STORE_0 << GEN7_VE1_VFCOMPONENT_1_SHIFT |
+ GEN7_VFCOMPONENT_STORE_0 << GEN7_VE1_VFCOMPONENT_2_SHIFT |
+ GEN7_VFCOMPONENT_STORE_0 << GEN7_VE1_VFCOMPONENT_3_SHIFT);
+
+ /* x,y */
+ OUT_BATCH(id << GEN7_VE0_VERTEX_BUFFER_INDEX_SHIFT | GEN7_VE0_VALID |
+ GEN7_SURFACEFORMAT_R16G16_SSCALED << GEN7_VE0_FORMAT_SHIFT |
+ 0 << GEN7_VE0_OFFSET_SHIFT); /* offsets vb in bytes */
+ OUT_BATCH(GEN7_VFCOMPONENT_STORE_SRC << GEN7_VE1_VFCOMPONENT_0_SHIFT |
+ GEN7_VFCOMPONENT_STORE_SRC << GEN7_VE1_VFCOMPONENT_1_SHIFT |
+ GEN7_VFCOMPONENT_STORE_1_FLT << GEN7_VE1_VFCOMPONENT_2_SHIFT |
+ GEN7_VFCOMPONENT_STORE_1_FLT << GEN7_VE1_VFCOMPONENT_3_SHIFT);
+
+ /* u0, v0, w0 */
+ OUT_BATCH(id << GEN7_VE0_VERTEX_BUFFER_INDEX_SHIFT | GEN7_VE0_VALID |
+ src_format << GEN7_VE0_FORMAT_SHIFT |
+ 4 << GEN7_VE0_OFFSET_SHIFT); /* offset vb in bytes */
+ OUT_BATCH(GEN7_VFCOMPONENT_STORE_SRC << GEN7_VE1_VFCOMPONENT_0_SHIFT |
+ GEN7_VFCOMPONENT_STORE_SRC << GEN7_VE1_VFCOMPONENT_1_SHIFT |
+ w_component << GEN7_VE1_VFCOMPONENT_2_SHIFT |
+ GEN7_VFCOMPONENT_STORE_1_FLT << GEN7_VE1_VFCOMPONENT_3_SHIFT);
+
+ /* u1, v1, w1 */
+ if (op->mask.bo) {
+ OUT_BATCH(id << GEN7_VE0_VERTEX_BUFFER_INDEX_SHIFT |
+ GEN7_VE0_VALID |
+ src_format << GEN7_VE0_FORMAT_SHIFT |
+ ((1 + selem) * 4) << GEN7_VE0_OFFSET_SHIFT); /* vb offset in bytes */
+ OUT_BATCH(GEN7_VFCOMPONENT_STORE_SRC << GEN7_VE1_VFCOMPONENT_0_SHIFT |
+ GEN7_VFCOMPONENT_STORE_SRC << GEN7_VE1_VFCOMPONENT_1_SHIFT |
+ w_component << GEN7_VE1_VFCOMPONENT_2_SHIFT |
+ GEN7_VFCOMPONENT_STORE_1_FLT << GEN7_VE1_VFCOMPONENT_3_SHIFT);
+ }
+}
+
+static void
+gen7_emit_state(struct sna *sna,
+ const struct sna_composite_op *op,
+ uint16_t wm_binding_table)
+
+{
+ bool flushed =
+ (sna->kgem.batch[sna->kgem.nbatch-1] & (0xff<<23)) == MI_FLUSH;
+ bool need_flush;
+
+ need_flush = gen7_emit_cc(sna,
+ gen7_get_blend(op->op,
+ op->has_component_alpha,
+ op->dst.format));
+
+ DBG(("%s: sampler src=(%d, %d), mask=(%d, %d), offset=%d\n",
+ __FUNCTION__,
+ op->src.filter, op->src.repeat,
+ op->mask.filter, op->mask.repeat,
+ (int)SAMPLER_OFFSET(op->src.filter,
+ op->src.repeat,
+ op->mask.filter,
+ op->mask.repeat)));
+ gen7_emit_sampler(sna,
+ SAMPLER_OFFSET(op->src.filter,
+ op->src.repeat,
+ op->mask.filter,
+ op->mask.repeat));
+ gen7_emit_sf(sna, op->mask.bo != NULL);
+ gen7_emit_wm(sna,
+ op->u.gen7.wm_kernel,
+ op->u.gen7.nr_surfaces,
+ op->u.gen7.nr_inputs);
+ gen7_emit_vertex_elements(sna, op);
+
+ /* XXX updating the binding table requires a non-pipelined cmd? */
+ need_flush |= gen7_emit_binding_table(sna, wm_binding_table);
+ gen7_emit_drawing_rectangle(sna, op, need_flush & !flushed);
+}
+
+static void gen7_magic_ca_pass(struct sna *sna,
+ const struct sna_composite_op *op)
+{
+ struct gen7_render_state *state = &sna->render_state.gen7;
+ bool need_flush;
+
+ if (!op->need_magic_ca_pass)
+ return;
+
+ DBG(("%s: CA fixup (%d -> %d)\n", __FUNCTION__,
+ sna->render.vertex_start, sna->render.vertex_index));
+
+ need_flush =
+ gen7_emit_cc(sna,
+ gen7_get_blend(PictOpAdd, TRUE, op->dst.format));
+ gen7_emit_wm(sna,
+ gen7_choose_composite_kernel(PictOpAdd,
+ TRUE, TRUE,
+ op->is_affine),
+ 3, 2);
+
+ /* XXX We apparently need a non-pipelined op to flush the
+ * pipeline before changing blend state.
+ */
+ if (need_flush)
+ OUT_BATCH(MI_FLUSH | MI_INHIBIT_RENDER_CACHE_FLUSH);
+
+ OUT_BATCH(GEN7_3DPRIMITIVE | (7- 2));
+ OUT_BATCH(GEN7_3DPRIMITIVE_VERTEX_SEQUENTIAL |
+ _3DPRIM_RECTLIST << GEN7_3DPRIMITIVE_TOPOLOGY_SHIFT);
+ OUT_BATCH(sna->render.vertex_index - sna->render.vertex_start);
+ OUT_BATCH(sna->render.vertex_start);
+ OUT_BATCH(1); /* single instance */
+ OUT_BATCH(0); /* start instance location */
+ OUT_BATCH(0); /* index buffer offset, ignored */
+
+ state->last_primitive = sna->kgem.nbatch;
+}
+
+static void gen7_vertex_flush(struct sna *sna)
+{
+ if (sna->render_state.gen7.vertex_offset == 0)
+ return;
+
+ DBG(("%s[%x] = %d\n", __FUNCTION__,
+ 4*sna->render_state.gen7.vertex_offset,
+ sna->render.vertex_index - sna->render.vertex_start));
+ sna->kgem.batch[sna->render_state.gen7.vertex_offset] =
+ sna->render.vertex_index - sna->render.vertex_start;
+ sna->render_state.gen7.vertex_offset = 0;
+
+ if (sna->render.op)
+ gen7_magic_ca_pass(sna, sna->render.op);
+}
+
+static void gen7_vertex_finish(struct sna *sna, Bool last)
+{
+ struct kgem_bo *bo;
+ int i, delta;
+
+ gen7_vertex_flush(sna);
+ if (!sna->render.vertex_used)
+ return;
+
+ /* Note: we only need dword alignment (currently) */
+
+ if (last && sna->kgem.nbatch + sna->render.vertex_used <= sna->kgem.surface) {
+ DBG(("%s: copy to batch: %d @ %d\n", __FUNCTION__,
+ sna->render.vertex_used, sna->kgem.nbatch));
+ memcpy(sna->kgem.batch + sna->kgem.nbatch,
+ sna->render.vertex_data,
+ sna->render.vertex_used * 4);
+ delta = sna->kgem.nbatch * 4;
+ bo = NULL;
+ sna->kgem.nbatch += sna->render.vertex_used;
+ } else {
+ bo = kgem_create_linear(&sna->kgem, 4*sna->render.vertex_used);
+ if (bo && !kgem_bo_write(&sna->kgem, bo,
+ sna->render.vertex_data,
+ 4*sna->render.vertex_used)) {
+ kgem_bo_destroy(&sna->kgem, bo);
+ return;
+ }
+ delta = 0;
+ DBG(("%s: new vbo: %d\n", __FUNCTION__,
+ sna->render.vertex_used));
+ }
+
+ for (i = 0; i < ARRAY_SIZE(sna->render.vertex_reloc); i++) {
+ if (sna->render.vertex_reloc[i]) {
+ DBG(("%s: reloc[%d] = %d\n", __FUNCTION__,
+ i, sna->render.vertex_reloc[i]));
+
+ sna->kgem.batch[sna->render.vertex_reloc[i]] =
+ kgem_add_reloc(&sna->kgem,
+ sna->render.vertex_reloc[i],
+ bo,
+ I915_GEM_DOMAIN_VERTEX << 16,
+ delta);
+ sna->kgem.batch[sna->render.vertex_reloc[i]+1] =
+ kgem_add_reloc(&sna->kgem,
+ sna->render.vertex_reloc[i]+1,
+ bo,
+ I915_GEM_DOMAIN_VERTEX << 16,
+ delta + sna->render.vertex_used * 4 - 1);
+ sna->render.vertex_reloc[i] = 0;
+ }
+ }
+
+ if (bo)
+ kgem_bo_destroy(&sna->kgem, bo);
+
+ sna->render.vertex_used = 0;
+ sna->render.vertex_index = 0;
+ sna->render_state.gen7.vb_id = 0;
+}
+
+typedef struct gen7_surface_state_padded {
+ struct gen7_surface_state state;
+ char pad[32 - sizeof(struct gen7_surface_state)];
+} gen7_surface_state_padded;
+
+static void null_create(struct sna_static_stream *stream)
+{
+ /* A bunch of zeros useful for legacy border color and depth-stencil */
+ sna_static_stream_map(stream, 64, 64);
+}
+
+static void
+sampler_state_init(struct gen7_sampler_state *sampler_state,
+ sampler_filter_t filter,
+ sampler_extend_t extend)
+{
+ sampler_state->ss0.lod_preclamp = 1; /* GL mode */
+
+ /* We use the legacy mode to get the semantics specified by
+ * the Render extension. */
+ sampler_state->ss0.default_color_mode = GEN7_BORDER_COLOR_MODE_LEGACY;
+
+ switch (filter) {
+ default:
+ case SAMPLER_FILTER_NEAREST:
+ sampler_state->ss0.min_filter = GEN7_MAPFILTER_NEAREST;
+ sampler_state->ss0.mag_filter = GEN7_MAPFILTER_NEAREST;
+ break;
+ case SAMPLER_FILTER_BILINEAR:
+ sampler_state->ss0.min_filter = GEN7_MAPFILTER_LINEAR;
+ sampler_state->ss0.mag_filter = GEN7_MAPFILTER_LINEAR;
+ break;
+ }
+
+ switch (extend) {
+ default:
+ case SAMPLER_EXTEND_NONE:
+ sampler_state->ss3.r_wrap_mode = GEN7_TEXCOORDMODE_CLAMP_BORDER;
+ sampler_state->ss3.s_wrap_mode = GEN7_TEXCOORDMODE_CLAMP_BORDER;
+ sampler_state->ss3.t_wrap_mode = GEN7_TEXCOORDMODE_CLAMP_BORDER;
+ break;
+ case SAMPLER_EXTEND_REPEAT:
+ sampler_state->ss3.r_wrap_mode = GEN7_TEXCOORDMODE_WRAP;
+ sampler_state->ss3.s_wrap_mode = GEN7_TEXCOORDMODE_WRAP;
+ sampler_state->ss3.t_wrap_mode = GEN7_TEXCOORDMODE_WRAP;
+ break;
+ case SAMPLER_EXTEND_PAD:
+ sampler_state->ss3.r_wrap_mode = GEN7_TEXCOORDMODE_CLAMP;
+ sampler_state->ss3.s_wrap_mode = GEN7_TEXCOORDMODE_CLAMP;
+ sampler_state->ss3.t_wrap_mode = GEN7_TEXCOORDMODE_CLAMP;
+ break;
+ case SAMPLER_EXTEND_REFLECT:
+ sampler_state->ss3.r_wrap_mode = GEN7_TEXCOORDMODE_MIRROR;
+ sampler_state->ss3.s_wrap_mode = GEN7_TEXCOORDMODE_MIRROR;
+ sampler_state->ss3.t_wrap_mode = GEN7_TEXCOORDMODE_MIRROR;
+ break;
+ }
+}
+
+static uint32_t gen7_create_cc_viewport(struct sna_static_stream *stream)
+{
+ struct gen7_cc_viewport vp;
+
+ vp.min_depth = -1.e35;
+ vp.max_depth = 1.e35;
+
+ return sna_static_stream_add(stream, &vp, sizeof(vp), 32);
+}
+
+static uint32_t gen7_get_card_format(PictFormat format)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(gen7_tex_formats); i++) {
+ if (gen7_tex_formats[i].pict_fmt == format)
+ return gen7_tex_formats[i].card_fmt;
+ }
+ return -1;
+}
+
+static uint32_t
+gen7_tiling_bits(uint32_t tiling)
+{
+ switch (tiling) {
+ default: assert(0);
+ case I915_TILING_NONE: return 0;
+ case I915_TILING_X: return GEN7_SURFACE_TILED;
+ case I915_TILING_Y: return GEN7_SURFACE_TILED | GEN7_SURFACE_TILED_Y;
+ }
+}
+
+/**
+ * Sets up the common fields for a surface state buffer for the given
+ * picture in the given surface state buffer.
+ */
+static int
+gen7_bind_bo(struct sna *sna,
+ struct kgem_bo *bo,
+ uint32_t width,
+ uint32_t height,
+ uint32_t format,
+ Bool is_dst)
+{
+ uint32_t *ss;
+ uint32_t domains;
+ uint16_t offset;
+
+ /* After the first bind, we manage the cache domains within the batch */
+ if (is_dst) {
+ domains = I915_GEM_DOMAIN_RENDER << 16 |I915_GEM_DOMAIN_RENDER;
+ kgem_bo_mark_dirty(bo);
+ } else {
+ domains = I915_GEM_DOMAIN_SAMPLER << 16;
+ is_dst = gen7_format_is_dst(format);
+ }
+
+ offset = sna->kgem.surface - sizeof(struct gen7_surface_state_padded) / sizeof(uint32_t);
+ offset *= sizeof(uint32_t);
+
+ if (is_dst) {
+ if (bo->dst_bound)
+ return bo->dst_bound;
+
+ bo->dst_bound = offset;
+ } else {
+ if (bo->src_bound)
+ return bo->src_bound;
+
+ bo->src_bound = offset;
+ }
+
+ sna->kgem.surface -=
+ sizeof(struct gen7_surface_state_padded) / sizeof(uint32_t);
+ ss = sna->kgem.batch + sna->kgem.surface;
+ ss[0] = (GEN7_SURFACE_2D << GEN7_SURFACE_TYPE_SHIFT |
+ gen7_tiling_bits(bo->tiling) |
+ format << GEN7_SURFACE_FORMAT_SHIFT);
+ ss[1] = kgem_add_reloc(&sna->kgem,
+ sna->kgem.surface + 1,
+ bo, domains, 0);
+ ss[2] = ((width - 1) << GEN7_SURFACE_WIDTH_SHIFT |
+ (height - 1) << GEN7_SURFACE_HEIGHT_SHIFT);
+ ss[3] = (bo->pitch - 1) << GEN7_SURFACE_PITCH_SHIFT;
+ ss[4] = 0;
+ ss[5] = 0;
+ ss[6] = 0;
+ ss[7] = 0;
+
+ DBG(("[%x] bind bo(handle=%d, addr=%d), format=%d, width=%d, height=%d, pitch=%d, tiling=%d -> %s\n",
+ offset, bo->handle, ss[1],
+ format, width, height, bo->pitch, bo->tiling,
+ domains & 0xffff ? "render" : "sampler"));
+
+ return offset;
+}
+
+fastcall static void
+gen7_emit_composite_primitive_solid(struct sna *sna,
+ const struct sna_composite_op *op,
+ const struct sna_composite_rectangles *r)
+{
+ float *v;
+ union {
+ struct sna_coordinate p;
+ float f;
+ } dst;
+
+ v = sna->render.vertex_data + sna->render.vertex_used;
+ sna->render.vertex_used += 9;
+
+ dst.p.x = r->dst.x + r->width;
+ dst.p.y = r->dst.y + r->height;
+ v[0] = dst.f;
+ v[1] = 1.;
+ v[2] = 1.;
+
+ dst.p.x = r->dst.x;
+ v[3] = dst.f;
+ v[4] = 0.;
+ v[5] = 1.;
+
+ dst.p.y = r->dst.y;
+ v[6] = dst.f;
+ v[7] = 0.;
+ v[8] = 0.;
+}
+
+fastcall static void
+gen7_emit_composite_primitive_identity_source(struct sna *sna,
+ const struct sna_composite_op *op,
+ const struct sna_composite_rectangles *r)
+{
+ union {
+ struct sna_coordinate p;
+ float f;
+ } dst;
+ float *v;
+
+ v = sna->render.vertex_data + sna->render.vertex_used;
+ sna->render.vertex_used += 9;
+
+ dst.p.x = r->dst.x + r->width;
+ dst.p.y = r->dst.y + r->height;
+ v[0] = dst.f;
+ dst.p.x = r->dst.x;
+ v[3] = dst.f;
+ dst.p.y = r->dst.y;
+ v[6] = dst.f;
+
+ v[7] = v[4] = (r->src.x + op->src.offset[0]) * op->src.scale[0];
+ v[1] = v[4] + r->width * op->src.scale[0];
+
+ v[8] = (r->src.y + op->src.offset[1]) * op->src.scale[1];
+ v[5] = v[2] = v[8] + r->height * op->src.scale[1];
+}
+
+fastcall static void
+gen7_emit_composite_primitive_affine_source(struct sna *sna,
+ const struct sna_composite_op *op,
+ const struct sna_composite_rectangles *r)
+{
+ union {
+ struct sna_coordinate p;
+ float f;
+ } dst;
+ float *v;
+
+ v = sna->render.vertex_data + sna->render.vertex_used;
+ sna->render.vertex_used += 9;
+
+ dst.p.x = r->dst.x + r->width;
+ dst.p.y = r->dst.y + r->height;
+ v[0] = dst.f;
+ _sna_get_transformed_coordinates(op->src.offset[0] + r->src.x + r->width,
+ op->src.offset[1] + r->src.y + r->height,
+ op->src.transform,
+ &v[1], &v[2]);
+ v[1] *= op->src.scale[0];
+ v[2] *= op->src.scale[1];
+
+ dst.p.x = r->dst.x;
+ v[3] = dst.f;
+ _sna_get_transformed_coordinates(op->src.offset[0] + r->src.x,
+ op->src.offset[1] + r->src.y + r->height,
+ op->src.transform,
+ &v[4], &v[5]);
+ v[4] *= op->src.scale[0];
+ v[5] *= op->src.scale[1];
+
+ dst.p.y = r->dst.y;
+ v[6] = dst.f;
+ _sna_get_transformed_coordinates(op->src.offset[0] + r->src.x,
+ op->src.offset[1] + r->src.y,
+ op->src.transform,
+ &v[7], &v[8]);
+ v[7] *= op->src.scale[0];
+ v[8] *= op->src.scale[1];
+}
+
+fastcall static void
+gen7_emit_composite_primitive_identity_source_mask(struct sna *sna,
+ const struct sna_composite_op *op,
+ const struct sna_composite_rectangles *r)
+{
+ union {
+ struct sna_coordinate p;
+ float f;
+ } dst;
+ float src_x, src_y;
+ float msk_x, msk_y;
+ float w, h;
+ float *v;
+
+ src_x = r->src.x + op->src.offset[0];
+ src_y = r->src.y + op->src.offset[1];
+ msk_x = r->mask.x + op->mask.offset[0];
+ msk_y = r->mask.y + op->mask.offset[1];
+ w = r->width;
+ h = r->height;
+
+ v = sna->render.vertex_data + sna->render.vertex_used;
+ sna->render.vertex_used += 15;
+
+ dst.p.x = r->dst.x + r->width;
+ dst.p.y = r->dst.y + r->height;
+ v[0] = dst.f;
+ v[1] = (src_x + w) * op->src.scale[0];
+ v[2] = (src_y + h) * op->src.scale[1];
+ v[3] = (msk_x + w) * op->mask.scale[0];
+ v[4] = (msk_y + h) * op->mask.scale[1];
+
+ dst.p.x = r->dst.x;
+ v[5] = dst.f;
+ v[6] = src_x * op->src.scale[0];
+ v[7] = v[2];
+ v[8] = msk_x * op->mask.scale[0];
+ v[9] = v[4];
+
+ dst.p.y = r->dst.y;
+ v[10] = dst.f;
+ v[11] = v[6];
+ v[12] = src_y * op->src.scale[1];
+ v[13] = v[8];
+ v[14] = msk_y * op->mask.scale[1];
+}
+
+fastcall static void
+gen7_emit_composite_primitive(struct sna *sna,
+ const struct sna_composite_op *op,
+ const struct sna_composite_rectangles *r)
+{
+ float src_x[3], src_y[3], src_w[3], mask_x[3], mask_y[3], mask_w[3];
+ Bool is_affine = op->is_affine;
+ const float *src_sf = op->src.scale;
+ const float *mask_sf = op->mask.scale;
+
+ if (is_affine) {
+ sna_get_transformed_coordinates(r->src.x + op->src.offset[0],
+ r->src.y + op->src.offset[1],
+ op->src.transform,
+ &src_x[0],
+ &src_y[0]);
+
+ sna_get_transformed_coordinates(r->src.x + op->src.offset[0],
+ r->src.y + op->src.offset[1] + r->height,
+ op->src.transform,
+ &src_x[1],
+ &src_y[1]);
+
+ sna_get_transformed_coordinates(r->src.x + op->src.offset[0] + r->width,
+ r->src.y + op->src.offset[1] + r->height,
+ op->src.transform,
+ &src_x[2],
+ &src_y[2]);
+ } else {
+ if (!sna_get_transformed_coordinates_3d(r->src.x + op->src.offset[0],
+ r->src.y + op->src.offset[1],
+ op->src.transform,
+ &src_x[0],
+ &src_y[0],
+ &src_w[0]))
+ return;
+
+ if (!sna_get_transformed_coordinates_3d(r->src.x + op->src.offset[0],
+ r->src.y + op->src.offset[1] + r->height,
+ op->src.transform,
+ &src_x[1],
+ &src_y[1],
+ &src_w[1]))
+ return;
+
+ if (!sna_get_transformed_coordinates_3d(r->src.x + op->src.offset[0] + r->width,
+ r->src.y + op->src.offset[1] + r->height,
+ op->src.transform,
+ &src_x[2],
+ &src_y[2],
+ &src_w[2]))
+ return;
+ }
+
+ if (op->mask.bo) {
+ if (is_affine) {
+ sna_get_transformed_coordinates(r->mask.x + op->mask.offset[0],
+ r->mask.y + op->mask.offset[1],
+ op->mask.transform,
+ &mask_x[0],
+ &mask_y[0]);
+
+ sna_get_transformed_coordinates(r->mask.x + op->mask.offset[0],
+ r->mask.y + op->mask.offset[1] + r->height,
+ op->mask.transform,
+ &mask_x[1],
+ &mask_y[1]);
+
+ sna_get_transformed_coordinates(r->mask.x + op->mask.offset[0] + r->width,
+ r->mask.y + op->mask.offset[1] + r->height,
+ op->mask.transform,
+ &mask_x[2],
+ &mask_y[2]);
+ } else {
+ if (!sna_get_transformed_coordinates_3d(r->mask.x + op->mask.offset[0],
+ r->mask.y + op->mask.offset[1],
+ op->mask.transform,
+ &mask_x[0],
+ &mask_y[0],
+ &mask_w[0]))
+ return;
+
+ if (!sna_get_transformed_coordinates_3d(r->mask.x + op->mask.offset[0],
+ r->mask.y + op->mask.offset[1] + r->height,
+ op->mask.transform,
+ &mask_x[1],
+ &mask_y[1],
+ &mask_w[1]))
+ return;
+
+ if (!sna_get_transformed_coordinates_3d(r->mask.x + op->mask.offset[0] + r->width,
+ r->mask.y + op->mask.offset[1] + r->height,
+ op->mask.transform,
+ &mask_x[2],
+ &mask_y[2],
+ &mask_w[2]))
+ return;
+ }
+ }
+
+ OUT_VERTEX(r->dst.x + r->width, r->dst.y + r->height);
+ OUT_VERTEX_F(src_x[2] * src_sf[0]);
+ OUT_VERTEX_F(src_y[2] * src_sf[1]);
+ if (!is_affine)
+ OUT_VERTEX_F(src_w[2]);
+ if (op->mask.bo) {
+ OUT_VERTEX_F(mask_x[2] * mask_sf[0]);
+ OUT_VERTEX_F(mask_y[2] * mask_sf[1]);
+ if (!is_affine)
+ OUT_VERTEX_F(mask_w[2]);
+ }
+
+ OUT_VERTEX(r->dst.x, r->dst.y + r->height);
+ OUT_VERTEX_F(src_x[1] * src_sf[0]);
+ OUT_VERTEX_F(src_y[1] * src_sf[1]);
+ if (!is_affine)
+ OUT_VERTEX_F(src_w[1]);
+ if (op->mask.bo) {
+ OUT_VERTEX_F(mask_x[1] * mask_sf[0]);
+ OUT_VERTEX_F(mask_y[1] * mask_sf[1]);
+ if (!is_affine)
+ OUT_VERTEX_F(mask_w[1]);
+ }
+
+ OUT_VERTEX(r->dst.x, r->dst.y);
+ OUT_VERTEX_F(src_x[0] * src_sf[0]);
+ OUT_VERTEX_F(src_y[0] * src_sf[1]);
+ if (!is_affine)
+ OUT_VERTEX_F(src_w[0]);
+ if (op->mask.bo) {
+ OUT_VERTEX_F(mask_x[0] * mask_sf[0]);
+ OUT_VERTEX_F(mask_y[0] * mask_sf[1]);
+ if (!is_affine)
+ OUT_VERTEX_F(mask_w[0]);
+ }
+}
+
+static void gen7_emit_vertex_buffer(struct sna *sna,
+ const struct sna_composite_op *op)
+{
+ int id = op->u.gen7.ve_id;
+
+ OUT_BATCH(GEN7_3DSTATE_VERTEX_BUFFERS | (5 - 2));
+ OUT_BATCH(id << GEN7_VB0_BUFFER_INDEX_SHIFT |
+ GEN7_VB0_VERTEXDATA |
+ GEN7_VB0_ADDRESS_MODIFY_ENABLE |
+ 4*op->floats_per_vertex << GEN7_VB0_BUFFER_PITCH_SHIFT);
+ sna->render.vertex_reloc[id] = sna->kgem.nbatch;
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+
+ sna->render_state.gen7.vb_id |= 1 << id;
+}
+
+static void gen7_emit_primitive(struct sna *sna)
+{
+ if (sna->kgem.nbatch == sna->render_state.gen7.last_primitive) {
+ sna->render_state.gen7.vertex_offset = sna->kgem.nbatch - 5;
+ return;
+ }
+
+ OUT_BATCH(GEN7_3DPRIMITIVE |
+ GEN7_3DPRIMITIVE_VERTEX_SEQUENTIAL |
+ _3DPRIM_RECTLIST << GEN7_3DPRIMITIVE_TOPOLOGY_SHIFT |
+ 0 << 9 |
+ 4);
+ sna->render_state.gen7.vertex_offset = sna->kgem.nbatch;
+ OUT_BATCH(0); /* vertex count, to be filled in later */
+ OUT_BATCH(sna->render.vertex_index);
+ OUT_BATCH(1); /* single instance */
+ OUT_BATCH(0); /* start instance location */
+ OUT_BATCH(0); /* index buffer offset, ignored */
+ sna->render.vertex_start = sna->render.vertex_index;
+
+ sna->render_state.gen7.last_primitive = sna->kgem.nbatch;
+}
+
+static bool gen7_rectangle_begin(struct sna *sna,
+ const struct sna_composite_op *op)
+{
+ int id = op->u.gen7.ve_id;
+ int ndwords;
+
+ ndwords = 0;
+ if ((sna->render_state.gen7.vb_id & (1 << id)) == 0)
+ ndwords += 5;
+ if (sna->render_state.gen7.vertex_offset == 0)
+ ndwords += op->need_magic_ca_pass ? 60 : 6;
+ if (ndwords == 0)
+ return true;
+
+ if (!kgem_check_batch(&sna->kgem, ndwords))
+ return false;
+
+ if ((sna->render_state.gen7.vb_id & (1 << id)) == 0)
+ gen7_emit_vertex_buffer(sna, op);
+ if (sna->render_state.gen7.vertex_offset == 0)
+ gen7_emit_primitive(sna);
+
+ return true;
+}
+
+static int gen7_get_rectangles__flush(struct sna *sna, bool ca)
+{
+ if (!kgem_check_batch(&sna->kgem, ca ? 65 : 5))
+ return 0;
+ if (sna->kgem.nexec > KGEM_EXEC_SIZE(&sna->kgem) - 1)
+ return 0;
+ if (sna->kgem.nreloc > KGEM_RELOC_SIZE(&sna->kgem) - 1)
+ return 0;
+
+ gen7_vertex_finish(sna, FALSE);
+ sna->render.vertex_index = 0;
+
+ return ARRAY_SIZE(sna->render.vertex_data);
+}
+
+inline static int gen7_get_rectangles(struct sna *sna,
+ const struct sna_composite_op *op,
+ int want)
+{
+ int rem = vertex_space(sna);
+
+ if (rem < 3*op->floats_per_vertex) {
+ DBG(("flushing vbo for %s: %d < %d\n",
+ __FUNCTION__, rem, 3*op->floats_per_vertex));
+ rem = gen7_get_rectangles__flush(sna, op->need_magic_ca_pass);
+ if (rem == 0)
+ return 0;
+ }
+
+ if (!gen7_rectangle_begin(sna, op))
+ return 0;
+
+ if (want > 1 && want * op->floats_per_vertex*3 > rem)
+ want = rem / (3*op->floats_per_vertex);
+
+ sna->render.vertex_index += 3*want;
+ return want;
+}
+
+inline static uint32_t *gen7_composite_get_binding_table(struct sna *sna,
+ const struct sna_composite_op *op,
+ uint16_t *offset)
+{
+ uint32_t *table;
+
+ sna->kgem.surface -=
+ sizeof(struct gen7_surface_state_padded) / sizeof(uint32_t);
+ /* Clear all surplus entries to zero in case of prefetch */
+ table = memset(sna->kgem.batch + sna->kgem.surface,
+ 0, sizeof(struct gen7_surface_state_padded));
+
+ DBG(("%s(%x)\n", __FUNCTION__, 4*sna->kgem.surface));
+
+ *offset = sna->kgem.surface;
+ return table;
+}
+
+static uint32_t
+gen7_choose_composite_vertex_buffer(struct sna *sna,
+ const struct sna_composite_op *op)
+{
+ int has_mask = op->mask.bo != NULL;
+ int is_affine = op->is_affine;
+ return has_mask << 1 | is_affine;
+}
+
+static void
+gen7_get_batch(struct sna *sna)
+{
+ kgem_set_mode(&sna->kgem, KGEM_RENDER);
+
+ if (!kgem_check_batch_with_surfaces(&sna->kgem, 150, 4)) {
+ DBG(("%s: flushing batch: %d < %d+%d\n",
+ __FUNCTION__, sna->kgem.surface - sna->kgem.nbatch,
+ 150, 4*8));
+ kgem_submit(&sna->kgem);
+ }
+
+ if (sna->render_state.gen7.needs_invariant)
+ gen7_emit_invariant(sna);
+}
+
+static void gen7_emit_composite_state(struct sna *sna,
+ const struct sna_composite_op *op)
+{
+ uint32_t *binding_table;
+ uint16_t offset;
+
+ gen7_get_batch(sna);
+
+ binding_table = gen7_composite_get_binding_table(sna, op, &offset);
+
+ binding_table[0] =
+ gen7_bind_bo(sna,
+ op->dst.bo, op->dst.width, op->dst.height,
+ gen7_get_dest_format(op->dst.format),
+ TRUE);
+ binding_table[1] =
+ gen7_bind_bo(sna,
+ op->src.bo, op->src.width, op->src.height,
+ op->src.card_format,
+ FALSE);
+ if (op->mask.bo) {
+ binding_table[2] =
+ gen7_bind_bo(sna,
+ op->mask.bo,
+ op->mask.width,
+ op->mask.height,
+ op->mask.card_format,
+ FALSE);
+ }
+
+ if (sna->kgem.surface == offset&&
+ *(uint64_t *)(sna->kgem.batch + sna->render_state.gen7.surface_table) == *(uint64_t*)binding_table &&
+ (op->mask.bo == NULL ||
+ sna->kgem.batch[sna->render_state.gen7.surface_table+2] == binding_table[2])) {
+ sna->kgem.surface += sizeof(struct gen7_surface_state_padded) / sizeof(uint32_t);
+ offset = sna->render_state.gen7.surface_table;
+ }
+
+ gen7_emit_state(sna, op, offset);
+}
+
+static void
+gen7_align_vertex(struct sna *sna, const struct sna_composite_op *op)
+{
+ if (op->floats_per_vertex != sna->render_state.gen7.floats_per_vertex) {
+ DBG(("aligning vertex: was %d, now %d floats per vertex, %d->%d\n",
+ sna->render_state.gen7.floats_per_vertex,
+ op->floats_per_vertex,
+ sna->render.vertex_index,
+ (sna->render.vertex_used + op->floats_per_vertex - 1) / op->floats_per_vertex));
+ sna->render.vertex_index = (sna->render.vertex_used + op->floats_per_vertex - 1) / op->floats_per_vertex;
+ sna->render.vertex_used = sna->render.vertex_index * op->floats_per_vertex;
+ sna->render_state.gen7.floats_per_vertex = op->floats_per_vertex;
+ }
+}
+
+fastcall static void
+gen7_render_composite_blt(struct sna *sna,
+ const struct sna_composite_op *op,
+ const struct sna_composite_rectangles *r)
+{
+ if (!gen7_get_rectangles(sna, op, 1)) {
+ gen7_emit_composite_state(sna, op);
+ gen7_get_rectangles(sna, op, 1);
+ }
+
+ op->prim_emit(sna, op, r);
+}
+
+static void
+gen7_render_composite_boxes(struct sna *sna,
+ const struct sna_composite_op *op,
+ const BoxRec *box, int nbox)
+{
+ DBG(("composite_boxes(%d)\n", nbox));
+
+ do {
+ int nbox_this_time = gen7_get_rectangles(sna, op, nbox);
+ if (nbox_this_time == 0) {
+ gen7_emit_composite_state(sna, op);
+ nbox_this_time = gen7_get_rectangles(sna, op, nbox);
+ }
+ nbox -= nbox_this_time;
+ do {
+ struct sna_composite_rectangles r;
+
+ DBG((" %s: (%d, %d), (%d, %d)\n",
+ __FUNCTION__,
+ box->x1, box->y1, box->x2, box->y2));
+
+ r.dst.x = box->x1;
+ r.dst.y = box->y1;
+ r.width = box->x2 - box->x1;
+ r.height = box->y2 - box->y1;
+ r.src = r.mask = r.dst;
+
+ op->prim_emit(sna, op, &r);
+ box++;
+ } while (--nbox_this_time);
+ } while (nbox);
+}
+
+#ifndef MAX
+#define MAX(a,b) ((a) > (b) ? (a) : (b))
+#endif
+
+static uint32_t
+gen7_composite_create_blend_state(struct sna_static_stream *stream)
+{
+ char *base, *ptr;
+ int src, dst;
+
+ base = sna_static_stream_map(stream,
+ GEN7_BLENDFACTOR_COUNT * GEN7_BLENDFACTOR_COUNT * GEN7_BLEND_STATE_PADDED_SIZE,
+ 64);
+
+ ptr = base;
+ for (src = 0; src < GEN7_BLENDFACTOR_COUNT; src++) {
+ for (dst= 0; dst < GEN7_BLENDFACTOR_COUNT; dst++) {
+ struct gen7_blend_state *blend =
+ (struct gen7_blend_state *)ptr;
+
+ blend->blend0.dest_blend_factor = dst;
+ blend->blend0.source_blend_factor = src;
+ blend->blend0.blend_func = GEN7_BLENDFUNCTION_ADD;
+ blend->blend0.blend_enable = 1;
+
+ blend->blend1.post_blend_clamp_enable = 1;
+ blend->blend1.pre_blend_clamp_enable = 1;
+
+ ptr += GEN7_BLEND_STATE_PADDED_SIZE;
+ }
+ }
+
+ return sna_static_stream_offsetof(stream, base);
+}
+
+static uint32_t gen7_bind_video_source(struct sna *sna,
+ struct kgem_bo *src_bo,
+ uint32_t src_offset,
+ int src_width,
+ int src_height,
+ int src_pitch,
+ uint32_t src_surf_format)
+{
+ struct gen7_surface_state *ss;
+
+ sna->kgem.surface -= sizeof(struct gen7_surface_state_padded) / sizeof(uint32_t);
+
+ ss = memset(sna->kgem.batch + sna->kgem.surface, 0, sizeof(*ss));
+ ss->ss0.surface_type = GEN7_SURFACE_2D;
+ ss->ss0.surface_format = src_surf_format;
+
+ ss->ss1.base_addr =
+ kgem_add_reloc(&sna->kgem,
+ sna->kgem.surface + 1,
+ src_bo,
+ I915_GEM_DOMAIN_SAMPLER << 16,
+ src_offset);
+
+ ss->ss2.width = src_width - 1;
+ ss->ss2.height = src_height - 1;
+ ss->ss3.pitch = src_pitch - 1;
+
+ return sna->kgem.surface * sizeof(uint32_t);
+}
+
+static void gen7_emit_video_state(struct sna *sna,
+ struct sna_composite_op *op,
+ struct sna_video_frame *frame)
+{
+ uint32_t src_surf_format;
+ uint32_t src_surf_base[6];
+ int src_width[6];
+ int src_height[6];
+ int src_pitch[6];
+ uint32_t *binding_table;
+ uint16_t offset;
+ int n_src, n;
+
+ gen7_get_batch(sna);
+
+ src_surf_base[0] = 0;
+ src_surf_base[1] = 0;
+ src_surf_base[2] = frame->VBufOffset;
+ src_surf_base[3] = frame->VBufOffset;
+ src_surf_base[4] = frame->UBufOffset;
+ src_surf_base[5] = frame->UBufOffset;
+
+ if (is_planar_fourcc(frame->id)) {
+ src_surf_format = GEN7_SURFACEFORMAT_R8_UNORM;
+ src_width[1] = src_width[0] = frame->width;
+ src_height[1] = src_height[0] = frame->height;
+ src_pitch[1] = src_pitch[0] = frame->pitch[1];
+ src_width[4] = src_width[5] = src_width[2] = src_width[3] =
+ frame->width / 2;
+ src_height[4] = src_height[5] = src_height[2] = src_height[3] =
+ frame->height / 2;
+ src_pitch[4] = src_pitch[5] = src_pitch[2] = src_pitch[3] =
+ frame->pitch[0];
+ n_src = 6;
+ } else {
+ if (frame->id == FOURCC_UYVY)
+ src_surf_format = GEN7_SURFACEFORMAT_YCRCB_SWAPY;
+ else
+ src_surf_format = GEN7_SURFACEFORMAT_YCRCB_NORMAL;
+
+ src_width[0] = frame->width;
+ src_height[0] = frame->height;
+ src_pitch[0] = frame->pitch[0];
+ n_src = 1;
+ }
+
+ binding_table = gen7_composite_get_binding_table(sna, op, &offset);
+
+ binding_table[0] =
+ gen7_bind_bo(sna,
+ op->dst.bo, op->dst.width, op->dst.height,
+ gen7_get_dest_format(op->dst.format),
+ TRUE);
+ for (n = 0; n < n_src; n++) {
+ binding_table[1+n] =
+ gen7_bind_video_source(sna,
+ frame->bo,
+ src_surf_base[n],
+ src_width[n],
+ src_height[n],
+ src_pitch[n],
+ src_surf_format);
+ }
+
+ gen7_emit_state(sna, op, offset);
+}
+
+static Bool
+gen7_render_video(struct sna *sna,
+ struct sna_video *video,
+ struct sna_video_frame *frame,
+ RegionPtr dstRegion,
+ short src_w, short src_h,
+ short drw_w, short drw_h,
+ PixmapPtr pixmap)
+{
+ struct sna_composite_op tmp;
+ int nbox, dxo, dyo, pix_xoff, pix_yoff;
+ float src_scale_x, src_scale_y;
+ struct sna_pixmap *priv;
+ BoxPtr box;
+
+ DBG(("%s: src=(%d, %d), dst=(%d, %d), %dx[(%d, %d), (%d, %d)...]\n",
+ __FUNCTION__, src_w, src_h, drw_w, drw_h,
+ REGION_NUM_RECTS(dstRegion),
+ REGION_EXTENTS(NULL, dstRegion)->x1,
+ REGION_EXTENTS(NULL, dstRegion)->y1,
+ REGION_EXTENTS(NULL, dstRegion)->x2,
+ REGION_EXTENTS(NULL, dstRegion)->y2));
+
+ priv = sna_pixmap_force_to_gpu(pixmap);
+ if (priv == NULL)
+ return FALSE;
+
+ memset(&tmp, 0, sizeof(tmp));
+
+ tmp.op = PictOpSrc;
+ tmp.dst.pixmap = pixmap;
+ tmp.dst.width = pixmap->drawable.width;
+ tmp.dst.height = pixmap->drawable.height;
+ tmp.dst.format = sna_format_for_depth(pixmap->drawable.depth);
+ tmp.dst.bo = priv->gpu_bo;
+
+ tmp.src.filter = SAMPLER_FILTER_BILINEAR;
+ tmp.src.repeat = SAMPLER_EXTEND_PAD;
+
+ tmp.is_affine = TRUE;
+ tmp.floats_per_vertex = 3;
+
+ if (is_planar_fourcc(frame->id)) {
+ tmp.u.gen7.wm_kernel = GEN7_WM_KERNEL_VIDEO_PLANAR;
+ tmp.u.gen7.nr_surfaces = 7;
+ } else {
+ tmp.u.gen7.wm_kernel = GEN7_WM_KERNEL_VIDEO_PACKED;
+ tmp.u.gen7.nr_surfaces = 2;
+ }
+ tmp.u.gen7.nr_inputs = 1;
+ tmp.u.gen7.ve_id = 1;
+
+ if (!kgem_check_bo(&sna->kgem, tmp.dst.bo))
+ kgem_submit(&sna->kgem);
+ if (!kgem_check_bo(&sna->kgem, frame->bo))
+ kgem_submit(&sna->kgem);
+
+ if (kgem_bo_is_dirty(frame->bo))
+ kgem_emit_flush(&sna->kgem);
+
+ gen7_emit_video_state(sna, &tmp, frame);
+ gen7_align_vertex(sna, &tmp);
+
+ /* Set up the offset for translating from the given region (in screen
+ * coordinates) to the backing pixmap.
+ */
+#ifdef COMPOSITE
+ pix_xoff = -pixmap->screen_x + pixmap->drawable.x;
+ pix_yoff = -pixmap->screen_y + pixmap->drawable.y;
+#else
+ pix_xoff = 0;
+ pix_yoff = 0;
+#endif
+
+ dxo = dstRegion->extents.x1;
+ dyo = dstRegion->extents.y1;
+
+ /* Use normalized texture coordinates */
+ src_scale_x = ((float)src_w / frame->width) / (float)drw_w;
+ src_scale_y = ((float)src_h / frame->height) / (float)drw_h;
+
+ box = REGION_RECTS(dstRegion);
+ nbox = REGION_NUM_RECTS(dstRegion);
+ while (nbox--) {
+ BoxRec r;
+
+ r.x1 = box->x1 + pix_xoff;
+ r.x2 = box->x2 + pix_xoff;
+ r.y1 = box->y1 + pix_yoff;
+ r.y2 = box->y2 + pix_yoff;
+
+ if (!gen7_get_rectangles(sna, &tmp, 1)) {
+ gen7_emit_video_state(sna, &tmp, frame);
+ gen7_get_rectangles(sna, &tmp, 1);
+ }
+
+ OUT_VERTEX(r.x2, r.y2);
+ OUT_VERTEX_F((box->x2 - dxo) * src_scale_x);
+ OUT_VERTEX_F((box->y2 - dyo) * src_scale_y);
+
+ OUT_VERTEX(r.x1, r.y2);
+ OUT_VERTEX_F((box->x1 - dxo) * src_scale_x);
+ OUT_VERTEX_F((box->y2 - dyo) * src_scale_y);
+
+ OUT_VERTEX(r.x1, r.y1);
+ OUT_VERTEX_F((box->x1 - dxo) * src_scale_x);
+ OUT_VERTEX_F((box->y1 - dyo) * src_scale_y);
+
+ sna_damage_add_box(&priv->gpu_damage, &r);
+ sna_damage_subtract_box(&priv->cpu_damage, &r);
+ box++;
+ }
+
+ return TRUE;
+}
+
+static Bool
+gen7_composite_solid_init(struct sna *sna,
+ struct sna_composite_channel *channel,
+ uint32_t color)
+{
+ DBG(("%s: color=%x\n", __FUNCTION__, color));
+
+ channel->filter = PictFilterNearest;
+ channel->repeat = RepeatNormal;
+ channel->is_affine = TRUE;
+ channel->is_solid = TRUE;
+ channel->transform = NULL;
+ channel->width = 1;
+ channel->height = 1;
+ channel->card_format = GEN7_SURFACEFORMAT_B8G8R8A8_UNORM;
+
+ channel->bo = sna_render_get_solid(sna, color);
+
+ channel->scale[0] = channel->scale[1] = 1;
+ channel->offset[0] = channel->offset[1] = 0;
+ return channel->bo != NULL;
+}
+
+static int
+gen7_composite_picture(struct sna *sna,
+ PicturePtr picture,
+ struct sna_composite_channel *channel,
+ int x, int y,
+ int w, int h,
+ int dst_x, int dst_y)
+{
+ PixmapPtr pixmap;
+ uint32_t color;
+ int16_t dx, dy;
+
+ DBG(("%s: (%d, %d)x(%d, %d), dst=(%d, %d)\n",
+ __FUNCTION__, x, y, w, h, dst_x, dst_y));
+
+ channel->is_solid = FALSE;
+ channel->card_format = -1;
+
+ if (sna_picture_is_solid(picture, &color))
+ return gen7_composite_solid_init(sna, channel, color);
+
+ if (picture->pDrawable == NULL)
+ return sna_render_picture_fixup(sna, picture, channel,
+ x, y, w, h, dst_x, dst_y);
+
+ if (!gen7_check_repeat(picture))
+ return sna_render_picture_fixup(sna, picture, channel,
+ x, y, w, h, dst_x, dst_y);
+
+ if (!gen7_check_filter(picture))
+ return sna_render_picture_fixup(sna, picture, channel,
+ x, y, w, h, dst_x, dst_y);
+
+ channel->repeat = picture->repeat ? picture->repeatType : RepeatNone;
+ channel->filter = picture->filter;
+
+ pixmap = get_drawable_pixmap(picture->pDrawable);
+ get_drawable_deltas(picture->pDrawable, pixmap, &dx, &dy);
+
+ x += dx + picture->pDrawable->x;
+ y += dy + picture->pDrawable->y;
+
+ channel->is_affine = sna_transform_is_affine(picture->transform);
+ if (sna_transform_is_integer_translation(picture->transform, &dx, &dy)) {
+ DBG(("%s: integer translation (%d, %d), removing\n",
+ __FUNCTION__, dx, dy));
+ x += dx;
+ y += dy;
+ channel->transform = NULL;
+ channel->filter = PictFilterNearest;
+ } else
+ channel->transform = picture->transform;
+
+ channel->card_format = gen7_get_card_format(picture->format);
+ if (channel->card_format == -1)
+ return sna_render_picture_convert(sna, picture, channel, pixmap,
+ x, y, w, h, dst_x, dst_y);
+
+ if (pixmap->drawable.width > GEN7_MAX_SIZE ||
+ pixmap->drawable.height > GEN7_MAX_SIZE) {
+ DBG(("%s: extracting from pixmap %dx%d\n", __FUNCTION__,
+ pixmap->drawable.width, pixmap->drawable.height));
+ return sna_render_picture_extract(sna, picture, channel,
+ x, y, w, h, dst_x, dst_y);
+ }
+
+ return sna_render_pixmap_bo(sna, channel, pixmap,
+ x, y, w, h, dst_x, dst_y);
+}
+
+static void gen7_composite_channel_convert(struct sna_composite_channel *channel)
+{
+ channel->repeat = gen7_repeat(channel->repeat);
+ channel->filter = gen7_filter(channel->filter);
+ if (channel->card_format == -1)
+ channel->card_format = gen7_get_card_format(channel->pict_format);
+ assert(channel->card_format != -1);
+}
+
+static void gen7_render_composite_done(struct sna *sna,
+ const struct sna_composite_op *op)
+{
+ gen7_vertex_flush(sna);
+ _kgem_set_mode(&sna->kgem, KGEM_RENDER);
+ sna->render.op = NULL;
+
+ sna_render_composite_redirect_done(sna, op);
+
+ if (op->src.bo)
+ kgem_bo_destroy(&sna->kgem, op->src.bo);
+ if (op->mask.bo)
+ kgem_bo_destroy(&sna->kgem, op->mask.bo);
+}
+
+static Bool
+gen7_composite_set_target(struct sna *sna,
+ struct sna_composite_op *op,
+ PicturePtr dst)
+{
+ struct sna_pixmap *priv;
+
+ if (!gen7_check_dst_format(dst->format)) {
+ DBG(("%s: unsupported target format %08x\n",
+ __FUNCTION__, dst->format));
+ return FALSE;
+ }
+
+ op->dst.pixmap = get_drawable_pixmap(dst->pDrawable);
+ op->dst.width = op->dst.pixmap->drawable.width;
+ op->dst.height = op->dst.pixmap->drawable.height;
+ op->dst.format = dst->format;
+ priv = sna_pixmap(op->dst.pixmap);
+
+ op->dst.bo = NULL;
+ if (priv && priv->gpu_bo == NULL) {
+ op->dst.bo = priv->cpu_bo;
+ op->damage = &priv->cpu_damage;
+ }
+ if (op->dst.bo == NULL) {
+ priv = sna_pixmap_force_to_gpu(op->dst.pixmap);
+ if (priv == NULL)
+ return FALSE;
+
+ op->dst.bo = priv->gpu_bo;
+ if (!priv->gpu_only &&
+ !sna_damage_is_all(&priv->gpu_damage, op->dst.width, op->dst.height))
+ op->damage = &priv->gpu_damage;
+ }
+
+ get_drawable_deltas(dst->pDrawable, op->dst.pixmap,
+ &op->dst.x, &op->dst.y);
+
+ DBG(("%s: pixmap=%p, format=%08x, size=%dx%d, pitch=%d, delta=(%d,%d)\n",
+ __FUNCTION__,
+ op->dst.pixmap, (int)op->dst.format,
+ op->dst.width, op->dst.height,
+ op->dst.bo->pitch,
+ op->dst.x, op->dst.y));
+ return TRUE;
+}
+
+static Bool
+try_blt(struct sna *sna, PicturePtr dst, int width, int height)
+{
+ if (sna->kgem.mode == KGEM_BLT) {
+ DBG(("%s: already performing BLT\n", __FUNCTION__));
+ return TRUE;
+ }
+
+ if (width > GEN7_MAX_SIZE || height > GEN7_MAX_SIZE) {
+ DBG(("%s: operation too large for 3D pipe (%d, %d)\n",
+ __FUNCTION__, width, height));
+ return TRUE;
+ }
+
+ return FALSE;
+}
+
+static Bool
+gen7_render_composite(struct sna *sna,
+ uint8_t op,
+ PicturePtr src,
+ PicturePtr mask,
+ PicturePtr dst,
+ int16_t src_x, int16_t src_y,
+ int16_t msk_x, int16_t msk_y,
+ int16_t dst_x, int16_t dst_y,
+ int16_t width, int16_t height,
+ struct sna_composite_op *tmp)
+{
+
+#if NO_COMPOSITE
+ if (mask)
+ return FALSE;
+
+ return sna_blt_composite(sna, op,
+ src, dst,
+ src_x, src_y,
+ dst_x, dst_y,
+ width, height, tmp);
+#endif
+
+ DBG(("%s: %dx%d, current mode=%d\n", __FUNCTION__,
+ width, height, sna->kgem.mode));
+
+ if (mask == NULL &&
+ try_blt(sna, dst, width, height) &&
+ sna_blt_composite(sna, op,
+ src, dst,
+ src_x, src_y,
+ dst_x, dst_y,
+ width, height, tmp))
+ return TRUE;
+
+ if (op >= ARRAY_SIZE(gen7_blend_op))
+ return FALSE;
+
+ if (need_tiling(sna, width, height))
+ return sna_tiling_composite(sna,
+ op, src, mask, dst,
+ src_x, src_y,
+ msk_x, msk_y,
+ dst_x, dst_y,
+ width, height,
+ tmp);
+
+ tmp->op = op;
+ if (!gen7_composite_set_target(sna, tmp, dst))
+ return FALSE;
+
+ if (tmp->dst.width > GEN7_MAX_SIZE || tmp->dst.height > GEN7_MAX_SIZE) {
+ if (!sna_render_composite_redirect(sna, tmp,
+ dst_x, dst_y, width, height))
+ return FALSE;
+ }
+
+ switch (gen7_composite_picture(sna, src, &tmp->src,
+ src_x, src_y,
+ width, height,
+ dst_x, dst_y)) {
+ case -1:
+ goto cleanup_dst;
+ case 0:
+ gen7_composite_solid_init(sna, &tmp->src, 0);
+ case 1:
+ gen7_composite_channel_convert(&tmp->src);
+ break;
+ }
+
+ tmp->is_affine = tmp->src.is_affine;
+ tmp->has_component_alpha = FALSE;
+ tmp->need_magic_ca_pass = FALSE;
+
+ tmp->mask.bo = NULL;
+ tmp->mask.filter = SAMPLER_FILTER_NEAREST;
+ tmp->mask.repeat = SAMPLER_EXTEND_NONE;
+
+ tmp->prim_emit = gen7_emit_composite_primitive;
+ if (mask) {
+ if (mask->componentAlpha && PICT_FORMAT_RGB(mask->format)) {
+ tmp->has_component_alpha = TRUE;
+
+ /* Check if it's component alpha that relies on a source alpha and on
+ * the source value. We can only get one of those into the single
+ * source value that we get to blend with.
+ */
+ if (gen7_blend_op[op].src_alpha &&
+ (gen7_blend_op[op].src_blend != GEN7_BLENDFACTOR_ZERO)) {
+ if (op != PictOpOver)
+ goto cleanup_src;
+
+ tmp->need_magic_ca_pass = TRUE;
+ tmp->op = PictOpOutReverse;
+ }
+ }
+
+ switch (gen7_composite_picture(sna, mask, &tmp->mask,
+ msk_x, msk_y,
+ width, height,
+ dst_x, dst_y)) {
+ case -1:
+ goto cleanup_src;
+ case 0:
+ gen7_composite_solid_init(sna, &tmp->mask, 0);
+ case 1:
+ gen7_composite_channel_convert(&tmp->mask);
+ break;
+ }
+
+ tmp->is_affine &= tmp->mask.is_affine;
+
+ if (tmp->src.transform == NULL && tmp->mask.transform == NULL)
+ tmp->prim_emit = gen7_emit_composite_primitive_identity_source_mask;
+
+ tmp->floats_per_vertex = 5 + 2 * !tmp->is_affine;
+ } else {
+ if (tmp->src.is_solid)
+ tmp->prim_emit = gen7_emit_composite_primitive_solid;
+ else if (tmp->src.transform == NULL)
+ tmp->prim_emit = gen7_emit_composite_primitive_identity_source;
+ else if (tmp->src.is_affine)
+ tmp->prim_emit = gen7_emit_composite_primitive_affine_source;
+
+ tmp->floats_per_vertex = 3 + !tmp->is_affine;
+ }
+
+ tmp->u.gen7.wm_kernel =
+ gen7_choose_composite_kernel(tmp->op,
+ tmp->mask.bo != NULL,
+ tmp->has_component_alpha,
+ tmp->is_affine);
+ tmp->u.gen7.nr_surfaces = 2 + (tmp->mask.bo != NULL);
+ tmp->u.gen7.nr_inputs = 1 + (tmp->mask.bo != NULL);
+ tmp->u.gen7.ve_id =
+ gen7_choose_composite_vertex_buffer(sna, tmp);
+
+ tmp->blt = gen7_render_composite_blt;
+ tmp->boxes = gen7_render_composite_boxes;
+ tmp->done = gen7_render_composite_done;
+
+ if (!kgem_check_bo(&sna->kgem, tmp->dst.bo))
+ kgem_submit(&sna->kgem);
+ if (!kgem_check_bo(&sna->kgem, tmp->src.bo))
+ kgem_submit(&sna->kgem);
+ if (!kgem_check_bo(&sna->kgem, tmp->mask.bo))
+ kgem_submit(&sna->kgem);
+
+ if (kgem_bo_is_dirty(tmp->src.bo) || kgem_bo_is_dirty(tmp->mask.bo))
+ kgem_emit_flush(&sna->kgem);
+
+ gen7_emit_composite_state(sna, tmp);
+ gen7_align_vertex(sna, tmp);
+
+ sna->render.op = tmp;
+ return TRUE;
+
+cleanup_src:
+ if (tmp->src.bo)
+ kgem_bo_destroy(&sna->kgem, tmp->src.bo);
+cleanup_dst:
+ if (tmp->redirect.real_bo)
+ kgem_bo_destroy(&sna->kgem, tmp->dst.bo);
+ return FALSE;
+}
+
+static void
+gen7_emit_copy_state(struct sna *sna,
+ const struct sna_composite_op *op)
+{
+ uint32_t *binding_table;
+ uint16_t offset;
+
+ gen7_get_batch(sna);
+
+ binding_table = gen7_composite_get_binding_table(sna, op, &offset);
+
+ binding_table[0] =
+ gen7_bind_bo(sna,
+ op->dst.bo, op->dst.width, op->dst.height,
+ gen7_get_dest_format_for_depth(op->dst.pixmap->drawable.depth),
+ TRUE);
+ binding_table[1] =
+ gen7_bind_bo(sna,
+ op->src.bo, op->src.width, op->src.height,
+ op->src.card_format,
+ FALSE);
+
+ if (sna->kgem.surface == offset &&
+ *(uint64_t *)(sna->kgem.batch + sna->render_state.gen7.surface_table) == *(uint64_t*)binding_table) {
+ sna->kgem.surface += sizeof(struct gen7_surface_state_padded) / sizeof(uint32_t);
+ offset = sna->render_state.gen7.surface_table;
+ }
+
+ gen7_emit_state(sna, op, offset);
+}
+
+static Bool
+gen7_render_copy_boxes(struct sna *sna, uint8_t alu,
+ PixmapPtr src, struct kgem_bo *src_bo, int16_t src_dx, int16_t src_dy,
+ PixmapPtr dst, struct kgem_bo *dst_bo, int16_t dst_dx, int16_t dst_dy,
+ const BoxRec *box, int n)
+{
+ struct sna_composite_op tmp;
+
+#if NO_COPY_BOXES
+ if (!sna_blt_compare_depth(&src->drawable, &dst->drawable))
+ return FALSE;
+
+ return sna_blt_copy_boxes(sna, alu,
+ src_bo, src_dx, src_dy,
+ dst_bo, dst_dx, dst_dy,
+ dst->drawable.bitsPerPixel,
+ box, n);
+#endif
+
+ DBG(("%s (%d, %d)->(%d, %d) x %d, alu=%x, self-copy=%d\n",
+ __FUNCTION__, src_dx, src_dy, dst_dx, dst_dy, n, alu,
+ src_bo == dst_bo));
+
+ if (sna->kgem.mode == KGEM_BLT &&
+ sna_blt_compare_depth(&src->drawable, &dst->drawable) &&
+ sna_blt_copy_boxes(sna, alu,
+ src_bo, src_dx, src_dy,
+ dst_bo, dst_dx, dst_dy,
+ dst->drawable.bitsPerPixel,
+ box, n))
+ return TRUE;
+
+ if (!(alu == GXcopy || alu == GXclear) || src_bo == dst_bo ||
+ src->drawable.width > GEN7_MAX_SIZE ||
+ src->drawable.height > GEN7_MAX_SIZE ||
+ dst->drawable.width > GEN7_MAX_SIZE ||
+ dst->drawable.height > GEN7_MAX_SIZE) {
+ if (!sna_blt_compare_depth(&src->drawable, &dst->drawable))
+ return FALSE;
+
+ return sna_blt_copy_boxes(sna, alu,
+ src_bo, src_dx, src_dy,
+ dst_bo, dst_dx, dst_dy,
+ dst->drawable.bitsPerPixel,
+ box, n);
+ }
+ tmp.op = alu == GXcopy ? PictOpSrc : PictOpClear;
+
+ tmp.dst.pixmap = dst;
+ tmp.dst.x = tmp.dst.y = 0;
+ tmp.dst.width = dst->drawable.width;
+ tmp.dst.height = dst->drawable.height;
+ tmp.dst.format = sna_format_for_depth(dst->drawable.depth);
+ tmp.dst.bo = dst_bo;
+ tmp.dst.x = dst_dx;
+ tmp.dst.y = dst_dy;
+
+ tmp.src.bo = src_bo;
+ tmp.src.filter = SAMPLER_FILTER_NEAREST;
+ tmp.src.repeat = SAMPLER_EXTEND_NONE;
+ tmp.src.card_format =
+ gen7_get_card_format_for_depth(src->drawable.depth),
+ tmp.src.width = src->drawable.width;
+ tmp.src.height = src->drawable.height;
+
+ tmp.mask.bo = NULL;
+ tmp.mask.filter = SAMPLER_FILTER_NEAREST;
+ tmp.mask.repeat = SAMPLER_EXTEND_NONE;
+
+ tmp.is_affine = TRUE;
+ tmp.floats_per_vertex = 3;
+ tmp.has_component_alpha = 0;
+ tmp.need_magic_ca_pass = 0;
+
+ tmp.u.gen7.wm_kernel = GEN7_WM_KERNEL_NOMASK;
+ tmp.u.gen7.nr_surfaces = 2;
+ tmp.u.gen7.nr_inputs = 1;
+ tmp.u.gen7.ve_id = 1;
+
+ if (!kgem_check_bo(&sna->kgem, dst_bo))
+ kgem_submit(&sna->kgem);
+ if (!kgem_check_bo(&sna->kgem, src_bo))
+ kgem_submit(&sna->kgem);
+
+ if (kgem_bo_is_dirty(src_bo))
+ kgem_emit_flush(&sna->kgem);
+
+ gen7_emit_copy_state(sna, &tmp);
+ gen7_align_vertex(sna, &tmp);
+
+ tmp.src.scale[0] = 1.f / src->drawable.width;
+ tmp.src.scale[1] = 1.f / src->drawable.height;
+ do {
+ float *v;
+ int n_this_time = gen7_get_rectangles(sna, &tmp, n);
+ if (n_this_time == 0) {
+ gen7_emit_copy_state(sna, &tmp);
+ n_this_time = gen7_get_rectangles(sna, &tmp, n);
+ }
+ n -= n_this_time;
+
+ v = sna->render.vertex_data + sna->render.vertex_used;
+ sna->render.vertex_used += 9 * n_this_time;
+ do {
+
+ DBG((" (%d, %d) -> (%d, %d) + (%d, %d)\n",
+ box->x1 + src_dx, box->y1 + src_dy,
+ box->x1 + dst_dx, box->y1 + dst_dy,
+ box->x2 - box->x1, box->y2 - box->y1));
+ v[0] = pack_2s(box->x2, box->y2);
+ v[3] = pack_2s(box->x1, box->y2);
+ v[6] = pack_2s(box->x1, box->y1);
+
+ v[1] = (box->x2 + src_dx) * tmp.src.scale[0];
+ v[7] = v[4] = (box->x1 + src_dx) * tmp.src.scale[0];
+
+ v[5] = v[2] = (box->y2 + src_dy) * tmp.src.scale[1];
+ v[8] = (box->y1 + src_dy) * tmp.src.scale[1];
+
+ v += 9;
+ box++;
+ } while (--n_this_time);
+ } while (n);
+
+ gen7_vertex_flush(sna);
+ _kgem_set_mode(&sna->kgem, KGEM_RENDER);
+ return TRUE;
+}
+
+static void
+gen7_render_copy_blt(struct sna *sna,
+ const struct sna_copy_op *op,
+ int16_t sx, int16_t sy,
+ int16_t w, int16_t h,
+ int16_t dx, int16_t dy)
+{
+ if (!gen7_get_rectangles(sna, &op->base, 1)) {
+ gen7_emit_copy_state(sna, &op->base);
+ gen7_get_rectangles(sna, &op->base, 1);
+ }
+
+ OUT_VERTEX(dx+w, dy+h);
+ OUT_VERTEX_F((sx+w)*op->base.src.scale[0]);
+ OUT_VERTEX_F((sy+h)*op->base.src.scale[1]);
+
+ OUT_VERTEX(dx, dy+h);
+ OUT_VERTEX_F(sx*op->base.src.scale[0]);
+ OUT_VERTEX_F((sy+h)*op->base.src.scale[1]);
+
+ OUT_VERTEX(dx, dy);
+ OUT_VERTEX_F(sx*op->base.src.scale[0]);
+ OUT_VERTEX_F(sy*op->base.src.scale[1]);
+}
+
+static void
+gen7_render_copy_done(struct sna *sna, const struct sna_copy_op *op)
+{
+ gen7_vertex_flush(sna);
+ _kgem_set_mode(&sna->kgem, KGEM_RENDER);
+}
+
+static Bool
+gen7_render_copy(struct sna *sna, uint8_t alu,
+ PixmapPtr src, struct kgem_bo *src_bo,
+ PixmapPtr dst, struct kgem_bo *dst_bo,
+ struct sna_copy_op *op)
+{
+#if NO_COPY
+ if (!sna_blt_compare_depth(&src->drawable, &dst->drawable))
+ return FALSE;
+
+ return sna_blt_copy(sna, alu,
+ src_bo, dst_bo,
+ dst->drawable.bitsPerPixel,
+ op);
+#endif
+
+ DBG(("%s (alu=%d, src=(%dx%d), dst=(%dx%d))\n",
+ __FUNCTION__, alu,
+ src->drawable.width, src->drawable.height,
+ dst->drawable.width, dst->drawable.height));
+
+ if (sna->kgem.mode == KGEM_BLT &&
+ sna_blt_compare_depth(&src->drawable, &dst->drawable) &&
+ sna_blt_copy(sna, alu,
+ src_bo, dst_bo,
+ dst->drawable.bitsPerPixel,
+ op))
+ return TRUE;
+
+ if (!(alu == GXcopy || alu == GXclear) || src_bo == dst_bo ||
+ src->drawable.width > GEN7_MAX_SIZE ||
+ src->drawable.height > GEN7_MAX_SIZE ||
+ dst->drawable.width > GEN7_MAX_SIZE ||
+ dst->drawable.height > GEN7_MAX_SIZE) {
+ if (!sna_blt_compare_depth(&src->drawable, &dst->drawable))
+ return FALSE;
+
+ return sna_blt_copy(sna, alu, src_bo, dst_bo,
+ dst->drawable.bitsPerPixel,
+ op);
+ }
+
+ op->base.op = alu == GXcopy ? PictOpSrc : PictOpClear;
+
+ op->base.dst.pixmap = dst;
+ op->base.dst.width = dst->drawable.width;
+ op->base.dst.height = dst->drawable.height;
+ op->base.dst.format = sna_format_for_depth(dst->drawable.depth);
+ op->base.dst.bo = dst_bo;
+
+ op->base.src.bo = src_bo;
+ op->base.src.card_format =
+ gen7_get_card_format_for_depth(src->drawable.depth),
+ op->base.src.width = src->drawable.width;
+ op->base.src.height = src->drawable.height;
+ op->base.src.scale[0] = 1./src->drawable.width;
+ op->base.src.scale[1] = 1./src->drawable.height;
+ op->base.src.filter = SAMPLER_FILTER_NEAREST;
+ op->base.src.repeat = SAMPLER_EXTEND_NONE;
+
+ op->base.is_affine = true;
+ op->base.floats_per_vertex = 3;
+
+ op->base.u.gen7.wm_kernel = GEN7_WM_KERNEL_NOMASK;
+ op->base.u.gen7.nr_surfaces = 2;
+ op->base.u.gen7.nr_inputs = 1;
+ op->base.u.gen7.ve_id = 1;
+
+ if (!kgem_check_bo(&sna->kgem, dst_bo))
+ kgem_submit(&sna->kgem);
+ if (!kgem_check_bo(&sna->kgem, src_bo))
+ kgem_submit(&sna->kgem);
+
+ if (kgem_bo_is_dirty(src_bo))
+ kgem_emit_flush(&sna->kgem);
+
+ gen7_emit_copy_state(sna, &op->base);
+ gen7_align_vertex(sna, &op->base);
+
+ op->blt = gen7_render_copy_blt;
+ op->done = gen7_render_copy_done;
+ return TRUE;
+}
+
+static void
+gen7_emit_fill_state(struct sna *sna, const struct sna_composite_op *op)
+{
+ uint32_t *binding_table;
+ uint16_t offset;
+
+ /* XXX Render Target Fast Clear
+ * Set RTFC Enable in PS and render a rectangle.
+ * Limited to a clearing the full MSC surface only with a
+ * specific kernel.
+ */
+
+ gen7_get_batch(sna);
+
+ binding_table = gen7_composite_get_binding_table(sna, op, &offset);
+
+ binding_table[0] =
+ gen7_bind_bo(sna,
+ op->dst.bo, op->dst.width, op->dst.height,
+ gen7_get_dest_format(op->dst.format),
+ TRUE);
+ binding_table[1] =
+ gen7_bind_bo(sna,
+ op->src.bo, 1, 1,
+ GEN7_SURFACEFORMAT_B8G8R8A8_UNORM,
+ FALSE);
+
+ if (sna->kgem.surface == offset &&
+ *(uint64_t *)(sna->kgem.batch + sna->render_state.gen7.surface_table) == *(uint64_t*)binding_table) {
+ sna->kgem.surface +=
+ sizeof(struct gen7_surface_state_padded)/sizeof(uint32_t);
+ offset = sna->render_state.gen7.surface_table;
+ }
+
+ gen7_emit_state(sna, op, offset);
+}
+
+static Bool
+gen7_render_fill_boxes(struct sna *sna,
+ CARD8 op,
+ PictFormat format,
+ const xRenderColor *color,
+ PixmapPtr dst, struct kgem_bo *dst_bo,
+ const BoxRec *box, int n)
+{
+ struct sna_composite_op tmp;
+ uint32_t pixel;
+
+ DBG(("%s (op=%d, color=(%04x, %04x, %04x, %04x) [%08x])\n",
+ __FUNCTION__, op,
+ color->red, color->green, color->blue, color->alpha, (int)format));
+
+ if (op >= ARRAY_SIZE(gen7_blend_op)) {
+ DBG(("%s: fallback due to unhandled blend op: %d\n",
+ __FUNCTION__, op));
+ return FALSE;
+ }
+
+ if (sna->kgem.mode == KGEM_BLT ||
+ dst->drawable.width > GEN7_MAX_SIZE ||
+ dst->drawable.height > GEN7_MAX_SIZE ||
+ !gen7_check_dst_format(format)) {
+ uint8_t alu = GXcopy;
+
+ if (op == PictOpClear) {
+ alu = GXclear;
+ pixel = 0;
+ op = PictOpSrc;
+ }
+
+ if (op == PictOpOver && color->alpha >= 0xff00)
+ op = PictOpSrc;
+
+ if (op == PictOpSrc &&
+ sna_get_pixel_from_rgba(&pixel,
+ color->red,
+ color->green,
+ color->blue,
+ color->alpha,
+ format) &&
+ sna_blt_fill_boxes(sna, alu,
+ dst_bo, dst->drawable.bitsPerPixel,
+ pixel, box, n))
+ return TRUE;
+
+ if (dst->drawable.width > GEN7_MAX_SIZE ||
+ dst->drawable.height > GEN7_MAX_SIZE ||
+ !gen7_check_dst_format(format))
+ return FALSE;
+ }
+
+#if NO_FILL_BOXES
+ return FALSE;
+#endif
+
+ if (!sna_get_pixel_from_rgba(&pixel,
+ color->red,
+ color->green,
+ color->blue,
+ color->alpha,
+ PICT_a8r8g8b8))
+ return FALSE;
+
+ DBG(("%s(%08x x %d [(%d, %d), (%d, %d) ...])\n",
+ __FUNCTION__, pixel, n,
+ box[0].x1, box[0].y1, box[0].x2, box[0].y2));
+
+ memset(&tmp, 0, sizeof(tmp));
+
+ tmp.op = op;
+
+ tmp.dst.pixmap = dst;
+ tmp.dst.width = dst->drawable.width;
+ tmp.dst.height = dst->drawable.height;
+ tmp.dst.format = format;
+ tmp.dst.bo = dst_bo;
+
+ tmp.src.bo = sna_render_get_solid(sna, pixel);
+ tmp.src.filter = SAMPLER_FILTER_NEAREST;
+ tmp.src.repeat = SAMPLER_EXTEND_REPEAT;
+
+ tmp.is_affine = TRUE;
+ tmp.floats_per_vertex = 3;
+
+ tmp.u.gen7.wm_kernel = GEN7_WM_KERNEL_NOMASK;
+ tmp.u.gen7.nr_surfaces = 2;
+ tmp.u.gen7.nr_inputs = 1;
+ tmp.u.gen7.ve_id = 1;
+
+ if (!kgem_check_bo(&sna->kgem, dst_bo))
+ kgem_submit(&sna->kgem);
+
+ gen7_emit_fill_state(sna, &tmp);
+ gen7_align_vertex(sna, &tmp);
+
+ do {
+ int n_this_time = gen7_get_rectangles(sna, &tmp, n);
+ if (n_this_time == 0) {
+ gen7_emit_fill_state(sna, &tmp);
+ n_this_time = gen7_get_rectangles(sna, &tmp, n);
+ }
+ n -= n_this_time;
+ do {
+ DBG((" (%d, %d), (%d, %d)\n",
+ box->x1, box->y1, box->x2, box->y2));
+ OUT_VERTEX(box->x2, box->y2);
+ OUT_VERTEX_F(1);
+ OUT_VERTEX_F(1);
+
+ OUT_VERTEX(box->x1, box->y2);
+ OUT_VERTEX_F(0);
+ OUT_VERTEX_F(1);
+
+ OUT_VERTEX(box->x1, box->y1);
+ OUT_VERTEX_F(0);
+ OUT_VERTEX_F(0);
+
+ box++;
+ } while (--n_this_time);
+ } while (n);
+
+ gen7_vertex_flush(sna);
+ kgem_bo_destroy(&sna->kgem, tmp.src.bo);
+ _kgem_set_mode(&sna->kgem, KGEM_RENDER);
+ return TRUE;
+}
+
+static void
+gen7_render_fill_blt(struct sna *sna,
+ const struct sna_fill_op *op,
+ int16_t x, int16_t y, int16_t w, int16_t h)
+{
+ DBG(("%s: (%d, %d)x(%d, %d)\n", __FUNCTION__, x, y, w, h));
+
+ if (!gen7_get_rectangles(sna, &op->base, 1)) {
+ gen7_emit_fill_state(sna, &op->base);
+ gen7_get_rectangles(sna, &op->base, 1);
+ }
+
+ OUT_VERTEX(x+w, y+h);
+ OUT_VERTEX_F(1);
+ OUT_VERTEX_F(1);
+
+ OUT_VERTEX(x, y+h);
+ OUT_VERTEX_F(0);
+ OUT_VERTEX_F(1);
+
+ OUT_VERTEX(x, y);
+ OUT_VERTEX_F(0);
+ OUT_VERTEX_F(0);
+}
+
+static void
+gen7_render_fill_done(struct sna *sna, const struct sna_fill_op *op)
+{
+ gen7_vertex_flush(sna);
+ kgem_bo_destroy(&sna->kgem, op->base.src.bo);
+ _kgem_set_mode(&sna->kgem, KGEM_RENDER);
+}
+
+static Bool
+gen7_render_fill(struct sna *sna, uint8_t alu,
+ PixmapPtr dst, struct kgem_bo *dst_bo,
+ uint32_t color,
+ struct sna_fill_op *op)
+{
+ DBG(("%s: (alu=%d, color=%x)\n", __FUNCTION__, alu, color));
+
+#if NO_FILL
+ return sna_blt_fill(sna, alu,
+ dst_bo, dst->drawable.bitsPerPixel,
+ color,
+ op);
+#endif
+
+ if (sna->kgem.mode == KGEM_BLT &&
+ sna_blt_fill(sna, alu,
+ dst_bo, dst->drawable.bitsPerPixel,
+ color,
+ op))
+ return TRUE;
+
+ if (!(alu == GXcopy || alu == GXclear) ||
+ dst->drawable.width > GEN7_MAX_SIZE ||
+ dst->drawable.height > GEN7_MAX_SIZE)
+ return sna_blt_fill(sna, alu,
+ dst_bo, dst->drawable.bitsPerPixel,
+ color,
+ op);
+
+ if (alu == GXclear)
+ color = 0;
+
+ op->base.op = color == 0 ? PictOpClear : PictOpSrc;
+
+ op->base.dst.pixmap = dst;
+ op->base.dst.width = dst->drawable.width;
+ op->base.dst.height = dst->drawable.height;
+ op->base.dst.format = sna_format_for_depth(dst->drawable.depth);
+ op->base.dst.bo = dst_bo;
+
+ op->base.src.bo =
+ sna_render_get_solid(sna,
+ sna_rgba_for_color(color,
+ dst->drawable.depth));
+ op->base.src.filter = SAMPLER_FILTER_NEAREST;
+ op->base.src.repeat = SAMPLER_EXTEND_REPEAT;
+
+ op->base.is_affine = TRUE;
+ op->base.floats_per_vertex = 3;
+
+ op->base.u.gen7.wm_kernel = GEN7_WM_KERNEL_NOMASK;
+ op->base.u.gen7.nr_surfaces = 2;
+ op->base.u.gen7.nr_inputs = 1;
+ op->base.u.gen7.ve_id = 1;
+
+ if (!kgem_check_bo(&sna->kgem, dst_bo))
+ kgem_submit(&sna->kgem);
+
+ gen7_emit_fill_state(sna, &op->base);
+ gen7_align_vertex(sna, &op->base);
+
+ op->blt = gen7_render_fill_blt;
+ op->done = gen7_render_fill_done;
+ return TRUE;
+}
+
+static void gen7_render_flush(struct sna *sna)
+{
+ gen7_vertex_finish(sna, TRUE);
+}
+
+static void
+gen7_render_context_switch(struct kgem *kgem,
+ int new_mode)
+{
+ if (!new_mode)
+ return;
+
+ if (kgem->mode)
+ _kgem_submit(kgem);
+
+ kgem->ring = new_mode;
+}
+
+static void gen7_render_reset(struct sna *sna)
+{
+ sna->render_state.gen7.needs_invariant = TRUE;
+ sna->render_state.gen7.vb_id = 0;
+ sna->render_state.gen7.ve_id = -1;
+ sna->render_state.gen7.last_primitive = -1;
+
+ sna->render_state.gen7.num_sf_outputs = 0;
+ sna->render_state.gen7.samplers = -1;
+ sna->render_state.gen7.blend = -1;
+ sna->render_state.gen7.kernel = -1;
+ sna->render_state.gen7.drawrect_offset = -1;
+ sna->render_state.gen7.drawrect_limit = -1;
+ sna->render_state.gen7.surface_table = -1;
+}
+
+static void gen7_render_fini(struct sna *sna)
+{
+ kgem_bo_destroy(&sna->kgem, sna->render_state.gen7.general_bo);
+}
+
+static Bool gen7_render_setup(struct sna *sna)
+{
+ struct gen7_render_state *state = &sna->render_state.gen7;
+ struct sna_static_stream general;
+ struct gen7_sampler_state *ss;
+ int i, j, k, l, m;
+
+ sna_static_stream_init(&general);
+
+ /* Zero pad the start. If you see an offset of 0x0 in the batchbuffer
+ * dumps, you know it points to zero.
+ */
+ null_create(&general);
+
+ for (m = 0; m < GEN7_KERNEL_COUNT; m++)
+ state->wm_kernel[m] =
+ sna_static_stream_add(&general,
+ wm_kernels[m].data,
+ wm_kernels[m].size,
+ 64);
+
+ ss = sna_static_stream_map(&general,
+ 2 * sizeof(*ss) *
+ FILTER_COUNT * EXTEND_COUNT *
+ FILTER_COUNT * EXTEND_COUNT,
+ 32);
+ state->wm_state = sna_static_stream_offsetof(&general, ss);
+ for (i = 0; i < FILTER_COUNT; i++) {
+ for (j = 0; j < EXTEND_COUNT; j++) {
+ for (k = 0; k < FILTER_COUNT; k++) {
+ for (l = 0; l < EXTEND_COUNT; l++) {
+ sampler_state_init(ss++, i, j);
+ sampler_state_init(ss++, k, l);
+ }
+ }
+ }
+ }
+
+ state->cc_vp = gen7_create_cc_viewport(&general);
+ state->cc_blend = gen7_composite_create_blend_state(&general);
+
+ state->general_bo = sna_static_stream_fini(sna, &general);
+ return state->general_bo != NULL;
+}
+
+Bool gen7_render_init(struct sna *sna)
+{
+ if (!gen7_render_setup(sna))
+ return FALSE;
+
+ sna->kgem.context_switch = gen7_render_context_switch;
+
+ sna->render.composite = gen7_render_composite;
+ sna->render.video = gen7_render_video;
+
+ sna->render.copy_boxes = gen7_render_copy_boxes;
+ sna->render.copy = gen7_render_copy;
+
+ sna->render.fill_boxes = gen7_render_fill_boxes;
+ sna->render.fill = gen7_render_fill;
+
+ sna->render.flush = gen7_render_flush;
+ sna->render.reset = gen7_render_reset;
+ sna->render.fini = gen7_render_fini;
+
+ sna->render.max_3d_size = GEN7_MAX_SIZE;
+ return TRUE;
+}
diff --git a/src/sna/gen7_render.h b/src/sna/gen7_render.h
new file mode 100644
index 0000000..83d55ad
--- /dev/null
+++ b/src/sna/gen7_render.h
@@ -0,0 +1,1716 @@
+#ifndef GEN7_RENDER_H
+#define GEN7_RENDER_H
+
+#define INTEL_MASK(high, low) (((1 << ((high) - (low) + 1)) - 1) << (low))
+
+#define GEN7_3D(Pipeline,Opcode,Subopcode) ((3 << 29) | \
+ ((Pipeline) << 27) | \
+ ((Opcode) << 24) | \
+ ((Subopcode) << 16))
+
+#define GEN7_STATE_BASE_ADDRESS GEN7_3D(0, 1, 1)
+#define GEN7_STATE_SIP GEN7_3D(0, 1, 2)
+
+#define GEN7_PIPELINE_SELECT GEN7_3D(1, 1, 4)
+
+#define GEN7_MEDIA_STATE_POINTERS GEN7_3D(2, 0, 0)
+#define GEN7_MEDIA_OBJECT GEN7_3D(2, 1, 0)
+
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS GEN7_3D(3, 0, 1)
+# define GEN7_3DSTATE_BINDING_TABLE_MODIFY_PS (1 << 12)/* for GEN7 */
+# define GEN7_3DSTATE_BINDING_TABLE_MODIFY_GS (1 << 9) /* for GEN7 */
+# define GEN7_3DSTATE_BINDING_TABLE_MODIFY_VS (1 << 8) /* for GEN7 */
+
+#define GEN7_3DSTATE_VERTEX_BUFFERS GEN7_3D(3, 0, 8)
+#define GEN7_3DSTATE_VERTEX_ELEMENTS GEN7_3D(3, 0, 9)
+#define GEN7_3DSTATE_INDEX_BUFFER GEN7_3D(3, 0, 0xa)
+#define GEN7_3DSTATE_VF_STATISTICS GEN7_3D(3, 0, 0xb)
+
+#define GEN7_3DSTATE_DRAWING_RECTANGLE GEN7_3D(3, 1, 0)
+#define GEN7_3DSTATE_CONSTANT_COLOR GEN7_3D(3, 1, 1)
+#define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD GEN7_3D(3, 1, 2)
+#define GEN7_3DSTATE_CHROMA_KEY GEN7_3D(3, 1, 4)
+
+#define GEN7_3DSTATE_POLY_STIPPLE_OFFSET GEN7_3D(3, 1, 6)
+#define GEN7_3DSTATE_POLY_STIPPLE_PATTERN GEN7_3D(3, 1, 7)
+#define GEN7_3DSTATE_LINE_STIPPLE GEN7_3D(3, 1, 8)
+#define GEN7_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP GEN7_3D(3, 1, 9)
+/* These two are BLC and CTG only, not BW or CL */
+#define GEN7_3DSTATE_AA_LINE_PARAMS GEN7_3D(3, 1, 0xa)
+#define GEN7_3DSTATE_GS_SVB_INDEX GEN7_3D(3, 1, 0xb)
+
+#define GEN7_3DPRIMITIVE GEN7_3D(3, 3, 0)
+
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS GEN7_3D(3, 0, 0x02)
+# define GEN7_3DSTATE_SAMPLER_STATE_MODIFY_PS (1 << 12)
+# define GEN7_3DSTATE_SAMPLER_STATE_MODIFY_GS (1 << 9)
+# define GEN7_3DSTATE_SAMPLER_STATE_MODIFY_VS (1 << 8)
+
+#define GEN7_3DSTATE_URB GEN7_3D(3, 0, 0x05)
+/* DW1 */
+# define GEN7_3DSTATE_URB_VS_SIZE_SHIFT 16
+# define GEN7_3DSTATE_URB_VS_ENTRIES_SHIFT 0
+/* DW2 */
+# define GEN7_3DSTATE_URB_GS_ENTRIES_SHIFT 8
+# define GEN7_3DSTATE_URB_GS_SIZE_SHIFT 0
+
+#define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS GEN7_3D(3, 0, 0x0d)
+# define GEN7_3DSTATE_VIEWPORT_STATE_MODIFY_CC (1 << 12)
+# define GEN7_3DSTATE_VIEWPORT_STATE_MODIFY_SF (1 << 11)
+# define GEN7_3DSTATE_VIEWPORT_STATE_MODIFY_CLIP (1 << 10)
+
+#define GEN7_3DSTATE_CC_STATE_POINTERS GEN7_3D(3, 0, 0x0e)
+
+#define GEN7_3DSTATE_VS GEN7_3D(3, 0, 0x10)
+
+#define GEN7_3DSTATE_GS GEN7_3D(3, 0, 0x11)
+/* DW4 */
+# define GEN7_3DSTATE_GS_DISPATCH_START_GRF_SHIFT 0
+
+#define GEN7_3DSTATE_CLIP GEN7_3D(3, 0, 0x12)
+
+#define GEN7_3DSTATE_SF GEN7_3D(3, 0, 0x13)
+/* DW1 */
+# define GEN7_3DSTATE_SF_NUM_OUTPUTS_SHIFT 22
+# define GEN7_3DSTATE_SF_URB_ENTRY_READ_LENGTH_SHIFT 11
+# define GEN7_3DSTATE_SF_URB_ENTRY_READ_OFFSET_SHIFT 4
+/* DW2 */
+/* DW3 */
+# define GEN7_3DSTATE_SF_CULL_BOTH (0 << 29)
+# define GEN7_3DSTATE_SF_CULL_NONE (1 << 29)
+# define GEN7_3DSTATE_SF_CULL_FRONT (2 << 29)
+# define GEN7_3DSTATE_SF_CULL_BACK (3 << 29)
+/* DW4 */
+# define GEN7_3DSTATE_SF_TRI_PROVOKE_SHIFT 29
+# define GEN7_3DSTATE_SF_LINE_PROVOKE_SHIFT 27
+# define GEN7_3DSTATE_SF_TRIFAN_PROVOKE_SHIFT 25
+
+#define GEN7_3DSTATE_WM GEN7_3D(3, 0, 0x14)
+/* DW2 */
+# define GEN7_3DSTATE_WM_SAMPLER_COUNT_SHIFT 27
+# define GEN7_3DSTATE_WM_BINDING_TABLE_ENTRY_COUNT_SHIFT 18
+/* DW4 */
+# define GEN7_3DSTATE_WM_DISPATCH_START_GRF_0_SHIFT 16
+/* DW5 */
+# define GEN7_3DSTATE_WM_MAX_THREADS_SHIFT 25
+# define GEN7_3DSTATE_WM_DISPATCH_ENABLE (1 << 19)
+# define GEN7_3DSTATE_WM_16_DISPATCH_ENABLE (1 << 1)
+# define GEN7_3DSTATE_WM_8_DISPATCH_ENABLE (1 << 0)
+/* DW6 */
+# define GEN7_3DSTATE_WM_NUM_SF_OUTPUTS_SHIFT 20
+# define GEN7_3DSTATE_WM_NONPERSPECTIVE_SAMPLE_BARYCENTRIC (1 << 15)
+# define GEN7_3DSTATE_WM_NONPERSPECTIVE_CENTROID_BARYCENTRIC (1 << 14)
+# define GEN7_3DSTATE_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC (1 << 13)
+# define GEN7_3DSTATE_WM_PERSPECTIVE_SAMPLE_BARYCENTRIC (1 << 12)
+# define GEN7_3DSTATE_WM_PERSPECTIVE_CENTROID_BARYCENTRIC (1 << 11)
+# define GEN7_3DSTATE_WM_PERSPECTIVE_PIXEL_BARYCENTRIC (1 << 10)
+
+
+#define GEN7_3DSTATE_CONSTANT_VS GEN7_3D(3, 0, 0x15)
+#define GEN7_3DSTATE_CONSTANT_GS GEN7_3D(3, 0, 0x16)
+#define GEN7_3DSTATE_CONSTANT_PS GEN7_3D(3, 0, 0x17)
+
+#define GEN7_3DSTATE_SAMPLE_MASK GEN7_3D(3, 0, 0x18)
+
+#define GEN7_3DSTATE_MULTISAMPLE GEN7_3D(3, 1, 0x0d)
+/* DW1 */
+# define GEN7_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_CENTER (0 << 4)
+# define GEN7_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_UPPER_LEFT (1 << 4)
+# define GEN7_3DSTATE_MULTISAMPLE_NUMSAMPLES_1 (0 << 1)
+# define GEN7_3DSTATE_MULTISAMPLE_NUMSAMPLES_4 (2 << 1)
+# define GEN7_3DSTATE_MULTISAMPLE_NUMSAMPLES_8 (3 << 1)
+
+#define PIPELINE_SELECT_3D 0
+#define PIPELINE_SELECT_MEDIA 1
+
+/* for GEN7_STATE_BASE_ADDRESS */
+#define BASE_ADDRESS_MODIFY (1 << 0)
+
+/* for GEN7_PIPE_CONTROL */
+#define GEN7_PIPE_CONTROL_NOWRITE (0 << 14)
+#define GEN7_PIPE_CONTROL_WRITE_QWORD (1 << 14)
+#define GEN7_PIPE_CONTROL_WRITE_DEPTH (2 << 14)
+#define GEN7_PIPE_CONTROL_WRITE_TIME (3 << 14)
+#define GEN7_PIPE_CONTROL_DEPTH_STALL (1 << 13)
+#define GEN7_PIPE_CONTROL_WC_FLUSH (1 << 12)
+#define GEN7_PIPE_CONTROL_IS_FLUSH (1 << 11)
+#define GEN7_PIPE_CONTROL_TC_FLUSH (1 << 10)
+#define GEN7_PIPE_CONTROL_NOTIFY_ENABLE (1 << 8)
+#define GEN7_PIPE_CONTROL_GLOBAL_GTT (1 << 2)
+#define GEN7_PIPE_CONTROL_LOCAL_PGTT (0 << 2)
+#define GEN7_PIPE_CONTROL_DEPTH_CACHE_FLUSH (1 << 0)
+
+/* VERTEX_BUFFER_STATE Structure */
+#define GEN7_VB0_BUFFER_INDEX_SHIFT 26
+#define GEN7_VB0_VERTEXDATA (0 << 20)
+#define GEN7_VB0_INSTANCEDATA (1 << 20)
+#define GEN7_VB0_BUFFER_PITCH_SHIFT 0
+#define GEN7_VB0_ADDRESS_MODIFY_ENABLE (1 < 14)
+
+/* VERTEX_ELEMENT_STATE Structure */
+#define GEN7_VE0_VERTEX_BUFFER_INDEX_SHIFT 26
+#define GEN7_VE0_VALID (1 << 25)
+#define GEN7_VE0_FORMAT_SHIFT 16
+#define GEN7_VE0_OFFSET_SHIFT 0
+#define GEN7_VE1_VFCOMPONENT_0_SHIFT 28
+#define GEN7_VE1_VFCOMPONENT_1_SHIFT 24
+#define GEN7_VE1_VFCOMPONENT_2_SHIFT 20
+#define GEN7_VE1_VFCOMPONENT_3_SHIFT 16
+#define GEN7_VE1_DESTINATION_ELEMENT_OFFSET_SHIFT 0
+
+/* 3DPRIMITIVE bits */
+#define GEN7_3DPRIMITIVE_VERTEX_SEQUENTIAL (0 << 15)
+#define GEN7_3DPRIMITIVE_VERTEX_RANDOM (1 << 15)
+/* Primitive types are in gen7_defines.h */
+#define GEN7_3DPRIMITIVE_TOPOLOGY_SHIFT 10
+
+#define GEN7_SVG_CTL 0x7400
+
+#define GEN7_SVG_CTL_GS_BA (0 << 8)
+#define GEN7_SVG_CTL_SS_BA (1 << 8)
+#define GEN7_SVG_CTL_IO_BA (2 << 8)
+#define GEN7_SVG_CTL_GS_AUB (3 << 8)
+#define GEN7_SVG_CTL_IO_AUB (4 << 8)
+#define GEN7_SVG_CTL_SIP (5 << 8)
+
+#define GEN7_SVG_RDATA 0x7404
+#define GEN7_SVG_WORK_CTL 0x7408
+
+#define GEN7_VF_CTL 0x7500
+
+#define GEN7_VF_CTL_SNAPSHOT_COMPLETE (1 << 31)
+#define GEN7_VF_CTL_SNAPSHOT_MUX_SELECT_THREADID (0 << 8)
+#define GEN7_VF_CTL_SNAPSHOT_MUX_SELECT_VF_DEBUG (1 << 8)
+#define GEN7_VF_CTL_SNAPSHOT_TYPE_VERTEX_SEQUENCE (0 << 4)
+#define GEN7_VF_CTL_SNAPSHOT_TYPE_VERTEX_INDEX (1 << 4)
+#define GEN7_VF_CTL_SKIP_INITIAL_PRIMITIVES (1 << 3)
+#define GEN7_VF_CTL_MAX_PRIMITIVES_LIMIT_ENABLE (1 << 2)
+#define GEN7_VF_CTL_VERTEX_RANGE_LIMIT_ENABLE (1 << 1)
+#define GEN7_VF_CTL_SNAPSHOT_ENABLE (1 << 0)
+
+#define GEN7_VF_STRG_VAL 0x7504
+#define GEN7_VF_STR_VL_OVR 0x7508
+#define GEN7_VF_VC_OVR 0x750c
+#define GEN7_VF_STR_PSKIP 0x7510
+#define GEN7_VF_MAX_PRIM 0x7514
+#define GEN7_VF_RDATA 0x7518
+
+#define GEN7_VS_CTL 0x7600
+#define GEN7_VS_CTL_SNAPSHOT_COMPLETE (1 << 31)
+#define GEN7_VS_CTL_SNAPSHOT_MUX_VERTEX_0 (0 << 8)
+#define GEN7_VS_CTL_SNAPSHOT_MUX_VERTEX_1 (1 << 8)
+#define GEN7_VS_CTL_SNAPSHOT_MUX_VALID_COUNT (2 << 8)
+#define GEN7_VS_CTL_SNAPSHOT_MUX_VS_KERNEL_POINTER (3 << 8)
+#define GEN7_VS_CTL_SNAPSHOT_ALL_THREADS (1 << 2)
+#define GEN7_VS_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1)
+#define GEN7_VS_CTL_SNAPSHOT_ENABLE (1 << 0)
+
+#define GEN7_VS_STRG_VAL 0x7604
+#define GEN7_VS_RDATA 0x7608
+
+#define GEN7_SF_CTL 0x7b00
+#define GEN7_SF_CTL_SNAPSHOT_COMPLETE (1 << 31)
+#define GEN7_SF_CTL_SNAPSHOT_MUX_VERTEX_0_FF_ID (0 << 8)
+#define GEN7_SF_CTL_SNAPSHOT_MUX_VERTEX_0_REL_COUNT (1 << 8)
+#define GEN7_SF_CTL_SNAPSHOT_MUX_VERTEX_1_FF_ID (2 << 8)
+#define GEN7_SF_CTL_SNAPSHOT_MUX_VERTEX_1_REL_COUNT (3 << 8)
+#define GEN7_SF_CTL_SNAPSHOT_MUX_VERTEX_2_FF_ID (4 << 8)
+#define GEN7_SF_CTL_SNAPSHOT_MUX_VERTEX_2_REL_COUNT (5 << 8)
+#define GEN7_SF_CTL_SNAPSHOT_MUX_VERTEX_COUNT (6 << 8)
+#define GEN7_SF_CTL_SNAPSHOT_MUX_SF_KERNEL_POINTER (7 << 8)
+#define GEN7_SF_CTL_MIN_MAX_PRIMITIVE_RANGE_ENABLE (1 << 4)
+#define GEN7_SF_CTL_DEBUG_CLIP_RECTANGLE_ENABLE (1 << 3)
+#define GEN7_SF_CTL_SNAPSHOT_ALL_THREADS (1 << 2)
+#define GEN7_SF_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1)
+#define GEN7_SF_CTL_SNAPSHOT_ENABLE (1 << 0)
+
+#define GEN7_SF_STRG_VAL 0x7b04
+#define GEN7_SF_RDATA 0x7b18
+
+#define GEN7_WIZ_CTL 0x7c00
+#define GEN7_WIZ_CTL_SNAPSHOT_COMPLETE (1 << 31)
+#define GEN7_WIZ_CTL_SUBSPAN_INSTANCE_SHIFT 16
+#define GEN7_WIZ_CTL_SNAPSHOT_MUX_WIZ_KERNEL_POINTER (0 << 8)
+#define GEN7_WIZ_CTL_SNAPSHOT_MUX_SUBSPAN_INSTANCE (1 << 8)
+#define GEN7_WIZ_CTL_SNAPSHOT_MUX_PRIMITIVE_SEQUENCE (2 << 8)
+#define GEN7_WIZ_CTL_SINGLE_SUBSPAN_DISPATCH (1 << 6)
+#define GEN7_WIZ_CTL_IGNORE_COLOR_SCOREBOARD_STALLS (1 << 5)
+#define GEN7_WIZ_CTL_ENABLE_SUBSPAN_INSTANCE_COMPARE (1 << 4)
+#define GEN7_WIZ_CTL_USE_UPSTREAM_SNAPSHOT_FLAG (1 << 3)
+#define GEN7_WIZ_CTL_SNAPSHOT_ALL_THREADS (1 << 2)
+#define GEN7_WIZ_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1)
+#define GEN7_WIZ_CTL_SNAPSHOT_ENABLE (1 << 0)
+
+#define GEN7_WIZ_STRG_VAL 0x7c04
+#define GEN7_WIZ_RDATA 0x7c18
+
+#define GEN7_TS_CTL 0x7e00
+#define GEN7_TS_CTL_SNAPSHOT_COMPLETE (1 << 31)
+#define GEN7_TS_CTL_SNAPSHOT_MESSAGE_ERROR (0 << 8)
+#define GEN7_TS_CTL_SNAPSHOT_INTERFACE_DESCRIPTOR (3 << 8)
+#define GEN7_TS_CTL_SNAPSHOT_ALL_CHILD_THREADS (1 << 2)
+#define GEN7_TS_CTL_SNAPSHOT_ALL_ROOT_THREADS (1 << 1)
+#define GEN7_TS_CTL_SNAPSHOT_ENABLE (1 << 0)
+
+#define GEN7_TS_STRG_VAL 0x7e04
+#define GEN7_TS_RDATA 0x7e08
+
+#define GEN7_TD_CTL 0x8000
+#define GEN7_TD_CTL_MUX_SHIFT 8
+#define GEN7_TD_CTL_EXTERNAL_HALT_R0_DEBUG_MATCH (1 << 7)
+#define GEN7_TD_CTL_FORCE_EXTERNAL_HALT (1 << 6)
+#define GEN7_TD_CTL_EXCEPTION_MASK_OVERRIDE (1 << 5)
+#define GEN7_TD_CTL_FORCE_THREAD_BREAKPOINT_ENABLE (1 << 4)
+#define GEN7_TD_CTL_BREAKPOINT_ENABLE (1 << 2)
+#define GEN7_TD_CTL2 0x8004
+#define GEN7_TD_CTL2_ILLEGAL_OPCODE_EXCEPTION_OVERRIDE (1 << 28)
+#define GEN7_TD_CTL2_MASKSTACK_EXCEPTION_OVERRIDE (1 << 26)
+#define GEN7_TD_CTL2_SOFTWARE_EXCEPTION_OVERRIDE (1 << 25)
+#define GEN7_TD_CTL2_ACTIVE_THREAD_LIMIT_SHIFT 16
+#define GEN7_TD_CTL2_ACTIVE_THREAD_LIMIT_ENABLE (1 << 8)
+#define GEN7_TD_CTL2_THREAD_SPAWNER_EXECUTION_MASK_ENABLE (1 << 7)
+#define GEN7_TD_CTL2_WIZ_EXECUTION_MASK_ENABLE (1 << 6)
+#define GEN7_TD_CTL2_SF_EXECUTION_MASK_ENABLE (1 << 5)
+#define GEN7_TD_CTL2_CLIPPER_EXECUTION_MASK_ENABLE (1 << 4)
+#define GEN7_TD_CTL2_GS_EXECUTION_MASK_ENABLE (1 << 3)
+#define GEN7_TD_CTL2_VS_EXECUTION_MASK_ENABLE (1 << 0)
+#define GEN7_TD_VF_VS_EMSK 0x8008
+#define GEN7_TD_GS_EMSK 0x800c
+#define GEN7_TD_CLIP_EMSK 0x8010
+#define GEN7_TD_SF_EMSK 0x8014
+#define GEN7_TD_WIZ_EMSK 0x8018
+#define GEN7_TD_0_6_EHTRG_VAL 0x801c
+#define GEN7_TD_0_7_EHTRG_VAL 0x8020
+#define GEN7_TD_0_6_EHTRG_MSK 0x8024
+#define GEN7_TD_0_7_EHTRG_MSK 0x8028
+#define GEN7_TD_RDATA 0x802c
+#define GEN7_TD_TS_EMSK 0x8030
+
+#define GEN7_EU_CTL 0x8800
+#define GEN7_EU_CTL_SELECT_SHIFT 16
+#define GEN7_EU_CTL_DATA_MUX_SHIFT 8
+#define GEN7_EU_ATT_0 0x8810
+#define GEN7_EU_ATT_1 0x8814
+#define GEN7_EU_ATT_DATA_0 0x8820
+#define GEN7_EU_ATT_DATA_1 0x8824
+#define GEN7_EU_ATT_CLR_0 0x8830
+#define GEN7_EU_ATT_CLR_1 0x8834
+#define GEN7_EU_RDATA 0x8840
+
+#define GEN7_3D(Pipeline,Opcode,Subopcode) ((3 << 29) | \
+ ((Pipeline) << 27) | \
+ ((Opcode) << 24) | \
+ ((Subopcode) << 16))
+
+#define GEN7_STATE_BASE_ADDRESS GEN7_3D(0, 1, 1)
+#define GEN7_STATE_SIP GEN7_3D(0, 1, 2)
+
+#define GEN7_PIPELINE_SELECT GEN7_3D(1, 1, 4)
+
+#define GEN7_MEDIA_STATE_POINTERS GEN7_3D(2, 0, 0)
+#define GEN7_MEDIA_OBJECT GEN7_3D(2, 1, 0)
+
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS GEN7_3D(3, 0, 1)
+# define GEN7_3DSTATE_BINDING_TABLE_MODIFY_PS (1 << 12)/* for GEN7 */
+# define GEN7_3DSTATE_BINDING_TABLE_MODIFY_GS (1 << 9) /* for GEN7 */
+# define GEN7_3DSTATE_BINDING_TABLE_MODIFY_VS (1 << 8) /* for GEN7 */
+
+#define GEN7_3DSTATE_VERTEX_BUFFERS GEN7_3D(3, 0, 8)
+#define GEN7_3DSTATE_VERTEX_ELEMENTS GEN7_3D(3, 0, 9)
+#define GEN7_3DSTATE_INDEX_BUFFER GEN7_3D(3, 0, 0xa)
+#define GEN7_3DSTATE_VF_STATISTICS GEN7_3D(3, 0, 0xb)
+
+#define GEN7_3DSTATE_DRAWING_RECTANGLE GEN7_3D(3, 1, 0)
+#define GEN7_3DSTATE_CONSTANT_COLOR GEN7_3D(3, 1, 1)
+#define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD GEN7_3D(3, 1, 2)
+#define GEN7_3DSTATE_CHROMA_KEY GEN7_3D(3, 1, 4)
+
+#define GEN7_3DSTATE_POLY_STIPPLE_OFFSET GEN7_3D(3, 1, 6)
+#define GEN7_3DSTATE_POLY_STIPPLE_PATTERN GEN7_3D(3, 1, 7)
+#define GEN7_3DSTATE_LINE_STIPPLE GEN7_3D(3, 1, 8)
+#define GEN7_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP GEN7_3D(3, 1, 9)
+/* These two are BLC and CTG only, not BW or CL */
+#define GEN7_3DSTATE_AA_LINE_PARAMS GEN7_3D(3, 1, 0xa)
+#define GEN7_3DSTATE_GS_SVB_INDEX GEN7_3D(3, 1, 0xb)
+
+#define GEN7_PIPE_CONTROL GEN7_3D(3, 2, 0)
+
+#define GEN7_3DPRIMITIVE GEN7_3D(3, 3, 0)
+
+/* for GEN7+ */
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS GEN7_3D(3, 0, 0x02)
+# define GEN7_3DSTATE_SAMPLER_STATE_MODIFY_PS (1 << 12)
+# define GEN7_3DSTATE_SAMPLER_STATE_MODIFY_GS (1 << 9)
+# define GEN7_3DSTATE_SAMPLER_STATE_MODIFY_VS (1 << 8)
+
+#define GEN7_3DSTATE_URB GEN7_3D(3, 0, 0x05)
+/* DW1 */
+# define GEN7_3DSTATE_URB_VS_SIZE_SHIFT 16
+# define GEN7_3DSTATE_URB_VS_ENTRIES_SHIFT 0
+/* DW2 */
+# define GEN7_3DSTATE_URB_GS_ENTRIES_SHIFT 8
+# define GEN7_3DSTATE_URB_GS_SIZE_SHIFT 0
+
+#define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS GEN7_3D(3, 0, 0x0d)
+# define GEN7_3DSTATE_VIEWPORT_STATE_MODIFY_CC (1 << 12)
+# define GEN7_3DSTATE_VIEWPORT_STATE_MODIFY_SF (1 << 11)
+# define GEN7_3DSTATE_VIEWPORT_STATE_MODIFY_CLIP (1 << 10)
+
+#define GEN7_3DSTATE_CC_STATE_POINTERS GEN7_3D(3, 0, 0x0e)
+
+#define GEN7_3DSTATE_VS GEN7_3D(3, 0, 0x10)
+
+#define GEN7_3DSTATE_GS GEN7_3D(3, 0, 0x11)
+/* DW4 */
+# define GEN7_3DSTATE_GS_DISPATCH_START_GRF_SHIFT 0
+
+#define GEN7_3DSTATE_CLIP GEN7_3D(3, 0, 0x12)
+
+#define GEN7_3DSTATE_SF GEN7_3D(3, 0, 0x13)
+/* DW1 */
+# define GEN7_3DSTATE_SF_NUM_OUTPUTS_SHIFT 22
+# define GEN7_3DSTATE_SF_URB_ENTRY_READ_LENGTH_SHIFT 11
+# define GEN7_3DSTATE_SF_URB_ENTRY_READ_OFFSET_SHIFT 4
+/* DW2 */
+/* DW3 */
+# define GEN7_3DSTATE_SF_CULL_BOTH (0 << 29)
+# define GEN7_3DSTATE_SF_CULL_NONE (1 << 29)
+# define GEN7_3DSTATE_SF_CULL_FRONT (2 << 29)
+# define GEN7_3DSTATE_SF_CULL_BACK (3 << 29)
+/* DW4 */
+# define GEN7_3DSTATE_SF_TRI_PROVOKE_SHIFT 29
+# define GEN7_3DSTATE_SF_LINE_PROVOKE_SHIFT 27
+# define GEN7_3DSTATE_SF_TRIFAN_PROVOKE_SHIFT 25
+
+
+#define GEN7_3DSTATE_WM GEN7_3D(3, 0, 0x14)
+/* DW2 */
+# define GEN7_3DSTATE_WM_SAMPLER_COUNT_SHITF 27
+# define GEN7_3DSTATE_WM_BINDING_TABLE_ENTRY_COUNT_SHIFT 18
+/* DW4 */
+# define GEN7_3DSTATE_WM_DISPATCH_START_GRF_0_SHIFT 16
+/* DW5 */
+# define GEN7_3DSTATE_WM_MAX_THREADS_SHIFT 25
+# define GEN7_3DSTATE_WM_DISPATCH_ENABLE (1 << 19)
+# define GEN7_3DSTATE_WM_16_DISPATCH_ENABLE (1 << 1)
+# define GEN7_3DSTATE_WM_8_DISPATCH_ENABLE (1 << 0)
+/* DW6 */
+# define GEN7_3DSTATE_WM_NUM_SF_OUTPUTS_SHIFT 20
+# define GEN7_3DSTATE_WM_NONPERSPECTIVE_SAMPLE_BARYCENTRIC (1 << 15)
+# define GEN7_3DSTATE_WM_NONPERSPECTIVE_CENTROID_BARYCENTRIC (1 << 14)
+# define GEN7_3DSTATE_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC (1 << 13)
+# define GEN7_3DSTATE_WM_PERSPECTIVE_SAMPLE_BARYCENTRIC (1 << 12)
+# define GEN7_3DSTATE_WM_PERSPECTIVE_CENTROID_BARYCENTRIC (1 << 11)
+# define GEN7_3DSTATE_WM_PERSPECTIVE_PIXEL_BARYCENTRIC (1 << 10)
+
+
+#define GEN7_3DSTATE_CONSTANT_VS GEN7_3D(3, 0, 0x15)
+#define GEN7_3DSTATE_CONSTANT_GS GEN7_3D(3, 0, 0x16)
+#define GEN7_3DSTATE_CONSTANT_PS GEN7_3D(3, 0, 0x17)
+
+#define GEN7_3DSTATE_SAMPLE_MASK GEN7_3D(3, 0, 0x18)
+
+#define GEN7_3DSTATE_MULTISAMPLE GEN7_3D(3, 1, 0x0d)
+/* DW1 */
+# define GEN7_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_CENTER (0 << 4)
+# define GEN7_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_UPPER_LEFT (1 << 4)
+# define GEN7_3DSTATE_MULTISAMPLE_NUMSAMPLES_1 (0 << 1)
+# define GEN7_3DSTATE_MULTISAMPLE_NUMSAMPLES_4 (2 << 1)
+# define GEN7_3DSTATE_MULTISAMPLE_NUMSAMPLES_8 (3 << 1)
+
+#define PIPELINE_SELECT_3D 0
+#define PIPELINE_SELECT_MEDIA 1
+
+#define UF0_CS_REALLOC (1 << 13)
+#define UF0_VFE_REALLOC (1 << 12)
+#define UF0_SF_REALLOC (1 << 11)
+#define UF0_CLIP_REALLOC (1 << 10)
+#define UF0_GS_REALLOC (1 << 9)
+#define UF0_VS_REALLOC (1 << 8)
+#define UF1_CLIP_FENCE_SHIFT 20
+#define UF1_GS_FENCE_SHIFT 10
+#define UF1_VS_FENCE_SHIFT 0
+#define UF2_CS_FENCE_SHIFT 20
+#define UF2_VFE_FENCE_SHIFT 10
+#define UF2_SF_FENCE_SHIFT 0
+
+/* for GEN7_STATE_BASE_ADDRESS */
+#define BASE_ADDRESS_MODIFY (1 << 0)
+
+/* for GEN7_3DSTATE_PIPELINED_POINTERS */
+#define GEN7_GS_DISABLE 0
+#define GEN7_GS_ENABLE 1
+#define GEN7_CLIP_DISABLE 0
+#define GEN7_CLIP_ENABLE 1
+
+/* for GEN7_PIPE_CONTROL */
+#define GEN7_PIPE_CONTROL_NOWRITE (0 << 14)
+#define GEN7_PIPE_CONTROL_WRITE_QWORD (1 << 14)
+#define GEN7_PIPE_CONTROL_WRITE_DEPTH (2 << 14)
+#define GEN7_PIPE_CONTROL_WRITE_TIME (3 << 14)
+#define GEN7_PIPE_CONTROL_DEPTH_STALL (1 << 13)
+#define GEN7_PIPE_CONTROL_WC_FLUSH (1 << 12)
+#define GEN7_PIPE_CONTROL_IS_FLUSH (1 << 11)
+#define GEN7_PIPE_CONTROL_TC_FLUSH (1 << 10)
+#define GEN7_PIPE_CONTROL_NOTIFY_ENABLE (1 << 8)
+#define GEN7_PIPE_CONTROL_GLOBAL_GTT (1 << 2)
+#define GEN7_PIPE_CONTROL_LOCAL_PGTT (0 << 2)
+#define GEN7_PIPE_CONTROL_DEPTH_CACHE_FLUSH (1 << 0)
+
+/* 3DPRIMITIVE bits */
+#define GEN7_3DPRIMITIVE_VERTEX_SEQUENTIAL (0 << 15)
+#define GEN7_3DPRIMITIVE_VERTEX_RANDOM (1 << 15)
+/* Primitive types are in gen7_defines.h */
+#define GEN7_3DPRIMITIVE_TOPOLOGY_SHIFT 10
+
+#define GEN7_SVG_CTL 0x7400
+
+#define GEN7_SVG_CTL_GS_BA (0 << 8)
+#define GEN7_SVG_CTL_SS_BA (1 << 8)
+#define GEN7_SVG_CTL_IO_BA (2 << 8)
+#define GEN7_SVG_CTL_GS_AUB (3 << 8)
+#define GEN7_SVG_CTL_IO_AUB (4 << 8)
+#define GEN7_SVG_CTL_SIP (5 << 8)
+
+#define GEN7_SVG_RDATA 0x7404
+#define GEN7_SVG_WORK_CTL 0x7408
+
+#define GEN7_VF_CTL 0x7500
+
+#define GEN7_VF_CTL_SNAPSHOT_COMPLETE (1 << 31)
+#define GEN7_VF_CTL_SNAPSHOT_MUX_SELECT_THREADID (0 << 8)
+#define GEN7_VF_CTL_SNAPSHOT_MUX_SELECT_VF_DEBUG (1 << 8)
+#define GEN7_VF_CTL_SNAPSHOT_TYPE_VERTEX_SEQUENCE (0 << 4)
+#define GEN7_VF_CTL_SNAPSHOT_TYPE_VERTEX_INDEX (1 << 4)
+#define GEN7_VF_CTL_SKIP_INITIAL_PRIMITIVES (1 << 3)
+#define GEN7_VF_CTL_MAX_PRIMITIVES_LIMIT_ENABLE (1 << 2)
+#define GEN7_VF_CTL_VERTEX_RANGE_LIMIT_ENABLE (1 << 1)
+#define GEN7_VF_CTL_SNAPSHOT_ENABLE (1 << 0)
+
+#define GEN7_VF_STRG_VAL 0x7504
+#define GEN7_VF_STR_VL_OVR 0x7508
+#define GEN7_VF_VC_OVR 0x750c
+#define GEN7_VF_STR_PSKIP 0x7510
+#define GEN7_VF_MAX_PRIM 0x7514
+#define GEN7_VF_RDATA 0x7518
+
+#define GEN7_VS_CTL 0x7600
+#define GEN7_VS_CTL_SNAPSHOT_COMPLETE (1 << 31)
+#define GEN7_VS_CTL_SNAPSHOT_MUX_VERTEX_0 (0 << 8)
+#define GEN7_VS_CTL_SNAPSHOT_MUX_VERTEX_1 (1 << 8)
+#define GEN7_VS_CTL_SNAPSHOT_MUX_VALID_COUNT (2 << 8)
+#define GEN7_VS_CTL_SNAPSHOT_MUX_VS_KERNEL_POINTER (3 << 8)
+#define GEN7_VS_CTL_SNAPSHOT_ALL_THREADS (1 << 2)
+#define GEN7_VS_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1)
+#define GEN7_VS_CTL_SNAPSHOT_ENABLE (1 << 0)
+
+#define GEN7_VS_STRG_VAL 0x7604
+#define GEN7_VS_RDATA 0x7608
+
+#define GEN7_SF_CTL 0x7b00
+#define GEN7_SF_CTL_SNAPSHOT_COMPLETE (1 << 31)
+#define GEN7_SF_CTL_SNAPSHOT_MUX_VERTEX_0_FF_ID (0 << 8)
+#define GEN7_SF_CTL_SNAPSHOT_MUX_VERTEX_0_REL_COUNT (1 << 8)
+#define GEN7_SF_CTL_SNAPSHOT_MUX_VERTEX_1_FF_ID (2 << 8)
+#define GEN7_SF_CTL_SNAPSHOT_MUX_VERTEX_1_REL_COUNT (3 << 8)
+#define GEN7_SF_CTL_SNAPSHOT_MUX_VERTEX_2_FF_ID (4 << 8)
+#define GEN7_SF_CTL_SNAPSHOT_MUX_VERTEX_2_REL_COUNT (5 << 8)
+#define GEN7_SF_CTL_SNAPSHOT_MUX_VERTEX_COUNT (6 << 8)
+#define GEN7_SF_CTL_SNAPSHOT_MUX_SF_KERNEL_POINTER (7 << 8)
+#define GEN7_SF_CTL_MIN_MAX_PRIMITIVE_RANGE_ENABLE (1 << 4)
+#define GEN7_SF_CTL_DEBUG_CLIP_RECTANGLE_ENABLE (1 << 3)
+#define GEN7_SF_CTL_SNAPSHOT_ALL_THREADS (1 << 2)
+#define GEN7_SF_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1)
+#define GEN7_SF_CTL_SNAPSHOT_ENABLE (1 << 0)
+
+#define GEN7_SF_STRG_VAL 0x7b04
+#define GEN7_SF_RDATA 0x7b18
+
+#define GEN7_WIZ_CTL 0x7c00
+#define GEN7_WIZ_CTL_SNAPSHOT_COMPLETE (1 << 31)
+#define GEN7_WIZ_CTL_SUBSPAN_INSTANCE_SHIFT 16
+#define GEN7_WIZ_CTL_SNAPSHOT_MUX_WIZ_KERNEL_POINTER (0 << 8)
+#define GEN7_WIZ_CTL_SNAPSHOT_MUX_SUBSPAN_INSTANCE (1 << 8)
+#define GEN7_WIZ_CTL_SNAPSHOT_MUX_PRIMITIVE_SEQUENCE (2 << 8)
+#define GEN7_WIZ_CTL_SINGLE_SUBSPAN_DISPATCH (1 << 6)
+#define GEN7_WIZ_CTL_IGNORE_COLOR_SCOREBOARD_STALLS (1 << 5)
+#define GEN7_WIZ_CTL_ENABLE_SUBSPAN_INSTANCE_COMPARE (1 << 4)
+#define GEN7_WIZ_CTL_USE_UPSTREAM_SNAPSHOT_FLAG (1 << 3)
+#define GEN7_WIZ_CTL_SNAPSHOT_ALL_THREADS (1 << 2)
+#define GEN7_WIZ_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1)
+#define GEN7_WIZ_CTL_SNAPSHOT_ENABLE (1 << 0)
+
+#define GEN7_WIZ_STRG_VAL 0x7c04
+#define GEN7_WIZ_RDATA 0x7c18
+
+#define GEN7_TS_CTL 0x7e00
+#define GEN7_TS_CTL_SNAPSHOT_COMPLETE (1 << 31)
+#define GEN7_TS_CTL_SNAPSHOT_MESSAGE_ERROR (0 << 8)
+#define GEN7_TS_CTL_SNAPSHOT_INTERFACE_DESCRIPTOR (3 << 8)
+#define GEN7_TS_CTL_SNAPSHOT_ALL_CHILD_THREADS (1 << 2)
+#define GEN7_TS_CTL_SNAPSHOT_ALL_ROOT_THREADS (1 << 1)
+#define GEN7_TS_CTL_SNAPSHOT_ENABLE (1 << 0)
+
+#define GEN7_TS_STRG_VAL 0x7e04
+#define GEN7_TS_RDATA 0x7e08
+
+#define GEN7_TD_CTL 0x8000
+#define GEN7_TD_CTL_MUX_SHIFT 8
+#define GEN7_TD_CTL_EXTERNAL_HALT_R0_DEBUG_MATCH (1 << 7)
+#define GEN7_TD_CTL_FORCE_EXTERNAL_HALT (1 << 6)
+#define GEN7_TD_CTL_EXCEPTION_MASK_OVERRIDE (1 << 5)
+#define GEN7_TD_CTL_FORCE_THREAD_BREAKPOINT_ENABLE (1 << 4)
+#define GEN7_TD_CTL_BREAKPOINT_ENABLE (1 << 2)
+#define GEN7_TD_CTL2 0x8004
+#define GEN7_TD_CTL2_ILLEGAL_OPCODE_EXCEPTION_OVERRIDE (1 << 28)
+#define GEN7_TD_CTL2_MASKSTACK_EXCEPTION_OVERRIDE (1 << 26)
+#define GEN7_TD_CTL2_SOFTWARE_EXCEPTION_OVERRIDE (1 << 25)
+#define GEN7_TD_CTL2_ACTIVE_THREAD_LIMIT_SHIFT 16
+#define GEN7_TD_CTL2_ACTIVE_THREAD_LIMIT_ENABLE (1 << 8)
+#define GEN7_TD_CTL2_THREAD_SPAWNER_EXECUTION_MASK_ENABLE (1 << 7)
+#define GEN7_TD_CTL2_WIZ_EXECUTION_MASK_ENABLE (1 << 6)
+#define GEN7_TD_CTL2_SF_EXECUTION_MASK_ENABLE (1 << 5)
+#define GEN7_TD_CTL2_CLIPPER_EXECUTION_MASK_ENABLE (1 << 4)
+#define GEN7_TD_CTL2_GS_EXECUTION_MASK_ENABLE (1 << 3)
+#define GEN7_TD_CTL2_VS_EXECUTION_MASK_ENABLE (1 << 0)
+#define GEN7_TD_VF_VS_EMSK 0x8008
+#define GEN7_TD_GS_EMSK 0x800c
+#define GEN7_TD_CLIP_EMSK 0x8010
+#define GEN7_TD_SF_EMSK 0x8014
+#define GEN7_TD_WIZ_EMSK 0x8018
+#define GEN7_TD_0_6_EHTRG_VAL 0x801c
+#define GEN7_TD_0_7_EHTRG_VAL 0x8020
+#define GEN7_TD_0_6_EHTRG_MSK 0x8024
+#define GEN7_TD_0_7_EHTRG_MSK 0x8028
+#define GEN7_TD_RDATA 0x802c
+#define GEN7_TD_TS_EMSK 0x8030
+
+#define GEN7_EU_CTL 0x8800
+#define GEN7_EU_CTL_SELECT_SHIFT 16
+#define GEN7_EU_CTL_DATA_MUX_SHIFT 8
+#define GEN7_EU_ATT_0 0x8810
+#define GEN7_EU_ATT_1 0x8814
+#define GEN7_EU_ATT_DATA_0 0x8820
+#define GEN7_EU_ATT_DATA_1 0x8824
+#define GEN7_EU_ATT_CLR_0 0x8830
+#define GEN7_EU_ATT_CLR_1 0x8834
+#define GEN7_EU_RDATA 0x8840
+
+/* 3D state:
+ */
+#define _3DOP_3DSTATE_PIPELINED 0x0
+#define _3DOP_3DSTATE_NONPIPELINED 0x1
+#define _3DOP_3DCONTROL 0x2
+#define _3DOP_3DPRIMITIVE 0x3
+
+#define _3DSTATE_PIPELINED_POINTERS 0x00
+#define _3DSTATE_BINDING_TABLE_POINTERS 0x01
+#define _3DSTATE_VERTEX_BUFFERS 0x08
+#define _3DSTATE_VERTEX_ELEMENTS 0x09
+#define _3DSTATE_INDEX_BUFFER 0x0A
+#define _3DSTATE_VF_STATISTICS 0x0B
+#define _3DSTATE_DRAWING_RECTANGLE 0x00
+#define _3DSTATE_CONSTANT_COLOR 0x01
+#define _3DSTATE_SAMPLER_PALETTE_LOAD 0x02
+#define _3DSTATE_CHROMA_KEY 0x04
+#define _3DSTATE_DEPTH_BUFFER 0x05
+#define _3DSTATE_POLY_STIPPLE_OFFSET 0x06
+#define _3DSTATE_POLY_STIPPLE_PATTERN 0x07
+#define _3DSTATE_LINE_STIPPLE 0x08
+#define _3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP 0x09
+#define _3DCONTROL 0x00
+#define _3DPRIMITIVE 0x00
+
+#define _3DPRIM_POINTLIST 0x01
+#define _3DPRIM_LINELIST 0x02
+#define _3DPRIM_LINESTRIP 0x03
+#define _3DPRIM_TRILIST 0x04
+#define _3DPRIM_TRISTRIP 0x05
+#define _3DPRIM_TRIFAN 0x06
+#define _3DPRIM_QUADLIST 0x07
+#define _3DPRIM_QUADSTRIP 0x08
+#define _3DPRIM_LINELIST_ADJ 0x09
+#define _3DPRIM_LINESTRIP_ADJ 0x0A
+#define _3DPRIM_TRILIST_ADJ 0x0B
+#define _3DPRIM_TRISTRIP_ADJ 0x0C
+#define _3DPRIM_TRISTRIP_REVERSE 0x0D
+#define _3DPRIM_POLYGON 0x0E
+#define _3DPRIM_RECTLIST 0x0F
+#define _3DPRIM_LINELOOP 0x10
+#define _3DPRIM_POINTLIST_BF 0x11
+#define _3DPRIM_LINESTRIP_CONT 0x12
+#define _3DPRIM_LINESTRIP_BF 0x13
+#define _3DPRIM_LINESTRIP_CONT_BF 0x14
+#define _3DPRIM_TRIFAN_NOSTIPPLE 0x15
+
+#define _3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL 0
+#define _3DPRIM_VERTEXBUFFER_ACCESS_RANDOM 1
+
+#define GEN7_ANISORATIO_2 0
+#define GEN7_ANISORATIO_4 1
+#define GEN7_ANISORATIO_6 2
+#define GEN7_ANISORATIO_8 3
+#define GEN7_ANISORATIO_10 4
+#define GEN7_ANISORATIO_12 5
+#define GEN7_ANISORATIO_14 6
+#define GEN7_ANISORATIO_16 7
+
+#define GEN7_BLENDFACTOR_ONE 0x1
+#define GEN7_BLENDFACTOR_SRC_COLOR 0x2
+#define GEN7_BLENDFACTOR_SRC_ALPHA 0x3
+#define GEN7_BLENDFACTOR_DST_ALPHA 0x4
+#define GEN7_BLENDFACTOR_DST_COLOR 0x5
+#define GEN7_BLENDFACTOR_SRC_ALPHA_SATURATE 0x6
+#define GEN7_BLENDFACTOR_CONST_COLOR 0x7
+#define GEN7_BLENDFACTOR_CONST_ALPHA 0x8
+#define GEN7_BLENDFACTOR_SRC1_COLOR 0x9
+#define GEN7_BLENDFACTOR_SRC1_ALPHA 0x0A
+#define GEN7_BLENDFACTOR_ZERO 0x11
+#define GEN7_BLENDFACTOR_INV_SRC_COLOR 0x12
+#define GEN7_BLENDFACTOR_INV_SRC_ALPHA 0x13
+#define GEN7_BLENDFACTOR_INV_DST_ALPHA 0x14
+#define GEN7_BLENDFACTOR_INV_DST_COLOR 0x15
+#define GEN7_BLENDFACTOR_INV_CONST_COLOR 0x17
+#define GEN7_BLENDFACTOR_INV_CONST_ALPHA 0x18
+#define GEN7_BLENDFACTOR_INV_SRC1_COLOR 0x19
+#define GEN7_BLENDFACTOR_INV_SRC1_ALPHA 0x1A
+
+#define GEN7_BLENDFUNCTION_ADD 0
+#define GEN7_BLENDFUNCTION_SUBTRACT 1
+#define GEN7_BLENDFUNCTION_REVERSE_SUBTRACT 2
+#define GEN7_BLENDFUNCTION_MIN 3
+#define GEN7_BLENDFUNCTION_MAX 4
+
+#define GEN7_ALPHATEST_FORMAT_UNORM8 0
+#define GEN7_ALPHATEST_FORMAT_FLOAT32 1
+
+#define GEN7_CHROMAKEY_KILL_ON_ANY_MATCH 0
+#define GEN7_CHROMAKEY_REPLACE_BLACK 1
+
+#define GEN7_CLIP_API_OGL 0
+#define GEN7_CLIP_API_DX 1
+
+#define GEN7_CLIPMODE_NORMAL 0
+#define GEN7_CLIPMODE_CLIP_ALL 1
+#define GEN7_CLIPMODE_CLIP_NON_REJECTED 2
+#define GEN7_CLIPMODE_REJECT_ALL 3
+#define GEN7_CLIPMODE_ACCEPT_ALL 4
+
+#define GEN7_CLIP_NDCSPACE 0
+#define GEN7_CLIP_SCREENSPACE 1
+
+#define GEN7_COMPAREFUNCTION_ALWAYS 0
+#define GEN7_COMPAREFUNCTION_NEVER 1
+#define GEN7_COMPAREFUNCTION_LESS 2
+#define GEN7_COMPAREFUNCTION_EQUAL 3
+#define GEN7_COMPAREFUNCTION_LEQUAL 4
+#define GEN7_COMPAREFUNCTION_GREATER 5
+#define GEN7_COMPAREFUNCTION_NOTEQUAL 6
+#define GEN7_COMPAREFUNCTION_GEQUAL 7
+
+#define GEN7_COVERAGE_PIXELS_HALF 0
+#define GEN7_COVERAGE_PIXELS_1 1
+#define GEN7_COVERAGE_PIXELS_2 2
+#define GEN7_COVERAGE_PIXELS_4 3
+
+#define GEN7_CULLMODE_BOTH 0
+#define GEN7_CULLMODE_NONE 1
+#define GEN7_CULLMODE_FRONT 2
+#define GEN7_CULLMODE_BACK 3
+
+#define GEN7_DEFAULTCOLOR_R8G8B8A8_UNORM 0
+#define GEN7_DEFAULTCOLOR_R32G32B32A32_FLOAT 1
+
+#define GEN7_DEPTHFORMAT_D32_FLOAT_S8X24_UINT 0
+#define GEN7_DEPTHFORMAT_D32_FLOAT 1
+#define GEN7_DEPTHFORMAT_D24_UNORM_S8_UINT 2
+#define GEN7_DEPTHFORMAT_D16_UNORM 5
+
+#define GEN7_FLOATING_POINT_IEEE_754 0
+#define GEN7_FLOATING_POINT_NON_IEEE_754 1
+
+#define GEN7_FRONTWINDING_CW 0
+#define GEN7_FRONTWINDING_CCW 1
+
+#define GEN7_INDEX_BYTE 0
+#define GEN7_INDEX_WORD 1
+#define GEN7_INDEX_DWORD 2
+
+#define GEN7_LOGICOPFUNCTION_CLEAR 0
+#define GEN7_LOGICOPFUNCTION_NOR 1
+#define GEN7_LOGICOPFUNCTION_AND_INVERTED 2
+#define GEN7_LOGICOPFUNCTION_COPY_INVERTED 3
+#define GEN7_LOGICOPFUNCTION_AND_REVERSE 4
+#define GEN7_LOGICOPFUNCTION_INVERT 5
+#define GEN7_LOGICOPFUNCTION_XOR 6
+#define GEN7_LOGICOPFUNCTION_NAND 7
+#define GEN7_LOGICOPFUNCTION_AND 8
+#define GEN7_LOGICOPFUNCTION_EQUIV 9
+#define GEN7_LOGICOPFUNCTION_NOOP 10
+#define GEN7_LOGICOPFUNCTION_OR_INVERTED 11
+#define GEN7_LOGICOPFUNCTION_COPY 12
+#define GEN7_LOGICOPFUNCTION_OR_REVERSE 13
+#define GEN7_LOGICOPFUNCTION_OR 14
+#define GEN7_LOGICOPFUNCTION_SET 15
+
+#define GEN7_MAPFILTER_NEAREST 0x0
+#define GEN7_MAPFILTER_LINEAR 0x1
+#define GEN7_MAPFILTER_ANISOTROPIC 0x2
+
+#define GEN7_MIPFILTER_NONE 0
+#define GEN7_MIPFILTER_NEAREST 1
+#define GEN7_MIPFILTER_LINEAR 3
+
+#define GEN7_POLYGON_FRONT_FACING 0
+#define GEN7_POLYGON_BACK_FACING 1
+
+#define GEN7_PREFILTER_ALWAYS 0x0
+#define GEN7_PREFILTER_NEVER 0x1
+#define GEN7_PREFILTER_LESS 0x2
+#define GEN7_PREFILTER_EQUAL 0x3
+#define GEN7_PREFILTER_LEQUAL 0x4
+#define GEN7_PREFILTER_GREATER 0x5
+#define GEN7_PREFILTER_NOTEQUAL 0x6
+#define GEN7_PREFILTER_GEQUAL 0x7
+
+#define GEN7_PROVOKING_VERTEX_0 0
+#define GEN7_PROVOKING_VERTEX_1 1
+#define GEN7_PROVOKING_VERTEX_2 2
+
+#define GEN7_RASTRULE_UPPER_LEFT 0
+#define GEN7_RASTRULE_UPPER_RIGHT 1
+
+#define GEN7_RENDERTARGET_CLAMPRANGE_UNORM 0
+#define GEN7_RENDERTARGET_CLAMPRANGE_SNORM 1
+#define GEN7_RENDERTARGET_CLAMPRANGE_FORMAT 2
+
+#define GEN7_STENCILOP_KEEP 0
+#define GEN7_STENCILOP_ZERO 1
+#define GEN7_STENCILOP_REPLACE 2
+#define GEN7_STENCILOP_INCRSAT 3
+#define GEN7_STENCILOP_DECRSAT 4
+#define GEN7_STENCILOP_INCR 5
+#define GEN7_STENCILOP_DECR 6
+#define GEN7_STENCILOP_INVERT 7
+
+#define GEN7_SURFACE_MIPMAPLAYOUT_BELOW 0
+#define GEN7_SURFACE_MIPMAPLAYOUT_RIGHT 1
+
+#define GEN7_SURFACEFORMAT_R32G32B32A32_FLOAT 0x000
+#define GEN7_SURFACEFORMAT_R32G32B32A32_SINT 0x001
+#define GEN7_SURFACEFORMAT_R32G32B32A32_UINT 0x002
+#define GEN7_SURFACEFORMAT_R32G32B32A32_UNORM 0x003
+#define GEN7_SURFACEFORMAT_R32G32B32A32_SNORM 0x004
+#define GEN7_SURFACEFORMAT_R64G64_FLOAT 0x005
+#define GEN7_SURFACEFORMAT_R32G32B32X32_FLOAT 0x006
+#define GEN7_SURFACEFORMAT_R32G32B32A32_SSCALED 0x007
+#define GEN7_SURFACEFORMAT_R32G32B32A32_USCALED 0x008
+#define GEN7_SURFACEFORMAT_R32G32B32_FLOAT 0x040
+#define GEN7_SURFACEFORMAT_R32G32B32_SINT 0x041
+#define GEN7_SURFACEFORMAT_R32G32B32_UINT 0x042
+#define GEN7_SURFACEFORMAT_R32G32B32_UNORM 0x043
+#define GEN7_SURFACEFORMAT_R32G32B32_SNORM 0x044
+#define GEN7_SURFACEFORMAT_R32G32B32_SSCALED 0x045
+#define GEN7_SURFACEFORMAT_R32G32B32_USCALED 0x046
+#define GEN7_SURFACEFORMAT_R16G16B16A16_UNORM 0x080
+#define GEN7_SURFACEFORMAT_R16G16B16A16_SNORM 0x081
+#define GEN7_SURFACEFORMAT_R16G16B16A16_SINT 0x082
+#define GEN7_SURFACEFORMAT_R16G16B16A16_UINT 0x083
+#define GEN7_SURFACEFORMAT_R16G16B16A16_FLOAT 0x084
+#define GEN7_SURFACEFORMAT_R32G32_FLOAT 0x085
+#define GEN7_SURFACEFORMAT_R32G32_SINT 0x086
+#define GEN7_SURFACEFORMAT_R32G32_UINT 0x087
+#define GEN7_SURFACEFORMAT_R32_FLOAT_X8X24_TYPELESS 0x088
+#define GEN7_SURFACEFORMAT_X32_TYPELESS_G8X24_UINT 0x089
+#define GEN7_SURFACEFORMAT_L32A32_FLOAT 0x08A
+#define GEN7_SURFACEFORMAT_R32G32_UNORM 0x08B
+#define GEN7_SURFACEFORMAT_R32G32_SNORM 0x08C
+#define GEN7_SURFACEFORMAT_R64_FLOAT 0x08D
+#define GEN7_SURFACEFORMAT_R16G16B16X16_UNORM 0x08E
+#define GEN7_SURFACEFORMAT_R16G16B16X16_FLOAT 0x08F
+#define GEN7_SURFACEFORMAT_A32X32_FLOAT 0x090
+#define GEN7_SURFACEFORMAT_L32X32_FLOAT 0x091
+#define GEN7_SURFACEFORMAT_I32X32_FLOAT 0x092
+#define GEN7_SURFACEFORMAT_R16G16B16A16_SSCALED 0x093
+#define GEN7_SURFACEFORMAT_R16G16B16A16_USCALED 0x094
+#define GEN7_SURFACEFORMAT_R32G32_SSCALED 0x095
+#define GEN7_SURFACEFORMAT_R32G32_USCALED 0x096
+#define GEN7_SURFACEFORMAT_B8G8R8A8_UNORM 0x0C0
+#define GEN7_SURFACEFORMAT_B8G8R8A8_UNORM_SRGB 0x0C1
+#define GEN7_SURFACEFORMAT_R10G10B10A2_UNORM 0x0C2
+#define GEN7_SURFACEFORMAT_R10G10B10A2_UNORM_SRGB 0x0C3
+#define GEN7_SURFACEFORMAT_R10G10B10A2_UINT 0x0C4
+#define GEN7_SURFACEFORMAT_R10G10B10_SNORM_A2_UNORM 0x0C5
+#define GEN7_SURFACEFORMAT_R8G8B8A8_UNORM 0x0C7
+#define GEN7_SURFACEFORMAT_R8G8B8A8_UNORM_SRGB 0x0C8
+#define GEN7_SURFACEFORMAT_R8G8B8A8_SNORM 0x0C9
+#define GEN7_SURFACEFORMAT_R8G8B8A8_SINT 0x0CA
+#define GEN7_SURFACEFORMAT_R8G8B8A8_UINT 0x0CB
+#define GEN7_SURFACEFORMAT_R16G16_UNORM 0x0CC
+#define GEN7_SURFACEFORMAT_R16G16_SNORM 0x0CD
+#define GEN7_SURFACEFORMAT_R16G16_SINT 0x0CE
+#define GEN7_SURFACEFORMAT_R16G16_UINT 0x0CF
+#define GEN7_SURFACEFORMAT_R16G16_FLOAT 0x0D0
+#define GEN7_SURFACEFORMAT_B10G10R10A2_UNORM 0x0D1
+#define GEN7_SURFACEFORMAT_B10G10R10A2_UNORM_SRGB 0x0D2
+#define GEN7_SURFACEFORMAT_R11G11B10_FLOAT 0x0D3
+#define GEN7_SURFACEFORMAT_R32_SINT 0x0D6
+#define GEN7_SURFACEFORMAT_R32_UINT 0x0D7
+#define GEN7_SURFACEFORMAT_R32_FLOAT 0x0D8
+#define GEN7_SURFACEFORMAT_R24_UNORM_X8_TYPELESS 0x0D9
+#define GEN7_SURFACEFORMAT_X24_TYPELESS_G8_UINT 0x0DA
+#define GEN7_SURFACEFORMAT_L16A16_UNORM 0x0DF
+#define GEN7_SURFACEFORMAT_I24X8_UNORM 0x0E0
+#define GEN7_SURFACEFORMAT_L24X8_UNORM 0x0E1
+#define GEN7_SURFACEFORMAT_A24X8_UNORM 0x0E2
+#define GEN7_SURFACEFORMAT_I32_FLOAT 0x0E3
+#define GEN7_SURFACEFORMAT_L32_FLOAT 0x0E4
+#define GEN7_SURFACEFORMAT_A32_FLOAT 0x0E5
+#define GEN7_SURFACEFORMAT_B8G8R8X8_UNORM 0x0E9
+#define GEN7_SURFACEFORMAT_B8G8R8X8_UNORM_SRGB 0x0EA
+#define GEN7_SURFACEFORMAT_R8G8B8X8_UNORM 0x0EB
+#define GEN7_SURFACEFORMAT_R8G8B8X8_UNORM_SRGB 0x0EC
+#define GEN7_SURFACEFORMAT_R9G9B9E5_SHAREDEXP 0x0ED
+#define GEN7_SURFACEFORMAT_B10G10R10X2_UNORM 0x0EE
+#define GEN7_SURFACEFORMAT_L16A16_FLOAT 0x0F0
+#define GEN7_SURFACEFORMAT_R32_UNORM 0x0F1
+#define GEN7_SURFACEFORMAT_R32_SNORM 0x0F2
+#define GEN7_SURFACEFORMAT_R10G10B10X2_USCALED 0x0F3
+#define GEN7_SURFACEFORMAT_R8G8B8A8_SSCALED 0x0F4
+#define GEN7_SURFACEFORMAT_R8G8B8A8_USCALED 0x0F5
+#define GEN7_SURFACEFORMAT_R16G16_SSCALED 0x0F6
+#define GEN7_SURFACEFORMAT_R16G16_USCALED 0x0F7
+#define GEN7_SURFACEFORMAT_R32_SSCALED 0x0F8
+#define GEN7_SURFACEFORMAT_R32_USCALED 0x0F9
+#define GEN7_SURFACEFORMAT_B5G6R5_UNORM 0x100
+#define GEN7_SURFACEFORMAT_B5G6R5_UNORM_SRGB 0x101
+#define GEN7_SURFACEFORMAT_B5G5R5A1_UNORM 0x102
+#define GEN7_SURFACEFORMAT_B5G5R5A1_UNORM_SRGB 0x103
+#define GEN7_SURFACEFORMAT_B4G4R4A4_UNORM 0x104
+#define GEN7_SURFACEFORMAT_B4G4R4A4_UNORM_SRGB 0x105
+#define GEN7_SURFACEFORMAT_R8G8_UNORM 0x106
+#define GEN7_SURFACEFORMAT_R8G8_SNORM 0x107
+#define GEN7_SURFACEFORMAT_R8G8_SINT 0x108
+#define GEN7_SURFACEFORMAT_R8G8_UINT 0x109
+#define GEN7_SURFACEFORMAT_R16_UNORM 0x10A
+#define GEN7_SURFACEFORMAT_R16_SNORM 0x10B
+#define GEN7_SURFACEFORMAT_R16_SINT 0x10C
+#define GEN7_SURFACEFORMAT_R16_UINT 0x10D
+#define GEN7_SURFACEFORMAT_R16_FLOAT 0x10E
+#define GEN7_SURFACEFORMAT_I16_UNORM 0x111
+#define GEN7_SURFACEFORMAT_L16_UNORM 0x112
+#define GEN7_SURFACEFORMAT_A16_UNORM 0x113
+#define GEN7_SURFACEFORMAT_L8A8_UNORM 0x114
+#define GEN7_SURFACEFORMAT_I16_FLOAT 0x115
+#define GEN7_SURFACEFORMAT_L16_FLOAT 0x116
+#define GEN7_SURFACEFORMAT_A16_FLOAT 0x117
+#define GEN7_SURFACEFORMAT_R5G5_SNORM_B6_UNORM 0x119
+#define GEN7_SURFACEFORMAT_B5G5R5X1_UNORM 0x11A
+#define GEN7_SURFACEFORMAT_B5G5R5X1_UNORM_SRGB 0x11B
+#define GEN7_SURFACEFORMAT_R8G8_SSCALED 0x11C
+#define GEN7_SURFACEFORMAT_R8G8_USCALED 0x11D
+#define GEN7_SURFACEFORMAT_R16_SSCALED 0x11E
+#define GEN7_SURFACEFORMAT_R16_USCALED 0x11F
+#define GEN7_SURFACEFORMAT_R8_UNORM 0x140
+#define GEN7_SURFACEFORMAT_R8_SNORM 0x141
+#define GEN7_SURFACEFORMAT_R8_SINT 0x142
+#define GEN7_SURFACEFORMAT_R8_UINT 0x143
+#define GEN7_SURFACEFORMAT_A8_UNORM 0x144
+#define GEN7_SURFACEFORMAT_I8_UNORM 0x145
+#define GEN7_SURFACEFORMAT_L8_UNORM 0x146
+#define GEN7_SURFACEFORMAT_P4A4_UNORM 0x147
+#define GEN7_SURFACEFORMAT_A4P4_UNORM 0x148
+#define GEN7_SURFACEFORMAT_R8_SSCALED 0x149
+#define GEN7_SURFACEFORMAT_R8_USCALED 0x14A
+#define GEN7_SURFACEFORMAT_R1_UINT 0x181
+#define GEN7_SURFACEFORMAT_YCRCB_NORMAL 0x182
+#define GEN7_SURFACEFORMAT_YCRCB_SWAPUVY 0x183
+#define GEN7_SURFACEFORMAT_BC1_UNORM 0x186
+#define GEN7_SURFACEFORMAT_BC2_UNORM 0x187
+#define GEN7_SURFACEFORMAT_BC3_UNORM 0x188
+#define GEN7_SURFACEFORMAT_BC4_UNORM 0x189
+#define GEN7_SURFACEFORMAT_BC5_UNORM 0x18A
+#define GEN7_SURFACEFORMAT_BC1_UNORM_SRGB 0x18B
+#define GEN7_SURFACEFORMAT_BC2_UNORM_SRGB 0x18C
+#define GEN7_SURFACEFORMAT_BC3_UNORM_SRGB 0x18D
+#define GEN7_SURFACEFORMAT_MONO8 0x18E
+#define GEN7_SURFACEFORMAT_YCRCB_SWAPUV 0x18F
+#define GEN7_SURFACEFORMAT_YCRCB_SWAPY 0x190
+#define GEN7_SURFACEFORMAT_DXT1_RGB 0x191
+#define GEN7_SURFACEFORMAT_FXT1 0x192
+#define GEN7_SURFACEFORMAT_R8G8B8_UNORM 0x193
+#define GEN7_SURFACEFORMAT_R8G8B8_SNORM 0x194
+#define GEN7_SURFACEFORMAT_R8G8B8_SSCALED 0x195
+#define GEN7_SURFACEFORMAT_R8G8B8_USCALED 0x196
+#define GEN7_SURFACEFORMAT_R64G64B64A64_FLOAT 0x197
+#define GEN7_SURFACEFORMAT_R64G64B64_FLOAT 0x198
+#define GEN7_SURFACEFORMAT_BC4_SNORM 0x199
+#define GEN7_SURFACEFORMAT_BC5_SNORM 0x19A
+#define GEN7_SURFACEFORMAT_R16G16B16_UNORM 0x19C
+#define GEN7_SURFACEFORMAT_R16G16B16_SNORM 0x19D
+#define GEN7_SURFACEFORMAT_R16G16B16_SSCALED 0x19E
+#define GEN7_SURFACEFORMAT_R16G16B16_USCALED 0x19F
+
+#define GEN7_SURFACERETURNFORMAT_FLOAT32 0
+#define GEN7_SURFACERETURNFORMAT_S1 1
+
+#define GEN7_SURFACE_1D 0
+#define GEN7_SURFACE_2D 1
+#define GEN7_SURFACE_3D 2
+#define GEN7_SURFACE_CUBE 3
+#define GEN7_SURFACE_BUFFER 4
+#define GEN7_SURFACE_NULL 7
+
+#define GEN7_BORDER_COLOR_MODE_DEFAULT 0
+#define GEN7_BORDER_COLOR_MODE_LEGACY 1
+
+#define GEN7_TEXCOORDMODE_WRAP 0
+#define GEN7_TEXCOORDMODE_MIRROR 1
+#define GEN7_TEXCOORDMODE_CLAMP 2
+#define GEN7_TEXCOORDMODE_CUBE 3
+#define GEN7_TEXCOORDMODE_CLAMP_BORDER 4
+#define GEN7_TEXCOORDMODE_MIRROR_ONCE 5
+
+#define GEN7_THREAD_PRIORITY_NORMAL 0
+#define GEN7_THREAD_PRIORITY_HIGH 1
+
+#define GEN7_TILEWALK_XMAJOR 0
+#define GEN7_TILEWALK_YMAJOR 1
+
+#define GEN7_VERTEX_SUBPIXEL_PRECISION_8BITS 0
+#define GEN7_VERTEX_SUBPIXEL_PRECISION_4BITS 1
+
+#define GEN7_VERTEXBUFFER_ACCESS_VERTEXDATA 0
+#define GEN7_VERTEXBUFFER_ACCESS_INSTANCEDATA 1
+
+#define GEN7_VFCOMPONENT_NOSTORE 0
+#define GEN7_VFCOMPONENT_STORE_SRC 1
+#define GEN7_VFCOMPONENT_STORE_0 2
+#define GEN7_VFCOMPONENT_STORE_1_FLT 3
+#define GEN7_VFCOMPONENT_STORE_1_INT 4
+#define GEN7_VFCOMPONENT_STORE_VID 5
+#define GEN7_VFCOMPONENT_STORE_IID 6
+#define GEN7_VFCOMPONENT_STORE_PID 7
+
+
+
+/* Execution Unit (EU) defines
+ */
+
+#define GEN7_ALIGN_1 0
+#define GEN7_ALIGN_16 1
+
+#define GEN7_ADDRESS_DIRECT 0
+#define GEN7_ADDRESS_REGISTER_INDIRECT_REGISTER 1
+
+#define GEN7_CHANNEL_X 0
+#define GEN7_CHANNEL_Y 1
+#define GEN7_CHANNEL_Z 2
+#define GEN7_CHANNEL_W 3
+
+#define GEN7_COMPRESSION_NONE 0
+#define GEN7_COMPRESSION_2NDHALF 1
+#define GEN7_COMPRESSION_COMPRESSED 2
+
+#define GEN7_CONDITIONAL_NONE 0
+#define GEN7_CONDITIONAL_Z 1
+#define GEN7_CONDITIONAL_NZ 2
+#define GEN7_CONDITIONAL_EQ 1 /* Z */
+#define GEN7_CONDITIONAL_NEQ 2 /* NZ */
+#define GEN7_CONDITIONAL_G 3
+#define GEN7_CONDITIONAL_GE 4
+#define GEN7_CONDITIONAL_L 5
+#define GEN7_CONDITIONAL_LE 6
+#define GEN7_CONDITIONAL_C 7
+#define GEN7_CONDITIONAL_O 8
+
+#define GEN7_DEBUG_NONE 0
+#define GEN7_DEBUG_BREAKPOINT 1
+
+#define GEN7_DEPENDENCY_NORMAL 0
+#define GEN7_DEPENDENCY_NOTCLEARED 1
+#define GEN7_DEPENDENCY_NOTCHECKED 2
+#define GEN7_DEPENDENCY_DISABLE 3
+
+#define GEN7_EXECUTE_1 0
+#define GEN7_EXECUTE_2 1
+#define GEN7_EXECUTE_4 2
+#define GEN7_EXECUTE_8 3
+#define GEN7_EXECUTE_16 4
+#define GEN7_EXECUTE_32 5
+
+#define GEN7_HORIZONTAL_STRIDE_0 0
+#define GEN7_HORIZONTAL_STRIDE_1 1
+#define GEN7_HORIZONTAL_STRIDE_2 2
+#define GEN7_HORIZONTAL_STRIDE_4 3
+
+#define GEN7_INSTRUCTION_NORMAL 0
+#define GEN7_INSTRUCTION_SATURATE 1
+
+#define INTEL_MASK_ENABLE 0
+#define INTEL_MASK_DISABLE 1
+
+#define GEN7_OPCODE_MOV 1
+#define GEN7_OPCODE_SEL 2
+#define GEN7_OPCODE_NOT 4
+#define GEN7_OPCODE_AND 5
+#define GEN7_OPCODE_OR 6
+#define GEN7_OPCODE_XOR 7
+#define GEN7_OPCODE_SHR 8
+#define GEN7_OPCODE_SHL 9
+#define GEN7_OPCODE_RSR 10
+#define GEN7_OPCODE_RSL 11
+#define GEN7_OPCODE_ASR 12
+#define GEN7_OPCODE_CMP 16
+#define GEN7_OPCODE_JMPI 32
+#define GEN7_OPCODE_IF 34
+#define GEN7_OPCODE_IFF 35
+#define GEN7_OPCODE_ELSE 36
+#define GEN7_OPCODE_ENDIF 37
+#define GEN7_OPCODE_DO 38
+#define GEN7_OPCODE_WHILE 39
+#define GEN7_OPCODE_BREAK 40
+#define GEN7_OPCODE_CONTINUE 41
+#define GEN7_OPCODE_HALT 42
+#define GEN7_OPCODE_MSAVE 44
+#define GEN7_OPCODE_MRESTORE 45
+#define GEN7_OPCODE_PUSH 46
+#define GEN7_OPCODE_POP 47
+#define GEN7_OPCODE_WAIT 48
+#define GEN7_OPCODE_SEND 49
+#define GEN7_OPCODE_ADD 64
+#define GEN7_OPCODE_MUL 65
+#define GEN7_OPCODE_AVG 66
+#define GEN7_OPCODE_FRC 67
+#define GEN7_OPCODE_RNDU 68
+#define GEN7_OPCODE_RNDD 69
+#define GEN7_OPCODE_RNDE 70
+#define GEN7_OPCODE_RNDZ 71
+#define GEN7_OPCODE_MAC 72
+#define GEN7_OPCODE_MACH 73
+#define GEN7_OPCODE_LZD 74
+#define GEN7_OPCODE_SAD2 80
+#define GEN7_OPCODE_SADA2 81
+#define GEN7_OPCODE_DP4 84
+#define GEN7_OPCODE_DPH 85
+#define GEN7_OPCODE_DP3 86
+#define GEN7_OPCODE_DP2 87
+#define GEN7_OPCODE_DPA2 88
+#define GEN7_OPCODE_LINE 89
+#define GEN7_OPCODE_NOP 126
+
+#define GEN7_PREDICATE_NONE 0
+#define GEN7_PREDICATE_NORMAL 1
+#define GEN7_PREDICATE_ALIGN1_ANYV 2
+#define GEN7_PREDICATE_ALIGN1_ALLV 3
+#define GEN7_PREDICATE_ALIGN1_ANY2H 4
+#define GEN7_PREDICATE_ALIGN1_ALL2H 5
+#define GEN7_PREDICATE_ALIGN1_ANY4H 6
+#define GEN7_PREDICATE_ALIGN1_ALL4H 7
+#define GEN7_PREDICATE_ALIGN1_ANY8H 8
+#define GEN7_PREDICATE_ALIGN1_ALL8H 9
+#define GEN7_PREDICATE_ALIGN1_ANY16H 10
+#define GEN7_PREDICATE_ALIGN1_ALL16H 11
+#define GEN7_PREDICATE_ALIGN16_REPLICATE_X 2
+#define GEN7_PREDICATE_ALIGN16_REPLICATE_Y 3
+#define GEN7_PREDICATE_ALIGN16_REPLICATE_Z 4
+#define GEN7_PREDICATE_ALIGN16_REPLICATE_W 5
+#define GEN7_PREDICATE_ALIGN16_ANY4H 6
+#define GEN7_PREDICATE_ALIGN16_ALL4H 7
+
+#define GEN7_ARCHITECTURE_REGISTER_FILE 0
+#define GEN7_GENERAL_REGISTER_FILE 1
+#define GEN7_MESSAGE_REGISTER_FILE 2
+#define GEN7_IMMEDIATE_VALUE 3
+
+#define GEN7_REGISTER_TYPE_UD 0
+#define GEN7_REGISTER_TYPE_D 1
+#define GEN7_REGISTER_TYPE_UW 2
+#define GEN7_REGISTER_TYPE_W 3
+#define GEN7_REGISTER_TYPE_UB 4
+#define GEN7_REGISTER_TYPE_B 5
+#define GEN7_REGISTER_TYPE_VF 5 /* packed float vector, immediates only? */
+#define GEN7_REGISTER_TYPE_HF 6
+#define GEN7_REGISTER_TYPE_V 6 /* packed int vector, immediates only, uword dest only */
+#define GEN7_REGISTER_TYPE_F 7
+
+#define GEN7_ARF_NULL 0x00
+#define GEN7_ARF_ADDRESS 0x10
+#define GEN7_ARF_ACCUMULATOR 0x20
+#define GEN7_ARF_FLAG 0x30
+#define GEN7_ARF_MASK 0x40
+#define GEN7_ARF_MASK_STACK 0x50
+#define GEN7_ARF_MASK_STACK_DEPTH 0x60
+#define GEN7_ARF_STATE 0x70
+#define GEN7_ARF_CONTROL 0x80
+#define GEN7_ARF_NOTIFICATION_COUNT 0x90
+#define GEN7_ARF_IP 0xA0
+
+#define GEN7_AMASK 0
+#define GEN7_IMASK 1
+#define GEN7_LMASK 2
+#define GEN7_CMASK 3
+
+
+
+#define GEN7_THREAD_NORMAL 0
+#define GEN7_THREAD_ATOMIC 1
+#define GEN7_THREAD_SWITCH 2
+
+#define GEN7_VERTICAL_STRIDE_0 0
+#define GEN7_VERTICAL_STRIDE_1 1
+#define GEN7_VERTICAL_STRIDE_2 2
+#define GEN7_VERTICAL_STRIDE_4 3
+#define GEN7_VERTICAL_STRIDE_8 4
+#define GEN7_VERTICAL_STRIDE_16 5
+#define GEN7_VERTICAL_STRIDE_32 6
+#define GEN7_VERTICAL_STRIDE_64 7
+#define GEN7_VERTICAL_STRIDE_128 8
+#define GEN7_VERTICAL_STRIDE_256 9
+#define GEN7_VERTICAL_STRIDE_ONE_DIMENSIONAL 0xF
+
+#define GEN7_WIDTH_1 0
+#define GEN7_WIDTH_2 1
+#define GEN7_WIDTH_4 2
+#define GEN7_WIDTH_8 3
+#define GEN7_WIDTH_16 4
+
+#define GEN7_STATELESS_BUFFER_BOUNDARY_1K 0
+#define GEN7_STATELESS_BUFFER_BOUNDARY_2K 1
+#define GEN7_STATELESS_BUFFER_BOUNDARY_4K 2
+#define GEN7_STATELESS_BUFFER_BOUNDARY_8K 3
+#define GEN7_STATELESS_BUFFER_BOUNDARY_16K 4
+#define GEN7_STATELESS_BUFFER_BOUNDARY_32K 5
+#define GEN7_STATELESS_BUFFER_BOUNDARY_64K 6
+#define GEN7_STATELESS_BUFFER_BOUNDARY_128K 7
+#define GEN7_STATELESS_BUFFER_BOUNDARY_256K 8
+#define GEN7_STATELESS_BUFFER_BOUNDARY_512K 9
+#define GEN7_STATELESS_BUFFER_BOUNDARY_1M 10
+#define GEN7_STATELESS_BUFFER_BOUNDARY_2M 11
+
+#define GEN7_POLYGON_FACING_FRONT 0
+#define GEN7_POLYGON_FACING_BACK 1
+
+#define GEN7_MESSAGE_TARGET_NULL 0
+#define GEN7_MESSAGE_TARGET_MATH 1
+#define GEN7_MESSAGE_TARGET_SAMPLER 2
+#define GEN7_MESSAGE_TARGET_GATEWAY 3
+#define GEN7_MESSAGE_TARGET_DATAPORT_READ 4
+#define GEN7_MESSAGE_TARGET_DATAPORT_WRITE 5
+#define GEN7_MESSAGE_TARGET_URB 6
+#define GEN7_MESSAGE_TARGET_THREAD_SPAWNER 7
+
+#define GEN7_SAMPLER_RETURN_FORMAT_FLOAT32 0
+#define GEN7_SAMPLER_RETURN_FORMAT_UINT32 2
+#define GEN7_SAMPLER_RETURN_FORMAT_SINT32 3
+
+#define GEN7_SAMPLER_MESSAGE_SIMD8_SAMPLE 0
+#define GEN7_SAMPLER_MESSAGE_SIMD16_SAMPLE 0
+#define GEN7_SAMPLER_MESSAGE_SIMD16_SAMPLE_BIAS 0
+#define GEN7_SAMPLER_MESSAGE_SIMD8_KILLPIX 1
+#define GEN7_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_LOD 1
+#define GEN7_SAMPLER_MESSAGE_SIMD16_SAMPLE_LOD 1
+#define GEN7_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_GRADIENTS 2
+#define GEN7_SAMPLER_MESSAGE_SIMD8_SAMPLE_GRADIENTS 2
+#define GEN7_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_COMPARE 0
+#define GEN7_SAMPLER_MESSAGE_SIMD16_SAMPLE_COMPARE 2
+#define GEN7_SAMPLER_MESSAGE_SIMD4X2_RESINFO 2
+#define GEN7_SAMPLER_MESSAGE_SIMD8_RESINFO 2
+#define GEN7_SAMPLER_MESSAGE_SIMD16_RESINFO 2
+#define GEN7_SAMPLER_MESSAGE_SIMD4X2_LD 3
+#define GEN7_SAMPLER_MESSAGE_SIMD8_LD 3
+#define GEN7_SAMPLER_MESSAGE_SIMD16_LD 3
+
+#define GEN7_DATAPORT_OWORD_BLOCK_1_OWORDLOW 0
+#define GEN7_DATAPORT_OWORD_BLOCK_1_OWORDHIGH 1
+#define GEN7_DATAPORT_OWORD_BLOCK_2_OWORDS 2
+#define GEN7_DATAPORT_OWORD_BLOCK_4_OWORDS 3
+#define GEN7_DATAPORT_OWORD_BLOCK_8_OWORDS 4
+
+#define GEN7_DATAPORT_OWORD_DUAL_BLOCK_1OWORD 0
+#define GEN7_DATAPORT_OWORD_DUAL_BLOCK_4OWORDS 2
+
+#define GEN7_DATAPORT_DWORD_SCATTERED_BLOCK_8DWORDS 2
+#define GEN7_DATAPORT_DWORD_SCATTERED_BLOCK_16DWORDS 3
+
+#define GEN7_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ 0
+#define GEN7_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ 1
+#define GEN7_DATAPORT_READ_MESSAGE_DWORD_BLOCK_READ 2
+#define GEN7_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ 3
+
+#define GEN7_DATAPORT_READ_TARGET_DATA_CACHE 0
+#define GEN7_DATAPORT_READ_TARGET_RENDER_CACHE 1
+#define GEN7_DATAPORT_READ_TARGET_SAMPLER_CACHE 2
+
+#define GEN7_DATAPORT_RENDER_TARGET_WRITE_SIMD16_SINGLE_SOURCE 0
+#define GEN7_DATAPORT_RENDER_TARGET_WRITE_SIMD16_SINGLE_SOURCE_REPLICATED 1
+#define GEN7_DATAPORT_RENDER_TARGET_WRITE_SIMD8_DUAL_SOURCE_SUBSPAN01 2
+#define GEN7_DATAPORT_RENDER_TARGET_WRITE_SIMD8_DUAL_SOURCE_SUBSPAN23 3
+#define GEN7_DATAPORT_RENDER_TARGET_WRITE_SIMD8_SINGLE_SOURCE_SUBSPAN01 4
+
+#define GEN7_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE 0
+#define GEN7_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE 1
+#define GEN7_DATAPORT_WRITE_MESSAGE_DWORD_BLOCK_WRITE 2
+#define GEN7_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE 3
+#define GEN7_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE 4
+#define GEN7_DATAPORT_WRITE_MESSAGE_STREAMED_VERTEX_BUFFER_WRITE 5
+#define GEN7_DATAPORT_WRITE_MESSAGE_FLUSH_RENDER_CACHE 7
+
+#define GEN7_MATH_FUNCTION_INV 1
+#define GEN7_MATH_FUNCTION_LOG 2
+#define GEN7_MATH_FUNCTION_EXP 3
+#define GEN7_MATH_FUNCTION_SQRT 4
+#define GEN7_MATH_FUNCTION_RSQ 5
+#define GEN7_MATH_FUNCTION_SIN 6 /* was 7 */
+#define GEN7_MATH_FUNCTION_COS 7 /* was 8 */
+#define GEN7_MATH_FUNCTION_SINCOS 8 /* was 6 */
+#define GEN7_MATH_FUNCTION_TAN 9
+#define GEN7_MATH_FUNCTION_POW 10
+#define GEN7_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER 11
+#define GEN7_MATH_FUNCTION_INT_DIV_QUOTIENT 12
+#define GEN7_MATH_FUNCTION_INT_DIV_REMAINDER 13
+
+#define GEN7_MATH_INTEGER_UNSIGNED 0
+#define GEN7_MATH_INTEGER_SIGNED 1
+
+#define GEN7_MATH_PRECISION_FULL 0
+#define GEN7_MATH_PRECISION_PARTIAL 1
+
+#define GEN7_MATH_SATURATE_NONE 0
+#define GEN7_MATH_SATURATE_SATURATE 1
+
+#define GEN7_MATH_DATA_VECTOR 0
+#define GEN7_MATH_DATA_SCALAR 1
+
+#define GEN7_URB_OPCODE_WRITE 0
+
+#define GEN7_URB_SWIZZLE_NONE 0
+#define GEN7_URB_SWIZZLE_INTERLEAVE 1
+#define GEN7_URB_SWIZZLE_TRANSPOSE 2
+
+#define GEN7_SCRATCH_SPACE_SIZE_1K 0
+#define GEN7_SCRATCH_SPACE_SIZE_2K 1
+#define GEN7_SCRATCH_SPACE_SIZE_4K 2
+#define GEN7_SCRATCH_SPACE_SIZE_8K 3
+#define GEN7_SCRATCH_SPACE_SIZE_16K 4
+#define GEN7_SCRATCH_SPACE_SIZE_32K 5
+#define GEN7_SCRATCH_SPACE_SIZE_64K 6
+#define GEN7_SCRATCH_SPACE_SIZE_128K 7
+#define GEN7_SCRATCH_SPACE_SIZE_256K 8
+#define GEN7_SCRATCH_SPACE_SIZE_512K 9
+#define GEN7_SCRATCH_SPACE_SIZE_1M 10
+#define GEN7_SCRATCH_SPACE_SIZE_2M 11
+
+/* The hardware supports two different modes for border color. The
+ * default (OpenGL) mode uses floating-point color channels, while the
+ * legacy mode uses 4 bytes.
+ *
+ * More significantly, the legacy mode respects the components of the
+ * border color for channels not present in the source, (whereas the
+ * default mode will ignore the border color's alpha channel and use
+ * alpha==1 for an RGB source, for example).
+ *
+ * The legacy mode matches the semantics specified by the Render
+ * extension.
+ */
+struct gen7_sampler_default_border_color {
+ float color[4];
+};
+
+struct gen7_sampler_legacy_border_color {
+ uint8_t color[4];
+};
+
+struct gen7_blend_state {
+ struct {
+ uint32_t dest_blend_factor:5;
+ uint32_t source_blend_factor:5;
+ uint32_t pad3:1;
+ uint32_t blend_func:3;
+ uint32_t pad2:1;
+ uint32_t ia_dest_blend_factor:5;
+ uint32_t ia_source_blend_factor:5;
+ uint32_t pad1:1;
+ uint32_t ia_blend_func:3;
+ uint32_t pad0:1;
+ uint32_t ia_blend_enable:1;
+ uint32_t blend_enable:1;
+ } blend0;
+
+ struct {
+ uint32_t post_blend_clamp_enable:1;
+ uint32_t pre_blend_clamp_enable:1;
+ uint32_t clamp_range:2;
+ uint32_t pad0:4;
+ uint32_t x_dither_offset:2;
+ uint32_t y_dither_offset:2;
+ uint32_t dither_enable:1;
+ uint32_t alpha_test_func:3;
+ uint32_t alpha_test_enable:1;
+ uint32_t pad1:1;
+ uint32_t logic_op_func:4;
+ uint32_t logic_op_enable:1;
+ uint32_t pad2:1;
+ uint32_t write_disable_b:1;
+ uint32_t write_disable_g:1;
+ uint32_t write_disable_r:1;
+ uint32_t write_disable_a:1;
+ uint32_t pad3:1;
+ uint32_t alpha_to_coverage_dither:1;
+ uint32_t alpha_to_one:1;
+ uint32_t alpha_to_coverage:1;
+ } blend1;
+};
+
+struct gen7_color_calc_state {
+ struct {
+ uint32_t alpha_test_format:1;
+ uint32_t pad0:14;
+ uint32_t round_disable:1;
+ uint32_t bf_stencil_ref:8;
+ uint32_t stencil_ref:8;
+ } cc0;
+
+ union {
+ float alpha_ref_f;
+ struct {
+ uint32_t ui:8;
+ uint32_t pad0:24;
+ } alpha_ref_fi;
+ } cc1;
+
+ float constant_r;
+ float constant_g;
+ float constant_b;
+ float constant_a;
+};
+
+struct gen7_depth_stencil_state {
+ struct {
+ uint32_t pad0:3;
+ uint32_t bf_stencil_pass_depth_pass_op:3;
+ uint32_t bf_stencil_pass_depth_fail_op:3;
+ uint32_t bf_stencil_fail_op:3;
+ uint32_t bf_stencil_func:3;
+ uint32_t bf_stencil_enable:1;
+ uint32_t pad1:2;
+ uint32_t stencil_write_enable:1;
+ uint32_t stencil_pass_depth_pass_op:3;
+ uint32_t stencil_pass_depth_fail_op:3;
+ uint32_t stencil_fail_op:3;
+ uint32_t stencil_func:3;
+ uint32_t stencil_enable:1;
+ } ds0;
+
+ struct {
+ uint32_t bf_stencil_write_mask:8;
+ uint32_t bf_stencil_test_mask:8;
+ uint32_t stencil_write_mask:8;
+ uint32_t stencil_test_mask:8;
+ } ds1;
+
+ struct {
+ uint32_t pad0:26;
+ uint32_t depth_write_enable:1;
+ uint32_t depth_test_func:3;
+ uint32_t pad1:1;
+ uint32_t depth_test_enable:1;
+ } ds2;
+};
+
+struct gen7_surface_state {
+ struct {
+ unsigned int cube_pos_z:1;
+ unsigned int cube_neg_z:1;
+ unsigned int cube_pos_y:1;
+ unsigned int cube_neg_y:1;
+ unsigned int cube_pos_x:1;
+ unsigned int cube_neg_x:1;
+ unsigned int pad2:2;
+ unsigned int render_cache_read_write:1;
+ unsigned int pad1:1;
+ unsigned int surface_array_spacing:1;
+ unsigned int vert_line_stride_ofs:1;
+ unsigned int vert_line_stride:1;
+ unsigned int tile_walk:1;
+ unsigned int tiled_surface:1;
+ unsigned int horizontal_alignment:1;
+ unsigned int vertical_alignment:2;
+ unsigned int surface_format:9; /**< BRW_SURFACEFORMAT_x */
+ unsigned int pad0:1;
+ unsigned int is_array:1;
+ unsigned int surface_type:3; /**< BRW_SURFACE_1D/2D/3D/CUBE */
+ } ss0;
+
+ struct {
+ unsigned int base_addr;
+ } ss1;
+
+ struct {
+ unsigned int width:14;
+ unsigned int pad1:2;
+ unsigned int height:14;
+ unsigned int pad0:2;
+ } ss2;
+
+ struct {
+ unsigned int pitch:18;
+ unsigned int pad:3;
+ unsigned int depth:11;
+ } ss3;
+
+ struct {
+ unsigned int multisample_position_palette_index:3;
+ unsigned int num_multisamples:3;
+ unsigned int multisampled_surface_storage_format:1;
+ unsigned int render_target_view_extent:11;
+ unsigned int min_array_elt:11;
+ unsigned int rotation:2;
+ unsigned int pad0:1;
+ } ss4;
+
+ struct {
+ unsigned int mip_count:4;
+ unsigned int min_lod:4;
+ unsigned int pad1:12;
+ unsigned int y_offset:4;
+ unsigned int pad0:1;
+ unsigned int x_offset:7;
+ } ss5;
+
+ struct {
+ unsigned int pad; /* Multisample Control Surface stuff */
+ } ss6;
+
+ struct {
+ unsigned int resource_min_lod:12;
+ unsigned int pad0:16;
+ unsigned int alpha_clear_color:1;
+ unsigned int blue_clear_color:1;
+ unsigned int green_clear_color:1;
+ unsigned int red_clear_color:1;
+ } ss7;
+};
+
+struct gen7_sampler_state {
+ struct {
+ unsigned int aniso_algorithm:1;
+ unsigned int lod_bias:13;
+ unsigned int min_filter:3;
+ unsigned int mag_filter:3;
+ unsigned int mip_filter:2;
+ unsigned int base_level:5;
+ unsigned int pad1:1;
+ unsigned int lod_preclamp:1;
+ unsigned int default_color_mode:1;
+ unsigned int pad0:1;
+ unsigned int disable:1;
+ } ss0;
+
+ struct {
+ unsigned int cube_control_mode:1;
+ unsigned int shadow_function:3;
+ unsigned int pad:4;
+ unsigned int max_lod:12;
+ unsigned int min_lod:12;
+ } ss1;
+
+ struct {
+ unsigned int pad:5;
+ unsigned int default_color_pointer:27;
+ } ss2;
+
+ struct {
+ unsigned int r_wrap_mode:3;
+ unsigned int t_wrap_mode:3;
+ unsigned int s_wrap_mode:3;
+ unsigned int pad:1;
+ unsigned int non_normalized_coord:1;
+ unsigned int trilinear_quality:2;
+ unsigned int address_round:6;
+ unsigned int max_aniso:3;
+ unsigned int chroma_key_mode:1;
+ unsigned int chroma_key_index:2;
+ unsigned int chroma_key_enable:1;
+ unsigned int pad0:6;
+ } ss3;
+};
+
+
+/* Surface state DW0 */
+#define GEN7_SURFACE_CUBEFACE_ENABLES 0x3f
+#define GEN7_SURFACE_RC_READ_WRITE (1 << 7)
+#define GEN7_SURFACE_TILED (1<< 12)
+#define GEN7_SURFACE_TILED_Y (1<< 13)
+#define GEN7_SURFACE_FORMAT_SHIFT 18
+#define GEN7_SURFACE_FORMAT_MASK INTEL_MASK(26, 18)
+#define GEN7_SURFACE_TYPE_SHIFT 28
+
+/* Surface state DW2 */
+#define GEN7_SURFACE_HEIGHT_SHIFT 19
+#define GEN7_SURFACE_HEIGHT_MASK INTEL_MASK(31, 19)
+#define GEN7_SURFACE_WIDTH_SHIFT 6
+#define GEN7_SURFACE_WIDTH_MASK INTEL_MASK(18, 6)
+#define GEN7_SURFACE_LOD_SHIFT 2
+#define GEN7_SURFACE_LOD_MASK INTEL_MASK(5, 2)
+
+/* Surface state DW3 */
+#define GEN7_SURFACE_DEPTH_SHIFT 21
+#define GEN7_SURFACE_DEPTH_MASK INTEL_MASK(31, GEN7_SURFACE_DEPTH_SHIFT)
+#define GEN7_SURFACE_PITCH_SHIFT 0
+#define GEN7_SURFACE_PITCH_MASK INTEL_MASK(18, GEN7_SURFACE_PITCH_SHIFT)
+
+/* _3DSTATE_VERTEX_BUFFERS on GEN7*/
+/* DW1 */
+#define GEN7_VB0_ADDRESS_MODIFYENABLE (1 << 14)
+
+/* _3DPRIMITIVE on GEN7 */
+/* DW1 */
+# define GEN7_3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL (0 << 8)
+# define GEN7_3DPRIM_VERTEXBUFFER_ACCESS_RANDOM (1 << 8)
+
+/* 3DSTATE_WM on GEN7 */
+/* DW1 */
+# define GEN7_WM_STATISTICS_ENABLE (1 << 31)
+# define GEN7_WM_DEPTH_CLEAR (1 << 30)
+# define GEN7_WM_DISPATCH_ENABLE (1 << 29)
+# define GEN6_WM_DEPTH_RESOLVE (1 << 28)
+# define GEN7_WM_HIERARCHICAL_DEPTH_RESOLVE (1 << 27)
+# define GEN7_WM_KILL_ENABLE (1 << 25)
+# define GEN7_WM_PSCDEPTH_OFF (0 << 23)
+# define GEN7_WM_PSCDEPTH_ON (1 << 23)
+# define GEN7_WM_PSCDEPTH_ON_GE (2 << 23)
+# define GEN7_WM_PSCDEPTH_ON_LE (3 << 23)
+# define GEN7_WM_USES_SOURCE_DEPTH (1 << 20)
+# define GEN7_WM_USES_SOURCE_W (1 << 19)
+# define GEN7_WM_POSITION_ZW_PIXEL (0 << 17)
+# define GEN7_WM_POSITION_ZW_CENTROID (2 << 17)
+# define GEN7_WM_POSITION_ZW_SAMPLE (3 << 17)
+# define GEN7_WM_NONPERSPECTIVE_SAMPLE_BARYCENTRIC (1 << 16)
+# define GEN7_WM_NONPERSPECTIVE_CENTROID_BARYCENTRIC (1 << 15)
+# define GEN7_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC (1 << 14)
+# define GEN7_WM_PERSPECTIVE_SAMPLE_BARYCENTRIC (1 << 13)
+# define GEN7_WM_PERSPECTIVE_CENTROID_BARYCENTRIC (1 << 12)
+# define GEN7_WM_PERSPECTIVE_PIXEL_BARYCENTRIC (1 << 11)
+# define GEN7_WM_USES_INPUT_COVERAGE_MASK (1 << 10)
+# define GEN7_WM_LINE_END_CAP_AA_WIDTH_0_5 (0 << 8)
+# define GEN7_WM_LINE_END_CAP_AA_WIDTH_1_0 (1 << 8)
+# define GEN7_WM_LINE_END_CAP_AA_WIDTH_2_0 (2 << 8)
+# define GEN7_WM_LINE_END_CAP_AA_WIDTH_4_0 (3 << 8)
+# define GEN7_WM_LINE_AA_WIDTH_0_5 (0 << 6)
+# define GEN7_WM_LINE_AA_WIDTH_1_0 (1 << 6)
+# define GEN7_WM_LINE_AA_WIDTH_2_0 (2 << 6)
+# define GEN7_WM_LINE_AA_WIDTH_4_0 (3 << 6)
+# define GEN7_WM_POLYGON_STIPPLE_ENABLE (1 << 4)
+# define GEN7_WM_LINE_STIPPLE_ENABLE (1 << 3)
+# define GEN7_WM_POINT_RASTRULE_UPPER_RIGHT (1 << 2)
+# define GEN7_WM_MSRAST_OFF_PIXEL (0 << 0)
+# define GEN7_WM_MSRAST_OFF_PATTERN (1 << 0)
+# define GEN7_WM_MSRAST_ON_PIXEL (2 << 0)
+# define GEN7_WM_MSRAST_ON_PATTERN (3 << 0)
+/* DW2 */
+# define GEN7_WM_MSDISPMODE_PERPIXEL (1 << 31)
+
+#define GEN7_3DSTATE_CLEAR_PARAMS GEN7_3D(3, 0, 0x04)
+#define GEN7_3DSTATE_DEPTH_BUFFER GEN7_3D(3, 0, 0x05)
+# define GEN7_3DSTATE_DEPTH_BUFFER_TYPE_SHIFT 29
+# define GEN7_3DSTATE_DEPTH_BUFFER_FORMAT_SHIFT 18
+/* DW1 */
+# define GEN7_3DSTATE_DEPTH_CLEAR_VALID (1 << 15)
+
+#define GEN7_3DSTATE_CONSTANT_HS GEN7_3D(3, 0, 0x19)
+#define GEN7_3DSTATE_CONSTANT_DS GEN7_3D(3, 0, 0x1a)
+
+#define GEN7_3DSTATE_HS GEN7_3D(3, 0, 0x1b)
+#define GEN7_3DSTATE_TE GEN7_3D(3, 0, 0x1c)
+#define GEN7_3DSTATE_DS GEN7_3D(3, 0, 0x1d)
+#define GEN7_3DSTATE_STREAMOUT GEN7_3D(3, 0, 0x1e)
+#define GEN7_3DSTATE_SBE GEN7_3D(3, 0, 0x1f)
+
+/* DW1 */
+# define GEN7_SBE_SWIZZLE_CONTROL_MODE (1 << 28)
+# define GEN7_SBE_NUM_OUTPUTS_SHIFT 22
+# define GEN7_SBE_SWIZZLE_ENABLE (1 << 21)
+# define GEN7_SBE_POINT_SPRITE_LOWERLEFT (1 << 20)
+# define GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT 11
+# define GEN7_SBE_URB_ENTRY_READ_OFFSET_SHIFT 4
+
+#define GEN7_3DSTATE_PS GEN7_3D(3, 0, 0x20)
+/* DW1: kernel pointer */
+/* DW2 */
+# define GEN7_PS_SPF_MODE (1 << 31)
+# define GEN7_PS_VECTOR_MASK_ENABLE (1 << 30)
+# define GEN7_PS_SAMPLER_COUNT_SHIFT 27
+# define GEN7_PS_BINDING_TABLE_ENTRY_COUNT_SHIFT 18
+# define GEN7_PS_FLOATING_POINT_MODE_IEEE_754 (0 << 16)
+# define GEN7_PS_FLOATING_POINT_MODE_ALT (1 << 16)
+/* DW3: scratch space */
+/* DW4 */
+# define GEN7_PS_MAX_THREADS_SHIFT 23
+# define GEN7_PS_PUSH_CONSTANT_ENABLE (1 << 11)
+# define GEN7_PS_ATTRIBUTE_ENABLE (1 << 10)
+# define GEN7_PS_OMASK_TO_RENDER_TARGET (1 << 9)
+# define GEN7_PS_DUAL_SOURCE_BLEND_ENABLE (1 << 7)
+# define GEN7_PS_POSOFFSET_NONE (0 << 3)
+# define GEN7_PS_POSOFFSET_CENTROID (2 << 3)
+# define GEN7_PS_POSOFFSET_SAMPLE (3 << 3)
+# define GEN7_PS_32_DISPATCH_ENABLE (1 << 2)
+# define GEN7_PS_16_DISPATCH_ENABLE (1 << 1)
+# define GEN7_PS_8_DISPATCH_ENABLE (1 << 0)
+/* DW5 */
+# define GEN7_PS_DISPATCH_START_GRF_SHIFT_0 16
+# define GEN7_PS_DISPATCH_START_GRF_SHIFT_1 8
+# define GEN7_PS_DISPATCH_START_GRF_SHIFT_2 0
+/* DW6: kernel 1 pointer */
+/* DW7: kernel 2 pointer */
+
+#define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CL GEN7_3D(3, 0, 0x21)
+#define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC GEN7_3D(3, 0, 0x23)
+
+#define GEN7_3DSTATE_BLEND_STATE_POINTERS GEN7_3D(3, 0, 0x24)
+#define GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS GEN7_3D(3, 0, 0x25)
+
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS GEN7_3D(3, 0, 0x26)
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS GEN7_3D(3, 0, 0x27)
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS GEN7_3D(3, 0, 0x28)
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS GEN7_3D(3, 0, 0x29)
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS GEN7_3D(3, 0, 0x2a)
+
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS GEN7_3D(3, 0, 0x2b)
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS GEN7_3D(3, 0, 0x2e)
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS GEN7_3D(3, 0, 0x2f)
+
+#define GEN7_3DSTATE_URB_VS GEN7_3D(3, 0, 0x30)
+#define GEN7_3DSTATE_URB_HS GEN7_3D(3, 0, 0x31)
+#define GEN7_3DSTATE_URB_DS GEN7_3D(3, 0, 0x32)
+#define GEN7_3DSTATE_URB_GS GEN7_3D(3, 0, 0x33)
+/* DW1 */
+# define GEN7_URB_ENTRY_NUMBER_SHIFT 0
+# define GEN7_URB_ENTRY_SIZE_SHIFT 16
+# define GEN7_URB_STARTING_ADDRESS_SHIFT 25
+
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS GEN7_3D(3, 1, 0x12)
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS GEN7_3D(3, 1, 0x16)
+/* DW1 */
+# define GEN7_PUSH_CONSTANT_BUFFER_OFFSET_SHIFT 16
+
+struct gen7_cc_viewport {
+ float min_depth;
+ float max_depth;
+};
+
+typedef enum {
+ SAMPLER_FILTER_NEAREST = 0,
+ SAMPLER_FILTER_BILINEAR,
+ FILTER_COUNT
+} sampler_filter_t;
+
+typedef enum {
+ SAMPLER_EXTEND_NONE = 0,
+ SAMPLER_EXTEND_REPEAT,
+ SAMPLER_EXTEND_PAD,
+ SAMPLER_EXTEND_REFLECT,
+ EXTEND_COUNT
+} sampler_extend_t;
+
+#endif
diff --git a/src/sna/sna.h b/src/sna/sna.h
index 897fe74..f32395d 100644
--- a/src/sna/sna.h
+++ b/src/sna/sna.h
@@ -240,6 +240,7 @@ struct sna {
struct gen4_render_state gen4;
struct gen5_render_state gen5;
struct gen6_render_state gen6;
+ struct gen7_render_state gen7;
} render_state;
uint32_t have_render;
diff --git a/src/sna/sna_accel.c b/src/sna/sna_accel.c
index 9dff104..7971711 100644
--- a/src/sna/sna_accel.c
+++ b/src/sna/sna_accel.c
@@ -3338,10 +3338,13 @@ Bool sna_accel_init(ScreenPtr screen, struct sna *sna)
no_render_init(sna);
#if !DEBUG_NO_RENDER
- if (sna->chipset.info->gen >= 70) {
+ if (sna->chipset.info->gen >= 80) {
+ } else if (sna->chipset.info->gen >= 70) {
+ if ((sna->have_render = gen7_render_init(sna)))
+ backend = "IvyBridge";
} else if (sna->chipset.info->gen >= 60) {
if ((sna->have_render = gen6_render_init(sna)))
- backend = "Sandybridge";
+ backend = "SandyBridge";
} else if (sna->chipset.info->gen >= 50) {
if ((sna->have_render = gen5_render_init(sna)))
backend = "Ironlake";
diff --git a/src/sna/sna_render.h b/src/sna/sna_render.h
index 6188168..e59c017 100644
--- a/src/sna/sna_render.h
+++ b/src/sna/sna_render.h
@@ -120,6 +120,13 @@ struct sna_composite_op {
int ve_id;
} gen6;
+ struct {
+ int wm_kernel;
+ int nr_surfaces;
+ int nr_inputs;
+ int ve_id;
+ } gen7;
+
void *priv;
} u;
};
@@ -362,6 +369,53 @@ struct gen6_render_state {
Bool needs_invariant;
};
+enum {
+ GEN7_WM_KERNEL_NOMASK = 0,
+ GEN7_WM_KERNEL_NOMASK_PROJECTIVE,
+
+ GEN7_WM_KERNEL_MASK,
+ GEN7_WM_KERNEL_MASK_PROJECTIVE,
+
+ GEN7_WM_KERNEL_MASKCA,
+ GEN7_WM_KERNEL_MASKCA_PROJECTIVE,
+
+ GEN7_WM_KERNEL_MASKCA_SRCALPHA,
+ GEN7_WM_KERNEL_MASKCA_SRCALPHA_PROJECTIVE,
+
+ GEN7_WM_KERNEL_VIDEO_PLANAR,
+ GEN7_WM_KERNEL_VIDEO_PACKED,
+ GEN7_KERNEL_COUNT
+};
+
+struct gen7_render_state {
+ struct kgem_bo *general_bo;
+
+ uint32_t vs_state;
+ uint32_t sf_state;
+ uint32_t sf_mask_state;
+ uint32_t wm_state;
+ uint32_t wm_kernel[GEN6_KERNEL_COUNT];
+
+ uint32_t cc_vp;
+ uint32_t cc_blend;
+
+ uint32_t drawrect_offset;
+ uint32_t drawrect_limit;
+ uint32_t blend;
+ uint32_t samplers;
+ uint32_t kernel;
+
+ uint16_t num_sf_outputs;
+ uint16_t vb_id;
+ uint16_t ve_id;
+ uint16_t vertex_offset;
+ uint16_t last_primitive;
+ int16_t floats_per_vertex;
+ uint16_t surface_table;
+
+ Bool needs_invariant;
+};
+
struct sna_static_stream {
uint32_t size, used;
uint8_t *data;
@@ -398,6 +452,7 @@ Bool gen3_render_init(struct sna *sna);
Bool gen4_render_init(struct sna *sna);
Bool gen5_render_init(struct sna *sna);
Bool gen6_render_init(struct sna *sna);
+Bool gen7_render_init(struct sna *sna);
Bool sna_tiling_composite(struct sna *sna,
uint32_t op,
commit 10790921570fea21d6b2bcc07a0204ef315c9182
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date: Sat Jul 30 08:46:19 2011 +0100
sna: Include the pixmap size in the debug info for moving to cpu
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
diff --git a/src/sna/sna_accel.c b/src/sna/sna_accel.c
index 409b20d..9dff104 100644
--- a/src/sna/sna_accel.c
+++ b/src/sna/sna_accel.c
@@ -422,8 +422,9 @@ sna_drawable_move_region_to_cpu(DrawablePtr drawable,
struct sna_pixmap *priv;
int16_t dx, dy;
- DBG(("%s(pixmap=%p, [(%d, %d), (%d, %d)], write=%d)\n",
+ DBG(("%s(pixmap=%p (%dx%d), [(%d, %d), (%d, %d)], write=%d)\n",
__FUNCTION__, pixmap,
+ pixmap->drawable.width, pixmap->drawable.height,
RegionExtents(region)->x1, RegionExtents(region)->y1,
RegionExtents(region)->x2, RegionExtents(region)->y2,
write));
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