xf86-video-intel: 10 commits - src/sna/gen2_render.c src/sna/kgem.c src/sna/kgem_debug.c src/sna/kgem_debug_gen3.c src/sna/kgem.h src/sna/sna_io.c src/sna/sna_render.c src/sna/sna_trapezoids.c

Chris Wilson ickle at kemper.freedesktop.org
Tue Jul 5 08:56:22 PDT 2011


 src/sna/gen2_render.c     |   46 ++++++++++++++++++++++++++++-------------
 src/sna/kgem.c            |   51 +++++++++++++++++++++++++++++++++++-----------
 src/sna/kgem.h            |    1 
 src/sna/kgem_debug.c      |   26 ++++++++++++++++++-----
 src/sna/kgem_debug_gen3.c |   10 +++++++--
 src/sna/sna_io.c          |   13 ++---------
 src/sna/sna_render.c      |   48 +++++++++++++++++++++++++++++++------------
 src/sna/sna_trapezoids.c  |   12 ++++++++++
 8 files changed, 150 insertions(+), 57 deletions(-)

New commits:
commit fd3bc2af471a3f9a73064cb28818fdd3485cffc7
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date:   Mon Jul 4 16:31:20 2011 +0100

    sna: Clamp object size to the min of 1/4 of the whole GTT or 1/2 the mappable
    
    ... for those pesky early devices whose GTT was no larger than the AGP
    aperture.
    
    Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>

diff --git a/src/sna/kgem.c b/src/sna/kgem.c
index b246898..9509dbe 100644
--- a/src/sna/kgem.c
+++ b/src/sna/kgem.c
@@ -365,11 +365,17 @@ void kgem_init(struct kgem *kgem, int fd, struct pci_device *dev, int gen)
 	     kgem->aperture_high, kgem->aperture_high / (1024*1024)));
 
 	kgem->aperture_mappable = agp_aperture_size(dev, gen);
-	if (kgem->aperture_mappable == 0)
+	if (kgem->aperture_mappable == 0 ||
+	    kgem->aperture_mappable > aperture.aper_size)
 		kgem->aperture_mappable = aperture.aper_size;
 	DBG(("%s: aperture mappable=%d [%d]\n", __FUNCTION__,
 	     kgem->aperture_mappable, kgem->aperture_mappable / (1024*1024)));
 
+	kgem->max_object_size = kgem->aperture_mappable / 2;
+	if (kgem->max_object_size > kgem->aperture_low)
+		kgem->max_object_size = kgem->aperture_low;
+	DBG(("%s: max object size %d\n", __FUNCTION__, kgem->max_object_size));
+
 	i = 8;
 	gp.param = I915_PARAM_NUM_FENCES_AVAIL;
 	gp.value = &i;
@@ -1207,9 +1213,9 @@ static bool _kgem_can_create_2d(struct kgem *kgem,
 		tiling = -tiling;
 
 	size = kgem_surface_size(kgem, width, height, bpp, tiling, &pitch);
-	if (size == 0 || size > kgem->aperture_mappable/2)
+	if (size == 0 || size > kgem->max_object_size)
 		size = kgem_surface_size(kgem, width, height, bpp, I915_TILING_NONE, &pitch);
-	return size > 0 && size <= kgem->aperture_mappable/2;
+	return size > 0 && size <= kgem->max_object_size;
 }
 
 #if DEBUG_KGEM
@@ -1269,7 +1275,7 @@ struct kgem_bo *kgem_create_2d(struct kgem *kgem,
 
 	assert(_kgem_can_create_2d(kgem, width, height, bpp, tiling));
 	size = kgem_surface_size(kgem, width, height, bpp, tiling, &pitch);
-	assert(size && size <= kgem->aperture_mappable/2);
+	assert(size && size <= kgem->max_object_size);
 	if (flags & CREATE_INACTIVE)
 		goto skip_active_search;
 
diff --git a/src/sna/kgem.h b/src/sna/kgem.h
index 013809c..0ee63bd 100644
--- a/src/sna/kgem.h
+++ b/src/sna/kgem.h
@@ -107,6 +107,7 @@ struct kgem {
 	uint16_t fence_max;
 	uint32_t aperture_high, aperture_low, aperture;
 	uint32_t aperture_fenced, aperture_mappable;
+	uint32_t max_object_size;
 
 	void (*context_switch)(struct kgem *kgem, int new_mode);
 	uint32_t batch[4*1024];
commit d294e41a6a49ddaa6f8d7d5cda266168095fe1f5
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date:   Mon Jul 4 13:45:06 2011 +0100

    sna: Update flush/retirement lists after a implicit flush for mmap
    
    Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>

diff --git a/src/sna/kgem.c b/src/sna/kgem.c
index d85b5cc..b246898 100644
--- a/src/sna/kgem.c
+++ b/src/sna/kgem.c
@@ -1557,7 +1557,18 @@ uint32_t kgem_add_reloc(struct kgem *kgem,
 
 void *kgem_bo_map(struct kgem *kgem, struct kgem_bo *bo, int prot)
 {
-	return gem_mmap(kgem->fd, bo->handle, bo->size, prot);
+	void *ptr = gem_mmap(kgem->fd, bo->handle, bo->size, prot);
+	if (ptr == NULL)
+		return NULL;
+
+	bo->needs_flush = false;
+	if (prot & PROT_WRITE) {
+		if (bo->rq)
+			kgem_retire(kgem);
+		bo->gpu = false;
+	}
+
+	return ptr;
 }
 
 uint32_t kgem_bo_flink(struct kgem *kgem, struct kgem_bo *bo)
commit 3e53b0f3a365c031bfef8d087bcee0ae1c2d2988
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date:   Mon Jul 4 13:44:28 2011 +0100

    sna: Enable relaxed-fencing for gen2 devices
    
    (Just as dependent upon non-buggy kernels as gen3...)
    
    Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>

diff --git a/src/sna/kgem.c b/src/sna/kgem.c
index 99ac795..d85b5cc 100644
--- a/src/sna/kgem.c
+++ b/src/sna/kgem.c
@@ -347,12 +347,8 @@ void kgem_init(struct kgem *kgem, int fd, struct pci_device *dev, int gen)
 
 			gp.param = I915_PARAM_HAS_RELAXED_FENCING;
 			gp.value = &i;
-			if (drmIoctl(kgem->fd, DRM_IOCTL_I915_GETPARAM, &gp) == 0) {
-				if (gen < 33)
-					kgem->has_relaxed_fencing = i >= 2;
-				else
-					kgem->has_relaxed_fencing = i > 0;
-			}
+			if (drmIoctl(kgem->fd, DRM_IOCTL_I915_GETPARAM, &gp) == 0)
+				kgem->has_relaxed_fencing = i > 0;
 		}
 	} else
 		kgem->has_relaxed_fencing = 1;
commit 33ddaf54299979e98b196d479f1b2060d9551cc5
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date:   Mon Jul 4 13:43:48 2011 +0100

    sna: Fix gen2 tiled surface sizes
    
    Actually use the gen2 path for gen2 devices!
    
    Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>

diff --git a/src/sna/kgem.c b/src/sna/kgem.c
index 40f35bd..99ac795 100644
--- a/src/sna/kgem.c
+++ b/src/sna/kgem.c
@@ -403,7 +403,7 @@ static uint32_t kgem_surface_size(struct kgem *kgem,
 	uint32_t tile_width, tile_height;
 	uint32_t size;
 
-	if (kgem->gen < 20) {
+	if (kgem->gen < 30) {
 		if (tiling) {
 			tile_width = 512;
 			tile_height = 16;
commit 9eceddf69f78fc79c02ca75ed10b000beeff2033
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date:   Mon Jul 4 13:42:58 2011 +0100

    sna/gen2: fix batch buffer acounting
    
    Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>

diff --git a/src/sna/gen2_render.c b/src/sna/gen2_render.c
index 3f0b902..97ae7c2 100644
--- a/src/sna/gen2_render.c
+++ b/src/sna/gen2_render.c
@@ -61,6 +61,19 @@
 #define OUT_BATCH_F(v) batch_emit_float(sna, v)
 #define OUT_VERTEX(v) batch_emit_float(sna, v)
 
+/* TODO: Remaining items for the sufficiently motivated reader
+ *
+ * - Linear gradients (radial do require pixel shaders)
+ *   - generate 1-d ramp for texture
+ *   - compute 1-d texture coordinate using a linear projection matrix
+ *   - issues? 1-stop, degenerate, fallback.
+ *
+ * - vmap
+ *   - the texture sampler can use any type of memory apparently.
+ *
+ * - memory compaction?
+ */
+
 static const struct blendinfo {
 	Bool dst_alpha;
 	Bool src_alpha;
@@ -506,9 +519,9 @@ gen2_get_batch(struct sna *sna,
 {
 	kgem_set_mode(&sna->kgem, KGEM_RENDER);
 
-	if (!kgem_check_batch(&sna->kgem, 50)) {
+	if (!kgem_check_batch(&sna->kgem, 28+40)) {
 		DBG(("%s: flushing batch: size %d > %d\n",
-		     __FUNCTION__, 50,
+		     __FUNCTION__, 28+40,
 		     sna->kgem.surface-sna->kgem.nbatch));
 		kgem_submit(&sna->kgem);
 	}
@@ -876,25 +889,21 @@ inline static int gen2_get_rectangles(struct sna *sna,
 
 	assert(op->floats_per_vertex);
 
-	need = 0;
+	need = 1;
 	size = 3*op->floats_per_vertex;
 	if (op->need_magic_ca_pass)
-		need += 5, size *= 2;
+		need += 6 + size*sna->render.vertex_index, size *= 2;
 
-	need += size;
-	if (state->vertex_offset == 0)
-		need += 2;
-
-	if (rem < need)
+	if (rem < need + size)
 		return 0;
 
+	rem -= need;
 	if (state->vertex_offset == 0) {
 		state->vertex_offset = sna->kgem.nbatch;
 		OUT_BATCH(PRIM3D_INLINE | PRIM3D_RECTLIST);
-		rem--;
 	}
 
-	if (want * size > rem)
+	if (want > 1 && want * size > rem)
 		want = rem / size;
 
 	assert(want);
@@ -1077,17 +1086,26 @@ gen2_composite_picture(struct sna *sna,
 	if (sna_picture_is_solid(picture, &color))
 		return gen2_composite_solid_init(sna, channel, color);
 
-	if (picture->pDrawable == NULL)
+	if (picture->pDrawable == NULL) {
+		DBG(("%s -- fallback, unhandled source %d\n",
+		     __FUNCTION__, picture->pSourcePict->type));
 		return sna_render_picture_fixup(sna, picture, channel,
 						x, y, w, h, dst_x, dst_y);
+	}
 
-	if (!gen2_check_repeat(picture))
+	if (!gen2_check_repeat(picture)) {
+		DBG(("%s -- fallback, unhandled repeat %d\n",
+		     __FUNCTION__, picture->repeat));
 		return sna_render_picture_fixup(sna, picture, channel,
 						x, y, w, h, dst_x, dst_y);
+	}
 
-	if (!gen2_check_filter(picture))
+	if (!gen2_check_filter(picture)) {
+		DBG(("%s -- fallback, unhandled filter %d\n",
+		     __FUNCTION__, picture->filter));
 		return sna_render_picture_fixup(sna, picture, channel,
 						x, y, w, h, dst_x, dst_y);
+	}
 
 	channel->repeat = picture->repeat ? picture->repeatType : RepeatNone;
 	channel->filter = picture->filter;
commit 3f80f7edb8c511b94e66159cd59ba9362c3f69a2
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date:   Sat Jul 2 23:16:04 2011 +0100

    sna: Manually set to the GTT domain for mmap
    
    ...since the kernel no longer does strict coherency.
    
    Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>

diff --git a/src/sna/kgem.c b/src/sna/kgem.c
index 38cf582..40f35bd 100644
--- a/src/sna/kgem.c
+++ b/src/sna/kgem.c
@@ -120,6 +120,7 @@ static int gem_set_tiling(int fd, uint32_t handle, int tiling, int stride)
 static void *gem_mmap(int fd, uint32_t handle, int size, int prot)
 {
 	struct drm_i915_gem_mmap_gtt mmap_arg;
+	struct drm_i915_gem_set_domain set_domain;
 	void *ptr;
 
 	DBG(("%s(handle=%d, size=%d, prot=%s)\n", __FUNCTION__,
@@ -137,6 +138,11 @@ static void *gem_mmap(int fd, uint32_t handle, int size, int prot)
 		ptr = NULL;
 	}
 
+	set_domain.handle = handle;
+	set_domain.read_domains = I915_GEM_DOMAIN_GTT;
+	set_domain.write_domain = prot & PROT_WRITE ? I915_GEM_DOMAIN_GTT : 0;
+	drmIoctl(fd, DRM_IOCTL_I915_GEM_SET_DOMAIN, &set_domain);
+
 	return ptr;
 }
 
commit f91ee24b2dabb48288d6e81dcdd82191f158e312
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date:   Sat Jul 2 23:05:04 2011 +0100

    sna: Trim number of downsample passes
    
    If we can fit the entire width or the entire height into the pipeline
    when downsampling, do so.
    
    Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>

diff --git a/src/sna/sna_render.c b/src/sna/sna_render.c
index baf51c3..74a4ded 100644
--- a/src/sna/sna_render.c
+++ b/src/sna/sna_render.c
@@ -520,7 +520,7 @@ static int sna_render_picture_downsample(struct sna *sna,
 		struct sna_pixmap *priv;
 		pixman_transform_t t;
 		PixmapPtr tmp;
-		int error, i, j, ww, hh;
+		int error, i, j, ww, hh, ni, nj;
 
 		if (!sna_pixmap_force_to_gpu(pixmap))
 			goto fixup;
@@ -556,24 +556,51 @@ static int sna_render_picture_downsample(struct sna *sna,
 		ValidatePicture(tmp_dst);
 		ValidatePicture(tmp_src);
 
-		ww = w/4; hh = h/4;
+		if (w > sna->render.max_3d_size) {
+			ww = w/4;
+			nj = 2;
+		} else {
+			ww = w/2;
+			nj = 1;
+		}
+
+		if (h > sna->render.max_3d_size) {
+			hh = h/4;
+			ni = 2;
+		} else {
+			hh = h/2;
+			ni = 1;
+		}
 
 		DBG(("%s downsampling using %dx%d GPU tiles\n",
 		     __FUNCTION__, ww, hh));
 
-		for (i = 0; i < 2; i++) {
-			for (j = 0; j < 2; j++) {
+		for (i = 0; i < ni; i++) {
+			BoxRec b;
+
+			b.y1 = hh*i;
+			if (i == ni - 1)
+				b.y2 = h/2;
+			else
+				b.y2 = b.y1 + hh;
+
+			for (j = 0; j < nj; j++) {
 				struct sna_composite_op op;
-				BoxRec b;
+
+				b.x1 = ww*j;
+				if (j == nj - 1)
+					b.x2 = w/2;
+				else
+					b.x2 = b.x1 + ww;
 
 				memset(&op, 0, sizeof(op));
 				if (!sna->render.composite(sna,
 							   PictOpSrc,
 							   tmp_src, NULL, tmp_dst,
-							   box.x1 + ww*j, box.y1 + hh*i,
+							   box.x1 + b.x1, box.y1 + b.y1,
 							   0, 0,
-							   ww*j, hh*i,
-							   ww, hh,
+							   b.x1, b.y1,
+							   b.x2 - b.x1, b.y2 - b.y1,
 							   &op)) {
 					tmp_src->transform = NULL;
 					FreePicture(tmp_src, 0);
@@ -582,11 +609,6 @@ static int sna_render_picture_downsample(struct sna *sna,
 					goto fixup;
 				}
 
-				b.x1 = ww*j;
-				b.y1 = hh*i;
-				b.x2 = b.x1 + ww;
-				b.y2 = b.y1 + hh;
-
 				op.boxes(sna, &op, &b, 1);
 				op.done(sna, &op);
 			}
commit 6db93720a73f59a9857a3c5ab260fab8b957813e
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date:   Sat Jul 2 23:04:14 2011 +0100

    sna: Don't change tiling modes on replace
    
    This was trying to workaround a kernel bug, and instead causes a
    performance cliff for textures that *need* to be tiled.
    
    Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>

diff --git a/src/sna/sna_io.c b/src/sna/sna_io.c
index 61d1062..c390466 100644
--- a/src/sna/sna_io.c
+++ b/src/sna/sna_io.c
@@ -411,22 +411,15 @@ struct kgem_bo *sna_replace(struct sna *sna,
 	struct kgem *kgem = &sna->kgem;
 	void *dst;
 
-	DBG(("%s(%dx%d, bpp=%d, tiling=%d)\n",
-	     __FUNCTION__, width, height, bpp, bo->tiling));
+	DBG(("%s(handle=%d, %dx%d, bpp=%d, tiling=%d)\n",
+	     __FUNCTION__, bo->handle, width, height, bpp, bo->tiling));
 
 	assert(bo->reusable);
 	if (kgem_bo_is_busy(kgem, bo)) {
 		struct kgem_bo *new_bo;
-		int tiling = bo->tiling;
-
-		/* As we use fences for GPU BLTs, we often have
-		 * lots of contention upon the limited number of fences.
-		 */
-		if (sna->kgem.gen < 40)
-			tiling = I915_TILING_NONE;
 
 		new_bo = kgem_create_2d(kgem,
-					width, height, bpp, tiling,
+					width, height, bpp, bo->tiling,
 					CREATE_INACTIVE);
 		if (new_bo) {
 			kgem_bo_destroy(kgem, bo);
commit 430c905ef306ece8a4cb19091711a9feae74b00b
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date:   Sat Jul 2 18:24:40 2011 +0100

    sna: Force tiled modes for large pitches
    
    If the surface is so big that the 2x2 texel sampling will cause a TLB
    miss everytime, i.e. the row pitch exceeeds 4096, then we need to
    encourage tiling to prevent attrocious performance.
    
    For example, try downscaling a 2560x1600 background image on a gen3
    device using I915_TILING_NONE...
    
    Using slideshow-demo /usr/share/backgrounds/cosmos/whirlpool.jpg, on a
    PineView netbook, fps goes from under 4 to over 40.
    
    Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>

diff --git a/src/sna/kgem.c b/src/sna/kgem.c
index 6fe6e93..38cf582 100644
--- a/src/sna/kgem.c
+++ b/src/sna/kgem.c
@@ -1156,6 +1156,14 @@ int kgem_choose_tiling(struct kgem *kgem, int tiling, int width, int height, int
 	if (tiling < 0)
 		return tiling;
 
+	if (tiling && width * bpp > 8 * 4096) {
+		DBG(("%s: TLB miss between lines %dx%d (pitch=%d), forcing tiling %d\n",
+		     __FUNCTION__,
+		     width, height, width*bpp/8,
+		     tiling));
+		return -tiling;
+	}
+
 	if (tiling == I915_TILING_Y && height < 16) {
 		DBG(("%s: too short [%d] for TILING_Y\n",
 		     __FUNCTION__,height));
diff --git a/src/sna/kgem_debug.c b/src/sna/kgem_debug.c
index 20fe8a2..745c7b9 100644
--- a/src/sna/kgem_debug.c
+++ b/src/sna/kgem_debug.c
@@ -80,6 +80,17 @@ static int kgem_debug_handle_is_fenced(struct kgem *kgem, uint32_t handle)
 	return 0;
 }
 
+static int kgem_debug_handle_tiling(struct kgem *kgem, uint32_t handle)
+{
+	struct kgem_bo *bo;
+
+	list_for_each_entry(bo, &kgem->next_request->buffers, request)
+		if (bo->handle == handle)
+			return bo->tiling;
+
+	return 0;
+}
+
 void
 kgem_debug_print(const uint32_t *data,
 		 uint32_t offset, unsigned int index,
@@ -254,11 +265,12 @@ decode_2d(struct kgem *kgem, uint32_t offset)
 			  data[3] & 0xffff, data[3] >> 16);
 		reloc = kgem_debug_get_reloc_entry(kgem, offset+4);
 		assert(reloc);
-		kgem_debug_print(data, offset, 4, "dst offset 0x%08x [handle=%d, delta=%d, read=%x, write=%x (fenced? %d)]\n",
+		kgem_debug_print(data, offset, 4, "dst offset 0x%08x [handle=%d, delta=%d, read=%x, write=%x (fenced? %d, tiling? %d)]\n",
 				 data[4],
 				 reloc->target_handle, reloc->delta,
 				 reloc->read_domains, reloc->write_domain,
-				 kgem_debug_handle_is_fenced(kgem, reloc->target_handle));
+				 kgem_debug_handle_is_fenced(kgem, reloc->target_handle),
+				 kgem_debug_handle_tiling(kgem, reloc->target_handle));
 		kgem_debug_print(data, offset, 5, "color\n");
 		return len;
 
@@ -299,22 +311,24 @@ decode_2d(struct kgem *kgem, uint32_t offset)
 				 data[3] & 0xffff, data[3] >> 16);
 		reloc = kgem_debug_get_reloc_entry(kgem, offset+4);
 		assert(reloc);
-		kgem_debug_print(data, offset, 4, "dst offset 0x%08x [handle=%d, delta=%d, read=%x, write=%x, (fenced? %d)]\n",
+		kgem_debug_print(data, offset, 4, "dst offset 0x%08x [handle=%d, delta=%d, read=%x, write=%x, (fenced? %d, tiling? %d)]\n",
 				 data[4],
 				 reloc->target_handle, reloc->delta,
 				 reloc->read_domains, reloc->write_domain,
-				 kgem_debug_handle_is_fenced(kgem, reloc->target_handle));
+				 kgem_debug_handle_is_fenced(kgem, reloc->target_handle),
+				 kgem_debug_handle_tiling(kgem, reloc->target_handle));
 		kgem_debug_print(data, offset, 5, "src (%d,%d)\n",
 				 data[5] & 0xffff, data[5] >> 16);
 		kgem_debug_print(data, offset, 6, "src pitch %d\n",
 				 (short)(data[6] & 0xffff));
 		reloc = kgem_debug_get_reloc_entry(kgem, offset+7);
 		assert(reloc);
-		kgem_debug_print(data, offset, 7, "src offset 0x%08x [handle=%d, delta=%d, read=%x, write=%x (fenced? %d)]\n",
+		kgem_debug_print(data, offset, 7, "src offset 0x%08x [handle=%d, delta=%d, read=%x, write=%x (fenced? %d, tiling? %d)]\n",
 				 data[7],
 				 reloc->target_handle, reloc->delta,
 				 reloc->read_domains, reloc->write_domain,
-				 kgem_debug_handle_is_fenced(kgem, reloc->target_handle));
+				 kgem_debug_handle_is_fenced(kgem, reloc->target_handle),
+				 kgem_debug_handle_tiling(kgem, reloc->target_handle));
 		return len;
 	}
 
diff --git a/src/sna/kgem_debug_gen3.c b/src/sna/kgem_debug_gen3.c
index 6709a8e..17ddb6b 100644
--- a/src/sna/kgem_debug_gen3.c
+++ b/src/sna/kgem_debug_gen3.c
@@ -1155,13 +1155,19 @@ gen3_decode_3d_1d(struct kgem *kgem, uint32_t offset)
 		for (map = 0; map <= 15; map++) {
 			if (data[1] & (1 << map)) {
 				int width, height, pitch, dword;
+				struct drm_i915_gem_relocation_entry *reloc;
+				struct kgem_bo *bo = NULL;
 				const char *tiling;
 
+				reloc = kgem_debug_get_reloc_entry(kgem, &data[i] - kgem->batch);
+				assert(reloc->target_handle);
+
 				dword = data[i];
-				kgem_debug_print(data, offset, i++, "map %d MS2 %s%s%s\n", map,
+				kgem_debug_print(data, offset, i++, "map %d MS2 %s%s%s, handle=%d\n", map,
 					  dword&(1<<31)?"untrusted surface, ":"",
 					  dword&(1<<1)?"vertical line stride enable, ":"",
-					  dword&(1<<0)?"vertical ofs enable, ":"");
+					  dword&(1<<0)?"vertical ofs enable, ":"",
+					  reloc->target_handle);
 
 				dword = data[i];
 				width = ((dword >> 10) & ((1 << 11) - 1))+1;
commit ae567b783e5af53f17f49dbf58b9be17fcb53737
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date:   Sat Jul 2 00:11:21 2011 +0100

    sna: Finer-grained debugging for trapezoids
    
    Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>

diff --git a/src/sna/sna_trapezoids.c b/src/sna/sna_trapezoids.c
index 536034f..c6645aa 100644
--- a/src/sna/sna_trapezoids.c
+++ b/src/sna/sna_trapezoids.c
@@ -46,6 +46,9 @@
 #endif
 
 #define NO_ACCEL 0
+#define NO_ALIGNED_BOXES 0
+#define NO_UNALIGNED_BOXES 0
+#define NO_SCAN_CONVERTER 0
 
 #define unlikely(x) x
 
@@ -1632,6 +1635,9 @@ composite_aligned_boxes(CARD8 op,
 	Bool ret = true;
 	int dx, dy, n, num_boxes;
 
+	if (NO_ALIGNED_BOXES)
+		return false;
+
 	DBG(("%s\n", __FUNCTION__));
 
 	boxes = stack_boxes;
@@ -2071,6 +2077,9 @@ composite_unaligned_boxes(CARD8 op,
 	int dst_x, dst_y;
 	int dx, dy, n;
 
+	if (NO_UNALIGNED_BOXES)
+		return false;
+
 	DBG(("%s\n", __FUNCTION__));
 
 	/* need a span converter to handle overlapping traps */
@@ -2173,6 +2182,9 @@ tor_scan_converter(CARD8 op, PicturePtr src, PicturePtr dst,
 	int16_t dx, dy;
 	int n;
 
+	if (NO_SCAN_CONVERTER)
+		return false;
+
 	/* XXX strict adhernce to the Reneder specification */
 	if (dst->polyMode == PolyModePrecise) {
 		DBG(("%s: fallback -- precise rasterisation requested\n",


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