xf86-video-ati: Branch 'master' - 2 commits
Alex Deucher
agd5f at kemper.freedesktop.org
Fri Jan 21 14:05:43 PST 2011
src/evergreen_accel.c | 2 --
src/evergreen_exa.c | 15 ++++-----------
src/evergreen_textured_videofuncs.c | 12 ++++--------
src/r600_exa.c | 4 ----
src/r6xx_accel.c | 4 +++-
src/radeon_exa_shared.c | 5 -----
src/radeon_exa_shared.h | 1 -
7 files changed, 11 insertions(+), 32 deletions(-)
New commits:
commit af7d81625a8cf873e6efc881489b3eda9861bd03
Author: Alex Deucher <alexdeucher at gmail.com>
Date: Fri Jan 21 17:01:25 2011 -0500
evergreen: use vb_offset rather than vb_start_op for cbuf offset
diff --git a/src/evergreen_exa.c b/src/evergreen_exa.c
index bb68577..93fa267 100644
--- a/src/evergreen_exa.c
+++ b/src/evergreen_exa.c
@@ -281,6 +281,8 @@ EVERGREENPrepareSolid(PixmapPtr pPix, int alu, Pixel pm, Pixel fg)
ps_const_conf.size_bytes = 256;
ps_const_conf.type = SHADER_TYPE_PS;
ps_alu_consts = radeon_vbo_space(pScrn, &accel_state->cbuf, 256);
+ ps_const_conf.bo = accel_state->cbuf.vb_bo;
+ ps_const_conf.const_addr = accel_state->cbuf.vb_mc_addr + accel_state->cbuf.vb_offset;
if (accel_state->dst_obj.bpp == 16) {
r = (fg >> 11) & 0x1f;
g = (fg >> 5) & 0x3f;
@@ -306,9 +308,6 @@ EVERGREENPrepareSolid(PixmapPtr pPix, int alu, Pixel pm, Pixel fg)
ps_alu_consts[3] = (float)a / 255; /* A */
}
radeon_vbo_commit(pScrn, &accel_state->cbuf);
-
- ps_const_conf.bo = accel_state->cbuf.vb_bo;
- ps_const_conf.const_addr = accel_state->cbuf.vb_mc_addr + accel_state->cbuf.vb_start_op;
evergreen_set_alu_consts(pScrn, &ps_const_conf, RADEON_GEM_DOMAIN_GTT);
if (accel_state->vsync)
@@ -1412,16 +1411,14 @@ static Bool EVERGREENPrepareComposite(int op, PicturePtr pSrcPicture,
vs_const_conf.size_bytes = 256;
vs_const_conf.type = SHADER_TYPE_VS;
cbuf = radeon_vbo_space(pScrn, &accel_state->cbuf, 256);
+ vs_const_conf.bo = accel_state->cbuf.vb_bo;
+ vs_const_conf.const_addr = accel_state->cbuf.vb_mc_addr + accel_state->cbuf.vb_offset;
EVERGREENXFormSetup(pSrcPicture, pSrc, 0, cbuf);
if (pMask)
EVERGREENXFormSetup(pMaskPicture, pMask, 1, cbuf);
radeon_vbo_commit(pScrn, &accel_state->cbuf);
-
- /* VS alu constants */
- vs_const_conf.bo = accel_state->cbuf.vb_bo;
- vs_const_conf.const_addr = accel_state->cbuf.vb_mc_addr + accel_state->cbuf.vb_start_op;
evergreen_set_alu_consts(pScrn, &vs_const_conf, RADEON_GEM_DOMAIN_GTT);
if (accel_state->vsync)
diff --git a/src/evergreen_textured_videofuncs.c b/src/evergreen_textured_videofuncs.c
index aa3c527..d60d194 100644
--- a/src/evergreen_textured_videofuncs.c
+++ b/src/evergreen_textured_videofuncs.c
@@ -452,6 +452,8 @@ EVERGREENDisplayTexturedVideo(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv)
ps_const_conf.size_bytes = 256;
ps_const_conf.type = SHADER_TYPE_PS;
ps_alu_consts = radeon_vbo_space(pScrn, &accel_state->cbuf, 256);
+ ps_const_conf.bo = accel_state->cbuf.vb_bo;
+ ps_const_conf.const_addr = accel_state->cbuf.vb_mc_addr + accel_state->cbuf.vb_offset;
ps_alu_consts[0] = off[0];
ps_alu_consts[1] = off[1];
@@ -469,16 +471,14 @@ EVERGREENDisplayTexturedVideo(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv)
ps_alu_consts[11] = 0.0;
radeon_vbo_commit(pScrn, &accel_state->cbuf);
-
- /* PS alu constants */
- ps_const_conf.bo = accel_state->cbuf.vb_bo;
- ps_const_conf.const_addr = accel_state->cbuf.vb_mc_addr + accel_state->cbuf.vb_start_op;
evergreen_set_alu_consts(pScrn, &ps_const_conf, RADEON_GEM_DOMAIN_GTT);
/* VS alu constants */
vs_const_conf.size_bytes = 256;
vs_const_conf.type = SHADER_TYPE_VS;
vs_alu_consts = radeon_vbo_space(pScrn, &accel_state->cbuf, 256);
+ vs_const_conf.bo = accel_state->cbuf.vb_bo;
+ vs_const_conf.const_addr = accel_state->cbuf.vb_mc_addr + accel_state->cbuf.vb_offset;
vs_alu_consts[0] = 1.0 / pPriv->w;
vs_alu_consts[1] = 1.0 / pPriv->h;
@@ -486,10 +486,6 @@ EVERGREENDisplayTexturedVideo(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv)
vs_alu_consts[3] = 0.0;
radeon_vbo_commit(pScrn, &accel_state->cbuf);
-
- /* VS alu constants */
- vs_const_conf.bo = accel_state->cbuf.vb_bo;
- vs_const_conf.const_addr = accel_state->cbuf.vb_mc_addr + accel_state->cbuf.vb_start_op + 256;
evergreen_set_alu_consts(pScrn, &vs_const_conf, RADEON_GEM_DOMAIN_GTT);
if (pPriv->vsync) {
commit 4817fac5f728b777939e2e2bee16b842c9e1367b
Author: Alex Deucher <alexdeucher at gmail.com>
Date: Fri Jan 21 15:59:32 2011 -0500
vbo: remove useless radeon_vb_discard()
We already reset vb_start_op to -1 in the
UMS/KMS ib discard functions.
diff --git a/src/evergreen_accel.c b/src/evergreen_accel.c
index b46e61d..4f5a120 100644
--- a/src/evergreen_accel.c
+++ b/src/evergreen_accel.c
@@ -1162,8 +1162,6 @@ void evergreen_finish_op(ScrnInfoPtr pScrn, int vtx_size)
if (accel_state->vbo.vb_offset == accel_state->vbo.vb_start_op) {
radeon_ib_discard(pScrn);
radeon_cs_flush_indirect(pScrn);
- radeon_vb_discard(pScrn, &accel_state->vbo);
- radeon_vb_discard(pScrn, &accel_state->cbuf);
return;
}
diff --git a/src/evergreen_exa.c b/src/evergreen_exa.c
index 0fe00d8..bb68577 100644
--- a/src/evergreen_exa.c
+++ b/src/evergreen_exa.c
@@ -1291,8 +1291,6 @@ static Bool EVERGREENPrepareComposite(int op, PicturePtr pSrcPicture,
if (!EVERGREENTextureSetup(pSrcPicture, pSrc, 0)) {
radeon_ib_discard(pScrn);
radeon_cs_flush_indirect(pScrn);
- radeon_vb_discard(pScrn, &accel_state->vbo);
- radeon_vb_discard(pScrn, &accel_state->cbuf);
return FALSE;
}
@@ -1300,8 +1298,6 @@ static Bool EVERGREENPrepareComposite(int op, PicturePtr pSrcPicture,
if (!EVERGREENTextureSetup(pMaskPicture, pMask, 1)) {
radeon_ib_discard(pScrn);
radeon_cs_flush_indirect(pScrn);
- radeon_vb_discard(pScrn, &accel_state->vbo);
- radeon_vb_discard(pScrn, &accel_state->cbuf);
return FALSE;
}
} else
diff --git a/src/r600_exa.c b/src/r600_exa.c
index 5dfc770..f652ab6 100644
--- a/src/r600_exa.c
+++ b/src/r600_exa.c
@@ -1334,14 +1334,12 @@ static Bool R600PrepareComposite(int op, PicturePtr pSrcPicture,
if (!R600TextureSetup(pSrcPicture, pSrc, 0)) {
R600IBDiscard(pScrn, accel_state->ib);
- radeon_vb_discard(pScrn, &accel_state->vbo);
return FALSE;
}
if (pMask) {
if (!R600TextureSetup(pMaskPicture, pMask, 1)) {
R600IBDiscard(pScrn, accel_state->ib);
- radeon_vb_discard(pScrn, &accel_state->vbo);
return FALSE;
}
} else
@@ -1644,7 +1642,6 @@ R600CopyToVRAM(ScrnInfoPtr pScrn,
}
R600IBDiscard(pScrn, scratch);
- radeon_vb_discard(pScrn, &accel_state->vbo);
return TRUE;
}
@@ -1758,7 +1755,6 @@ R600DownloadFromScreen(PixmapPtr pSrc, int x, int y, int w, int h,
}
R600IBDiscard(pScrn, scratch);
- radeon_vb_discard(pScrn, &accel_state->vbo);
return TRUE;
diff --git a/src/r6xx_accel.c b/src/r6xx_accel.c
index e436514..0c7714a 100644
--- a/src/r6xx_accel.c
+++ b/src/r6xx_accel.c
@@ -71,6 +71,9 @@ void R600CPFlushIndirect(ScrnInfoPtr pScrn, drmBufPtr ib)
END_BATCH();
}
+ info->accel_state->vbo.vb_offset = 0;
+ info->accel_state->vbo.vb_start_op = -1;
+
//ErrorF("buffer bytes: %d\n", buffer->used);
indirect.idx = buffer->idx;
@@ -1173,7 +1176,6 @@ void r600_finish_op(ScrnInfoPtr pScrn, int vtx_size)
if (accel_state->vbo.vb_offset == accel_state->vbo.vb_start_op) {
R600IBDiscard(pScrn, accel_state->ib);
- radeon_vb_discard(pScrn, &accel_state->vbo);
return;
}
diff --git a/src/radeon_exa_shared.c b/src/radeon_exa_shared.c
index 2ef0751..be1d2fa 100644
--- a/src/radeon_exa_shared.c
+++ b/src/radeon_exa_shared.c
@@ -141,11 +141,6 @@ static Bool radeon_vb_get(ScrnInfoPtr pScrn)
return TRUE;
}
-void radeon_vb_discard(ScrnInfoPtr pScrn, struct radeon_vbo_object *vbo)
-{
- vbo->vb_start_op = -1;
-}
-
int radeon_cp_start(ScrnInfoPtr pScrn)
{
RADEONInfoPtr info = RADEONPTR(pScrn);
diff --git a/src/radeon_exa_shared.h b/src/radeon_exa_shared.h
index 489e3b0..7b8b5ca 100644
--- a/src/radeon_exa_shared.h
+++ b/src/radeon_exa_shared.h
@@ -72,7 +72,6 @@ static inline void radeon_add_pixmap(struct radeon_cs *cs, PixmapPtr pPix, int r
extern void radeon_ib_discard(ScrnInfoPtr pScrn);
#endif /* XF86DRM_MODE */
-extern void radeon_vb_discard(ScrnInfoPtr pScrn, struct radeon_vbo_object *vbo);
extern int radeon_cp_start(ScrnInfoPtr pScrn);
extern void radeon_vb_no_space(ScrnInfoPtr pScrn, struct radeon_vbo_object *vbo, int vert_size);
extern void radeon_vbo_done_composite(PixmapPtr pDst);
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