xf86-video-ati: Branch 'master' - 4 commits
Alex Deucher
agd5f at kemper.freedesktop.org
Thu Jan 6 17:57:22 PST 2011
src/ati_pciids_gen.h | 36 +++++++++++++++++++
src/evergreen_accel.c | 69 ++++++++++++++++++++++++++++++++++++--
src/pcidb/ati_pciids.csv | 36 +++++++++++++++++++
src/radeon.h | 5 ++
src/radeon_chipinfo_gen.h | 36 +++++++++++++++++++
src/radeon_chipset_gen.h | 36 +++++++++++++++++++
src/radeon_driver.c | 8 ++++
src/radeon_pci_chipset_gen.h | 36 +++++++++++++++++++
src/radeon_pci_device_match_gen.h | 36 +++++++++++++++++++
9 files changed, 296 insertions(+), 2 deletions(-)
New commits:
commit 0e432dff9e06a183acaeb20db29cbd03ff0f4b82
Author: Alex Deucher <alexdeucher at gmail.com>
Date: Thu Jan 6 20:56:45 2011 -0500
NI: add pci ids
diff --git a/src/ati_pciids_gen.h b/src/ati_pciids_gen.h
index 80c60a8..5e5ced6 100644
--- a/src/ati_pciids_gen.h
+++ b/src/ati_pciids_gen.h
@@ -501,3 +501,39 @@
#define PCI_CHIP_CEDAR_68F8 0x68F8
#define PCI_CHIP_CEDAR_68F9 0x68F9
#define PCI_CHIP_CEDAR_68FE 0x68FE
+#define PCI_CHIP_BARTS_6720 0x6720
+#define PCI_CHIP_BARTS_6721 0x6721
+#define PCI_CHIP_BARTS_6722 0x6722
+#define PCI_CHIP_BARTS_6723 0x6723
+#define PCI_CHIP_BARTS_6724 0x6724
+#define PCI_CHIP_BARTS_6725 0x6725
+#define PCI_CHIP_BARTS_6726 0x6726
+#define PCI_CHIP_BARTS_6727 0x6727
+#define PCI_CHIP_BARTS_6728 0x6728
+#define PCI_CHIP_BARTS_6729 0x6729
+#define PCI_CHIP_BARTS_6738 0x6738
+#define PCI_CHIP_BARTS_6739 0x6739
+#define PCI_CHIP_TURKS_6740 0x6740
+#define PCI_CHIP_TURKS_6741 0x6741
+#define PCI_CHIP_TURKS_6742 0x6742
+#define PCI_CHIP_TURKS_6743 0x6743
+#define PCI_CHIP_TURKS_6744 0x6744
+#define PCI_CHIP_TURKS_6745 0x6745
+#define PCI_CHIP_TURKS_6746 0x6746
+#define PCI_CHIP_TURKS_6747 0x6747
+#define PCI_CHIP_TURKS_6748 0x6748
+#define PCI_CHIP_TURKS_6749 0x6749
+#define PCI_CHIP_TURKS_6750 0x6750
+#define PCI_CHIP_TURKS_6758 0x6758
+#define PCI_CHIP_TURKS_6759 0x6759
+#define PCI_CHIP_CAICOS_6760 0x6760
+#define PCI_CHIP_CAICOS_6761 0x6761
+#define PCI_CHIP_CAICOS_6762 0x6762
+#define PCI_CHIP_CAICOS_6763 0x6763
+#define PCI_CHIP_CAICOS_6764 0x6764
+#define PCI_CHIP_CAICOS_6765 0x6765
+#define PCI_CHIP_CAICOS_6766 0x6766
+#define PCI_CHIP_CAICOS_6767 0x6767
+#define PCI_CHIP_CAICOS_6768 0x6768
+#define PCI_CHIP_CAICOS_6770 0x6770
+#define PCI_CHIP_CAICOS_6779 0x6779
diff --git a/src/pcidb/ati_pciids.csv b/src/pcidb/ati_pciids.csv
index 060063b..61b04b9 100644
--- a/src/pcidb/ati_pciids.csv
+++ b/src/pcidb/ati_pciids.csv
@@ -502,3 +502,39 @@
"0x68F8","CEDAR_68F8","CEDAR",,,,,,"CEDAR"
"0x68F9","CEDAR_68F9","CEDAR",,,,,,"ATI Radeon HD 5450"
"0x68FE","CEDAR_68FE","CEDAR",,,,,,"CEDAR"
+"0x6720","BARTS_6720","BARTS",1,,,,,"AMD Radeon HD 6900M Series"
+"0x6721","BARTS_6721","BARTS",1,,,,,"Mobility Radeon HD 6000 Series"
+"0x6722","BARTS_6722","BARTS",,,,,,"BARTS"
+"0x6723","BARTS_6723","BARTS",,,,,,"BARTS"
+"0x6724","BARTS_6724","BARTS",1,,,,,"Mobility Radeon HD 6000 Series"
+"0x6725","BARTS_6725","BARTS",1,,,,,"Mobility Radeon HD 6000 Series"
+"0x6726","BARTS_6726","BARTS",,,,,,"BARTS"
+"0x6727","BARTS_6727","BARTS",,,,,,"BARTS"
+"0x6728","BARTS_6728","BARTS",,,,,,"BARTS"
+"0x6729","BARTS_6729","BARTS",,,,,,"BARTS"
+"0x6738","BARTS_6738","BARTS",,,,,,"AMD Radeon HD 6800 Series"
+"0x6739","BARTS_6739","BARTS",,,,,,"AMD Radeon HD 6800 Series"
+"0x6740","TURKS_6740","TURKS",1,,,,,"TURKS"
+"0x6741","TURKS_6741","TURKS",1,,,,,"TURKS"
+"0x6742","TURKS_6742","TURKS",1,,,,,"TURKS"
+"0x6743","TURKS_6743","TURKS",1,,,,,"TURKS"
+"0x6744","TURKS_6744","TURKS",1,,,,,"TURKS"
+"0x6745","TURKS_6745","TURKS",1,,,,,"TURKS"
+"0x6746","TURKS_6746","TURKS",,,,,,"TURKS"
+"0x6747","TURKS_6747","TURKS",,,,,,"TURKS"
+"0x6748","TURKS_6748","TURKS",,,,,,"TURKS"
+"0x6749","TURKS_6749","TURKS",,,,,,"TURKS"
+"0x6750","TURKS_6750","TURKS",,,,,,"TURKS"
+"0x6758","TURKS_6758","TURKS",,,,,,"TURKS"
+"0x6759","TURKS_6759","TURKS",,,,,,"TURKS"
+"0x6760","CAICOS_6760","CAICOS",1,,,,,"CAICOS"
+"0x6761","CAICOS_6761","CAICOS",1,,,,,"CAICOS"
+"0x6762","CAICOS_6762","CAICOS",,,,,,"CAICOS"
+"0x6763","CAICOS_6763","CAICOS",,,,,,"CAICOS"
+"0x6764","CAICOS_6764","CAICOS",1,,,,,"CAICOS"
+"0x6765","CAICOS_6765","CAICOS",1,,,,,"CAICOS"
+"0x6766","CAICOS_6766","CAICOS",,,,,,"CAICOS"
+"0x6767","CAICOS_6767","CAICOS",,,,,,"CAICOS"
+"0x6768","CAICOS_6768","CAICOS",,,,,,"CAICOS"
+"0x6770","CAICOS_6770","CAICOS",,,,,,"CAICOS"
+"0x6779","CAICOS_6779","CAICOS",,,,,,"CAICOS"
diff --git a/src/radeon_chipinfo_gen.h b/src/radeon_chipinfo_gen.h
index 42e0d5d..352fa99 100644
--- a/src/radeon_chipinfo_gen.h
+++ b/src/radeon_chipinfo_gen.h
@@ -421,4 +421,40 @@ static RADEONCardInfo RADEONCards[] = {
{ 0x68F8, CHIP_FAMILY_CEDAR, 0, 0, 0, 0, 0 },
{ 0x68F9, CHIP_FAMILY_CEDAR, 0, 0, 0, 0, 0 },
{ 0x68FE, CHIP_FAMILY_CEDAR, 0, 0, 0, 0, 0 },
+ { 0x6720, CHIP_FAMILY_BARTS, 1, 0, 0, 0, 0 },
+ { 0x6721, CHIP_FAMILY_BARTS, 1, 0, 0, 0, 0 },
+ { 0x6722, CHIP_FAMILY_BARTS, 0, 0, 0, 0, 0 },
+ { 0x6723, CHIP_FAMILY_BARTS, 0, 0, 0, 0, 0 },
+ { 0x6724, CHIP_FAMILY_BARTS, 1, 0, 0, 0, 0 },
+ { 0x6725, CHIP_FAMILY_BARTS, 1, 0, 0, 0, 0 },
+ { 0x6726, CHIP_FAMILY_BARTS, 0, 0, 0, 0, 0 },
+ { 0x6727, CHIP_FAMILY_BARTS, 0, 0, 0, 0, 0 },
+ { 0x6728, CHIP_FAMILY_BARTS, 0, 0, 0, 0, 0 },
+ { 0x6729, CHIP_FAMILY_BARTS, 0, 0, 0, 0, 0 },
+ { 0x6738, CHIP_FAMILY_BARTS, 0, 0, 0, 0, 0 },
+ { 0x6739, CHIP_FAMILY_BARTS, 0, 0, 0, 0, 0 },
+ { 0x6740, CHIP_FAMILY_TURKS, 1, 0, 0, 0, 0 },
+ { 0x6741, CHIP_FAMILY_TURKS, 1, 0, 0, 0, 0 },
+ { 0x6742, CHIP_FAMILY_TURKS, 1, 0, 0, 0, 0 },
+ { 0x6743, CHIP_FAMILY_TURKS, 1, 0, 0, 0, 0 },
+ { 0x6744, CHIP_FAMILY_TURKS, 1, 0, 0, 0, 0 },
+ { 0x6745, CHIP_FAMILY_TURKS, 1, 0, 0, 0, 0 },
+ { 0x6746, CHIP_FAMILY_TURKS, 0, 0, 0, 0, 0 },
+ { 0x6747, CHIP_FAMILY_TURKS, 0, 0, 0, 0, 0 },
+ { 0x6748, CHIP_FAMILY_TURKS, 0, 0, 0, 0, 0 },
+ { 0x6749, CHIP_FAMILY_TURKS, 0, 0, 0, 0, 0 },
+ { 0x6750, CHIP_FAMILY_TURKS, 0, 0, 0, 0, 0 },
+ { 0x6758, CHIP_FAMILY_TURKS, 0, 0, 0, 0, 0 },
+ { 0x6759, CHIP_FAMILY_TURKS, 0, 0, 0, 0, 0 },
+ { 0x6760, CHIP_FAMILY_CAICOS, 1, 0, 0, 0, 0 },
+ { 0x6761, CHIP_FAMILY_CAICOS, 1, 0, 0, 0, 0 },
+ { 0x6762, CHIP_FAMILY_CAICOS, 0, 0, 0, 0, 0 },
+ { 0x6763, CHIP_FAMILY_CAICOS, 0, 0, 0, 0, 0 },
+ { 0x6764, CHIP_FAMILY_CAICOS, 1, 0, 0, 0, 0 },
+ { 0x6765, CHIP_FAMILY_CAICOS, 1, 0, 0, 0, 0 },
+ { 0x6766, CHIP_FAMILY_CAICOS, 0, 0, 0, 0, 0 },
+ { 0x6767, CHIP_FAMILY_CAICOS, 0, 0, 0, 0, 0 },
+ { 0x6768, CHIP_FAMILY_CAICOS, 0, 0, 0, 0, 0 },
+ { 0x6770, CHIP_FAMILY_CAICOS, 0, 0, 0, 0, 0 },
+ { 0x6779, CHIP_FAMILY_CAICOS, 0, 0, 0, 0, 0 },
};
diff --git a/src/radeon_chipset_gen.h b/src/radeon_chipset_gen.h
index 7b7f795..66655e2 100644
--- a/src/radeon_chipset_gen.h
+++ b/src/radeon_chipset_gen.h
@@ -421,5 +421,41 @@ static SymTabRec RADEONChipsets[] = {
{ PCI_CHIP_CEDAR_68F8, "CEDAR" },
{ PCI_CHIP_CEDAR_68F9, "ATI Radeon HD 5450" },
{ PCI_CHIP_CEDAR_68FE, "CEDAR" },
+ { PCI_CHIP_BARTS_6720, "AMD Radeon HD 6900M Series" },
+ { PCI_CHIP_BARTS_6721, "Mobility Radeon HD 6000 Series" },
+ { PCI_CHIP_BARTS_6722, "BARTS" },
+ { PCI_CHIP_BARTS_6723, "BARTS" },
+ { PCI_CHIP_BARTS_6724, "Mobility Radeon HD 6000 Series" },
+ { PCI_CHIP_BARTS_6725, "Mobility Radeon HD 6000 Series" },
+ { PCI_CHIP_BARTS_6726, "BARTS" },
+ { PCI_CHIP_BARTS_6727, "BARTS" },
+ { PCI_CHIP_BARTS_6728, "BARTS" },
+ { PCI_CHIP_BARTS_6729, "BARTS" },
+ { PCI_CHIP_BARTS_6738, "AMD Radeon HD 6800 Series" },
+ { PCI_CHIP_BARTS_6739, "AMD Radeon HD 6800 Series" },
+ { PCI_CHIP_TURKS_6740, "TURKS" },
+ { PCI_CHIP_TURKS_6741, "TURKS" },
+ { PCI_CHIP_TURKS_6742, "TURKS" },
+ { PCI_CHIP_TURKS_6743, "TURKS" },
+ { PCI_CHIP_TURKS_6744, "TURKS" },
+ { PCI_CHIP_TURKS_6745, "TURKS" },
+ { PCI_CHIP_TURKS_6746, "TURKS" },
+ { PCI_CHIP_TURKS_6747, "TURKS" },
+ { PCI_CHIP_TURKS_6748, "TURKS" },
+ { PCI_CHIP_TURKS_6749, "TURKS" },
+ { PCI_CHIP_TURKS_6750, "TURKS" },
+ { PCI_CHIP_TURKS_6758, "TURKS" },
+ { PCI_CHIP_TURKS_6759, "TURKS" },
+ { PCI_CHIP_CAICOS_6760, "CAICOS" },
+ { PCI_CHIP_CAICOS_6761, "CAICOS" },
+ { PCI_CHIP_CAICOS_6762, "CAICOS" },
+ { PCI_CHIP_CAICOS_6763, "CAICOS" },
+ { PCI_CHIP_CAICOS_6764, "CAICOS" },
+ { PCI_CHIP_CAICOS_6765, "CAICOS" },
+ { PCI_CHIP_CAICOS_6766, "CAICOS" },
+ { PCI_CHIP_CAICOS_6767, "CAICOS" },
+ { PCI_CHIP_CAICOS_6768, "CAICOS" },
+ { PCI_CHIP_CAICOS_6770, "CAICOS" },
+ { PCI_CHIP_CAICOS_6779, "CAICOS" },
{ -1, NULL }
};
diff --git a/src/radeon_pci_chipset_gen.h b/src/radeon_pci_chipset_gen.h
index 6e6582c..d6b3b11 100644
--- a/src/radeon_pci_chipset_gen.h
+++ b/src/radeon_pci_chipset_gen.h
@@ -421,5 +421,41 @@ PciChipsets RADEONPciChipsets[] = {
{ PCI_CHIP_CEDAR_68F8, PCI_CHIP_CEDAR_68F8, RES_SHARED_VGA },
{ PCI_CHIP_CEDAR_68F9, PCI_CHIP_CEDAR_68F9, RES_SHARED_VGA },
{ PCI_CHIP_CEDAR_68FE, PCI_CHIP_CEDAR_68FE, RES_SHARED_VGA },
+ { PCI_CHIP_BARTS_6720, PCI_CHIP_BARTS_6720, RES_SHARED_VGA },
+ { PCI_CHIP_BARTS_6721, PCI_CHIP_BARTS_6721, RES_SHARED_VGA },
+ { PCI_CHIP_BARTS_6722, PCI_CHIP_BARTS_6722, RES_SHARED_VGA },
+ { PCI_CHIP_BARTS_6723, PCI_CHIP_BARTS_6723, RES_SHARED_VGA },
+ { PCI_CHIP_BARTS_6724, PCI_CHIP_BARTS_6724, RES_SHARED_VGA },
+ { PCI_CHIP_BARTS_6725, PCI_CHIP_BARTS_6725, RES_SHARED_VGA },
+ { PCI_CHIP_BARTS_6726, PCI_CHIP_BARTS_6726, RES_SHARED_VGA },
+ { PCI_CHIP_BARTS_6727, PCI_CHIP_BARTS_6727, RES_SHARED_VGA },
+ { PCI_CHIP_BARTS_6728, PCI_CHIP_BARTS_6728, RES_SHARED_VGA },
+ { PCI_CHIP_BARTS_6729, PCI_CHIP_BARTS_6729, RES_SHARED_VGA },
+ { PCI_CHIP_BARTS_6738, PCI_CHIP_BARTS_6738, RES_SHARED_VGA },
+ { PCI_CHIP_BARTS_6739, PCI_CHIP_BARTS_6739, RES_SHARED_VGA },
+ { PCI_CHIP_TURKS_6740, PCI_CHIP_TURKS_6740, RES_SHARED_VGA },
+ { PCI_CHIP_TURKS_6741, PCI_CHIP_TURKS_6741, RES_SHARED_VGA },
+ { PCI_CHIP_TURKS_6742, PCI_CHIP_TURKS_6742, RES_SHARED_VGA },
+ { PCI_CHIP_TURKS_6743, PCI_CHIP_TURKS_6743, RES_SHARED_VGA },
+ { PCI_CHIP_TURKS_6744, PCI_CHIP_TURKS_6744, RES_SHARED_VGA },
+ { PCI_CHIP_TURKS_6745, PCI_CHIP_TURKS_6745, RES_SHARED_VGA },
+ { PCI_CHIP_TURKS_6746, PCI_CHIP_TURKS_6746, RES_SHARED_VGA },
+ { PCI_CHIP_TURKS_6747, PCI_CHIP_TURKS_6747, RES_SHARED_VGA },
+ { PCI_CHIP_TURKS_6748, PCI_CHIP_TURKS_6748, RES_SHARED_VGA },
+ { PCI_CHIP_TURKS_6749, PCI_CHIP_TURKS_6749, RES_SHARED_VGA },
+ { PCI_CHIP_TURKS_6750, PCI_CHIP_TURKS_6750, RES_SHARED_VGA },
+ { PCI_CHIP_TURKS_6758, PCI_CHIP_TURKS_6758, RES_SHARED_VGA },
+ { PCI_CHIP_TURKS_6759, PCI_CHIP_TURKS_6759, RES_SHARED_VGA },
+ { PCI_CHIP_CAICOS_6760, PCI_CHIP_CAICOS_6760, RES_SHARED_VGA },
+ { PCI_CHIP_CAICOS_6761, PCI_CHIP_CAICOS_6761, RES_SHARED_VGA },
+ { PCI_CHIP_CAICOS_6762, PCI_CHIP_CAICOS_6762, RES_SHARED_VGA },
+ { PCI_CHIP_CAICOS_6763, PCI_CHIP_CAICOS_6763, RES_SHARED_VGA },
+ { PCI_CHIP_CAICOS_6764, PCI_CHIP_CAICOS_6764, RES_SHARED_VGA },
+ { PCI_CHIP_CAICOS_6765, PCI_CHIP_CAICOS_6765, RES_SHARED_VGA },
+ { PCI_CHIP_CAICOS_6766, PCI_CHIP_CAICOS_6766, RES_SHARED_VGA },
+ { PCI_CHIP_CAICOS_6767, PCI_CHIP_CAICOS_6767, RES_SHARED_VGA },
+ { PCI_CHIP_CAICOS_6768, PCI_CHIP_CAICOS_6768, RES_SHARED_VGA },
+ { PCI_CHIP_CAICOS_6770, PCI_CHIP_CAICOS_6770, RES_SHARED_VGA },
+ { PCI_CHIP_CAICOS_6779, PCI_CHIP_CAICOS_6779, RES_SHARED_VGA },
{ -1, -1, RES_UNDEFINED }
};
diff --git a/src/radeon_pci_device_match_gen.h b/src/radeon_pci_device_match_gen.h
index fe8604a..dc34586 100644
--- a/src/radeon_pci_device_match_gen.h
+++ b/src/radeon_pci_device_match_gen.h
@@ -421,5 +421,41 @@ static const struct pci_id_match radeon_device_match[] = {
ATI_DEVICE_MATCH( PCI_CHIP_CEDAR_68F8, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_CEDAR_68F9, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_CEDAR_68FE, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_BARTS_6720, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_BARTS_6721, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_BARTS_6722, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_BARTS_6723, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_BARTS_6724, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_BARTS_6725, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_BARTS_6726, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_BARTS_6727, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_BARTS_6728, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_BARTS_6729, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_BARTS_6738, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_BARTS_6739, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_TURKS_6740, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_TURKS_6741, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_TURKS_6742, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_TURKS_6743, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_TURKS_6744, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_TURKS_6745, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_TURKS_6746, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_TURKS_6747, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_TURKS_6748, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_TURKS_6749, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_TURKS_6750, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_TURKS_6758, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_TURKS_6759, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_CAICOS_6760, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_CAICOS_6761, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_CAICOS_6762, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_CAICOS_6763, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_CAICOS_6764, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_CAICOS_6765, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_CAICOS_6766, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_CAICOS_6767, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_CAICOS_6768, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_CAICOS_6770, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_CAICOS_6779, 0 ),
{ 0, 0, 0 }
};
commit 34d61785b9bc13287bd7ab8bdd8a1b99a3df4440
Author: Alex Deucher <alexdeucher at gmail.com>
Date: Tue Nov 23 20:54:57 2010 -0500
Add EXA/Xv acceleration support for NI chips
diff --git a/src/evergreen_accel.c b/src/evergreen_accel.c
index f3691d7..b46e61d 100644
--- a/src/evergreen_accel.c
+++ b/src/evergreen_accel.c
@@ -70,7 +70,8 @@ evergreen_sq_setup(ScrnInfoPtr pScrn, sq_config_t *sq_conf)
RADEONInfoPtr info = RADEONPTR(pScrn);
if ((info->ChipFamily == CHIP_FAMILY_CEDAR) ||
- (info->ChipFamily == CHIP_FAMILY_PALM))
+ (info->ChipFamily == CHIP_FAMILY_PALM) ||
+ (info->ChipFamily == CHIP_FAMILY_CAICOS))
sq_config = 0;
else
sq_config = VC_ENABLE_bit;
@@ -499,7 +500,8 @@ evergreen_set_vtx_resource(ScrnInfoPtr pScrn, vtx_resource_t *res, uint32_t doma
/* flush vertex cache */
if ((info->ChipFamily == CHIP_FAMILY_CEDAR) ||
- (info->ChipFamily == CHIP_FAMILY_PALM))
+ (info->ChipFamily == CHIP_FAMILY_PALM) ||
+ (info->ChipFamily == CHIP_FAMILY_CAICOS))
evergreen_cp_set_surface_sync(pScrn, TC_ACTION_ENA_bit,
accel_state->vbo.vb_offset, accel_state->vbo.vb_mc_addr,
res->bo,
@@ -857,6 +859,69 @@ evergreen_set_default_state(ScrnInfoPtr pScrn)
sq_conf.num_hs_stack_entries = 42;
sq_conf.num_ls_stack_entries = 42;
break;
+ case CHIP_FAMILY_BARTS:
+ sq_conf.num_ps_gprs = 93;
+ sq_conf.num_vs_gprs = 46;
+ sq_conf.num_temp_gprs = 4;
+ sq_conf.num_gs_gprs = 31;
+ sq_conf.num_es_gprs = 31;
+ sq_conf.num_hs_gprs = 23;
+ sq_conf.num_ls_gprs = 23;
+ sq_conf.num_ps_threads = 128;
+ sq_conf.num_vs_threads = 20;
+ sq_conf.num_gs_threads = 20;
+ sq_conf.num_es_threads = 20;
+ sq_conf.num_hs_threads = 20;
+ sq_conf.num_ls_threads = 20;
+ sq_conf.num_ps_stack_entries = 85;
+ sq_conf.num_vs_stack_entries = 85;
+ sq_conf.num_gs_stack_entries = 85;
+ sq_conf.num_es_stack_entries = 85;
+ sq_conf.num_hs_stack_entries = 85;
+ sq_conf.num_ls_stack_entries = 85;
+ break;
+ case CHIP_FAMILY_TURKS:
+ sq_conf.num_ps_gprs = 93;
+ sq_conf.num_vs_gprs = 46;
+ sq_conf.num_temp_gprs = 4;
+ sq_conf.num_gs_gprs = 31;
+ sq_conf.num_es_gprs = 31;
+ sq_conf.num_hs_gprs = 23;
+ sq_conf.num_ls_gprs = 23;
+ sq_conf.num_ps_threads = 128;
+ sq_conf.num_vs_threads = 20;
+ sq_conf.num_gs_threads = 20;
+ sq_conf.num_es_threads = 20;
+ sq_conf.num_hs_threads = 20;
+ sq_conf.num_ls_threads = 20;
+ sq_conf.num_ps_stack_entries = 42;
+ sq_conf.num_vs_stack_entries = 42;
+ sq_conf.num_gs_stack_entries = 42;
+ sq_conf.num_es_stack_entries = 42;
+ sq_conf.num_hs_stack_entries = 42;
+ sq_conf.num_ls_stack_entries = 42;
+ break;
+ case CHIP_FAMILY_CAICOS:
+ sq_conf.num_ps_gprs = 93;
+ sq_conf.num_vs_gprs = 46;
+ sq_conf.num_temp_gprs = 4;
+ sq_conf.num_gs_gprs = 31;
+ sq_conf.num_es_gprs = 31;
+ sq_conf.num_hs_gprs = 23;
+ sq_conf.num_ls_gprs = 23;
+ sq_conf.num_ps_threads = 128;
+ sq_conf.num_vs_threads = 10;
+ sq_conf.num_gs_threads = 10;
+ sq_conf.num_es_threads = 10;
+ sq_conf.num_hs_threads = 10;
+ sq_conf.num_ls_threads = 10;
+ sq_conf.num_ps_stack_entries = 42;
+ sq_conf.num_vs_stack_entries = 42;
+ sq_conf.num_gs_stack_entries = 42;
+ sq_conf.num_es_stack_entries = 42;
+ sq_conf.num_hs_stack_entries = 42;
+ sq_conf.num_ls_stack_entries = 42;
+ break;
}
evergreen_sq_setup(pScrn, &sq_conf);
commit 97322c00faf08461b941edf97efe86d8b082a0ce
Author: Alex Deucher <alexdeucher at gmail.com>
Date: Wed Nov 24 12:18:04 2010 -0500
Bail on NI cards with UMS
NI cards require KMS.
diff --git a/src/radeon.h b/src/radeon.h
index 9c96187..7f55fee 100644
--- a/src/radeon.h
+++ b/src/radeon.h
@@ -393,6 +393,8 @@ typedef enum {
#define IS_DCE41_VARIANT ((info->ChipFamily >= CHIP_FAMILY_PALM))
+#define IS_DCE5_VARIANT ((info->ChipFamily >= CHIP_FAMILY_BARTS))
+
#define IS_EVERGREEN_3D (info->ChipFamily >= CHIP_FAMILY_CEDAR)
#define IS_R600_3D (info->ChipFamily >= CHIP_FAMILY_R600)
diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index e2f605c..20a81e6 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -1894,6 +1894,14 @@ static Bool RADEONPreInitChipType(ScrnInfoPtr pScrn)
}
}
+ if (IS_DCE5_VARIANT) {
+ xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+ "Chipset: \"%s\" (ChipID = 0x%04x) requires KMS\n",
+ pScrn->chipset,
+ info->Chipset);
+ return FALSE;
+ }
+
switch (info->Chipset) {
case PCI_CHIP_RN50_515E: /* RN50 is based on the RV100 but 3D isn't guaranteed to work. YMMV. */
case PCI_CHIP_RN50_5969:
commit c678b79f99238473df6ff1bedbae840950cdf88c
Author: Alex Deucher <alexdeucher at gmail.com>
Date: Tue Nov 23 20:45:25 2010 -0500
add NI family ids
diff --git a/src/radeon.h b/src/radeon.h
index 25d026f..9c96187 100644
--- a/src/radeon.h
+++ b/src/radeon.h
@@ -359,6 +359,9 @@ typedef enum {
CHIP_FAMILY_CYPRESS,
CHIP_FAMILY_HEMLOCK,
CHIP_FAMILY_PALM,
+ CHIP_FAMILY_BARTS,
+ CHIP_FAMILY_TURKS,
+ CHIP_FAMILY_CAICOS,
CHIP_FAMILY_LAST
} RADEONChipFamily;
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