xf86-video-ati: Branch 'master' - 2 commits
Alex Deucher
agd5f at kemper.freedesktop.org
Fri Feb 11 11:33:28 PST 2011
src/evergreen_exa.c | 12 ++++----
src/r600_exa.c | 73 ++++++++++++++++++++++++++++++++--------------------
2 files changed, 51 insertions(+), 34 deletions(-)
New commits:
commit 309fac041f998e20338d320aabaeda5cc1bb6348
Author: Alex Deucher <alexdeucher at gmail.com>
Date: Fri Feb 11 14:32:45 2011 -0500
kms/exa/xv: fix alignment checking in accel state setup
Signed-off-by: Alex Deucher <alexdeucher at gmail.com>
diff --git a/src/r600_exa.c b/src/r600_exa.c
index 06ce83b..8057d56 100644
--- a/src/r600_exa.c
+++ b/src/r600_exa.c
@@ -54,6 +54,7 @@ R600SetAccelState(ScrnInfoPtr pScrn,
RADEONInfoPtr info = RADEONPTR(pScrn);
struct radeon_accel_state *accel_state = info->accel_state;
uint32_t pitch = 0;
+ uint32_t pitch_align = 0x7, base_align = 0xff;
#if defined(XF86DRM_MODE)
int ret;
#endif
@@ -68,8 +69,22 @@ R600SetAccelState(ScrnInfoPtr pScrn,
&pitch);
if (ret)
RADEON_FALLBACK(("src0 radeon_bo_get_tiling failed\n"));
+ pitch_align = drmmode_get_pitch_align(pScrn,
+ accel_state->src_obj[0].bpp / 8,
+ accel_state->src_obj[0].tiling_flags) - 1;
+ base_align = drmmode_get_base_align(pScrn,
+ accel_state->src_obj[0].bpp / 8,
+ accel_state->src_obj[0].tiling_flags) - 1;
}
#endif
+ /* bad pitch */
+ if (accel_state->src_obj[0].pitch & pitch_align)
+ RADEON_FALLBACK(("Bad src pitch 0x%08x\n", accel_state->src_obj[0].pitch));
+
+ /* bad offset */
+ if (accel_state->src_obj[0].offset & base_align)
+ RADEON_FALLBACK(("Bad src offset 0x%08x\n", accel_state->src_obj[0].offset));
+
} else {
memset(&accel_state->src_obj[0], 0, sizeof(struct r600_accel_object));
accel_state->src_size[0] = 0;
@@ -85,8 +100,21 @@ R600SetAccelState(ScrnInfoPtr pScrn,
&pitch);
if (ret)
RADEON_FALLBACK(("src1 radeon_bo_get_tiling failed\n"));
+ pitch_align = drmmode_get_pitch_align(pScrn,
+ accel_state->src_obj[1].bpp / 8,
+ accel_state->src_obj[1].tiling_flags) - 1;
+ base_align = drmmode_get_base_align(pScrn,
+ accel_state->src_obj[1].bpp / 8,
+ accel_state->src_obj[1].tiling_flags) - 1;
}
#endif
+ /* bad pitch */
+ if (accel_state->src_obj[1].pitch & pitch_align)
+ RADEON_FALLBACK(("Bad src pitch 0x%08x\n", accel_state->src_obj[1].pitch));
+
+ /* bad offset */
+ if (accel_state->src_obj[1].offset & base_align)
+ RADEON_FALLBACK(("Bad src offset 0x%08x\n", accel_state->src_obj[1].offset));
} else {
memset(&accel_state->src_obj[1], 0, sizeof(struct r600_accel_object));
accel_state->src_size[1] = 0;
@@ -102,8 +130,19 @@ R600SetAccelState(ScrnInfoPtr pScrn,
&pitch);
if (ret)
RADEON_FALLBACK(("dst radeon_bo_get_tiling failed\n"));
+ pitch_align = drmmode_get_pitch_align(pScrn,
+ accel_state->dst_obj.bpp / 8,
+ accel_state->dst_obj.tiling_flags) - 1;
+ base_align = drmmode_get_base_align(pScrn,
+ accel_state->dst_obj.bpp / 8,
+ accel_state->dst_obj.tiling_flags) - 1;
}
#endif
+ if (accel_state->dst_obj.pitch & pitch_align)
+ RADEON_FALLBACK(("Bad dst pitch 0x%08x\n", accel_state->dst_obj.pitch));
+
+ if (accel_state->dst_obj.offset & base_align)
+ RADEON_FALLBACK(("Bad dst offset 0x%08x\n", accel_state->dst_obj.offset));
} else {
memset(&accel_state->dst_obj, 0, sizeof(struct r600_accel_object));
accel_state->dst_size = 0;
@@ -112,28 +151,6 @@ R600SetAccelState(ScrnInfoPtr pScrn,
accel_state->rop = rop;
accel_state->planemask = planemask;
- /* bad pitch */
- if (accel_state->src_obj[0].pitch & 7)
- RADEON_FALLBACK(("Bad src pitch 0x%08x\n", accel_state->src_obj[0].pitch));
-
- /* bad offset */
- if (accel_state->src_obj[0].offset & 0xff)
- RADEON_FALLBACK(("Bad src offset 0x%08x\n", accel_state->src_obj[0].offset));
-
- /* bad pitch */
- if (accel_state->src_obj[1].pitch & 7)
- RADEON_FALLBACK(("Bad src pitch 0x%08x\n", accel_state->src_obj[1].pitch));
-
- /* bad offset */
- if (accel_state->src_obj[1].offset & 0xff)
- RADEON_FALLBACK(("Bad src offset 0x%08x\n", accel_state->src_obj[1].offset));
-
- if (accel_state->dst_obj.pitch & 7)
- RADEON_FALLBACK(("Bad dst pitch 0x%08x\n", accel_state->dst_obj.pitch));
-
- if (accel_state->dst_obj.offset & 0xff)
- RADEON_FALLBACK(("Bad dst offset 0x%08x\n", accel_state->dst_obj.offset));
-
accel_state->vs_size = 512;
accel_state->ps_size = 512;
#if defined(XF86DRM_MODE)
commit 25fe3ec4c6dfcdf6ba72a032bc9cb2c84d84029a
Author: Alex Deucher <alexdeucher at gmail.com>
Date: Fri Feb 11 14:03:56 2011 -0500
kms/exa: UTS/DFS base alignment fixes
Signed-off-by: Alex Deucher <alexdeucher at gmail.com>
diff --git a/src/evergreen_exa.c b/src/evergreen_exa.c
index 04903ea..7e1e464 100644
--- a/src/evergreen_exa.c
+++ b/src/evergreen_exa.c
@@ -1357,7 +1357,7 @@ EVERGREENUploadToScreen(PixmapPtr pDst, int x, int y, int w, int h,
Bool r;
int i;
struct r600_accel_object src_obj, dst_obj;
- uint32_t tiling_flags = 0, pitch = 0, height;
+ uint32_t tiling_flags = 0, pitch = 0, height, base_align;
if (bpp < 8)
return FALSE;
@@ -1383,9 +1383,9 @@ EVERGREENUploadToScreen(PixmapPtr pDst, int x, int y, int w, int h,
scratch_pitch = RADEON_ALIGN(w, drmmode_get_pitch_align(pScrn, (bpp / 8), 0));
height = RADEON_ALIGN(h, drmmode_get_height_align(pScrn, 0));
-
+ base_align = drmmode_get_base_align(pScrn, (bpp / 8), 0);
size = scratch_pitch * height * (bpp / 8);
- scratch = radeon_bo_open(info->bufmgr, 0, size, 0, RADEON_GEM_DOMAIN_GTT, 0);
+ scratch = radeon_bo_open(info->bufmgr, 0, size, base_align, RADEON_GEM_DOMAIN_GTT, 0);
if (scratch == NULL) {
goto copy;
}
@@ -1474,7 +1474,7 @@ EVERGREENDownloadFromScreen(PixmapPtr pSrc, int x, int y, int w,
Bool flush = FALSE;
Bool r;
struct r600_accel_object src_obj, dst_obj;
- uint32_t tiling_flags = 0, pitch = 0, height;
+ uint32_t tiling_flags = 0, pitch = 0, height, base_align;
if (bpp < 8)
return FALSE;
@@ -1513,9 +1513,9 @@ EVERGREENDownloadFromScreen(PixmapPtr pSrc, int x, int y, int w,
scratch_pitch = RADEON_ALIGN(w, drmmode_get_pitch_align(pScrn, (bpp / 8), 0));
height = RADEON_ALIGN(h, drmmode_get_height_align(pScrn, 0));
-
+ base_align = drmmode_get_base_align(pScrn, (bpp / 8), 0);
size = scratch_pitch * height * (bpp / 8);
- scratch = radeon_bo_open(info->bufmgr, 0, size, 0, RADEON_GEM_DOMAIN_GTT, 0);
+ scratch = radeon_bo_open(info->bufmgr, 0, size, base_align, RADEON_GEM_DOMAIN_GTT, 0);
if (scratch == NULL) {
goto copy;
}
diff --git a/src/r600_exa.c b/src/r600_exa.c
index 661b9d0..06ce83b 100644
--- a/src/r600_exa.c
+++ b/src/r600_exa.c
@@ -1724,7 +1724,7 @@ R600UploadToScreenCS(PixmapPtr pDst, int x, int y, int w, int h,
Bool r;
int i;
struct r600_accel_object src_obj, dst_obj;
- uint32_t tiling_flags = 0, pitch = 0, height;
+ uint32_t tiling_flags = 0, pitch = 0, height, base_align;
if (bpp < 8)
return FALSE;
@@ -1750,9 +1750,9 @@ R600UploadToScreenCS(PixmapPtr pDst, int x, int y, int w, int h,
scratch_pitch = RADEON_ALIGN(w, drmmode_get_pitch_align(pScrn, (bpp / 8), 0));
height = RADEON_ALIGN(h, drmmode_get_height_align(pScrn, 0));
-
+ base_align = drmmode_get_base_align(pScrn, (bpp / 8), 0);
size = scratch_pitch * height * (bpp / 8);
- scratch = radeon_bo_open(info->bufmgr, 0, size, 0, RADEON_GEM_DOMAIN_GTT, 0);
+ scratch = radeon_bo_open(info->bufmgr, 0, size, base_align, RADEON_GEM_DOMAIN_GTT, 0);
if (scratch == NULL) {
goto copy;
}
@@ -1841,7 +1841,7 @@ R600DownloadFromScreenCS(PixmapPtr pSrc, int x, int y, int w,
Bool flush = FALSE;
Bool r;
struct r600_accel_object src_obj, dst_obj;
- uint32_t tiling_flags = 0, pitch = 0, height;
+ uint32_t tiling_flags = 0, pitch = 0, height, base_align;
if (bpp < 8)
return FALSE;
@@ -1876,9 +1876,9 @@ R600DownloadFromScreenCS(PixmapPtr pSrc, int x, int y, int w,
scratch_pitch = RADEON_ALIGN(w, drmmode_get_pitch_align(pScrn, (bpp / 8), 0));
height = RADEON_ALIGN(h, drmmode_get_height_align(pScrn, 0));
-
+ base_align = drmmode_get_base_align(pScrn, (bpp / 8), 0);
size = scratch_pitch * height * (bpp / 8);
- scratch = radeon_bo_open(info->bufmgr, 0, size, 0, RADEON_GEM_DOMAIN_GTT, 0);
+ scratch = radeon_bo_open(info->bufmgr, 0, size, base_align, RADEON_GEM_DOMAIN_GTT, 0);
if (scratch == NULL) {
goto copy;
}
More information about the xorg-commit
mailing list