xf86-video-ati: Branch 'master'

[Dave Airlie]

 src/radeon_dri2.c |    4 ++--
 src/radeon_exa.c  |    2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

New commits:
commit ba46c7b0cf72d157748981eb3224d5eefb6200aa
Author: Dave Airlie <airlied at redhat.com>
Date:   Tue Dec 6 13:42:49 2011 +0000

    radeon: refine always tiled depth check
    
    So it appears the M7 family always tiles its depth buffer also.
    
    Signed-off-by: Dave Airlie <airlied at redhat.com>

diff --git a/src/radeon_dri2.c b/src/radeon_dri2.c
index 9fd3658..5463791 100644
--- a/src/radeon_dri2.c
+++ b/src/radeon_dri2.c
@@ -121,7 +121,7 @@ radeon_dri2_create_buffers(DrawablePtr drawable,
 		    flags = RADEON_CREATE_PIXMAP_TILING_MICRO;
 		else
 		    flags = RADEON_CREATE_PIXMAP_TILING_MACRO | RADEON_CREATE_PIXMAP_TILING_MICRO;
-		if (IS_R200_3D)
+		if (IS_R200_3D || info->ChipFamiy == CHIP_FAMILY_RV200)
 		    flags |= RADEON_CREATE_PIXMAP_DEPTH;
 		break;
 	    case DRI2BufferDepthStencil:
@@ -134,7 +134,7 @@ radeon_dri2_create_buffers(DrawablePtr drawable,
 			need_enlarge = 1;
 		} else
 		    flags = RADEON_CREATE_PIXMAP_TILING_MACRO | RADEON_CREATE_PIXMAP_TILING_MICRO;
-		if (IS_R200_3D)
+		if (IS_R200_3D || info->ChipFamily == CHIP_FAMILY_RV200)
 		    flags |= RADEON_CREATE_PIXMAP_DEPTH;
 		break;
 	    case DRI2BufferBackLeft:
diff --git a/src/radeon_exa.c b/src/radeon_exa.c
index 95646ab..554af36 100644
--- a/src/radeon_exa.c
+++ b/src/radeon_exa.c
@@ -473,7 +473,7 @@ void *RADEONEXACreatePixmap2(ScreenPtr pScreen, int width, int height,
     	    if (usage_hint & RADEON_CREATE_PIXMAP_TILING_MICRO)
                 tiling |= RADEON_TILING_MICRO;
 	}
-	if ((usage_hint & RADEON_CREATE_PIXMAP_DEPTH) && IS_R200_3D)
+	if (usage_hint & RADEON_CREATE_PIXMAP_DEPTH)
  	   	tiling |= RADEON_TILING_MACRO | RADEON_TILING_MICRO;
 		
     }