xf86-video-intel: src/intel_driver.c src/intel_driver.h

[Zhenyu Wang]

 src/intel_driver.c |    2 +-
 src/intel_driver.h |    2 ++
 2 files changed, 3 insertions(+), 1 deletion(-)

New commits:
commit 345c963e443ec325f1ff530512a356ddb318ff70
Author: Zhenyu Wang <zhenyuw at linux.intel.com>
Date:   Thu Sep 30 10:58:49 2010 +0800

    Always use tiling on Sandybridge
    
    Sandybridge requires kind of buffer must be tiling, like depth.
    And we would or have all tiling cases handled fine. So not allow
    user to turn off tiling on Sandybridge+ may be fine.
    
    Signed-off-by: Zhenyu Wang <zhenyuw at linux.intel.com>

diff --git a/src/intel_driver.c b/src/intel_driver.c
index d086d94..79c850b 100644
--- a/src/intel_driver.c
+++ b/src/intel_driver.c
@@ -601,7 +601,7 @@ static Bool I830PreInit(ScrnInfoPtr scrn, int flags)
 	intel->tiling = TRUE;
 
 	/* Allow user override if they set a value */
-	if (xf86IsOptionSet(intel->Options, OPTION_TILING)) {
+	if (!ALWAYS_TILING(intel) && xf86IsOptionSet(intel->Options, OPTION_TILING)) {
 		if (xf86ReturnOptValBool(intel->Options, OPTION_TILING, FALSE))
 			intel->tiling = TRUE;
 		else
diff --git a/src/intel_driver.h b/src/intel_driver.h
index b55c8c9..31b3009 100644
--- a/src/intel_driver.h
+++ b/src/intel_driver.h
@@ -264,6 +264,8 @@
 /* supports Y tiled surfaces (pre-965 Mesa isn't ready yet) */
 #define SUPPORTS_YTILING(pI810) (IS_I965G(intel))
 
+#define ALWAYS_TILING(intel) (IS_GEN6(intel))
+
 extern SymTabRec *intel_chipsets;
 
 struct intel_chipset {