intel-gen4asm: Changes to 'master'

[Haihao Xiang]

 configure.ac      |    2 
 src/brw_defines.h |    5 ++
 src/brw_structs.h |   34 ++++++++++++++--
 src/disasm.c      |    4 -
 src/gram.y        |  114 +++++++++++++++++++++++++++++++++++++++++++-----------
 src/lex.l         |    7 ++-
 src/main.c        |    6 +-
 7 files changed, 138 insertions(+), 34 deletions(-)

New commits:
commit ed3c2b3c3deeeb29e4ff5fa0dd82be39813cb1ed
Author: Xiang, Haihao <haihao.xiang at intel.com>
Date:   Thu Oct 21 14:37:18 2010 +0800

    bump version to 1.1
    
    Signed-off-by: Xiang, Haihao <haihao.xiang at intel.com>

commit a758e655546d5d699c6a3f03ce049870e1740be6
Author: Xiang, Haihao <haihao.xiang at intel.com>
Date:   Wed Oct 27 09:42:56 2010 +0800

    add support for math instruction on Sandybridge
    
    Signed-off-by: Xiang, Haihao <haihao.xiang at intel.com>

commit 988d6394f1c7bfd0c57761feb5696e3181e28ade
Author: Xiang, Haihao <haihao.xiang at intel.com>
Date:   Tue Oct 19 13:26:24 2010 +0800

    add support for plane instruction (pln)
    
    Signed-off-by: Xiang, Haihao <haihao.xiang at intel.com>

commit c148d12f40d79094331a3e4027a9b424e3c179e6
Author: Xiang, Haihao <haihao.xiang at intel.com>
Date:   Thu Oct 21 14:33:35 2010 +0800

    Send on Sandybridge uses a message register as operand src0
    
    Signed-off-by: Xiang, Haihao <haihao.xiang at intel.com>

commit fd773a29b6d535f73f523dc0570236a39e9db016
Author: Xiang, Haihao <haihao.xiang at intel.com>
Date:   Sat Oct 9 13:57:48 2010 +0800

    no compression flag on Sandybridge
    
    Signed-off-by: Xiang, Haihao <haihao.xiang at intel.com>

commit 26971812c5102f48eab16e1462d43a918f2a28fb
Author: Xiang, Haihao <haihao.xiang at intel.com>
Date:   Sat Oct 9 12:52:08 2010 +0800

    print error message when using math function on Sandybridge.
    
    Sandybridge doesn't have math funtion, instead it supports a set of math
    instructions. The support for math instructions will be added later.
    
    Signed-off-by: Xiang, Haihao <haihao.xiang at intel.com>

commit dd2584e4cc991c45b94ad6ec2f5e00bdae649c54
Author: Xiang, Haihao <haihao.xiang at intel.com>
Date:   Sat Oct 9 12:46:15 2010 +0800

    sampler, urb write, null and gateway on Sandybridge are same as Ironlake.
    
    Signed-off-by: Xiang, Haihao <haihao.xiang at intel.com>

commit 78deff13d3a80bd2c75c9f339b6c133424c88795
Author: Xiang, Haihao <haihao.xiang at intel.com>
Date:   Sat Oct 9 11:09:47 2010 +0800

    add support for data port read on Sandybridge
    
    Signed-off-by: Xiang, Haihao <haihao.xiang at intel.com>

commit 19c3021b0b73e648069e9373833891401897bd0d
Author: Xiang, Haihao <haihao.xiang at intel.com>
Date:   Fri Oct 8 16:48:15 2010 +0800

    add support for data port write on Sandybridge.
    
    Signed-off-by: Xiang, Haihao <haihao.xiang at intel.com>

commit cb74c78c5fd60c32775c486d5dee55f59ef833fa
Author: Xiang, Haihao <haihao.xiang at intel.com>
Date:   Fri Oct 8 15:07:51 2010 +0800

    fix send instruction on Sandybridge
    
    Send doesn't have implied move on Sandybridge, the SFID moves to bits[24,27] which
    is used as the destination of the implied move on Prev GEN6.
    
    Signed-off-by: Xiang, Haihao <haihao.xiang at intel.com>

commit 0919a3b879b27ce04d0f8aa1b86f62d88a5248ee
Author: Xiang, Haihao <haihao.xiang at intel.com>
Date:   Fri Oct 8 13:53:22 2010 +0800

    add AccWrCtrl flag on Sandybridge
    
    Signed-off-by: Xiang, Haihao <haihao.xiang at intel.com>

commit b9280c838919d79409a84b457a4fc34eb5108054
Author: Xiang, Haihao <haihao.xiang at intel.com>
Date:   Fri Oct 8 13:10:15 2010 +0800

    always set destination horiz stride for Align16 to 1 on Sandybridge.
    
    Signed-off-by: Xiang, Haihao <haihao.xiang at intel.com>

commit 49255dfefe13752a0914d187b0fad0b01a977376
Author: Xiang, Haihao <haihao.xiang at intel.com>
Date:   Fri Oct 8 12:53:38 2010 +0800

    fix jump count for Sandybridge.
    
    It is same as Ironlake.
    
    Signed-off-by: Xiang, Haihao <haihao.xiang at intel.com>

commit 4032660b41b39d2eb5c7a8381814cd084ba18983
Author: Xiang, Haihao <haihao.xiang at intel.com>
Date:   Fri Oct 8 12:52:34 2010 +0800

    add -g 6 for Sandybridge
    
    Signed-off-by: Xiang, Haihao <haihao.xiang at intel.com>