xf86-video-intel: Changes to 'refs/tags/2.13.901'
Carl Worth
cworth at kemper.freedesktop.org
Fri Nov 5 12:59:53 PDT 2010
Tag '2.13.901' created by Carl Worth <cworth at cworth.org> at 2010-11-05 20:59 -0700
Intel 2.13.901 snapshot
Changes since 2.13.0:
Adam Jackson (1):
intel: Listen for hotplug uevents (V3)
Carl Worth (3):
Merge commit '2.13.0'
NEWS: Add release notes for 2.13.901 snapshot.
Update version number to 2.13.901
Chris Wilson (26):
video: Disable TextureAdaptor for Sandybridge
legacy/i810: Remove pVisualConfigs
Do not claim the PCI device if !KMS
Split shadow handling routines to their own file.
shadow: Map the scanout directly on i8xx
shadow+dri2: Allow dri2 to be independently enabled with shadow
shadow: Disable BLT for SandyBridge
shadow: Enable shadow by default on SandyBridge
shadow: Use a cacheable shadow for all generations
Clear pixmap->devPrivate.ptr [regression from 7c7294e]
Revert "Clear pixmap->devPrivate.ptr [regression in 7c7294e]"
uxa: Re-enable acceleration.
uxa: Skip a pixmap lookup if there is no driver finish access function
dri: Reattach the fake pixmap for the shadow scanout to the drawable.
dri+shadow: Only tweak the acceleration of CopyRegion if using shadow.
Include a chipset generation number to clarify device specific paths.
dri: Check for pixmap privates before dereferencing them
Move EDID_COMPLETE_RAWDATA define to intel.h to avoid redifinition warning
Fix driverName regression for i830 from 4083197a
display: do not report failure for setting unrecognised properties
uxa: Enable reduced fence sizes for i915
intel: don't pass a dangling pointer to GET_PARAM
Flush BLT batches before starting an atomic RENDER batch
Fallback to shadow for Sandybridge if we don't have access to the BLT
Downgrade tiling allocation failure to a warning
Wait for any pending rendering before switching modes.
Eric Anholt (2):
Fix violation of gen6 requirements for depthbuffer tiling.
Remove the intermittent GEM_THROTTLE call.
Stefan Dirsch (1):
Make driver compile for 1.6 Xserver series again. Part deux.
Xiang, Haihao (11):
Xv: set the surface state base address
Xv: Send instruction doesn't use implied move when sampling YUV surface
Xv: fragments for xv on Sandybridge.
Xv: setup pipeline for Xv on Sandybridge
Xv: enable TextureAdaptor for Sandybridge
Xv: don't call intel_wait_for_scanline on Sandybridge
render: set the surface state base address
render: fix send instruction used in sampling fragments
render: fragments for composite on Sandybridge
render: acceleration for composite on Sandybridge
render: use headerless render target write
Zhenyu Wang (1):
Always use tiling on Sandybridge
Zou Nan hai (2):
add BLT ring support
Support BLT acceleration on gen6
---
NEWS | 7
configure.ac | 9
man/intel.man | 6
src/Makefile.am | 5
src/brw_structs.h | 100 ++
src/common.h | 7
src/i830_reg.h | 2
src/i830_render.c | 2
src/i965_reg.h | 98 ++
src/i965_render.c | 789 ++++++++++++++++--
src/i965_video.c | 794 ++++++++++++++++---
src/intel.h | 31
src/intel_batchbuffer.c | 47 -
src/intel_batchbuffer.h | 13
src/intel_display.c | 8
src/intel_dri.c | 247 ++++-
src/intel_driver.c | 206 +++-
src/intel_driver.h | 78 -
src/intel_hwmc.c | 14
src/intel_memory.c | 40
src/intel_module.c | 113 ++
src/intel_shadow.c | 204 ++++
src/intel_uxa.c | 334 +------
src/intel_video.c | 53 -
src/intel_video.h | 7
src/legacy/i810/i810.h | 3
src/legacy/i810/i810_dri.c | 4
src/render_program/Makefile.am | 45 +
src/render_program/exa_wm_ca.g6a | 1
src/render_program/exa_wm_ca.g6b | 4
src/render_program/exa_wm_ca_srcalpha.g6a | 1
src/render_program/exa_wm_ca_srcalpha.g6b | 4
src/render_program/exa_wm_mask_affine.g6a | 47 +
src/render_program/exa_wm_mask_affine.g6b | 4
src/render_program/exa_wm_mask_projective.g6a | 63 +
src/render_program/exa_wm_mask_projective.g6b | 12
src/render_program/exa_wm_mask_sample_a.g4a | 3
src/render_program/exa_wm_mask_sample_a.g4b | 3
src/render_program/exa_wm_mask_sample_a.g4b.gen5 | 3
src/render_program/exa_wm_mask_sample_a.g6a | 1
src/render_program/exa_wm_mask_sample_a.g6b | 3
src/render_program/exa_wm_mask_sample_argb.g4a | 3
src/render_program/exa_wm_mask_sample_argb.g4b | 3
src/render_program/exa_wm_mask_sample_argb.g4b.gen5 | 3
src/render_program/exa_wm_mask_sample_argb.g6a | 1
src/render_program/exa_wm_mask_sample_argb.g6b | 3
src/render_program/exa_wm_noca.g6a | 1
src/render_program/exa_wm_noca.g6b | 4
src/render_program/exa_wm_src_affine.g6a | 47 +
src/render_program/exa_wm_src_affine.g6b | 4
src/render_program/exa_wm_src_projective.g6a | 63 +
src/render_program/exa_wm_src_projective.g6b | 12
src/render_program/exa_wm_src_sample_a.g4a | 3
src/render_program/exa_wm_src_sample_a.g4b | 3
src/render_program/exa_wm_src_sample_a.g4b.gen5 | 3
src/render_program/exa_wm_src_sample_a.g6a | 1
src/render_program/exa_wm_src_sample_a.g6b | 3
src/render_program/exa_wm_src_sample_argb.g4a | 3
src/render_program/exa_wm_src_sample_argb.g4b | 3
src/render_program/exa_wm_src_sample_argb.g4b.gen5 | 3
src/render_program/exa_wm_src_sample_argb.g6a | 1
src/render_program/exa_wm_src_sample_argb.g6b | 3
src/render_program/exa_wm_src_sample_planar.g4a | 7
src/render_program/exa_wm_src_sample_planar.g4b | 7
src/render_program/exa_wm_src_sample_planar.g4b.gen5 | 7
src/render_program/exa_wm_src_sample_planar.g6a | 1
src/render_program/exa_wm_src_sample_planar.g6b | 5
src/render_program/exa_wm_write.g6a | 77 +
src/render_program/exa_wm_write.g6b | 17
src/render_program/exa_wm_yuv_rgb.g6a | 1
src/render_program/exa_wm_yuv_rgb.g6b | 12
uxa/uxa-glyphs.c | 7
uxa/uxa.c | 3
73 files changed, 3027 insertions(+), 702 deletions(-)
---
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