xf86-video-intel: 37 commits - src/drmmode_display.c src/i830_driver.c src/i830.h src/i830_hwmc.c src/i830_hwmc.h src/i830_memory.c src/i830_uxa.c src/i830_video.c src/i915_hwmc.c src/i915_hwmc.h src/i965_hwmc.c src/i965_hwmc.h src/i965_video.c src/xvmc/i915_structs.h src/xvmc/i915_xvmc.c src/xvmc/i915_xvmc.h src/xvmc/i965_xvmc.c src/xvmc/intel_batchbuffer.c src/xvmc/intel_xvmc.c src/xvmc/intel_xvmc.h src/xvmc/xvmc_vld.c uxa/uxa-render.c
Carl Worth
cworth at kemper.freedesktop.org
Thu Mar 4 09:52:42 PST 2010
src/drmmode_display.c | 15
src/i830.h | 49 -
src/i830_driver.c | 16
src/i830_hwmc.c | 36
src/i830_hwmc.h | 8
src/i830_memory.c | 359 --------
src/i830_uxa.c | 6
src/i830_video.c | 118 +-
src/i915_hwmc.c | 590 --------------
src/i915_hwmc.h | 12
src/i965_hwmc.c | 1
src/i965_hwmc.h | 12
src/i965_video.c | 2
src/xvmc/i915_structs.h | 121 --
src/xvmc/i915_xvmc.c | 1751 ++++++-------------------------------------
src/xvmc/i915_xvmc.h | 20
src/xvmc/i965_xvmc.c | 12
src/xvmc/intel_batchbuffer.c | 23
src/xvmc/intel_xvmc.c | 2
src/xvmc/intel_xvmc.h | 4
src/xvmc/xvmc_vld.c | 20
uxa/uxa-render.c | 2
22 files changed, 451 insertions(+), 2728 deletions(-)
New commits:
commit 74e2b69a317cc728b00e675c18d2976987407aec
Author: Carl Worth <cworth at cworth.org>
Date: Thu Mar 4 09:51:03 2010 -0800
i915_hwmc: Remove dead code.
Daniel recently identified this code as unneeded (with an #if 0).
Here we take the next step and remove it entirely.
diff --git a/src/i915_hwmc.c b/src/i915_hwmc.c
index 3097e92..8ba122b 100644
--- a/src/i915_hwmc.c
+++ b/src/i915_hwmc.c
@@ -113,17 +113,6 @@ static XF86MCSurfaceInfoPtr ppSI[2] = {
(XF86MCSurfaceInfoPtr) & i915_YV12_mpg1_surface
};
-#if 0
-/* List of subpicture types that we support */
-static XF86ImageRec ia44_subpicture = XVIMAGE_IA44;
-static XF86ImageRec ai44_subpicture = XVIMAGE_AI44;
-
-static XF86ImagePtr i915_subpicture_list[2] = {
- (XF86ImagePtr) & ia44_subpicture,
- (XF86ImagePtr) & ai44_subpicture
-};
-#endif
-
/* Check context size not exceed surface type max */
static void i915_check_context_size(XvMCContextPtr ctx)
{
commit 1cc35a8ba403ad95b67caff46b803db1edea5ad3
Author: Carl Worth <cworth at cworth.org>
Date: Thu Mar 4 09:46:33 2010 -0800
uxa: Fix type mismatch to avoid compiler warning.
The code was using uint32_t where an XID (currently an unsigned long)
was specified in the prototype. Use XID to avoid both the warning and
any potential problem.
diff --git a/uxa/uxa-render.c b/uxa/uxa-render.c
index 3a3a785..e70a845 100644
--- a/uxa/uxa-render.c
+++ b/uxa/uxa-render.c
@@ -495,7 +495,7 @@ uxa_create_solid(ScreenPtr screen, uint32_t color)
{
PixmapPtr pixmap;
PicturePtr picture;
- uint32_t repeat = RepeatNormal;
+ XID repeat = RepeatNormal;
int error = 0;
pixmap = (*screen->CreatePixmap)(screen, 1, 1, 32,
commit 1d6537ec57535183638c62e3099bc79786c682ca
Author: Carl Worth <cworth at cworth.org>
Date: Thu Mar 4 09:39:28 2010 -0800
i830_video: Remove unused variable.
Certainly just a little leftover from the recent rewrites.
diff --git a/src/i830_video.c b/src/i830_video.c
index 02ed35c..db72863 100644
--- a/src/i830_video.c
+++ b/src/i830_video.c
@@ -1562,7 +1562,6 @@ I830PutImageOverlay(ScrnInfoPtr scrn,
DrawablePtr drawable)
{
intel_adaptor_private *adaptor_priv = (intel_adaptor_private *) data;
- ScreenPtr screen = screenInfo.screens[scrn->scrnIndex];
int dstPitch, dstPitch2;
BoxRec dstBox;
xf86CrtcPtr crtc;
commit 57c0043b9a519da5c9af29019ef632716782bda2
Author: Daniel Vetter <daniel.vetter at ffwll.ch>
Date: Tue Mar 2 09:22:33 2010 +0100
Xv: fixup relocation in i965_video.c
The previous code made no sense, (multiplying an offset by 4 is
meaningless). It could have onlt worked with the offset being
fortuitously 0.
Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
Reviewed-by: Carl Worth <cworth at cworth.org>
diff --git a/src/i965_video.c b/src/i965_video.c
index 0ba9511..05dd2c3 100644
--- a/src/i965_video.c
+++ b/src/i965_video.c
@@ -1228,7 +1228,7 @@ I965DisplayVideoTextured(ScrnInfoPtr scrn,
OUT_RELOC(vb_bo, I915_GEM_DOMAIN_VERTEX, 0, 0);
if (IS_IGDNG(intel))
OUT_RELOC(vb_bo, I915_GEM_DOMAIN_VERTEX, 0,
- (vb_bo->offset + i) * 4);
+ i * 4);
else
OUT_BATCH(3); /* four corners to our rectangle */
OUT_BATCH(0); /* reserved */
commit e606be463f6359fd017791a8d4d85059831a5d41
Author: Daniel Vetter <daniel.vetter at ffwll.ch>
Date: Tue Mar 2 21:53:28 2010 +0100
i830_memory: rip out the remainings of the old allocator
Yeah!
Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
Reviewed-by: Carl Worth <cworth at cworth.org>
diff --git a/src/i830.h b/src/i830.h
index 46cdd6c..2547b6f 100644
--- a/src/i830.h
+++ b/src/i830.h
@@ -233,9 +233,6 @@ typedef struct intel_screen_private {
long FbMapSize;
long GTTMapSize;
- /** Linked list of buffer object memory allocations */
- i830_memory *bo_list;
-
drm_intel_bo *front_buffer;
/* One big buffer for all cursors for kernels that support this */
drm_intel_bo *cursor_mem_argb[2];
@@ -433,12 +430,6 @@ extern Bool I830AccelInit(ScreenPtr pScreen);
void i830_reset_allocations(ScrnInfoPtr scrn);
Bool i830_allocate_2d_memory(ScrnInfoPtr scrn);
void i830_init_bufmgr(ScrnInfoPtr scrn);
-#ifdef INTEL_XVMC
-Bool i830_allocate_xvmc_buffer(ScrnInfoPtr scrn, const char *name,
- i830_memory ** buffer, unsigned long size,
- int flags);
-void i830_free_xvmc_buffer(ScrnInfoPtr scrn, i830_memory * buffer);
-#endif
Bool i830_tiled_width(intel_screen_private *intel, int *width, int cpp);
diff --git a/src/i830_memory.c b/src/i830_memory.c
index c6003a5..7d0e336 100644
--- a/src/i830_memory.c
+++ b/src/i830_memory.c
@@ -163,31 +163,6 @@ i830_check_display_stride(ScrnInfoPtr scrn, int stride, Bool tiling)
return FALSE;
}
-static void i830_free_memory(ScrnInfoPtr scrn, i830_memory * mem)
-{
- intel_screen_private *intel = intel_get_screen_private(scrn);
-
- if (mem == NULL)
- return;
-
- assert(mem->bo != NULL);
-
- dri_bo_unreference(mem->bo);
- if (intel->bo_list == mem) {
- intel->bo_list = mem->next;
- if (mem->next)
- mem->next->prev = NULL;
- } else {
- if (mem->prev)
- mem->prev->next = mem->next;
- if (mem->next)
- mem->next->prev = mem->prev;
- }
- xfree(mem->name);
- xfree(mem);
- return;
-}
-
/* Resets the state of the aperture allocator, freeing all memory that had
* been allocated.
*/
@@ -196,10 +171,6 @@ void i830_reset_allocations(ScrnInfoPtr scrn)
intel_screen_private *intel = intel_get_screen_private(scrn);
int p;
- /* Free any allocations in buffer objects */
- while (intel->bo_list != NULL)
- i830_free_memory(scrn, intel->bo_list);
-
/* Null out the pointers for all the allocations we just freed. This is
* kind of gross, but at least it's just one place now.
*/
@@ -212,92 +183,6 @@ void i830_reset_allocations(ScrnInfoPtr scrn)
intel->front_buffer = NULL;
}
-/* Allocates video memory at the given size, pitch, alignment and tile format.
- *
- * The memory will be bound automatically when the driver is in control of the
- * VT. When the kernel memory manager is available and compatible with flags
- * (that is, flags doesn't say that the allocation must include a physical
- * address), that will be used for the allocation.
- *
- * flags:
- * - NEED_PHYSICAL_ADDR: Allocates the memory physically contiguous, and return
- * the bus address for that memory.
- * - NEED_NON-STOLEN: don't allow any part of the memory allocation to lie
- * within stolen memory
- * - NEED_LIFETIME_FIXED: don't allow the buffer object to move throughout
- * the entire Screen lifetime. This means not using buffer objects, which
- * get their offsets chosen at each EnterVT time.
- */
-static i830_memory *i830_allocate_memory(ScrnInfoPtr scrn, const char *name,
- unsigned long size, unsigned long pitch,
- int flags, uint32_t tiling_mode)
-{
- i830_memory *mem;
- intel_screen_private *intel = intel_get_screen_private(scrn);
- uint32_t requested_tiling_mode = tiling_mode;
- int ret;
-
- /* Manage tile alignment and size constraints */
- if (tiling_mode != I915_TILING_NONE) {
- /* Only allocate page-sized increments. */
- size = ALIGN(size, GTT_PAGE_SIZE);
-
- /* Check for maximum tiled region size */
- if (IS_I9XX(intel)) {
- if (size > MB(128))
- return NULL;
- } else {
- if (size > MB(64))
- return NULL;
- }
-
- /* round to size necessary for the fence register to work */
- size = i830_get_fence_size(intel, size);
- }
-
- assert((flags & NEED_PHYSICAL_ADDR) == 0);
-
- /* Only allocate page-sized increments. */
- size = ALIGN(size, GTT_PAGE_SIZE);
-
- mem = xcalloc(1, sizeof(*mem));
- if (mem == NULL)
- return NULL;
-
- mem->name = xstrdup(name);
- if (mem->name == NULL) {
- xfree(mem);
- return NULL;
- }
-
- mem->bo = dri_bo_alloc(intel->bufmgr, name, size, GTT_PAGE_SIZE);
-
- if (!mem->bo) {
- xfree(mem->name);
- xfree(mem);
- return NULL;
- }
-
- ret = drm_intel_bo_set_tiling(mem->bo, &tiling_mode, pitch);
- if (ret != 0 || tiling_mode != requested_tiling_mode) {
- xf86DrvMsg(scrn->scrnIndex, X_ERROR,
- "Failed to set tiling on %s: %s\n", mem->name,
- ret == 0 ? "rejected by kernel" : strerror(-ret));
- }
-
- if (flags & DISABLE_REUSE)
- drm_intel_bo_disable_reuse(mem->bo);
-
- /* Insert new allocation into the list */
- mem->prev = NULL;
- mem->next = intel->bo_list;
- if (intel->bo_list != NULL)
- intel->bo_list->prev = mem;
- intel->bo_list = mem;
-
- return mem;
-}
-
static Bool IsTileable(ScrnInfoPtr scrn, int pitch)
{
intel_screen_private *intel = intel_get_screen_private(scrn);
@@ -459,45 +344,6 @@ Bool i830_reinit_memory(ScrnInfoPtr scrn)
return TRUE;
}
-#ifdef INTEL_XVMC
-/*
- * Allocate memory for MC compensation
- */
-Bool i830_allocate_xvmc_buffer(ScrnInfoPtr scrn, const char *name,
- i830_memory ** buffer, unsigned long size,
- int flags)
-{
- *buffer = i830_allocate_memory(scrn, name, size, PITCH_NONE,
- flags, I915_TILING_NONE);
-
- if (!*buffer) {
- xf86DrvMsg(scrn->scrnIndex, X_ERROR,
- "Failed to allocate memory for %s.\n", name);
- return FALSE;
- }
-
- if ((*buffer)->bo) {
- if (drm_intel_bo_pin((*buffer)->bo, GTT_PAGE_SIZE)) {
- i830_free_memory(scrn, *buffer);
- xf86DrvMsg(scrn->scrnIndex, X_ERROR,
- "Failed to bind XvMC buffer bo!\n");
- return FALSE;
- }
- }
-
- return TRUE;
-}
-
-void i830_free_xvmc_buffer(ScrnInfoPtr scrn, i830_memory * buffer)
-{
- if (buffer->bo)
- drm_intel_bo_unpin(buffer->bo);
-
- i830_free_memory(scrn, buffer);
-}
-
-#endif
-
static void i830_set_max_gtt_map_size(ScrnInfoPtr scrn)
{
intel_screen_private *intel = intel_get_screen_private(scrn);
commit 371be65fb74789250dbb1e332e46416d931da321
Author: Daniel Vetter <daniel.vetter at ffwll.ch>
Date: Tue Mar 2 21:53:27 2010 +0100
XvMC: kill the pinned batchbuffer in the ddx code
It's been unused for quite a while.
Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
Reviewed-by: Carl Worth <cworth at cworth.org>
diff --git a/src/i830_hwmc.c b/src/i830_hwmc.c
index e60bbb2..3533426 100644
--- a/src/i830_hwmc.c
+++ b/src/i830_hwmc.c
@@ -139,39 +139,3 @@ Bool intel_xvmc_screen_init(ScreenPtr pScreen)
INTEL_XVMC_PATCHLEVEL);
return TRUE;
}
-
-Bool intel_xvmc_init_batch(ScrnInfoPtr scrn)
-{
- intel_screen_private *intel = intel_get_screen_private(scrn);
- int size = KB(64);
-
- if (!i830_allocate_xvmc_buffer(scrn, "[XvMC] batch buffer",
- &(xvmc_driver->batch), size,
- 0))
- return FALSE;
-
- if (drmAddMap(intel->drmSubFD,
- (drm_handle_t) (xvmc_driver->batch->bo->offset +
- intel->LinearAddr),
- xvmc_driver->batch->bo->size, DRM_AGP, 0,
- &xvmc_driver->batch_handle) < 0) {
- xf86DrvMsg(scrn->scrnIndex, X_ERROR,
- "[drm] drmAddMap(batchbuffer_handle) failed!\n");
- return FALSE;
- }
- return TRUE;
-}
-
-void intel_xvmc_fini_batch(ScrnInfoPtr scrn)
-{
- intel_screen_private *intel = intel_get_screen_private(scrn);
-
- if (xvmc_driver->batch_handle) {
- drmRmMap(intel->drmSubFD, xvmc_driver->batch_handle);
- xvmc_driver->batch_handle = 0;
- }
- if (xvmc_driver->batch) {
- i830_free_xvmc_buffer(scrn, xvmc_driver->batch);
- xvmc_driver->batch = NULL;
- }
-}
diff --git a/src/i830_hwmc.h b/src/i830_hwmc.h
index 0b512b4..fcb54d4 100644
--- a/src/i830_hwmc.h
+++ b/src/i830_hwmc.h
@@ -64,8 +64,6 @@ struct hwmc_buffer {
struct _intel_xvmc_common {
unsigned int type;
- struct hwmc_buffer batchbuffer;
- unsigned int kernel_exec_fencing:1;
};
/* Intel private XvMC command to DDX driver */
@@ -87,9 +85,6 @@ struct intel_xvmc_driver {
char *name;
XF86MCAdaptorPtr adaptor;
unsigned int flag;
- i830_memory *batch;
- drm_handle_t batch_handle;
-
/* more items for xvmv surface manage? */
Bool(*init) (ScrnInfoPtr, XF86VideoAdaptorPtr);
void (*fini) (ScrnInfoPtr);
@@ -105,9 +100,6 @@ extern Bool intel_xvmc_probe(ScrnInfoPtr);
extern Bool intel_xvmc_driver_init(ScreenPtr, XF86VideoAdaptorPtr);
extern Bool intel_xvmc_screen_init(ScreenPtr);
extern void intel_xvmc_finish(ScrnInfoPtr);
-extern int intel_xvmc_put_image_size(ScrnInfoPtr);
-extern Bool intel_xvmc_init_batch(ScrnInfoPtr);
-extern void intel_xvmc_fini_batch(ScrnInfoPtr);
#endif
#endif
diff --git a/src/i915_hwmc.c b/src/i915_hwmc.c
index 6943a07..3097e92 100644
--- a/src/i915_hwmc.c
+++ b/src/i915_hwmc.c
@@ -284,13 +284,6 @@ static Bool i915_xvmc_init(ScrnInfoPtr scrn, XF86VideoAdaptorPtr XvAdapt)
return FALSE;
}
xvmc_driver->devPrivate = (void *)pXvMC;
- if (!intel_xvmc_init_batch(scrn)) {
- xf86DrvMsg(scrn->scrnIndex, X_WARNING,
- "[XvMC] fail to init batch buffer\n");
- xfree(pXvMC);
- return FALSE;
- }
-
/* set up wrappers */
pXvMC->savePutImage = XvAdapt->PutImage;
XvAdapt->PutImage = i915_xvmc_put_image;
@@ -299,7 +292,6 @@ static Bool i915_xvmc_init(ScrnInfoPtr scrn, XF86VideoAdaptorPtr XvAdapt)
static void i915_xvmc_fini(ScrnInfoPtr scrn)
{
- intel_xvmc_fini_batch(scrn);
xfree(xvmc_driver->devPrivate);
}
diff --git a/src/i965_hwmc.c b/src/i965_hwmc.c
index 1a5d4de..682107a 100644
--- a/src/i965_hwmc.c
+++ b/src/i965_hwmc.c
@@ -72,7 +72,6 @@ static int create_context(ScrnInfoPtr scrn,
private_context->is_g4x = IS_G4X(intel);
private_context->is_965_q = IS_965_Q(intel);
private_context->is_igdng = IS_IGDNG(intel);
- private_context->comm.kernel_exec_fencing = 1;
private_context->comm.type = xvmc_driver->flag;
*num_privates = sizeof(*private_context) / sizeof(CARD32);
commit d5a20c81ab76129a1e0bcefecd9c4a10b5040af4
Author: Daniel Vetter <daniel.vetter at ffwll.ch>
Date: Tue Mar 2 21:53:26 2010 +0100
i915 XvMC: kill pinned surface buffer in the ddx code
Like with the per context stuff, also drop the now artificial limit
on surfaces. Again, with that gone, a lot of code can be deleted.
Reviewed-by: Carl Worth <cworth at cworth.org>
diff --git a/src/i915_hwmc.c b/src/i915_hwmc.c
index 6e5d553..6943a07 100644
--- a/src/i915_hwmc.c
+++ b/src/i915_hwmc.c
@@ -60,16 +60,7 @@
#define I915_XVMC_MAX_CONTEXTS 4
#define I915_XVMC_MAX_SURFACES 20
-typedef struct _I915XvMCSurfacePriv {
- i830_memory *surface;
- unsigned long offsets[I915_XVMC_MAX_BUFFERS];
- drm_handle_t surface_handle;
-} I915XvMCSurfacePriv;
-
typedef struct _I915XvMC {
- XID surfaces[I915_XVMC_MAX_SURFACES];
- I915XvMCSurfacePriv *sfprivs[I915_XVMC_MAX_SURFACES];
- int nsurfaces;
PutImageFuncPtr savePutImage;
} I915XvMC, *I915XvMCPtr;
@@ -149,33 +140,6 @@ static void i915_check_context_size(XvMCContextPtr ctx)
}
/*
- * Init and clean up the screen private parts of XvMC.
- */
-static void initI915XvMC(I915XvMCPtr xvmc)
-{
- unsigned int i;
-
- for (i = 0; i < I915_XVMC_MAX_SURFACES; i++) {
- xvmc->surfaces[i] = 0;
- xvmc->sfprivs[i] = NULL;
- }
- xvmc->nsurfaces = 0;
-}
-
-static void cleanupI915XvMC(I915XvMCPtr xvmc)
-{
- int i;
-
- for (i = 0; i < I915_XVMC_MAX_SURFACES; i++) {
- xvmc->surfaces[i] = 0;
- if (xvmc->sfprivs[i]) {
- xfree(xvmc->sfprivs[i]);
- xvmc->sfprivs[i] = NULL;
- }
- }
-}
-
-/*
* i915_xvmc_create_context
*
* Some info about the private data:
@@ -226,12 +190,6 @@ static int i915_xvmc_create_surface(ScrnInfoPtr scrn, XvMCSurfacePtr pSurf,
int *num_priv, long **priv)
{
intel_screen_private *intel = intel_get_screen_private(scrn);
- I915XvMCPtr pXvMC = (I915XvMCPtr) xvmc_driver->devPrivate;
- I915XvMCSurfacePriv *sfpriv = NULL;
- I915XvMCCreateSurfaceRec *surfaceRec = NULL;
- XvMCContextPtr ctx = NULL;
- unsigned int srfno;
- unsigned long bufsize;
if (!intel->XvMCEnabled) {
xf86DrvMsg(scrn->scrnIndex, X_ERROR,
@@ -242,167 +200,15 @@ static int i915_xvmc_create_surface(ScrnInfoPtr scrn, XvMCSurfacePtr pSurf,
*priv = NULL;
*num_priv = 0;
- for (srfno = 0; srfno < I915_XVMC_MAX_SURFACES; ++srfno) {
- if (!pXvMC->surfaces[srfno])
- break;
- }
-
- if (srfno == I915_XVMC_MAX_SURFACES ||
- pXvMC->nsurfaces >= I915_XVMC_MAX_SURFACES) {
- xf86DrvMsg(scrn->scrnIndex, X_ERROR,
- "[XvMC] i915: Too many surfaces !\n");
- return BadAlloc;
- }
-
- *priv = xcalloc(1, sizeof(I915XvMCCreateSurfaceRec));
- surfaceRec = (I915XvMCCreateSurfaceRec *) * priv;
-
- if (!*priv) {
- xf86DrvMsg(scrn->scrnIndex, X_ERROR,
- "[XvMC] i915:Unable to allocate surface priv ret memory!\n");
- return BadAlloc;
- }
-
- *num_priv = sizeof(I915XvMCCreateSurfaceRec) >> 2;
- sfpriv =
- (I915XvMCSurfacePriv *) xcalloc(1, sizeof(I915XvMCSurfacePriv));
-
- if (!sfpriv) {
- xf86DrvMsg(scrn->scrnIndex, X_ERROR,
- "[XvMC] i915: Unable to allocate surface priv memory!\n");
- xfree(*priv);
- *priv = NULL;
- *num_priv = 0;
- return BadAlloc;
- }
-
- ctx = pSurf->context;
- bufsize = SIZE_YUV420(ctx->width, ctx->height);
-
- if (!i830_allocate_xvmc_buffer(scrn, "XvMC surface",
- &(sfpriv->surface), bufsize,
- 0)) {
- xf86DrvMsg(scrn->scrnIndex, X_ERROR,
- "[XvMC] i915 : Failed to allocate XvMC surface space!\n");
- xfree(sfpriv);
- xfree(*priv);
- *priv = NULL;
- *num_priv = 0;
- return BadAlloc;
- }
-
- if (drmAddMap(intel->drmSubFD,
- (drm_handle_t) (sfpriv->surface->bo->offset +
- intel->LinearAddr), sfpriv->surface->bo->size,
- DRM_AGP, 0, (drmAddress) & sfpriv->surface_handle) < 0) {
- xf86DrvMsg(scrn->scrnIndex, X_ERROR,
- "[drm] drmAddMap(surface_handle) failed!\n");
- i830_free_xvmc_buffer(scrn, sfpriv->surface);
- xfree(sfpriv);
- xfree(*priv);
- *priv = NULL;
- *num_priv = 0;
- return BadAlloc;
- }
-
- surfaceRec->srfno = srfno;
- surfaceRec->srf.handle = sfpriv->surface_handle;
- surfaceRec->srf.offset = sfpriv->surface->bo->offset;
- surfaceRec->srf.size = sfpriv->surface->bo->size;
-
- pXvMC->surfaces[srfno] = pSurf->surface_id;
- pXvMC->sfprivs[srfno] = sfpriv;
- pXvMC->nsurfaces++;
-
return Success;
}
static int i915_xvmc_create_subpict(ScrnInfoPtr scrn, XvMCSubpicturePtr pSubp,
int *num_priv, long **priv)
{
- intel_screen_private *intel = intel_get_screen_private(scrn);
- I915XvMCPtr pXvMC = (I915XvMCPtr) xvmc_driver->devPrivate;
- I915XvMCSurfacePriv *sfpriv = NULL;
- I915XvMCCreateSurfaceRec *surfaceRec = NULL;
- XvMCContextPtr ctx = NULL;
- unsigned int srfno;
- unsigned int bufsize;
-
*priv = NULL;
*num_priv = 0;
- for (srfno = 0; srfno < I915_XVMC_MAX_SURFACES; ++srfno) {
- if (!pXvMC->surfaces[srfno])
- break;
- }
-
- if (srfno == I915_XVMC_MAX_SURFACES ||
- pXvMC->nsurfaces >= I915_XVMC_MAX_SURFACES) {
- xf86DrvMsg(scrn->scrnIndex, X_ERROR,
- "[XvMC] i915: Too many surfaces !\n");
- return BadAlloc;
- }
-
- *priv = xcalloc(1, sizeof(I915XvMCCreateSurfaceRec));
- surfaceRec = (I915XvMCCreateSurfaceRec *) * priv;
-
- if (!*priv) {
- xf86DrvMsg(scrn->scrnIndex, X_ERROR,
- "[XvMC] i915: Unable to allocate memory!\n");
- return BadAlloc;
- }
-
- *num_priv = sizeof(I915XvMCCreateSurfaceRec) >> 2;
- sfpriv =
- (I915XvMCSurfacePriv *) xcalloc(1, sizeof(I915XvMCSurfacePriv));
-
- if (!sfpriv) {
- xf86DrvMsg(scrn->scrnIndex, X_ERROR,
- "[XvMC] i915: Unable to allocate memory!\n");
- xfree(*priv);
- *priv = NULL;
- *num_priv = 0;
- return BadAlloc;
- }
-
- ctx = pSubp->context;
- bufsize = SIZE_XX44(ctx->width, ctx->height);
-
- if (!i830_allocate_xvmc_buffer(scrn, "XvMC surface",
- &(sfpriv->surface), bufsize,
- 0)) {
- xf86DrvMsg(scrn->scrnIndex, X_ERROR,
- "[XvMC] I915XvMCCreateSurface: Failed to allocate XvMC surface space!\n");
- xfree(sfpriv);
- xfree(*priv);
- *priv = NULL;
- *num_priv = 0;
- return BadAlloc;
- }
-
- if (drmAddMap(intel->drmSubFD,
- (drm_handle_t) (sfpriv->surface->bo->offset +
- intel->LinearAddr), sfpriv->surface->bo->size,
- DRM_AGP, 0, (drmAddress) & sfpriv->surface_handle) < 0) {
- xf86DrvMsg(scrn->scrnIndex, X_ERROR,
- "[drm] drmAddMap(surface_handle) failed!\n");
- i830_free_xvmc_buffer(scrn, sfpriv->surface);
- xfree(sfpriv);
- xfree(*priv);
- *priv = NULL;
- *num_priv = 0;
- return BadAlloc;
- }
-
- surfaceRec->srfno = srfno;
- surfaceRec->srf.handle = sfpriv->surface_handle;
- surfaceRec->srf.offset = sfpriv->surface->bo->offset;
- surfaceRec->srf.size = sfpriv->surface->bo->size;
-
- pXvMC->sfprivs[srfno] = sfpriv;
- pXvMC->surfaces[srfno] = pSubp->subpicture_id;
- pXvMC->nsurfaces++;
-
return Success;
}
@@ -414,48 +220,12 @@ static void i915_xvmc_destroy_context(ScrnInfoPtr scrn,
static void i915_xvmc_destroy_surface(ScrnInfoPtr scrn, XvMCSurfacePtr pSurf)
{
- intel_screen_private *intel = intel_get_screen_private(scrn);
- I915XvMCPtr pXvMC = (I915XvMCPtr) xvmc_driver->devPrivate;
- int i;
-
- for (i = 0; i < I915_XVMC_MAX_SURFACES; i++) {
- if (pXvMC->surfaces[i] == pSurf->surface_id) {
- drmRmMap(intel->drmSubFD,
- pXvMC->sfprivs[i]->surface_handle);
- i830_free_xvmc_buffer(scrn,
- pXvMC->sfprivs[i]->surface);
- xfree(pXvMC->sfprivs[i]);
- pXvMC->nsurfaces--;
- pXvMC->sfprivs[i] = 0;
- pXvMC->surfaces[i] = 0;
- return;
- }
- }
-
return;
}
static void i915_xvmc_destroy_subpict(ScrnInfoPtr scrn,
XvMCSubpicturePtr pSubp)
{
- intel_screen_private *intel = intel_get_screen_private(scrn);
- I915XvMCPtr pXvMC = (I915XvMCPtr) xvmc_driver->devPrivate;
- int i;
-
- for (i = 0; i < I915_XVMC_MAX_SURFACES; i++) {
- if (pXvMC->surfaces[i] == pSubp->subpicture_id) {
- drmRmMap(intel->drmSubFD,
- pXvMC->sfprivs[i]->surface_handle);
- i830_free_xvmc_buffer(scrn,
- pXvMC->sfprivs[i]->surface);
- xfree(pXvMC->sfprivs[i]);
- pXvMC->nsurfaces--;
- pXvMC->sfprivs[i] = 0;
- pXvMC->surfaces[i] = 0;
- return;
- }
- }
-
return;
}
@@ -520,7 +290,6 @@ static Bool i915_xvmc_init(ScrnInfoPtr scrn, XF86VideoAdaptorPtr XvAdapt)
xfree(pXvMC);
return FALSE;
}
- initI915XvMC(pXvMC);
/* set up wrappers */
pXvMC->savePutImage = XvAdapt->PutImage;
@@ -530,9 +299,6 @@ static Bool i915_xvmc_init(ScrnInfoPtr scrn, XF86VideoAdaptorPtr XvAdapt)
static void i915_xvmc_fini(ScrnInfoPtr scrn)
{
- I915XvMCPtr pXvMC = (I915XvMCPtr) xvmc_driver->devPrivate;
-
- cleanupI915XvMC(pXvMC);
intel_xvmc_fini_batch(scrn);
xfree(xvmc_driver->devPrivate);
}
diff --git a/src/i915_hwmc.h b/src/i915_hwmc.h
index 52c8b3d..c036b63 100644
--- a/src/i915_hwmc.h
+++ b/src/i915_hwmc.h
@@ -44,9 +44,4 @@ typedef struct {
int deviceID;
} I915XvMCCreateContextRec;
-typedef struct {
- unsigned int srfno;
- struct hwmc_buffer srf;
-} I915XvMCCreateSurfaceRec;
-
#endif /* _I915_HWMC_H */
diff --git a/src/xvmc/i915_xvmc.c b/src/xvmc/i915_xvmc.c
index 3ae612a..190b736 100644
--- a/src/xvmc/i915_xvmc.c
+++ b/src/xvmc/i915_xvmc.c
@@ -975,24 +975,12 @@ static Status i915_xvmc_mc_create_surface(Display * display,
{
i915XvMCContext *pI915XvMC;
i915XvMCSurface *pI915Surface;
- I915XvMCCreateSurfaceRec *tmpComm = NULL;
if (!(pI915XvMC = context->privData))
return XvMCBadContext;
XVMC_DBG("%s\n", __FUNCTION__);
- if (priv_count != (sizeof(I915XvMCCreateSurfaceRec) >> 2)) {
- XVMC_ERR
- ("_xvmc_create_surface() returned incorrect data size!");
- XVMC_INFO("\tExpected %d, got %d",
- (int)(sizeof(I915XvMCCreateSurfaceRec) >> 2),
- priv_count);
- _xvmc_destroy_surface(display, surface);
- XFree(priv_data);
- return BadAlloc;
- }
-
PPTHREAD_MUTEX_LOCK();
surface->privData = (i915XvMCSurface *) malloc(sizeof(i915XvMCSurface));
@@ -1009,11 +997,10 @@ static Status i915_xvmc_mc_create_surface(Display * display,
pI915Surface->privContext = pI915XvMC;
pI915Surface->privSubPic = NULL;
- tmpComm = (I915XvMCCreateSurfaceRec *) priv_data;
-
pI915Surface->bo = drm_intel_bo_alloc(xvmc_driver->bufmgr,
"surface",
- tmpComm->srf.size,
+ SIZE_YUV420(context->width,
+ context->height),
GTT_PAGE_SIZE);
/* X may still use this buffer when XVMC is already done with it. */
commit e6eb257ad32b393fb67c506943d8ece98b9a8061
Author: Daniel Vetter <daniel.vetter at ffwll.ch>
Date: Tue Mar 2 21:53:25 2010 +0100
i915 XvMC: kill pinned per-context buffers in the ddx code
There's now not a reason anymore to limit the number of active contexts.
So kill this accounting, too.
With that all gone, per-context state in the ddx is nil, so rip out
all associated code.
Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
Reviewed-by: Carl Worth <cworth at cworth.org>
diff --git a/src/i915_hwmc.c b/src/i915_hwmc.c
index c0b0bb8..6e5d553 100644
--- a/src/i915_hwmc.c
+++ b/src/i915_hwmc.c
@@ -66,27 +66,10 @@ typedef struct _I915XvMCSurfacePriv {
drm_handle_t surface_handle;
} I915XvMCSurfacePriv;
-typedef struct _I915XvMCContextPriv {
- i830_memory *mcStaticIndirectState;
- drm_handle_t sis_handle;
- i830_memory *mcSamplerState;
- drm_handle_t ssb_handle;
- i830_memory *mcMapState;
- drm_handle_t msb_handle;
- i830_memory *mcPixelShaderProgram;
- drm_handle_t psp_handle;
- i830_memory *mcPixelShaderConstants;
- drm_handle_t psc_handle;
- i830_memory *mcCorrdata;
- drm_handle_t corrdata_handle;
-} I915XvMCContextPriv;
-
typedef struct _I915XvMC {
- XID contexts[I915_XVMC_MAX_CONTEXTS];
XID surfaces[I915_XVMC_MAX_SURFACES];
I915XvMCSurfacePriv *sfprivs[I915_XVMC_MAX_SURFACES];
- I915XvMCContextPriv *ctxprivs[I915_XVMC_MAX_CONTEXTS];
- int ncontexts, nsurfaces;
+ int nsurfaces;
PutImageFuncPtr savePutImage;
} I915XvMC, *I915XvMCPtr;
@@ -172,16 +155,10 @@ static void initI915XvMC(I915XvMCPtr xvmc)
{
unsigned int i;
- for (i = 0; i < I915_XVMC_MAX_CONTEXTS; i++) {
- xvmc->contexts[i] = 0;
- xvmc->ctxprivs[i] = NULL;
- }
-
for (i = 0; i < I915_XVMC_MAX_SURFACES; i++) {
xvmc->surfaces[i] = 0;
xvmc->sfprivs[i] = NULL;
}
- xvmc->ncontexts = 0;
xvmc->nsurfaces = 0;
}
@@ -189,14 +166,6 @@ static void cleanupI915XvMC(I915XvMCPtr xvmc)
{
int i;
- for (i = 0; i < I915_XVMC_MAX_CONTEXTS; i++) {
- xvmc->contexts[i] = 0;
- if (xvmc->ctxprivs[i]) {
- xfree(xvmc->ctxprivs[i]);
- xvmc->ctxprivs[i] = NULL;
- }
- }
-
for (i = 0; i < I915_XVMC_MAX_SURFACES; i++) {
xvmc->surfaces[i] = 0;
if (xvmc->sfprivs[i]) {
@@ -206,195 +175,6 @@ static void cleanupI915XvMC(I915XvMCPtr xvmc)
}
}
-static Bool i915_map_xvmc_buffers(ScrnInfoPtr scrn,
- I915XvMCContextPriv * ctxpriv)
-{
- intel_screen_private *intel = intel_get_screen_private(scrn);
-
- if (drmAddMap(intel->drmSubFD,
- (drm_handle_t) (ctxpriv->mcStaticIndirectState->bo->offset +
- intel->LinearAddr),
- ctxpriv->mcStaticIndirectState->bo->size, DRM_AGP, 0,
- (drmAddress) & ctxpriv->sis_handle) < 0) {
- xf86DrvMsg(scrn->scrnIndex, X_ERROR,
- "[drm] drmAddMap(sis_handle) failed!\n");
- return FALSE;
- }
-
- if (drmAddMap(intel->drmSubFD,
- (drm_handle_t) (ctxpriv->mcSamplerState->bo->offset +
- intel->LinearAddr),
- ctxpriv->mcSamplerState->bo->size, DRM_AGP, 0,
- (drmAddress) & ctxpriv->ssb_handle) < 0) {
- xf86DrvMsg(scrn->scrnIndex, X_ERROR,
- "[drm] drmAddMap(ssb_handle) failed!\n");
- return FALSE;
- }
-
- if (drmAddMap(intel->drmSubFD,
- (drm_handle_t) (ctxpriv->mcMapState->bo->offset +
- intel->LinearAddr),
- ctxpriv->mcMapState->bo->size, DRM_AGP, 0,
- (drmAddress) & ctxpriv->msb_handle) < 0) {
- xf86DrvMsg(scrn->scrnIndex, X_ERROR,
- "[drm] drmAddMap(msb_handle) failed!\n");
- return FALSE;
- }
-
- if (drmAddMap(intel->drmSubFD,
- (drm_handle_t) (ctxpriv->mcPixelShaderProgram->bo->offset +
- intel->LinearAddr),
- ctxpriv->mcPixelShaderProgram->bo->size, DRM_AGP, 0,
- (drmAddress) & ctxpriv->psp_handle) < 0) {
- xf86DrvMsg(scrn->scrnIndex, X_ERROR,
- "[drm] drmAddMap(psp_handle) failed!\n");
- return FALSE;
- }
-
- if (drmAddMap(intel->drmSubFD,
- (drm_handle_t) (ctxpriv->mcPixelShaderConstants->bo->offset +
- intel->LinearAddr),
- ctxpriv->mcPixelShaderConstants->bo->size, DRM_AGP, 0,
- (drmAddress) & ctxpriv->psc_handle) < 0) {
- xf86DrvMsg(scrn->scrnIndex, X_ERROR,
- "[drm] drmAddMap(psc_handle) failed!\n");
- return FALSE;
- }
-
- if (drmAddMap(intel->drmSubFD,
- (drm_handle_t) (ctxpriv->mcCorrdata->bo->offset +
- intel->LinearAddr),
- ctxpriv->mcCorrdata->bo->size, DRM_AGP, 0,
- (drmAddress) & ctxpriv->corrdata_handle) < 0) {
- xf86DrvMsg(scrn->scrnIndex, X_ERROR,
- "[drm] drmAddMap(corrdata_handle) failed!\n");
- return FALSE;
- }
-
- return TRUE;
-}
-
-static void i915_unmap_xvmc_buffers(ScrnInfoPtr scrn,
- I915XvMCContextPriv * ctxpriv)
-{
- intel_screen_private *intel = intel_get_screen_private(scrn);
-
- if (ctxpriv->sis_handle) {
- drmRmMap(intel->drmSubFD, ctxpriv->sis_handle);
- ctxpriv->sis_handle = 0;
- }
-
- if (ctxpriv->ssb_handle) {
- drmRmMap(intel->drmSubFD, ctxpriv->ssb_handle);
- ctxpriv->ssb_handle = 0;
- }
-
- if (ctxpriv->msb_handle) {
- drmRmMap(intel->drmSubFD, ctxpriv->msb_handle);
- ctxpriv->msb_handle = 0;
- }
-
- if (ctxpriv->psp_handle) {
- drmRmMap(intel->drmSubFD, ctxpriv->psp_handle);
- ctxpriv->psp_handle = 0;
- }
-
- if (ctxpriv->psc_handle) {
- drmRmMap(intel->drmSubFD, ctxpriv->psc_handle);
- ctxpriv->psc_handle = 0;
- }
-
- if (ctxpriv->corrdata_handle) {
- drmRmMap(intel->drmSubFD, ctxpriv->corrdata_handle);
- ctxpriv->corrdata_handle = 0;
- }
-
-}
-
-static Bool i915_allocate_xvmc_buffers(ScrnInfoPtr scrn,
- I915XvMCContextPriv * ctxpriv)
-{
- intel_screen_private *intel = intel_get_screen_private(scrn);
- int flags = 0;
-
- /* on 915G/GM, load indirect can only use physical address...sigh */
- if (IS_I915G(intel) || IS_I915GM(intel))
- flags |= NEED_PHYSICAL_ADDR;
-
- if (!i830_allocate_xvmc_buffer(scrn, "[XvMC]Static Indirect State",
- &(ctxpriv->mcStaticIndirectState),
- 4 * 1024, flags)) {
- return FALSE;
- }
-
- if (!i830_allocate_xvmc_buffer(scrn, "[XvMC]Sampler State",
- &(ctxpriv->mcSamplerState), 4 * 1024,
- flags)) {
- return FALSE;
- }
-
- if (!i830_allocate_xvmc_buffer(scrn, "[XvMC]Map State",
- &(ctxpriv->mcMapState), 4 * 1024,
- flags)) {
- return FALSE;
- }
-
- if (!i830_allocate_xvmc_buffer(scrn, "[XvMC]Pixel Shader Program",
- &(ctxpriv->mcPixelShaderProgram),
- 4 * 1024, flags)) {
- return FALSE;
- }
-
- if (!i830_allocate_xvmc_buffer(scrn, "[XvMC]Pixel Shader Constants",
- &(ctxpriv->mcPixelShaderConstants),
- 4 * 1024, flags)) {
- return FALSE;
- }
-
- if (!i830_allocate_xvmc_buffer(scrn, "[XvMC]Correction Data Buffer",
- &(ctxpriv->mcCorrdata), 512 * 1024,
- 0)) {
- return FALSE;
- }
-
- return TRUE;
-}
-
-static void i915_free_xvmc_buffers(ScrnInfoPtr scrn,
- I915XvMCContextPriv * ctxpriv)
-{
- if (ctxpriv->mcStaticIndirectState) {
- i830_free_xvmc_buffer(scrn, ctxpriv->mcStaticIndirectState);
- ctxpriv->mcStaticIndirectState = NULL;
- }
-
- if (ctxpriv->mcSamplerState) {
- i830_free_xvmc_buffer(scrn, ctxpriv->mcSamplerState);
- ctxpriv->mcSamplerState = NULL;
- }
-
- if (ctxpriv->mcMapState) {
- i830_free_xvmc_buffer(scrn, ctxpriv->mcMapState);
- ctxpriv->mcMapState = NULL;
- }
-
- if (ctxpriv->mcPixelShaderProgram) {
- i830_free_xvmc_buffer(scrn, ctxpriv->mcPixelShaderProgram);
- ctxpriv->mcPixelShaderProgram = NULL;
- }
-
- if (ctxpriv->mcPixelShaderConstants) {
- i830_free_xvmc_buffer(scrn, ctxpriv->mcPixelShaderConstants);
- ctxpriv->mcPixelShaderConstants = NULL;
- }
-
- if (ctxpriv->mcCorrdata) {
- i830_free_xvmc_buffer(scrn, ctxpriv->mcCorrdata);
- ctxpriv->mcCorrdata = NULL;
- }
-
-}
-
/*
* i915_xvmc_create_context
*
@@ -413,9 +193,6 @@ static int i915_xvmc_create_context(ScrnInfoPtr scrn, XvMCContextPtr pContext,
{
intel_screen_private *intel = intel_get_screen_private(scrn);
I915XvMCCreateContextRec *contextRec = NULL;
- I915XvMCPtr pXvMC = (I915XvMCPtr) xvmc_driver->devPrivate;
- I915XvMCContextPriv *ctxpriv = NULL;
- int i;
*priv = NULL;
*num_priv = 0;
@@ -426,18 +203,6 @@ static int i915_xvmc_create_context(ScrnInfoPtr scrn, XvMCContextPtr pContext,
return BadAlloc;
}
- for (i = 0; i < I915_XVMC_MAX_CONTEXTS; i++) {
- if (!pXvMC->contexts[i])
- break;
- }
-
- if (i == I915_XVMC_MAX_CONTEXTS ||
- pXvMC->ncontexts >= I915_XVMC_MAX_CONTEXTS) {
- xf86DrvMsg(scrn->scrnIndex, X_ERROR,
- "[XvMC] i915: Out of contexts.\n");
- return BadAlloc;
- }
-
i915_check_context_size(pContext);
*priv = xcalloc(1, sizeof(I915XvMCCreateContextRec));
@@ -450,85 +215,10 @@ static int i915_xvmc_create_context(ScrnInfoPtr scrn, XvMCContextPtr pContext,
*num_priv = sizeof(I915XvMCCreateContextRec) >> 2;
- ctxpriv =
- (I915XvMCContextPriv *) xcalloc(1, sizeof(I915XvMCContextPriv));
-
- if (!ctxpriv) {
- xf86DrvMsg(scrn->scrnIndex, X_ERROR,
- "[XvMC] i915: Unable to allocate memory!\n");
- xfree(*priv);
- *priv = NULL;
- *num_priv = 0;
- return BadAlloc;
- }
-
- if (!i915_allocate_xvmc_buffers(scrn, ctxpriv)) {
- i915_free_xvmc_buffers(scrn, ctxpriv);
- xfree(ctxpriv);
- ctxpriv = NULL;
- xfree(*priv);
- *priv = NULL;
- *num_priv = 0;
- return BadAlloc;
- }
-
- if (!i915_map_xvmc_buffers(scrn, ctxpriv)) {
- i915_unmap_xvmc_buffers(scrn, ctxpriv);
- i915_free_xvmc_buffers(scrn, ctxpriv);
- xfree(ctxpriv);
- ctxpriv = NULL;
- xfree(*priv);
- *priv = NULL;
- *num_priv = 0;
- return BadAlloc;
- }
-
- /* common context items */
contextRec->comm.type = xvmc_driver->flag;
- contextRec->comm.batchbuffer.offset = xvmc_driver->batch->bo->offset;
- contextRec->comm.batchbuffer.size = xvmc_driver->batch->bo->size;
- contextRec->comm.batchbuffer.handle = xvmc_driver->batch_handle;
-
/* i915 private context */
- contextRec->ctxno = i;
- contextRec->sis.handle = ctxpriv->sis_handle;
- contextRec->sis.offset = ctxpriv->mcStaticIndirectState->bo->offset;
- contextRec->sis.size = ctxpriv->mcStaticIndirectState->bo->size;
- contextRec->ssb.handle = ctxpriv->ssb_handle;
- contextRec->ssb.offset = ctxpriv->mcSamplerState->bo->offset;
- contextRec->ssb.size = ctxpriv->mcSamplerState->bo->size;
- contextRec->msb.handle = ctxpriv->msb_handle;
- contextRec->msb.offset = ctxpriv->mcMapState->bo->offset;
- contextRec->msb.size = ctxpriv->mcMapState->bo->size;
- contextRec->psp.handle = ctxpriv->psp_handle;
- contextRec->psp.offset = ctxpriv->mcPixelShaderProgram->bo->offset;
- contextRec->psp.size = ctxpriv->mcPixelShaderProgram->bo->size;
- contextRec->psc.handle = ctxpriv->psc_handle;
- contextRec->psc.offset = ctxpriv->mcPixelShaderConstants->bo->offset;
- contextRec->psc.size = ctxpriv->mcPixelShaderConstants->bo->size;
- contextRec->corrdata.handle = ctxpriv->corrdata_handle;
- contextRec->corrdata.offset = ctxpriv->mcCorrdata->bo->offset;
- contextRec->corrdata.size = ctxpriv->mcCorrdata->bo->size;
contextRec->deviceID = DEVICE_ID(intel->PciInfo);
- /* XXX: KMS */
-#if 0
- if (IS_I915G(intel) || IS_I915GM(intel)) {
- contextRec->sis.bus_addr =
- ctxpriv->mcStaticIndirectState->bus_addr;
- contextRec->ssb.bus_addr = ctxpriv->mcSamplerState->bus_addr;
- contextRec->msb.bus_addr = ctxpriv->mcMapState->bus_addr;
- contextRec->psp.bus_addr =
- ctxpriv->mcPixelShaderProgram->bus_addr;
- contextRec->psc.bus_addr =
- ctxpriv->mcPixelShaderConstants->bus_addr;
- }
-#endif
-
- pXvMC->ncontexts++;
- pXvMC->contexts[i] = pContext->context_id;
- pXvMC->ctxprivs[i] = ctxpriv;
-
return Success;
}
@@ -719,21 +409,6 @@ static int i915_xvmc_create_subpict(ScrnInfoPtr scrn, XvMCSubpicturePtr pSubp,
static void i915_xvmc_destroy_context(ScrnInfoPtr scrn,
XvMCContextPtr pContext)
{
- I915XvMCPtr pXvMC = (I915XvMCPtr) xvmc_driver->devPrivate;
- int i;
-
- for (i = 0; i < I915_XVMC_MAX_CONTEXTS; i++) {
- if (pXvMC->contexts[i] == pContext->context_id) {
- i915_unmap_xvmc_buffers(scrn, pXvMC->ctxprivs[i]);
- i915_free_xvmc_buffers(scrn, pXvMC->ctxprivs[i]);
- xfree(pXvMC->ctxprivs[i]);
- pXvMC->ctxprivs[i] = 0;
- pXvMC->ncontexts--;
- pXvMC->contexts[i] = 0;
- return;
- }
- }
-
return;
}
diff --git a/src/i915_hwmc.h b/src/i915_hwmc.h
index 59940ea..52c8b3d 100644
--- a/src/i915_hwmc.h
+++ b/src/i915_hwmc.h
@@ -41,13 +41,6 @@
typedef struct {
struct _intel_xvmc_common comm;
- unsigned int ctxno; /* XvMC private context reference number */
- struct hwmc_buffer sis;
- struct hwmc_buffer ssb;
- struct hwmc_buffer msb;
- struct hwmc_buffer psp;
- struct hwmc_buffer psc;
- struct hwmc_buffer corrdata; /* Correction Data Buffer */
int deviceID;
} I915XvMCCreateContextRec;
diff --git a/src/xvmc/i915_xvmc.c b/src/xvmc/i915_xvmc.c
index 6a156d0..3ae612a 100644
--- a/src/xvmc/i915_xvmc.c
+++ b/src/xvmc/i915_xvmc.c
@@ -925,7 +925,6 @@ static Status i915_xvmc_mc_create_context(Display * display,
pI915XvMC = (i915XvMCContext *) context->privData;
tmpComm = (I915XvMCCreateContextRec *) priv_data;
- pI915XvMC->ctxno = tmpComm->ctxno;
pI915XvMC->deviceID = tmpComm->deviceID;
/* Must free the private data we were passed from X */
commit 47ae1181f6cfd2ab64cd5c8535289fdaa2a9fd9c
Author: Daniel Vetter <daniel.vetter at ffwll.ch>
Date: Tue Mar 2 21:53:24 2010 +0100
i915 XvMC: don't stall the cpu anymore
Proper bo management ensures that the cpu doesn't step on buffers
used by the gpu. Drop the now unnecessary synchronization.
Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
Reviewed-by: Carl Worth <cworth at cworth.org>
diff --git a/src/xvmc/intel_batchbuffer.c b/src/xvmc/intel_batchbuffer.c
index fcd2866..337b2ce 100644
--- a/src/xvmc/intel_batchbuffer.c
+++ b/src/xvmc/intel_batchbuffer.c
@@ -99,9 +99,6 @@ void intelFlushBatch(Bool refill)
xvmc_driver->batch.ptr - xvmc_driver->batch.init_ptr,
0, 0, 0);
- if (xvmc_driver == &i915_xvmc_mc_driver)
- dri_bo_wait_rendering(xvmc_driver->batch.buf);
-
drm_intel_bo_unreference(xvmc_driver->batch.buf);
if ((xvmc_driver->batch.buf =
drm_intel_bo_alloc(xvmc_driver->bufmgr,
commit 9bba123c5f0f081562306c152e70221fc5041a3b
Author: Daniel Vetter <daniel.vetter at ffwll.ch>
Date: Tue Mar 2 21:53:23 2010 +0100
i915 XvMC: drop superflous MI_FLUSH
Cache coherency is now fully under the control of gem.
For lack of hw documentation, I had to find out the correct cache
placements by trial and error:
Backward and forward surfaces: I915_GEM_DOMAIN_RENDER
Correlation data: I915_GEM_DOMAIN_SAMPLER
Changing any of them leads to visual corruptions, so I think these
are the correct ones.
Reviewed-by: Carl Worth <cworth at cworth.org>
diff --git a/src/xvmc/i915_structs.h b/src/xvmc/i915_structs.h
index 7281fe5..2aa9d23 100644
--- a/src/xvmc/i915_structs.h
+++ b/src/xvmc/i915_structs.h
@@ -30,24 +30,6 @@
#include <stdint.h>
-/* MI_INSTRUCTION */
-#define CMD_MI 0x00
-
-#define OPC_MI_FLUSH (0x04)
-
-struct i915_mi_flush {
- struct {
- unsigned map_cache_invalidate:1;
- unsigned pad0:1;
- unsigned render_cache_flush_inhibit:1;
- unsigned scene_count:1;
- unsigned end_scene:1;
- unsigned pad1:18;
- unsigned opcode:6;
- unsigned type:3;
- } dw0;
-};
-
/* BLT */
#define CMD_2D 0x02
#define OPC_COLOR_BLT (0x40)
diff --git a/src/xvmc/i915_xvmc.c b/src/xvmc/i915_xvmc.c
index cda8c75..6a156d0 100644
--- a/src/xvmc/i915_xvmc.c
+++ b/src/xvmc/i915_xvmc.c
@@ -679,19 +679,6 @@ static void i915_mc_map_state_set(XvMCContext * context,
drm_intel_gem_bo_unmap_gtt(pI915XvMC->msb_bo);
}
-static void i915_flush(int map, int render)
-{
- struct i915_mi_flush mi_flush;
-
- memset(&mi_flush, 0, sizeof(mi_flush));
- mi_flush.dw0.type = CMD_MI;
- mi_flush.dw0.opcode = OPC_MI_FLUSH;
- mi_flush.dw0.map_cache_invalidate = map;
- mi_flush.dw0.render_cache_flush_inhibit = render;
-
- intelBatchbufferData(&mi_flush, sizeof(mi_flush), 0);
-}
-
static void i915_mc_load_indirect_render_emit(XvMCContext * context)
{
i915XvMCContext *pI915XvMC = (i915XvMCContext *) context->privData;
@@ -1250,7 +1237,6 @@ static int i915_xvmc_mc_render_surface(Display * display, XvMCContext * context,
drm_intel_gem_bo_unmap_gtt(pI915XvMC->corrdata_bo);
- i915_flush(1, 0);
// i915_mc_invalidate_subcontext_buffers(context, BLOCK_SIS | BLOCK_DIS | BLOCK_SSB
// | BLOCK_MSB | BLOCK_PSP | BLOCK_PSC);
commit b11623f20e303ae1d90d4a6bf0d5d73970b4e9bf
Author: Daniel Vetter <daniel.vetter at ffwll.ch>
Date: Tue Mar 2 21:53:22 2010 +0100
i915 XvMC: switch surfaces to drm_intel_bo
Now the last user of the fixed buffers provided by the ddx is gone!
Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
Reviewed-by: Carl Worth <cworth at cworth.org>
diff --git a/src/i830_video.c b/src/i830_video.c
index 8a4f5ed..02ed35c 100644
--- a/src/i830_video.c
+++ b/src/i830_video.c
@@ -1512,22 +1512,16 @@ I830PutImageTextured(ScrnInfoPtr scrn,
i830_setup_dst_params(scrn, adaptor_priv, width, height,
&dstPitch, &dstPitch2, &size, id);
- if (IS_I965G(intel)) {
- adaptor_priv->buf =
- drm_intel_bo_gem_create_from_name(intel->bufmgr,
- "xvmc surface",
- (uintptr_t)buf);
- } else {
- if (IS_I915G(intel) || IS_I915GM(intel)) {
- /* XXX: i915 is not support and needs some
- * serious care. grep for KMS in i915_hwmc.c */
- return BadAlloc;
- }
- /* fixup pointers */
- adaptor_priv->YBufOffset += (uint32_t) buf;
- adaptor_priv->UBufOffset += (uint32_t) buf;
- adaptor_priv->VBufOffset += (uint32_t) buf;
+ if (IS_I915G(intel) || IS_I915GM(intel)) {
+ /* XXX: i915 is not support and needs some
+ * serious care. grep for KMS in i915_hwmc.c */
+ return BadAlloc;
}
+
+ adaptor_priv->buf =
+ drm_intel_bo_gem_create_from_name(intel->bufmgr,
+ "xvmc surface",
+ (uintptr_t)buf);
} else {
if (!i830_copy_video_data(scrn, adaptor_priv, width, height,
&dstPitch, &dstPitch2,
diff --git a/src/i915_hwmc.c b/src/i915_hwmc.c
index 4395cdc..c0b0bb8 100644
--- a/src/i915_hwmc.c
+++ b/src/i915_hwmc.c
@@ -797,6 +797,7 @@ static int i915_xvmc_put_image(ScrnInfoPtr scrn,
int ret;
if (FOURCC_XVMC == id) {
+#if 0
switch (xvmc_cmd->command) {
case INTEL_XVMC_COMMAND_DISPLAY:
if ((xvmc_cmd->srfNo >= I915_XVMC_MAX_SURFACES) ||
@@ -815,6 +816,9 @@ static int i915_xvmc_put_image(ScrnInfoPtr scrn,
default:
return 0;
}
+#endif
+ /* Pass the GEM object name through the pointer arg. */
+ buf = (void *)(uintptr_t)xvmc_cmd->handle;
}
ret =
diff --git a/src/xvmc/i915_xvmc.c b/src/xvmc/i915_xvmc.c
index ee1a1c5..cda8c75 100644
--- a/src/xvmc/i915_xvmc.c
+++ b/src/xvmc/i915_xvmc.c
@@ -31,12 +31,9 @@
#include "i915_structs.h"
#include "i915_program.h"
-#define YOFFSET(surface) (surface->srf.offset)
-#define UOFFSET(surface) (surface->srf.offset + \
- SIZE_Y420(surface->width, surface->height) + \
+#define UOFFSET(surface) (SIZE_Y420(surface->width, surface->height) + \
SIZE_UV420(surface->width, surface->height))
-#define VOFFSET(surface) (surface->srf.offset + \
- SIZE_Y420(surface->width, surface->height))
+#define VOFFSET(surface) (SIZE_Y420(surface->width, surface->height))
typedef union {
int16_t component[2];
@@ -406,7 +403,12 @@ static void i915_mc_static_indirect_state_set(XvMCContext * context,
buffer_info->dest_y.dw1.tiled_surface = 0; /* linear */
buffer_info->dest_y.dw1.walk = TILEWALK_XMAJOR;
buffer_info->dest_y.dw1.pitch = (pI915Surface->yStride >> 2); /* in DWords */
- buffer_info->dest_y.dw2.base_address = (YOFFSET(pI915Surface) >> 2); /* starting DWORD address */
+ buffer_info->dest_y.dw2.base_address = pI915Surface->bo->offset >> 2; /* starting DWORD address */
+ drm_intel_bo_emit_reloc(pI915XvMC->sis_bo,
+ offsetof(typeof(*buffer_info),dest_y.dw2),
+ pI915Surface->bo, 0,
+ I915_GEM_DOMAIN_RENDER,
+ I915_GEM_DOMAIN_RENDER);
/* dest U */
buffer_info->dest_u.dw0.type = CMD_3D;
@@ -418,7 +420,13 @@ static void i915_mc_static_indirect_state_set(XvMCContext * context,
buffer_info->dest_u.dw1.tiled_surface = 0;
buffer_info->dest_u.dw1.walk = TILEWALK_XMAJOR;
buffer_info->dest_u.dw1.pitch = (pI915Surface->uvStride >> 2); /* in DWords */
- buffer_info->dest_u.dw2.base_address = (UOFFSET(pI915Surface) >> 2); /* starting DWORD address */
+ buffer_info->dest_u.dw2.base_address =
+ (pI915Surface->bo->offset + UOFFSET(pI915Surface)) >> 2;
+ drm_intel_bo_emit_reloc(pI915XvMC->sis_bo,
+ offsetof(typeof(*buffer_info),dest_u.dw2),
+ pI915Surface->bo, UOFFSET(pI915Surface),
+ I915_GEM_DOMAIN_RENDER,
+ I915_GEM_DOMAIN_RENDER);
/* dest V */
buffer_info->dest_v.dw0.type = CMD_3D;
@@ -430,7 +438,13 @@ static void i915_mc_static_indirect_state_set(XvMCContext * context,
buffer_info->dest_v.dw1.tiled_surface = 0;
buffer_info->dest_v.dw1.walk = TILEWALK_XMAJOR;
buffer_info->dest_v.dw1.pitch = (pI915Surface->uvStride >> 2); /* in Dwords */
- buffer_info->dest_v.dw2.base_address = (VOFFSET(pI915Surface) >> 2); /* starting DWORD address */
+ buffer_info->dest_v.dw2.base_address =
+ (pI915Surface->bo->offset + VOFFSET(pI915Surface)) >> 2;
+ drm_intel_bo_emit_reloc(pI915XvMC->sis_bo,
+ offsetof(typeof(*buffer_info),dest_v.dw2),
+ pI915Surface->bo, VOFFSET(pI915Surface),
+ I915_GEM_DOMAIN_RENDER,
+ I915_GEM_DOMAIN_RENDER);
/* Dest buffer parameters */
buffer_info->dest_buf.dw0.type = CMD_3D;
@@ -537,7 +551,11 @@ static void i915_mc_map_state_set(XvMCContext * context,
map_state->y_forward.tm2.depth = 0;
map_state->y_forward.tm2.max_lod = 0;
map_state->y_forward.tm2.cube_face = 0;
- map_state->y_forward.tm0.base_address = (YOFFSET(privPast) >> 2);
+ map_state->y_forward.tm0.base_address = privPast->bo->offset >> 2;
+ drm_intel_bo_emit_reloc(pI915XvMC->msb_bo,
+ offsetof(typeof(*map_state),y_forward.tm0),
+ privPast->bo, 0,
+ I915_GEM_DOMAIN_SAMPLER, 0);
map_state->y_forward.tm2.pitch = (privPast->yStride >> 2) - 1; /* in DWords - 1 */
/* Y Backward (Future) */
@@ -553,7 +571,11 @@ static void i915_mc_map_state_set(XvMCContext * context,
map_state->y_backward.tm2.depth = 0;
map_state->y_backward.tm2.max_lod = 0;
map_state->y_backward.tm2.cube_face = 0;
- map_state->y_backward.tm0.base_address = (YOFFSET(privFuture) >> 2);
+ map_state->y_backward.tm0.base_address = privFuture->bo->offset >> 2;
+ drm_intel_bo_emit_reloc(pI915XvMC->msb_bo,
+ offsetof(typeof(*map_state),y_backward.tm0),
+ privFuture->bo, 0,
+ I915_GEM_DOMAIN_SAMPLER, 0);
map_state->y_backward.tm2.pitch = (privFuture->yStride >> 2) - 1;
/* 3DSATE_MAP_STATE: U */
@@ -576,7 +598,12 @@ static void i915_mc_map_state_set(XvMCContext * context,
map_state->u_forward.tm2.depth = 0;
map_state->u_forward.tm2.max_lod = 0;
map_state->u_forward.tm2.cube_face = 0;
- map_state->u_forward.tm0.base_address = (UOFFSET(privPast) >> 2);
+ map_state->u_forward.tm0.base_address =
+ (privPast->bo->offset + UOFFSET(privPast)) >> 2;
+ drm_intel_bo_emit_reloc(pI915XvMC->msb_bo,
+ offsetof(typeof(*map_state),u_forward.tm0),
+ privPast->bo, UOFFSET(privPast),
+ I915_GEM_DOMAIN_SAMPLER, 0);
map_state->u_forward.tm2.pitch = (privPast->uvStride >> 2) - 1; /* in DWords - 1 */
/* U Backward */
@@ -592,10 +619,14 @@ static void i915_mc_map_state_set(XvMCContext * context,
map_state->u_backward.tm2.depth = 0;
map_state->u_backward.tm2.max_lod = 0;
map_state->u_backward.tm2.cube_face = 0;
- map_state->u_backward.tm0.base_address = (UOFFSET(privFuture) >> 2);
+ map_state->u_backward.tm0.base_address =
+ (privFuture->bo->offset + UOFFSET(privFuture)) >> 2;
+ drm_intel_bo_emit_reloc(pI915XvMC->msb_bo,
+ offsetof(typeof(*map_state),u_backward.tm0),
+ privFuture->bo, UOFFSET(privFuture),
+ I915_GEM_DOMAIN_SAMPLER, 0);
map_state->u_backward.tm2.pitch = (privFuture->uvStride >> 2) - 1;
-
/* 3DSATE_MAP_STATE: V */
map_state->v_map.dw0.type = CMD_3D;
map_state->v_map.dw0.opcode = OPC_3DSTATE_MAP_STATE;
@@ -616,7 +647,12 @@ static void i915_mc_map_state_set(XvMCContext * context,
map_state->v_forward.tm2.depth = 0;
map_state->v_forward.tm2.max_lod = 0;
map_state->v_forward.tm2.cube_face = 0;
- map_state->v_forward.tm0.base_address = (VOFFSET(privPast) >> 2);
+ map_state->v_forward.tm0.base_address =
+ (privPast->bo->offset + VOFFSET(privPast)) >> 2;
+ drm_intel_bo_emit_reloc(pI915XvMC->msb_bo,
+ offsetof(typeof(*map_state),v_forward.tm0),
+ privPast->bo, VOFFSET(privPast),
+ I915_GEM_DOMAIN_SAMPLER, 0);
map_state->v_forward.tm2.pitch = (privPast->uvStride >> 2) - 1; /* in DWords - 1 */
/* V Backward */
@@ -632,7 +668,12 @@ static void i915_mc_map_state_set(XvMCContext * context,
map_state->v_backward.tm2.depth = 0;
map_state->v_backward.tm2.max_lod = 0;
map_state->v_backward.tm2.cube_face = 0;
- map_state->v_backward.tm0.base_address = (VOFFSET(privFuture) >> 2);
+ map_state->v_backward.tm0.base_address =
+ (privFuture->bo->offset + VOFFSET(privFuture)) >> 2;
+ drm_intel_bo_emit_reloc(pI915XvMC->msb_bo,
+ offsetof(typeof(*map_state),v_backward.tm0),
+ privFuture->bo, VOFFSET(privFuture),
+ I915_GEM_DOMAIN_SAMPLER, 0);
map_state->v_backward.tm2.pitch = (privFuture->uvStride >> 2) - 1;
drm_intel_gem_bo_unmap_gtt(pI915XvMC->msb_bo);
@@ -981,29 +1022,25 @@ static Status i915_xvmc_mc_create_surface(Display * display,
pI915Surface->height = context->height;
pI915Surface->privContext = pI915XvMC;
pI915Surface->privSubPic = NULL;
- pI915Surface->srf.map = NULL;
tmpComm = (I915XvMCCreateSurfaceRec *) priv_data;
- pI915Surface->srfNo = tmpComm->srfno;
- pI915Surface->srf.handle = tmpComm->srf.handle;
- pI915Surface->srf.offset = tmpComm->srf.offset;
- pI915Surface->srf.size = tmpComm->srf.size;
+ pI915Surface->bo = drm_intel_bo_alloc(xvmc_driver->bufmgr,
+ "surface",
+ tmpComm->srf.size,
+ GTT_PAGE_SIZE);
- XFree(priv_data);
+ /* X may still use this buffer when XVMC is already done with it. */
+ drm_intel_bo_disable_reuse(pI915Surface->bo);
- if (drmMap(xvmc_driver->fd,
- pI915Surface->srf.handle,
- pI915Surface->srf.size,
- (drmAddress *) & pI915Surface->srf.map) != 0) {
- XVMC_ERR("mapping surface memory failed!\n");
- _xvmc_destroy_surface(display, surface);
- free(pI915Surface);
- surface->privData = NULL;
+ if (!pI915Surface->bo) {
PPTHREAD_MUTEX_UNLOCK();
+ free(pI915Surface);
return BadAlloc;
}
+ XFree(priv_data);
+
pI915XvMC->ref++;
PPTHREAD_MUTEX_UNLOCK();
return 0;
@@ -1024,8 +1061,7 @@ static int i915_xvmc_mc_destroy_surface(Display * display,
if (!(pI915XvMC = pI915Surface->privContext))
return XvMCBadSurface;
- if (pI915Surface->srf.map)
- drmUnmap(pI915Surface->srf.map, pI915Surface->srf.size);
+ drm_intel_bo_unreference(pI915Surface->bo);
free(pI915Surface);
surface->privData = NULL;
@@ -1303,6 +1339,7 @@ static int i915_xvmc_mc_put_surface(Display * display, XvMCSurface * surface,
i915XvMCContext *pI915XvMC;
i915XvMCSurface *pI915Surface;
i915XvMCSubpicture *pI915SubPic;
+ uint32_t handle = 0;
if (!(pI915Surface = surface->privData))
return XvMCBadSurface;
@@ -1312,6 +1349,8 @@ static int i915_xvmc_mc_put_surface(Display * display, XvMCSurface * surface,
PPTHREAD_MUTEX_LOCK();
+ drm_intel_bo_flink(pI915Surface->bo, &handle);
+
data->command = INTEL_XVMC_COMMAND_DISPLAY;
data->ctxNo = pI915XvMC->ctxno;
data->srfNo = pI915Surface->srfNo;
@@ -1319,6 +1358,7 @@ static int i915_xvmc_mc_put_surface(Display * display, XvMCSurface * surface,
data->subPicNo = (!pI915SubPic ? 0 : pI915SubPic->srfNo);
data->real_id = FOURCC_YV12;
data->flags = flags;
+ data->handle = handle;
PPTHREAD_MUTEX_UNLOCK();
diff --git a/src/xvmc/i915_xvmc.h b/src/xvmc/i915_xvmc.h
index 7c9d58e..7fd142e 100644
--- a/src/xvmc/i915_xvmc.h
+++ b/src/xvmc/i915_xvmc.h
@@ -102,7 +102,7 @@ typedef struct _i915XvMCSurface {
unsigned int uvStride;
unsigned int width; /* Dimensions */
unsigned int height;
- intel_xvmc_drm_map_t srf;
+ drm_intel_bo *bo;
i915XvMCContext *privContext;
i915XvMCSubpicture *privSubPic; /* Subpicture to be blended when
* displaying. NULL if none. */
commit b7f79bfd40db3ed17d7a79750d007b57d7ed157a
Author: Daniel Vetter <daniel.vetter at ffwll.ch>
Date: Tue Mar 2 21:53:21 2010 +0100
i915 XvMC: switch corrdata buffer to drm_intel_bo
It works!
v2: Correlation data needs to be in the render cache!
Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
Reviewed-by: Carl Worth <cworth at cworth.org>
diff --git a/src/xvmc/i915_xvmc.c b/src/xvmc/i915_xvmc.c
index 65d2d3e..ee1a1c5 100644
--- a/src/xvmc/i915_xvmc.c
+++ b/src/xvmc/i915_xvmc.c
@@ -494,7 +494,11 @@ static void i915_mc_static_indirect_state_set(XvMCContext * context,
buffer_info->corr.dw1.tiled_surface = 0;
buffer_info->corr.dw1.walk = 0;
buffer_info->corr.dw1.pitch = 0;
- buffer_info->corr.dw2.base_address = (pI915XvMC->corrdata.offset >> 2); /* starting DWORD address */
+ buffer_info->corr.dw2.base_address = pI915XvMC->corrdata_bo->offset >> 2; /* starting DWORD address */
+ drm_intel_bo_emit_reloc(pI915XvMC->sis_bo,
+ offsetof(typeof(*buffer_info),corr.dw2),
+ pI915XvMC->corrdata_bo, 0,
+ I915_GEM_DOMAIN_RENDER, 0);
drm_intel_gem_bo_unmap_gtt(pI915XvMC->sis_bo);
}
@@ -814,26 +818,6 @@ static void i915_mc_mpeg_macroblock_2fbmv(XvMCContext * context,
intelBatchbufferData(¯oblock_2fbmv, sizeof(macroblock_2fbmv), 0);
}
-static int i915_xvmc_map_buffers(i915XvMCContext * pI915XvMC)
-{
- if (drmMap(xvmc_driver->fd,
- pI915XvMC->corrdata.handle,
- pI915XvMC->corrdata.size,
- (drmAddress *) & pI915XvMC->corrdata.map) != 0) {
- return 0;
- }
-
- return 1;
-}
-
-static void i915_xvmc_unmap_buffers(i915XvMCContext * pI915XvMC)
-{
- if (pI915XvMC->corrdata.map) {
- drmUnmap(pI915XvMC->corrdata.map, pI915XvMC->corrdata.size);
- pI915XvMC->corrdata.map = NULL;
- }
-}
-
static int i915_xvmc_alloc_one_time_buffers(i915XvMCContext *pI915XvMC)
{
pI915XvMC->ssb_bo = drm_intel_bo_alloc(xvmc_driver->bufmgr,
@@ -878,7 +862,6 @@ static void i915_release_resource(Display * display, XvMCContext * context)
return;
pI915XvMC->ref--;
- i915_xvmc_unmap_buffers(pI915XvMC);
i915_xvmc_free_one_time_buffers(pI915XvMC);
free(pI915XvMC);
@@ -917,10 +900,6 @@ static Status i915_xvmc_mc_create_context(Display * display,
pI915XvMC->ctxno = tmpComm->ctxno;
pI915XvMC->deviceID = tmpComm->deviceID;
- pI915XvMC->corrdata.handle = tmpComm->corrdata.handle;
- pI915XvMC->corrdata.offset = tmpComm->corrdata.offset;
- pI915XvMC->corrdata.size = tmpComm->corrdata.size;
-
/* Must free the private data we were passed from X */
XFree(priv_data);
priv_data = NULL;
@@ -928,9 +907,6 @@ static Status i915_xvmc_mc_create_context(Display * display,
if (!i915_xvmc_alloc_one_time_buffers(pI915XvMC))
goto free_one_time_buffers;
- if (!i915_xvmc_map_buffers(pI915XvMC))
- goto unmap_buffers;
-
/* Initialize private context values */
pI915XvMC->yStride = STRIDE(context->width);
pI915XvMC->uvStride = STRIDE(context->width >> 1);
@@ -944,8 +920,6 @@ static Status i915_xvmc_mc_create_context(Display * display,
return Success;
-unmap_buffers:
- i915_xvmc_unmap_buffers(pI915XvMC);
free_one_time_buffers:
i915_xvmc_free_one_time_buffers(pI915XvMC);
free(pI915XvMC);
@@ -1076,6 +1050,13 @@ static int i915_xvmc_alloc_render_state_buffers(i915XvMCContext *pI915XvMC)
if (!pI915XvMC->msb_bo)
return 0;
+ pI915XvMC->corrdata_bo = drm_intel_bo_alloc(xvmc_driver->bufmgr,
+ "corrdata",
+ CORRDATA_SIZE,
+ GTT_PAGE_SIZE);
+ if (!pI915XvMC->corrdata_bo)
+ return 0;
+
return 1;
}
@@ -1083,6 +1064,7 @@ static void i915_xvmc_free_render_state_buffers(i915XvMCContext *pI915XvMC)
{
drm_intel_bo_unreference(pI915XvMC->sis_bo);
drm_intel_bo_unreference(pI915XvMC->msb_bo);
+ drm_intel_bo_unreference(pI915XvMC->corrdata_bo);
}
static int i915_xvmc_mc_render_surface(Display * display, XvMCContext * context,
@@ -1186,7 +1168,8 @@ static int i915_xvmc_mc_render_surface(Display * display, XvMCContext * context,
}
LOCK_HARDWARE(intel_ctx->hw_context);
- corrdata_ptr = pI915XvMC->corrdata.map;
+ drm_intel_gem_bo_map_gtt(pI915XvMC->corrdata_bo);
+ corrdata_ptr = pI915XvMC->corrdata_bo->virtual;
corrdata_size = 0;
for (i = first_macroblock; i < (num_macroblocks + first_macroblock);
@@ -1221,7 +1204,7 @@ static int i915_xvmc_mc_render_surface(Display * display, XvMCContext * context,
corrdata_size += bspm;
- if (corrdata_size > pI915XvMC->corrdata.size) {
+ if (corrdata_size > CORRDATA_SIZE) {
XVMC_ERR("correction data buffer overflow.");
break;
}
@@ -1229,6 +1212,8 @@ static int i915_xvmc_mc_render_surface(Display * display, XvMCContext * context,
corrdata_ptr += bspm;
}
+ drm_intel_gem_bo_unmap_gtt(pI915XvMC->corrdata_bo);
+
i915_flush(1, 0);
// i915_mc_invalidate_subcontext_buffers(context, BLOCK_SIS | BLOCK_DIS | BLOCK_SSB
// | BLOCK_MSB | BLOCK_PSP | BLOCK_PSC);
diff --git a/src/xvmc/i915_xvmc.h b/src/xvmc/i915_xvmc.h
index d885612..7c9d58e 100644
--- a/src/xvmc/i915_xvmc.h
+++ b/src/xvmc/i915_xvmc.h
@@ -43,6 +43,7 @@
#define PCI_CHIP_Q35_G 0x29B2
#define PCI_CHIP_Q33_G 0x29D2
+#define CORRDATA_SIZE 128*GTT_PAGE_SIZE
/*
* i915XvMCContext:
* Private Context data referenced via the privData
@@ -70,7 +71,7 @@ typedef struct _i915XvMCContext {
drm_intel_bo *ssb_bo;
drm_intel_bo *psp_bo;
drm_intel_bo *psc_bo;
- intel_xvmc_drm_map_t corrdata;
+ drm_intel_bo *corrdata_bo;
} i915XvMCContext;
/*
commit 62846d88d41f1bbbd16a6e700ca611656fa20f61
Author: Daniel Vetter <daniel.vetter at ffwll.ch>
Date: Tue Mar 2 21:53:20 2010 +0100
i915 XvMC: switch msb to drm_intel_bo
Like for the static indirect state buffer.
Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
Reviewed-by: Carl Worth <cworth at cworth.org>
diff --git a/src/xvmc/i915_xvmc.c b/src/xvmc/i915_xvmc.c
index 4cee3cb..65d2d3e 100644
--- a/src/xvmc/i915_xvmc.c
+++ b/src/xvmc/i915_xvmc.c
@@ -499,14 +499,17 @@ static void i915_mc_static_indirect_state_set(XvMCContext * context,
drm_intel_gem_bo_unmap_gtt(pI915XvMC->sis_bo);
}
-static void i915_mc_map_state_init(XvMCContext * context)
+static void i915_mc_map_state_set(XvMCContext * context,
+ i915XvMCSurface * privPast,
+ i915XvMCSurface * privFuture)
{
i915XvMCContext *pI915XvMC = (i915XvMCContext *) context->privData;
+ struct i915_mc_map_state *map_state;
unsigned int w = context->width;
unsigned int h = context->height;
- struct i915_mc_map_state *map_state;
- map_state = (struct i915_mc_map_state *)pI915XvMC->msb.map;
+ drm_intel_gem_bo_map_gtt(pI915XvMC->msb_bo);
+ map_state = pI915XvMC->msb_bo->virtual;
memset(map_state, 0, sizeof(*map_state));
@@ -530,6 +533,8 @@ static void i915_mc_map_state_init(XvMCContext * context)
map_state->y_forward.tm2.depth = 0;
map_state->y_forward.tm2.max_lod = 0;
map_state->y_forward.tm2.cube_face = 0;
+ map_state->y_forward.tm0.base_address = (YOFFSET(privPast) >> 2);
+ map_state->y_forward.tm2.pitch = (privPast->yStride >> 2) - 1; /* in DWords - 1 */
/* Y Backward (Future) */
map_state->y_backward.tm0.v_ls_offset = 0;
@@ -544,6 +549,8 @@ static void i915_mc_map_state_init(XvMCContext * context)
map_state->y_backward.tm2.depth = 0;
map_state->y_backward.tm2.max_lod = 0;
map_state->y_backward.tm2.cube_face = 0;
+ map_state->y_backward.tm0.base_address = (YOFFSET(privFuture) >> 2);
+ map_state->y_backward.tm2.pitch = (privFuture->yStride >> 2) - 1;
/* 3DSATE_MAP_STATE: U */
map_state->u_map.dw0.type = CMD_3D;
@@ -565,6 +572,8 @@ static void i915_mc_map_state_init(XvMCContext * context)
map_state->u_forward.tm2.depth = 0;
map_state->u_forward.tm2.max_lod = 0;
map_state->u_forward.tm2.cube_face = 0;
+ map_state->u_forward.tm0.base_address = (UOFFSET(privPast) >> 2);
+ map_state->u_forward.tm2.pitch = (privPast->uvStride >> 2) - 1; /* in DWords - 1 */
/* U Backward */
map_state->u_backward.tm0.v_ls_offset = 0;
@@ -579,6 +588,9 @@ static void i915_mc_map_state_init(XvMCContext * context)
map_state->u_backward.tm2.depth = 0;
map_state->u_backward.tm2.max_lod = 0;
map_state->u_backward.tm2.cube_face = 0;
+ map_state->u_backward.tm0.base_address = (UOFFSET(privFuture) >> 2);
+ map_state->u_backward.tm2.pitch = (privFuture->uvStride >> 2) - 1;
+
/* 3DSATE_MAP_STATE: V */
map_state->v_map.dw0.type = CMD_3D;
@@ -600,6 +612,8 @@ static void i915_mc_map_state_init(XvMCContext * context)
map_state->v_forward.tm2.depth = 0;
map_state->v_forward.tm2.max_lod = 0;
map_state->v_forward.tm2.cube_face = 0;
+ map_state->v_forward.tm0.base_address = (VOFFSET(privPast) >> 2);
+ map_state->v_forward.tm2.pitch = (privPast->uvStride >> 2) - 1; /* in DWords - 1 */
/* V Backward */
map_state->v_backward.tm0.v_ls_offset = 0;
@@ -614,29 +628,10 @@ static void i915_mc_map_state_init(XvMCContext * context)
map_state->v_backward.tm2.depth = 0;
map_state->v_backward.tm2.max_lod = 0;
map_state->v_backward.tm2.cube_face = 0;
-}
-
-static void i915_mc_map_state_set(XvMCContext * context,
- i915XvMCSurface * privPast,
- i915XvMCSurface * privFuture)
-{
- i915XvMCContext *pI915XvMC = (i915XvMCContext *) context->privData;
- struct i915_mc_map_state *map_state;
-
- map_state = (struct i915_mc_map_state *)pI915XvMC->msb.map;
-
- map_state->y_forward.tm0.base_address = (YOFFSET(privPast) >> 2);
- map_state->y_forward.tm2.pitch = (privPast->yStride >> 2) - 1; /* in DWords - 1 */
- map_state->y_backward.tm0.base_address = (YOFFSET(privFuture) >> 2);
- map_state->y_backward.tm2.pitch = (privFuture->yStride >> 2) - 1;
- map_state->u_forward.tm0.base_address = (UOFFSET(privPast) >> 2);
- map_state->u_forward.tm2.pitch = (privPast->uvStride >> 2) - 1; /* in DWords - 1 */
- map_state->u_backward.tm0.base_address = (UOFFSET(privFuture) >> 2);
- map_state->u_backward.tm2.pitch = (privFuture->uvStride >> 2) - 1;
- map_state->v_forward.tm0.base_address = (VOFFSET(privPast) >> 2);
- map_state->v_forward.tm2.pitch = (privPast->uvStride >> 2) - 1; /* in DWords - 1 */
map_state->v_backward.tm0.base_address = (VOFFSET(privFuture) >> 2);
map_state->v_backward.tm2.pitch = (privFuture->uvStride >> 2) - 1;
+
+ drm_intel_gem_bo_unmap_gtt(pI915XvMC->msb_bo);
}
static void i915_flush(int map, int render)
@@ -655,7 +650,6 @@ static void i915_flush(int map, int render)
static void i915_mc_load_indirect_render_emit(XvMCContext * context)
{
i915XvMCContext *pI915XvMC = (i915XvMCContext *) context->privData;
- msb_state *msb;
int mem_select;
uint32_t load_indirect, buffer_address;
BATCH_LOCALS;
@@ -680,11 +674,8 @@ static void i915_mc_load_indirect_render_emit(XvMCContext * context)
OUT_BATCH(16); /* 4 * 3 + 2 + 3 - 1 */
/* Map state buffer (reference buffer info) */
- if (mem_select)
- buffer_address = pI915XvMC->msb.offset;
- else
- buffer_address = pI915XvMC->msb.bus_addr;
- OUT_BATCH(buffer_address | STATE_VALID | STATE_FORCE);
+ OUT_RELOC(pI915XvMC->msb_bo, I915_GEM_DOMAIN_INSTRUCTION, 0,
+ STATE_VALID | STATE_FORCE);
OUT_BATCH(23); /* 3 * 8 - 1 */
ADVANCE_BATCH();
}
@@ -826,13 +817,6 @@ static void i915_mc_mpeg_macroblock_2fbmv(XvMCContext * context,
static int i915_xvmc_map_buffers(i915XvMCContext * pI915XvMC)
{
if (drmMap(xvmc_driver->fd,
- pI915XvMC->msb.handle,
- pI915XvMC->msb.size,
- (drmAddress *) & pI915XvMC->msb.map) != 0) {
- return -1;
- }
-
- if (drmMap(xvmc_driver->fd,
pI915XvMC->corrdata.handle,
pI915XvMC->corrdata.size,
(drmAddress *) & pI915XvMC->corrdata.map) != 0) {
@@ -844,11 +828,6 @@ static int i915_xvmc_map_buffers(i915XvMCContext * pI915XvMC)
static void i915_xvmc_unmap_buffers(i915XvMCContext * pI915XvMC)
{
- if (pI915XvMC->msb.map) {
- drmUnmap(pI915XvMC->msb.map, pI915XvMC->msb.size);
- pI915XvMC->msb.map = NULL;
- }
-
if (pI915XvMC->corrdata.map) {
drmUnmap(pI915XvMC->corrdata.map, pI915XvMC->corrdata.size);
pI915XvMC->corrdata.map = NULL;
@@ -937,14 +916,6 @@ static Status i915_xvmc_mc_create_context(Display * display,
tmpComm = (I915XvMCCreateContextRec *) priv_data;
pI915XvMC->ctxno = tmpComm->ctxno;
pI915XvMC->deviceID = tmpComm->deviceID;
- pI915XvMC->msb.handle = tmpComm->msb.handle;
- pI915XvMC->msb.offset = tmpComm->msb.offset;
- pI915XvMC->msb.size = tmpComm->msb.size;
-
- if (pI915XvMC->deviceID == PCI_CHIP_I915_G ||
- pI915XvMC->deviceID == PCI_CHIP_I915_GM) {
- pI915XvMC->msb.bus_addr = tmpComm->msb.bus_addr;
- }
pI915XvMC->corrdata.handle = tmpComm->corrdata.handle;
pI915XvMC->corrdata.offset = tmpComm->corrdata.offset;
@@ -971,8 +942,6 @@ static Status i915_xvmc_mc_create_context(Display * display,
/* pre-init state buffers */
i915_mc_one_time_context_init(context);
- i915_mc_map_state_init(context);
-
return Success;
unmap_buffers:
@@ -1100,12 +1069,20 @@ static int i915_xvmc_alloc_render_state_buffers(i915XvMCContext *pI915XvMC)
if (!pI915XvMC->sis_bo)
return 0;
+ pI915XvMC->msb_bo = drm_intel_bo_alloc(xvmc_driver->bufmgr,
+ "msb",
+ GTT_PAGE_SIZE,
+ GTT_PAGE_SIZE);
+ if (!pI915XvMC->msb_bo)
+ return 0;
+
return 1;
}
static void i915_xvmc_free_render_state_buffers(i915XvMCContext *pI915XvMC)
{
drm_intel_bo_unreference(pI915XvMC->sis_bo);
+ drm_intel_bo_unreference(pI915XvMC->msb_bo);
}
static int i915_xvmc_mc_render_surface(Display * display, XvMCContext * context,
diff --git a/src/xvmc/i915_xvmc.h b/src/xvmc/i915_xvmc.h
index 57a7e2d..d885612 100644
--- a/src/xvmc/i915_xvmc.h
+++ b/src/xvmc/i915_xvmc.h
@@ -66,7 +66,7 @@ typedef struct _i915XvMCContext {
int deviceID;
drm_intel_bo *sis_bo;
- intel_xvmc_drm_map_t msb;
+ drm_intel_bo *msb_bo;
drm_intel_bo *ssb_bo;
drm_intel_bo *psp_bo;
drm_intel_bo *psc_bo;
commit d27955c697e1768559957da8d61087644befd285
Author: Daniel Vetter <daniel.vetter at ffwll.ch>
Date: Tue Mar 2 21:53:19 2010 +0100
i915 XvMC: switch sis to drm_intel_bo
I've decided to allocate a new buffer for every render command, to
prevent stalling for the gpu. libdrm bo reuse should take care of
not wasting memory in case the buffer is not busy.
Also always emit the full state, it's not worth it to complicate
the code over a few stores to wc memory.
Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
Reviewed-by: Carl Worth <cworth at cworth.org>
diff --git a/src/xvmc/i915_xvmc.c b/src/xvmc/i915_xvmc.c
index 1e256b5..4cee3cb 100644
--- a/src/xvmc/i915_xvmc.c
+++ b/src/xvmc/i915_xvmc.c
@@ -380,13 +380,22 @@ static void i915_mc_one_time_state_emit(XvMCContext * context)
ADVANCE_BATCH();
}
-static void i915_mc_static_indirect_state_init(XvMCContext * context)
+static void i915_mc_static_indirect_state_set(XvMCContext * context,
+ XvMCSurface * dest,
+ unsigned int picture_structure,
+ unsigned int flags,
+ unsigned int picture_coding_type)
{
i915XvMCContext *pI915XvMC = (i915XvMCContext *) context->privData;
- struct i915_mc_static_indirect_state_buffer *buffer_info =
- (struct i915_mc_static_indirect_state_buffer *)pI915XvMC->sis.map;
+ i915XvMCSurface *pI915Surface = (i915XvMCSurface *) dest->privData;
+ struct i915_mc_static_indirect_state_buffer *buffer_info;
+ unsigned int w = dest->width;
+
+ drm_intel_gem_bo_map_gtt(pI915XvMC->sis_bo);
+ buffer_info = pI915XvMC->sis_bo->virtual;
memset(buffer_info, 0, sizeof(*buffer_info));
+
/* dest Y */
buffer_info->dest_y.dw0.type = CMD_3D;
buffer_info->dest_y.dw0.opcode = OPC_3DSTATE_BUFFER_INFO;
@@ -396,6 +405,8 @@ static void i915_mc_static_indirect_state_init(XvMCContext * context)
buffer_info->dest_y.dw1.fence_regs = 0; /* disabled *//* FIXME: tiled y for performance */
buffer_info->dest_y.dw1.tiled_surface = 0; /* linear */
buffer_info->dest_y.dw1.walk = TILEWALK_XMAJOR;
+ buffer_info->dest_y.dw1.pitch = (pI915Surface->yStride >> 2); /* in DWords */
+ buffer_info->dest_y.dw2.base_address = (YOFFSET(pI915Surface) >> 2); /* starting DWORD address */
/* dest U */
buffer_info->dest_u.dw0.type = CMD_3D;
@@ -406,6 +417,8 @@ static void i915_mc_static_indirect_state_init(XvMCContext * context)
buffer_info->dest_u.dw1.fence_regs = 0;
buffer_info->dest_u.dw1.tiled_surface = 0;
buffer_info->dest_u.dw1.walk = TILEWALK_XMAJOR;
+ buffer_info->dest_u.dw1.pitch = (pI915Surface->uvStride >> 2); /* in DWords */
+ buffer_info->dest_u.dw2.base_address = (UOFFSET(pI915Surface) >> 2); /* starting DWORD address */
/* dest V */
buffer_info->dest_v.dw0.type = CMD_3D;
@@ -416,7 +429,10 @@ static void i915_mc_static_indirect_state_init(XvMCContext * context)
buffer_info->dest_v.dw1.fence_regs = 0;
buffer_info->dest_v.dw1.tiled_surface = 0;
buffer_info->dest_v.dw1.walk = TILEWALK_XMAJOR;
+ buffer_info->dest_v.dw1.pitch = (pI915Surface->uvStride >> 2); /* in Dwords */
+ buffer_info->dest_v.dw2.base_address = (VOFFSET(pI915Surface) >> 2); /* starting DWORD address */
+ /* Dest buffer parameters */
buffer_info->dest_buf.dw0.type = CMD_3D;
buffer_info->dest_buf.dw0.opcode = OPC_3DSTATE_DEST_BUFFER_VARIABLES;
buffer_info->dest_buf.dw0.length = 0;
@@ -425,7 +441,17 @@ static void i915_mc_static_indirect_state_init(XvMCContext * context)
buffer_info->dest_buf.dw1.color_fmt = COLORBUFFER_8BIT;
buffer_info->dest_buf.dw1.v_ls = 0; /* fill later */
buffer_info->dest_buf.dw1.v_ls_offset = 0; /* fill later */
+ if ((picture_structure & XVMC_FRAME_PICTURE) == XVMC_FRAME_PICTURE) {
+ ;
+ } else if ((picture_structure & XVMC_FRAME_PICTURE) == XVMC_TOP_FIELD) {
+ buffer_info->dest_buf.dw1.v_ls = 1;
+ } else if ((picture_structure & XVMC_FRAME_PICTURE) ==
+ XVMC_BOTTOM_FIELD) {
+ buffer_info->dest_buf.dw1.v_ls = 1;
+ buffer_info->dest_buf.dw1.v_ls_offset = 1;
+ }
+ /* MPEG buffer parameters */
buffer_info->dest_buf_mpeg.dw0.type = CMD_3D;
buffer_info->dest_buf_mpeg.dw0.opcode =
OPC_3DSTATE_DEST_BUFFER_VARIABLES_MPEG;
@@ -440,48 +466,6 @@ static void i915_mc_static_indirect_state_init(XvMCContext * context)
buffer_info->dest_buf_mpeg.dw1.v_subsample_factor = MC_SUB_1V;
buffer_info->dest_buf_mpeg.dw1.h_subsample_factor = MC_SUB_1H;
- buffer_info->corr.dw0.type = CMD_3D;
- buffer_info->corr.dw0.opcode = OPC_3DSTATE_BUFFER_INFO;
- buffer_info->corr.dw0.length = 1;
- buffer_info->corr.dw1.aux_id = 0;
- buffer_info->corr.dw1.buffer_id = BUFFERID_MC_INTRA_CORR;
- buffer_info->corr.dw1.aux_id = 0;
- buffer_info->corr.dw1.fence_regs = 0;
- buffer_info->corr.dw1.tiled_surface = 0;
- buffer_info->corr.dw1.walk = 0;
- buffer_info->corr.dw1.pitch = 0;
- buffer_info->corr.dw2.base_address = (pI915XvMC->corrdata.offset >> 2); /* starting DWORD address */
-}
-
-static void i915_mc_static_indirect_state_set(XvMCContext * context,
- XvMCSurface * dest,
- unsigned int picture_structure,
- unsigned int flags,
- unsigned int picture_coding_type)
-{
- i915XvMCContext *pI915XvMC = (i915XvMCContext *) context->privData;
- i915XvMCSurface *pI915Surface = (i915XvMCSurface *) dest->privData;
- struct i915_mc_static_indirect_state_buffer *buffer_info =
- (struct i915_mc_static_indirect_state_buffer *)pI915XvMC->sis.map;
- unsigned int w = dest->width;
-
- buffer_info->dest_y.dw1.pitch = (pI915Surface->yStride >> 2); /* in DWords */
- buffer_info->dest_y.dw2.base_address = (YOFFSET(pI915Surface) >> 2); /* starting DWORD address */
- buffer_info->dest_u.dw1.pitch = (pI915Surface->uvStride >> 2); /* in DWords */
- buffer_info->dest_u.dw2.base_address = (UOFFSET(pI915Surface) >> 2); /* starting DWORD address */
- buffer_info->dest_v.dw1.pitch = (pI915Surface->uvStride >> 2); /* in Dwords */
- buffer_info->dest_v.dw2.base_address = (VOFFSET(pI915Surface) >> 2); /* starting DWORD address */
-
- if ((picture_structure & XVMC_FRAME_PICTURE) == XVMC_FRAME_PICTURE) {
- ;
- } else if ((picture_structure & XVMC_FRAME_PICTURE) == XVMC_TOP_FIELD) {
- buffer_info->dest_buf.dw1.v_ls = 1;
- } else if ((picture_structure & XVMC_FRAME_PICTURE) ==
- XVMC_BOTTOM_FIELD) {
- buffer_info->dest_buf.dw1.v_ls = 1;
- buffer_info->dest_buf.dw1.v_ls_offset = 1;
- }
-
if (picture_structure & XVMC_FRAME_PICTURE) {
;
} else if (picture_structure & XVMC_TOP_FIELD) {
@@ -499,6 +483,20 @@ static void i915_mc_static_indirect_state_set(XvMCContext * context,
buffer_info->dest_buf_mpeg.dw1.picture_width = (dest->width >> 4); /* in macroblocks */
buffer_info->dest_buf_mpeg.dw2.picture_coding_type =
picture_coding_type;
+
+ buffer_info->corr.dw0.type = CMD_3D;
+ buffer_info->corr.dw0.opcode = OPC_3DSTATE_BUFFER_INFO;
+ buffer_info->corr.dw0.length = 1;
+ buffer_info->corr.dw1.aux_id = 0;
+ buffer_info->corr.dw1.buffer_id = BUFFERID_MC_INTRA_CORR;
+ buffer_info->corr.dw1.aux_id = 0;
+ buffer_info->corr.dw1.fence_regs = 0;
+ buffer_info->corr.dw1.tiled_surface = 0;
+ buffer_info->corr.dw1.walk = 0;
+ buffer_info->corr.dw1.pitch = 0;
+ buffer_info->corr.dw2.base_address = (pI915XvMC->corrdata.offset >> 2); /* starting DWORD address */
+
+ drm_intel_gem_bo_unmap_gtt(pI915XvMC->sis_bo);
}
static void i915_mc_map_state_init(XvMCContext * context)
@@ -657,7 +655,6 @@ static void i915_flush(int map, int render)
static void i915_mc_load_indirect_render_emit(XvMCContext * context)
{
i915XvMCContext *pI915XvMC = (i915XvMCContext *) context->privData;
- sis_state *sis;
msb_state *msb;
int mem_select;
uint32_t load_indirect, buffer_address;
@@ -678,11 +675,8 @@ static void i915_mc_load_indirect_render_emit(XvMCContext * context)
OUT_BATCH(load_indirect);
/* Static Indirect state buffer (dest buffer info) */
- if (mem_select)
- buffer_address = pI915XvMC->sis.offset;
- else
- buffer_address = pI915XvMC->sis.bus_addr;
- OUT_BATCH(buffer_address | STATE_VALID | STATE_FORCE);
+ OUT_RELOC(pI915XvMC->sis_bo, I915_GEM_DOMAIN_INSTRUCTION, 0,
+ STATE_VALID | STATE_FORCE);
OUT_BATCH(16); /* 4 * 3 + 2 + 3 - 1 */
/* Map state buffer (reference buffer info) */
@@ -832,13 +826,6 @@ static void i915_mc_mpeg_macroblock_2fbmv(XvMCContext * context,
static int i915_xvmc_map_buffers(i915XvMCContext * pI915XvMC)
{
if (drmMap(xvmc_driver->fd,
- pI915XvMC->sis.handle,
- pI915XvMC->sis.size,
- (drmAddress *) & pI915XvMC->sis.map) != 0) {
- return 0;
- }
-
- if (drmMap(xvmc_driver->fd,
pI915XvMC->msb.handle,
pI915XvMC->msb.size,
(drmAddress *) & pI915XvMC->msb.map) != 0) {
@@ -857,11 +844,6 @@ static int i915_xvmc_map_buffers(i915XvMCContext * pI915XvMC)
static void i915_xvmc_unmap_buffers(i915XvMCContext * pI915XvMC)
{
- if (pI915XvMC->sis.map) {
- drmUnmap(pI915XvMC->sis.map, pI915XvMC->sis.size);
- pI915XvMC->sis.map = NULL;
- }
-
if (pI915XvMC->msb.map) {
drmUnmap(pI915XvMC->msb.map, pI915XvMC->msb.size);
pI915XvMC->msb.map = NULL;
@@ -955,16 +937,12 @@ static Status i915_xvmc_mc_create_context(Display * display,
tmpComm = (I915XvMCCreateContextRec *) priv_data;
pI915XvMC->ctxno = tmpComm->ctxno;
pI915XvMC->deviceID = tmpComm->deviceID;
- pI915XvMC->sis.handle = tmpComm->sis.handle;
- pI915XvMC->sis.offset = tmpComm->sis.offset;
- pI915XvMC->sis.size = tmpComm->sis.size;
pI915XvMC->msb.handle = tmpComm->msb.handle;
pI915XvMC->msb.offset = tmpComm->msb.offset;
pI915XvMC->msb.size = tmpComm->msb.size;
if (pI915XvMC->deviceID == PCI_CHIP_I915_G ||
pI915XvMC->deviceID == PCI_CHIP_I915_GM) {
- pI915XvMC->sis.bus_addr = tmpComm->sis.bus_addr;
pI915XvMC->msb.bus_addr = tmpComm->msb.bus_addr;
}
@@ -993,8 +971,6 @@ static Status i915_xvmc_mc_create_context(Display * display,
/* pre-init state buffers */
i915_mc_one_time_context_init(context);
- i915_mc_static_indirect_state_init(context);
-
i915_mc_map_state_init(context);
return Success;
@@ -1115,6 +1091,23 @@ static int i915_xvmc_mc_destroy_surface(Display * display,
return Success;
}
+static int i915_xvmc_alloc_render_state_buffers(i915XvMCContext *pI915XvMC)
+{
+ pI915XvMC->sis_bo = drm_intel_bo_alloc(xvmc_driver->bufmgr,
+ "sis",
+ GTT_PAGE_SIZE,
+ GTT_PAGE_SIZE);
+ if (!pI915XvMC->sis_bo)
+ return 0;
+
+ return 1;
+}
+
+static void i915_xvmc_free_render_state_buffers(i915XvMCContext *pI915XvMC)
+{
+ drm_intel_bo_unreference(pI915XvMC->sis_bo);
+}
+
static int i915_xvmc_mc_render_surface(Display * display, XvMCContext * context,
unsigned int picture_structure,
XvMCSurface * target_surface,
@@ -1171,6 +1164,9 @@ static int i915_xvmc_mc_render_surface(Display * display, XvMCContext * context,
if (!(privTarget = target_surface->privData))
return XvMCBadSurface;
+ if (!i915_xvmc_alloc_render_state_buffers(pI915XvMC))
+ return BadAlloc;
+
if (context->surface_type_id >= SURFACE_TYPE_MAX) {
XVMC_ERR("Unsupprted surface_type_id %d.",
context->surface_type_id);
@@ -1329,6 +1325,8 @@ static int i915_xvmc_mc_render_surface(Display * display, XvMCContext * context,
intelFlushBatch(TRUE);
+ i915_xvmc_free_render_state_buffers(pI915XvMC);
+
UNLOCK_HARDWARE(intel_ctx->hw_context);
return 0;
}
diff --git a/src/xvmc/i915_xvmc.h b/src/xvmc/i915_xvmc.h
index 3aa92c3..57a7e2d 100644
--- a/src/xvmc/i915_xvmc.h
+++ b/src/xvmc/i915_xvmc.h
@@ -65,7 +65,7 @@ typedef struct _i915XvMCContext {
void *drawHash;
int deviceID;
- intel_xvmc_drm_map_t sis;
+ drm_intel_bo *sis_bo;
intel_xvmc_drm_map_t msb;
drm_intel_bo *ssb_bo;
drm_intel_bo *psp_bo;
commit 3203c66fbf04c55adba760e97c9fa1feb9e55f8d
Author: Daniel Vetter <daniel.vetter at ffwll.ch>
Date: Tue Mar 2 21:53:18 2010 +0100
i915 XvMC: switch load_indirect_render_emit to batchbuffer macros
Like with one_time_state_emit, this preps for relocatable bo's.
Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
Reviewed-by: Carl Worth <cworth at cworth.org>
diff --git a/src/xvmc/i915_xvmc.c b/src/xvmc/i915_xvmc.c
index 673d3d6..1e256b5 100644
--- a/src/xvmc/i915_xvmc.c
+++ b/src/xvmc/i915_xvmc.c
@@ -85,15 +85,6 @@ static void i915_inst_texld(unsigned int *inst,
*inst = T2_MBZ;
}
-static void i915_emit_batch(void *data, int size, int flag)
-{
- intelBatchbufferData(data, size, flag);
-}
-
-/* load indirect buffer for mc rendering */
-static uint32_t *mc_render_load_indirect;
-static int mc_render_load_indirect_size;
-
static void i915_mc_one_time_context_init(XvMCContext * context)
{
unsigned int dest, src0, src1, src2;
@@ -663,60 +654,45 @@ static void i915_flush(int map, int render)
intelBatchbufferData(&mi_flush, sizeof(mi_flush), 0);
}
-static void i915_mc_load_indirect_render_init(XvMCContext * context)
+static void i915_mc_load_indirect_render_emit(XvMCContext * context)
{
i915XvMCContext *pI915XvMC = (i915XvMCContext *) context->privData;
sis_state *sis;
msb_state *msb;
- struct i915_3dstate_load_indirect *load_indirect;
int mem_select;
+ uint32_t load_indirect, buffer_address;
+ BATCH_LOCALS;
- mc_render_load_indirect_size = sizeof(*load_indirect) + sizeof(*sis)
- + sizeof(*msb);
- mc_render_load_indirect = calloc(1, mc_render_load_indirect_size);
-
- load_indirect =
- (struct i915_3dstate_load_indirect *)mc_render_load_indirect;
- load_indirect->dw0.type = CMD_3D;
- load_indirect->dw0.opcode = OPC_3DSTATE_LOAD_INDIRECT;
- load_indirect->dw0.block_mask = BLOCK_SIS | BLOCK_MSB;
- load_indirect->dw0.length = (mc_render_load_indirect_size >> 2) - 2;
+ BEGIN_BATCH(5);
+ load_indirect = OP_3D_LOAD_INDIRECT;
+ load_indirect |= (BLOCK_SIS | BLOCK_MSB) << BLOCK_MASK_SHIFT;
+ load_indirect |= 5 - 2; /* length */
if (pI915XvMC->deviceID == PCI_CHIP_I915_G ||
pI915XvMC->deviceID == PCI_CHIP_I915_GM)
- mem_select = 0;
- else
- mem_select = 1;
-
- load_indirect->dw0.mem_select = mem_select;
+ mem_select = 0; /* use physical address */
+ else {
+ load_indirect |= OP_3D_LOAD_INDIRECT_GFX_ADDR;
+ mem_select = 1; /* use gfx address */
+ }
+ OUT_BATCH(load_indirect);
/* Static Indirect state buffer (dest buffer info) */
- sis = (sis_state *) (++load_indirect);
- sis->dw0.valid = 1;
- sis->dw0.force = 1;
- sis->dw1.length = 16; /* 4 * 3 + 2 + 3 - 1 */
-
if (mem_select)
- sis->dw0.buffer_address = (pI915XvMC->sis.offset >> 2);
+ buffer_address = pI915XvMC->sis.offset;
else
- sis->dw0.buffer_address = (pI915XvMC->sis.bus_addr >> 2);
+ buffer_address = pI915XvMC->sis.bus_addr;
+ OUT_BATCH(buffer_address | STATE_VALID | STATE_FORCE);
+ OUT_BATCH(16); /* 4 * 3 + 2 + 3 - 1 */
/* Map state buffer (reference buffer info) */
- msb = (msb_state *) (++sis);
- msb->dw0.valid = 1;
- msb->dw0.force = 1;
- msb->dw1.length = 23; /* 3 * 8 - 1 */
-
if (mem_select)
- msb->dw0.buffer_address = (pI915XvMC->msb.offset >> 2);
+ buffer_address = pI915XvMC->msb.offset;
else
- msb->dw0.buffer_address = (pI915XvMC->msb.bus_addr >> 2);
-}
-
-static void i915_mc_load_indirect_render_emit(void)
-{
- i915_emit_batch(mc_render_load_indirect, mc_render_load_indirect_size,
- 0);
+ buffer_address = pI915XvMC->msb.bus_addr;
+ OUT_BATCH(buffer_address | STATE_VALID | STATE_FORCE);
+ OUT_BATCH(23); /* 3 * 8 - 1 */
+ ADVANCE_BATCH();
}
static void i915_mc_mpeg_set_origin(XvMCContext * context, XvMCMacroBlock * mb)
@@ -1021,7 +997,6 @@ static Status i915_xvmc_mc_create_context(Display * display,
i915_mc_map_state_init(context);
- i915_mc_load_indirect_render_init(context);
return Success;
unmap_buffers:
@@ -1044,7 +1019,6 @@ static int i915_xvmc_mc_destroy_context(Display * display,
/* Pass Control to the X server to destroy the drm_context_t */
i915_release_resource(display, context);
- free(mc_render_load_indirect);
return Success;
}
@@ -1294,7 +1268,7 @@ static int i915_xvmc_mc_render_surface(Display * display, XvMCContext * context,
/* setup reference surfaces */
i915_mc_map_state_set(context, privPast, privFuture);
- i915_mc_load_indirect_render_emit();
+ i915_mc_load_indirect_render_emit(context);
i915_mc_mpeg_set_origin(context,
¯oblock_array->macro_blocks
commit d30decae6a9db585f2d2589ae2c3d9e1f9acd33d
Author: Daniel Vetter <daniel.vetter at ffwll.ch>
Date: Tue Mar 2 21:53:17 2010 +0100
i915 XvMC: switch psc to drm_intel_bo
Like with the sampler state buffer.
Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
Reviewed-by: Carl Worth <cworth at cworth.org>
diff --git a/src/xvmc/i915_xvmc.c b/src/xvmc/i915_xvmc.c
index 06f6c9d..673d3d6 100644
--- a/src/xvmc/i915_xvmc.c
+++ b/src/xvmc/i915_xvmc.c
@@ -103,10 +103,6 @@ static void i915_mc_one_time_context_init(XvMCContext * context)
struct i915_3dstate_pixel_shader_program *pixel_shader_program;
struct i915_3dstate_pixel_shader_constants *pixel_shader_constants;
- /* pixel shader contant static state */
- pixel_shader_constants =
- (struct i915_3dstate_pixel_shader_constants *)pI915XvMC->psc.map;
-
/* sampler static state */
drm_intel_gem_bo_map_gtt(pI915XvMC->ssb_bo);
sampler_state = pI915XvMC->ssb_bo->virtual;
@@ -314,6 +310,10 @@ static void i915_mc_one_time_context_init(XvMCContext * context)
drm_intel_gem_bo_unmap_gtt(pI915XvMC->psp_bo);
+ /* pixel shader contant static state */
+ drm_intel_gem_bo_map_gtt(pI915XvMC->psc_bo);
+ pixel_shader_constants = pI915XvMC->psc_bo->virtual;
+
memset(pixel_shader_constants, 0, sizeof(*pixel_shader_constants));
pixel_shader_constants->dw0.type = CMD_3D;
pixel_shader_constants->dw0.opcode = OPC_3DSTATE_PIXEL_SHADER_CONSTANTS;
@@ -323,11 +323,12 @@ static void i915_mc_one_time_context_init(XvMCContext * context)
pixel_shader_constants->value.y = 0.5;
pixel_shader_constants->value.z = 0.5;
pixel_shader_constants->value.w = 0.5;
+
+ drm_intel_gem_bo_unmap_gtt(pI915XvMC->psc_bo);
}
static void i915_mc_one_time_state_emit(XvMCContext * context)
{
- uint32_t buffer_address;
i915XvMCContext *pI915XvMC = (i915XvMCContext *) context->privData;
uint32_t load_state_immediate_1, load_indirect, s3_dword, s6_dword;
int mem_select;
@@ -382,11 +383,8 @@ static void i915_mc_one_time_state_emit(XvMCContext * context)
OUT_BATCH(66); /* 4 + 16 + 16 + 31 - 1 */
/* Pixel shader constant buffer */
- if (mem_select)
- buffer_address = pI915XvMC->psc.offset;
- else
- buffer_address = pI915XvMC->psc.bus_addr;
- OUT_BATCH(STATE_VALID | STATE_FORCE | buffer_address);
+ OUT_RELOC(pI915XvMC->psc_bo, I915_GEM_DOMAIN_INSTRUCTION, 0,
+ STATE_VALID | STATE_FORCE);
OUT_BATCH(5); /* 6 - 1 */
ADVANCE_BATCH();
}
@@ -872,13 +870,6 @@ static int i915_xvmc_map_buffers(i915XvMCContext * pI915XvMC)
}
if (drmMap(xvmc_driver->fd,
- pI915XvMC->psc.handle,
- pI915XvMC->psc.size,
- (drmAddress *) & pI915XvMC->psc.map) != 0) {
- return 0;
- }
-
- if (drmMap(xvmc_driver->fd,
pI915XvMC->corrdata.handle,
pI915XvMC->corrdata.size,
(drmAddress *) & pI915XvMC->corrdata.map) != 0) {
@@ -900,11 +891,6 @@ static void i915_xvmc_unmap_buffers(i915XvMCContext * pI915XvMC)
pI915XvMC->msb.map = NULL;
}
- if (pI915XvMC->psc.map) {
- drmUnmap(pI915XvMC->psc.map, pI915XvMC->psc.size);
- pI915XvMC->psc.map = NULL;
- }
-
if (pI915XvMC->corrdata.map) {
drmUnmap(pI915XvMC->corrdata.map, pI915XvMC->corrdata.size);
pI915XvMC->corrdata.map = NULL;
@@ -927,6 +913,13 @@ static int i915_xvmc_alloc_one_time_buffers(i915XvMCContext *pI915XvMC)
if (!pI915XvMC->psp_bo)
return 0;
+ pI915XvMC->psc_bo = drm_intel_bo_alloc(xvmc_driver->bufmgr,
+ "psc",
+ GTT_PAGE_SIZE,
+ GTT_PAGE_SIZE);
+ if (!pI915XvMC->psc_bo)
+ return 0;
+
return 1;
}
@@ -934,6 +927,7 @@ static void i915_xvmc_free_one_time_buffers(i915XvMCContext *pI915XvMC)
{
drm_intel_bo_unreference(pI915XvMC->ssb_bo);
drm_intel_bo_unreference(pI915XvMC->psp_bo);
+ drm_intel_bo_unreference(pI915XvMC->psc_bo);
}
/*
@@ -991,15 +985,11 @@ static Status i915_xvmc_mc_create_context(Display * display,
pI915XvMC->msb.handle = tmpComm->msb.handle;
pI915XvMC->msb.offset = tmpComm->msb.offset;
pI915XvMC->msb.size = tmpComm->msb.size;
- pI915XvMC->psc.handle = tmpComm->psc.handle;
- pI915XvMC->psc.offset = tmpComm->psc.offset;
- pI915XvMC->psc.size = tmpComm->psc.size;
if (pI915XvMC->deviceID == PCI_CHIP_I915_G ||
pI915XvMC->deviceID == PCI_CHIP_I915_GM) {
pI915XvMC->sis.bus_addr = tmpComm->sis.bus_addr;
pI915XvMC->msb.bus_addr = tmpComm->msb.bus_addr;
- pI915XvMC->psc.bus_addr = tmpComm->psc.bus_addr;
}
pI915XvMC->corrdata.handle = tmpComm->corrdata.handle;
diff --git a/src/xvmc/i915_xvmc.h b/src/xvmc/i915_xvmc.h
index e39a162..3aa92c3 100644
--- a/src/xvmc/i915_xvmc.h
+++ b/src/xvmc/i915_xvmc.h
@@ -69,7 +69,7 @@ typedef struct _i915XvMCContext {
intel_xvmc_drm_map_t msb;
drm_intel_bo *ssb_bo;
drm_intel_bo *psp_bo;
- intel_xvmc_drm_map_t psc;
+ drm_intel_bo *psc_bo;
intel_xvmc_drm_map_t corrdata;
} i915XvMCContext;
commit b543c355f4fdcb64deb198765d9b8b86f7c234c2
Author: Daniel Vetter <daniel.vetter at ffwll.ch>
Date: Tue Mar 2 21:53:16 2010 +0100
i915 XvMC: switch psp to drm_intel_bo
Like with the sampler state buffer.
Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
Reviewed-by: Carl Worth <cworth at cworth.org>
diff --git a/src/xvmc/i915_xvmc.c b/src/xvmc/i915_xvmc.c
index 20def14..06f6c9d 100644
--- a/src/xvmc/i915_xvmc.c
+++ b/src/xvmc/i915_xvmc.c
@@ -103,9 +103,6 @@ static void i915_mc_one_time_context_init(XvMCContext * context)
struct i915_3dstate_pixel_shader_program *pixel_shader_program;
struct i915_3dstate_pixel_shader_constants *pixel_shader_constants;
- /* pixel shader static state */
- pixel_shader_program =
- (struct i915_3dstate_pixel_shader_program *)pI915XvMC->psp.map;
/* pixel shader contant static state */
pixel_shader_constants =
(struct i915_3dstate_pixel_shader_constants *)pI915XvMC->psc.map;
@@ -170,6 +167,10 @@ static void i915_mc_one_time_context_init(XvMCContext * context)
drm_intel_gem_bo_unmap_gtt(pI915XvMC->ssb_bo);
+ /* pixel shader static state */
+ drm_intel_gem_bo_map_gtt(pI915XvMC->psp_bo);
+ pixel_shader_program = pI915XvMC->psp_bo->virtual;
+
memset(pixel_shader_program, 0, sizeof(*pixel_shader_program));
pixel_shader_program->shader0.type = CMD_3D;
pixel_shader_program->shader0.opcode = OPC_3DSTATE_PIXEL_SHADER_PROGRAM;
@@ -311,6 +312,8 @@ static void i915_mc_one_time_context_init(XvMCContext * context)
A0_DEST_CHANNEL_ALL, A0_DEST_SATURATE, src0, src1,
src2);
+ drm_intel_gem_bo_unmap_gtt(pI915XvMC->psp_bo);
+
memset(pixel_shader_constants, 0, sizeof(*pixel_shader_constants));
pixel_shader_constants->dw0.type = CMD_3D;
pixel_shader_constants->dw0.opcode = OPC_3DSTATE_PIXEL_SHADER_CONSTANTS;
@@ -374,12 +377,8 @@ static void i915_mc_one_time_state_emit(XvMCContext * context)
OUT_BATCH(7); /* 8 - 1 */
/* Pixel shader program buffer */
- if (mem_select)
- buffer_address = pI915XvMC->psp.offset;
- else
- buffer_address = pI915XvMC->psp.bus_addr;
-
- OUT_BATCH(STATE_VALID | STATE_FORCE | buffer_address);
+ OUT_RELOC(pI915XvMC->psp_bo, I915_GEM_DOMAIN_INSTRUCTION, 0,
+ STATE_VALID | STATE_FORCE);
OUT_BATCH(66); /* 4 + 16 + 16 + 31 - 1 */
/* Pixel shader constant buffer */
@@ -873,13 +872,6 @@ static int i915_xvmc_map_buffers(i915XvMCContext * pI915XvMC)
}
if (drmMap(xvmc_driver->fd,
- pI915XvMC->psp.handle,
- pI915XvMC->psp.size,
- (drmAddress *) & pI915XvMC->psp.map) != 0) {
- return 0;
- }
-
- if (drmMap(xvmc_driver->fd,
pI915XvMC->psc.handle,
pI915XvMC->psc.size,
(drmAddress *) & pI915XvMC->psc.map) != 0) {
@@ -908,11 +900,6 @@ static void i915_xvmc_unmap_buffers(i915XvMCContext * pI915XvMC)
pI915XvMC->msb.map = NULL;
}
- if (pI915XvMC->psp.map) {
- drmUnmap(pI915XvMC->psp.map, pI915XvMC->psp.size);
- pI915XvMC->psp.map = NULL;
- }
-
if (pI915XvMC->psc.map) {
drmUnmap(pI915XvMC->psc.map, pI915XvMC->psc.size);
pI915XvMC->psc.map = NULL;
@@ -933,12 +920,20 @@ static int i915_xvmc_alloc_one_time_buffers(i915XvMCContext *pI915XvMC)
if (!pI915XvMC->ssb_bo)
return 0;
+ pI915XvMC->psp_bo = drm_intel_bo_alloc(xvmc_driver->bufmgr,
+ "psp",
+ GTT_PAGE_SIZE,
+ GTT_PAGE_SIZE);
+ if (!pI915XvMC->psp_bo)
+ return 0;
+
return 1;
}
static void i915_xvmc_free_one_time_buffers(i915XvMCContext *pI915XvMC)
{
drm_intel_bo_unreference(pI915XvMC->ssb_bo);
+ drm_intel_bo_unreference(pI915XvMC->psp_bo);
}
/*
@@ -996,9 +991,6 @@ static Status i915_xvmc_mc_create_context(Display * display,
pI915XvMC->msb.handle = tmpComm->msb.handle;
pI915XvMC->msb.offset = tmpComm->msb.offset;
pI915XvMC->msb.size = tmpComm->msb.size;
- pI915XvMC->psp.handle = tmpComm->psp.handle;
- pI915XvMC->psp.offset = tmpComm->psp.offset;
- pI915XvMC->psp.size = tmpComm->psp.size;
pI915XvMC->psc.handle = tmpComm->psc.handle;
pI915XvMC->psc.offset = tmpComm->psc.offset;
pI915XvMC->psc.size = tmpComm->psc.size;
@@ -1007,7 +999,6 @@ static Status i915_xvmc_mc_create_context(Display * display,
pI915XvMC->deviceID == PCI_CHIP_I915_GM) {
pI915XvMC->sis.bus_addr = tmpComm->sis.bus_addr;
pI915XvMC->msb.bus_addr = tmpComm->msb.bus_addr;
- pI915XvMC->psp.bus_addr = tmpComm->psp.bus_addr;
pI915XvMC->psc.bus_addr = tmpComm->psc.bus_addr;
}
diff --git a/src/xvmc/i915_xvmc.h b/src/xvmc/i915_xvmc.h
index e46ad38..e39a162 100644
--- a/src/xvmc/i915_xvmc.h
+++ b/src/xvmc/i915_xvmc.h
@@ -68,7 +68,7 @@ typedef struct _i915XvMCContext {
intel_xvmc_drm_map_t sis;
intel_xvmc_drm_map_t msb;
drm_intel_bo *ssb_bo;
- intel_xvmc_drm_map_t psp;
+ drm_intel_bo *psp_bo;
intel_xvmc_drm_map_t psc;
intel_xvmc_drm_map_t corrdata;
} i915XvMCContext;
commit 18c364084ce5495ffdfea38c17c1297d555c6c54
Author: Daniel Vetter <daniel.vetter at ffwll.ch>
Date: Tue Mar 2 21:53:15 2010 +0100
i915 XvMC: switch ssb to drm_intel_bo
This also starts to kill the last remnants of the support for
physical addresses for the indirect state buffers. With gem this
would need kernel support (in the form of a new reloc type in
execbuf2).
This does not change the ABI between ddx and client libIntelXvMC.
I've decided to do this in one swoop when all the buffer rework is
done.
Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
Reviewed-by: Carl Worth <cworth at cworth.org>
diff --git a/src/xvmc/i915_xvmc.c b/src/xvmc/i915_xvmc.c
index 4195cba..20def14 100644
--- a/src/xvmc/i915_xvmc.c
+++ b/src/xvmc/i915_xvmc.c
@@ -103,8 +103,6 @@ static void i915_mc_one_time_context_init(XvMCContext * context)
struct i915_3dstate_pixel_shader_program *pixel_shader_program;
struct i915_3dstate_pixel_shader_constants *pixel_shader_constants;
- /* sampler static state */
- sampler_state = (struct i915_3dstate_sampler_state *)pI915XvMC->ssb.map;
/* pixel shader static state */
pixel_shader_program =
(struct i915_3dstate_pixel_shader_program *)pI915XvMC->psp.map;
@@ -112,6 +110,10 @@ static void i915_mc_one_time_context_init(XvMCContext * context)
pixel_shader_constants =
(struct i915_3dstate_pixel_shader_constants *)pI915XvMC->psc.map;
+ /* sampler static state */
+ drm_intel_gem_bo_map_gtt(pI915XvMC->ssb_bo);
+ sampler_state = pI915XvMC->ssb_bo->virtual;
+
memset(sampler_state, 0, sizeof(*sampler_state));
sampler_state->dw0.type = CMD_3D;
sampler_state->dw0.opcode = OPC_3DSTATE_SAMPLER_STATE;
@@ -166,6 +168,8 @@ static void i915_mc_one_time_context_init(XvMCContext * context)
sampler_state->sampler1.ts1.east_deinterlacer = 0;
sampler_state->sampler1.ts2.default_color = 0;
+ drm_intel_gem_bo_unmap_gtt(pI915XvMC->ssb_bo);
+
memset(pixel_shader_program, 0, sizeof(*pixel_shader_program));
pixel_shader_program->shader0.type = CMD_3D;
pixel_shader_program->shader0.opcode = OPC_3DSTATE_PIXEL_SHADER_PROGRAM;
@@ -316,7 +320,6 @@ static void i915_mc_one_time_context_init(XvMCContext * context)
pixel_shader_constants->value.y = 0.5;
pixel_shader_constants->value.z = 0.5;
pixel_shader_constants->value.w = 0.5;
-
}
static void i915_mc_one_time_state_emit(XvMCContext * context)
@@ -366,11 +369,8 @@ static void i915_mc_one_time_state_emit(XvMCContext * context)
OUT_BATCH(0); /* no dynamic indirect state */
/* Sample state buffer */
- if (mem_select)
- buffer_address = pI915XvMC->ssb.offset;
- else
- buffer_address = pI915XvMC->ssb.bus_addr;
- OUT_BATCH(STATE_VALID | STATE_FORCE | buffer_address);
+ OUT_RELOC(pI915XvMC->ssb_bo, I915_GEM_DOMAIN_INSTRUCTION, 0,
+ STATE_VALID | STATE_FORCE);
OUT_BATCH(7); /* 8 - 1 */
/* Pixel shader program buffer */
@@ -862,14 +862,7 @@ static int i915_xvmc_map_buffers(i915XvMCContext * pI915XvMC)
pI915XvMC->sis.handle,
pI915XvMC->sis.size,
(drmAddress *) & pI915XvMC->sis.map) != 0) {
- return -1;
- }
-
- if (drmMap(xvmc_driver->fd,
- pI915XvMC->ssb.handle,
- pI915XvMC->ssb.size,
- (drmAddress *) & pI915XvMC->ssb.map) != 0) {
- return -1;
+ return 0;
}
if (drmMap(xvmc_driver->fd,
@@ -883,24 +876,24 @@ static int i915_xvmc_map_buffers(i915XvMCContext * pI915XvMC)
pI915XvMC->psp.handle,
pI915XvMC->psp.size,
(drmAddress *) & pI915XvMC->psp.map) != 0) {
- return -1;
+ return 0;
}
if (drmMap(xvmc_driver->fd,
pI915XvMC->psc.handle,
pI915XvMC->psc.size,
(drmAddress *) & pI915XvMC->psc.map) != 0) {
- return -1;
+ return 0;
}
if (drmMap(xvmc_driver->fd,
pI915XvMC->corrdata.handle,
pI915XvMC->corrdata.size,
(drmAddress *) & pI915XvMC->corrdata.map) != 0) {
- return -1;
+ return 0;
}
- return 0;
+ return 1;
}
static void i915_xvmc_unmap_buffers(i915XvMCContext * pI915XvMC)
@@ -910,11 +903,6 @@ static void i915_xvmc_unmap_buffers(i915XvMCContext * pI915XvMC)
pI915XvMC->sis.map = NULL;
}
- if (pI915XvMC->ssb.map) {
- drmUnmap(pI915XvMC->ssb.map, pI915XvMC->ssb.size);
- pI915XvMC->ssb.map = NULL;
- }
-
if (pI915XvMC->msb.map) {
drmUnmap(pI915XvMC->msb.map, pI915XvMC->msb.size);
pI915XvMC->msb.map = NULL;
@@ -936,6 +924,23 @@ static void i915_xvmc_unmap_buffers(i915XvMCContext * pI915XvMC)
}
}
+static int i915_xvmc_alloc_one_time_buffers(i915XvMCContext *pI915XvMC)
+{
+ pI915XvMC->ssb_bo = drm_intel_bo_alloc(xvmc_driver->bufmgr,
+ "ssb",
+ GTT_PAGE_SIZE,
+ GTT_PAGE_SIZE);
+ if (!pI915XvMC->ssb_bo)
+ return 0;
+
+ return 1;
+}
+
+static void i915_xvmc_free_one_time_buffers(i915XvMCContext *pI915XvMC)
+{
+ drm_intel_bo_unreference(pI915XvMC->ssb_bo);
+}
+
/*
* Function: i915_release_resource
*/
@@ -948,6 +953,7 @@ static void i915_release_resource(Display * display, XvMCContext * context)
pI915XvMC->ref--;
i915_xvmc_unmap_buffers(pI915XvMC);
+ i915_xvmc_free_one_time_buffers(pI915XvMC);
free(pI915XvMC);
context->privData = NULL;
@@ -987,9 +993,6 @@ static Status i915_xvmc_mc_create_context(Display * display,
pI915XvMC->sis.handle = tmpComm->sis.handle;
pI915XvMC->sis.offset = tmpComm->sis.offset;
pI915XvMC->sis.size = tmpComm->sis.size;
- pI915XvMC->ssb.handle = tmpComm->ssb.handle;
- pI915XvMC->ssb.offset = tmpComm->ssb.offset;
- pI915XvMC->ssb.size = tmpComm->ssb.size;
pI915XvMC->msb.handle = tmpComm->msb.handle;
pI915XvMC->msb.offset = tmpComm->msb.offset;
pI915XvMC->msb.size = tmpComm->msb.size;
@@ -1003,7 +1006,6 @@ static Status i915_xvmc_mc_create_context(Display * display,
if (pI915XvMC->deviceID == PCI_CHIP_I915_G ||
pI915XvMC->deviceID == PCI_CHIP_I915_GM) {
pI915XvMC->sis.bus_addr = tmpComm->sis.bus_addr;
- pI915XvMC->ssb.bus_addr = tmpComm->ssb.bus_addr;
pI915XvMC->msb.bus_addr = tmpComm->msb.bus_addr;
pI915XvMC->psp.bus_addr = tmpComm->psp.bus_addr;
pI915XvMC->psc.bus_addr = tmpComm->psc.bus_addr;
@@ -1017,12 +1019,11 @@ static Status i915_xvmc_mc_create_context(Display * display,
XFree(priv_data);
priv_data = NULL;
- if (i915_xvmc_map_buffers(pI915XvMC)) {
- i915_xvmc_unmap_buffers(pI915XvMC);
- free(pI915XvMC);
- context->privData = NULL;
- return BadAlloc;
- }
+ if (!i915_xvmc_alloc_one_time_buffers(pI915XvMC))
+ goto free_one_time_buffers;
+
+ if (!i915_xvmc_map_buffers(pI915XvMC))
+ goto unmap_buffers;
/* Initialize private context values */
pI915XvMC->yStride = STRIDE(context->width);
@@ -1041,6 +1042,14 @@ static Status i915_xvmc_mc_create_context(Display * display,
i915_mc_load_indirect_render_init(context);
return Success;
+
+unmap_buffers:
+ i915_xvmc_unmap_buffers(pI915XvMC);
+free_one_time_buffers:
+ i915_xvmc_free_one_time_buffers(pI915XvMC);
+ free(pI915XvMC);
+ context->privData = NULL;
+ return BadAlloc;
}
static int i915_xvmc_mc_destroy_context(Display * display,
diff --git a/src/xvmc/i915_xvmc.h b/src/xvmc/i915_xvmc.h
index d85d9c1..e46ad38 100644
--- a/src/xvmc/i915_xvmc.h
+++ b/src/xvmc/i915_xvmc.h
@@ -67,7 +67,7 @@ typedef struct _i915XvMCContext {
intel_xvmc_drm_map_t sis;
intel_xvmc_drm_map_t msb;
- intel_xvmc_drm_map_t ssb;
+ drm_intel_bo *ssb_bo;
intel_xvmc_drm_map_t psp;
intel_xvmc_drm_map_t psc;
intel_xvmc_drm_map_t corrdata;
diff --git a/src/xvmc/intel_xvmc.h b/src/xvmc/intel_xvmc.h
index 8ee1ae4..9776238 100644
--- a/src/xvmc/intel_xvmc.h
+++ b/src/xvmc/intel_xvmc.h
@@ -59,6 +59,8 @@
extern int DEBUG;
+#define GTT_PAGE_SIZE 4*1024
+
#define XVMC_ERR(s, arg...) \
do { \
fprintf(stderr, "[intel_xvmc] err: " s "\n", ##arg); \
commit fc9e44f01910eb9fd43def9b2ac531b0742d8b4e
Author: Daniel Vetter <daniel.vetter at ffwll.ch>
Date: Tue Mar 2 21:53:14 2010 +0100
i915 XvMC: kill last_flip and last_render
Seems to be a remnant from i810 XvMC support. last_flip is always 0,
so serves no real purpose anymore. Kill it and the associated code.
With last_flip gone, last_render also lost its purpose. Kill it, too.
Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
Reviewed-by: Carl Worth <cworth at cworth.org>
diff --git a/src/xvmc/i915_xvmc.c b/src/xvmc/i915_xvmc.c
index 0faba95..4195cba 100644
--- a/src/xvmc/i915_xvmc.c
+++ b/src/xvmc/i915_xvmc.c
@@ -1029,7 +1029,6 @@ static Status i915_xvmc_mc_create_context(Display * display,
pI915XvMC->uvStride = STRIDE(context->width >> 1);
pI915XvMC->haveXv = 0;
pI915XvMC->dual_prime = 0;
- pI915XvMC->last_flip = 0;
pI915XvMC->port = context->port;
pI915XvMC->ref = 1;
@@ -1093,8 +1092,6 @@ static Status i915_xvmc_mc_create_surface(Display * display,
}
/* Initialize private values */
- pI915Surface->last_render = 0;
- pI915Surface->last_flip = 0;
pI915Surface->yStride = pI915XvMC->yStride;
pI915Surface->uvStride = pI915XvMC->uvStride;
pI915Surface->width = context->width;
@@ -1144,9 +1141,6 @@ static int i915_xvmc_mc_destroy_surface(Display * display,
if (!(pI915XvMC = pI915Surface->privContext))
return XvMCBadSurface;
- if (pI915Surface->last_flip)
- XvMCSyncSurface(display, surface);
-
if (pI915Surface->srf.map)
drmUnmap(pI915Surface->srf.map, pI915Surface->srf.size);
@@ -1370,8 +1364,6 @@ static int i915_xvmc_mc_render_surface(Display * display, XvMCContext * context,
}
intelFlushBatch(TRUE);
- xvmc_driver->last_render = xvmc_driver->alloc.irq_emitted;
- privTarget->last_render = xvmc_driver->last_render;
UNLOCK_HARDWARE(intel_ctx->hw_context);
return 0;
@@ -1426,32 +1418,6 @@ static int i915_xvmc_mc_get_surface_status(Display * display,
if (!(pI915XvMC = pI915Surface->privContext))
return XvMCBadSurface;
- PPTHREAD_MUTEX_LOCK();
- if (pI915Surface->last_flip) {
- /* This can not happen */
- if (pI915XvMC->last_flip < pI915Surface->last_flip) {
- XVMC_ERR
- ("Context last flip is less than surface last flip.");
- PPTHREAD_MUTEX_UNLOCK();
- return BadValue;
- }
-
- /*
- If the context has 2 or more flips after this surface it
- cannot be displaying. Don't bother to check.
- */
- if (!(pI915XvMC->last_flip > (pI915Surface->last_flip + 1))) {
- /*
- If this surface was the last flipped it is either displaying
- or about to be so don't bother checking.
- */
- if (pI915XvMC->last_flip == pI915Surface->last_flip) {
- *stat |= XVMC_DISPLAYING;
- }
- }
- }
-
- PPTHREAD_MUTEX_UNLOCK();
return 0;
}
diff --git a/src/xvmc/i915_xvmc.h b/src/xvmc/i915_xvmc.h
index f0e8d3e..d85d9c1 100644
--- a/src/xvmc/i915_xvmc.h
+++ b/src/xvmc/i915_xvmc.h
@@ -50,7 +50,6 @@
*/
typedef struct _i915XvMCContext {
unsigned int ctxno;
- unsigned int last_flip;
unsigned int dual_prime; /* Flag to identify when dual prime is in use. */
unsigned int yStride;
unsigned int uvStride;
@@ -82,8 +81,6 @@ typedef struct _i915XvMCContext {
*/
typedef struct _i915XvMCSubpicture {
unsigned int srfNo;
- unsigned int last_render;
- unsigned int last_flip;
unsigned int pitch;
unsigned char palette[3][16];
intel_xvmc_drm_map_t srf;
@@ -100,8 +97,6 @@ typedef struct _i915XvMCSubpicture {
*/
typedef struct _i915XvMCSurface {
unsigned int srfNo; /* XvMC private surface numbers */
- unsigned int last_render;
- unsigned int last_flip;
unsigned int yStride; /* Stride of YUV420 Y component. */
unsigned int uvStride;
unsigned int width; /* Dimensions */
diff --git a/src/xvmc/intel_xvmc.h b/src/xvmc/intel_xvmc.h
index 60a2fbb..8ee1ae4 100644
--- a/src/xvmc/intel_xvmc.h
+++ b/src/xvmc/intel_xvmc.h
@@ -149,7 +149,6 @@ typedef struct _intel_xvmc_driver {
unsigned int irq_emitted;
} alloc;
intel_xvmc_drm_map_t batchbuffer;
- unsigned int last_render;
sigset_t sa_mask;
pthread_mutex_t ctxmutex;
commit 04aa38a639fefcd00acb485f36ab18c2083ed1bb
Author: Daniel Vetter <daniel.vetter at ffwll.ch>
Date: Tue Mar 2 21:53:13 2010 +0100
i915 XvMC: switch one_time_state_emit to batchbuffer macros
This is in preparation for real relocatable drm_bo's instead
of memory at a fixed address. By switching to the batchbuffer
macros (like i965 xvmc) we can use the nice OUT_RELOC macro.
Also align the code more with coding-style elsewhere, i.e. bitops
instead of bitfield structures. The bitfield structures are
quite a mess to work with the batchbuffer macros, so they were
getting in the way, anyway.
Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
Reviewed-by: Carl Worth <cworth at cworth.org>
diff --git a/src/xvmc/i915_structs.h b/src/xvmc/i915_structs.h
index f9e6747..7281fe5 100644
--- a/src/xvmc/i915_structs.h
+++ b/src/xvmc/i915_structs.h
@@ -84,6 +84,7 @@ struct i915_color_blt {
/* 3D_INSTRUCTION */
#define CMD_3D 0x03
+#define OPCODE_3D(x) (CMD_3D << 29 | (x) << 16)
#define OPC_3DMPEG_MACROBLOCK_IPICTURE (0x01 + (0x1e << 5))
#define OPC_3DMPEG_SET_ORIGIN (0x10 + (0x1e << 5))
@@ -96,9 +97,11 @@ struct i915_color_blt {
#define OPC_3DSTATE_MAP_STATE (0x00 + (0x1d << 8))
#define OPC_3DSTATE_SAMPLER_STATE (0x01 + (0x1d << 8))
#define OPC_3DSTATE_LOAD_STATE_IMMEDIATE_1 (0x04 + (0x1d << 8))
+#define OP_3D_LOAD_STATE_IMMEDIATE_1 OPCODE_3D(OPC_3DSTATE_LOAD_STATE_IMMEDIATE_1)
#define OPC_3DSTATE_PIXEL_SHADER_PROGRAM (0x05 + (0x1d << 8))
#define OPC_3DSTATE_PIXEL_SHADER_CONSTANTS (0x06 + (0x1d << 8))
#define OPC_3DSTATE_LOAD_INDIRECT (0x07 + (0x1d << 8))
+#define OP_3D_LOAD_INDIRECT OPCODE_3D(OPC_3DSTATE_LOAD_INDIRECT)
#define OPC_3DSTATE_MODES_5 (0x0c)
#define OPC_3DSTATE_COORD_SET_BINDINGS (0x16)
@@ -746,6 +749,7 @@ struct i915_3dstate_pixel_shader_constants {
#define BLOCK_MSB 0x08
#define BLOCK_PSP 0x10
#define BLOCK_PSC 0x20
+#define BLOCK_MASK_SHIFT 8
typedef struct _state_ddword {
struct {
@@ -758,15 +762,9 @@ typedef struct _state_ddword {
unsigned length:9;
unsigned pad0:23;
} dw1;
-} sis_state, ssb_state, msb_state, psp_state, psc_state;
-
-typedef struct _state_dword {
- struct {
- unsigned valid:1;
- unsigned reset:1;
- unsigned buffer_address:30;
- } dw0;
-} dis_state;
+} sis_state, msb_state;
+#define STATE_VALID 0x1
+#define STATE_FORCE 0x2
struct i915_3dstate_load_indirect {
struct {
@@ -779,6 +777,8 @@ struct i915_3dstate_load_indirect {
} dw0;
};
+#define OP_3D_LOAD_INDIRECT_GFX_ADDR (1 << 14)
+
#define TEXCOORDFMT_2FP 0x00
#define TEXCOORDFMT_3FP 0x01
#define TEXCOORDFMT_4FP 0x02
@@ -797,40 +797,14 @@ struct s2_dword {
unsigned set7_texcoord_fmt:4;
};
-struct s3_dword {
- unsigned set0_pcd:1;
- unsigned set0_ws_tcz:1;
- unsigned set0_ws_tcy:1;
- unsigned set0_ws_tcx:1;
- unsigned set1_pcd:1;
- unsigned set1_ws_tcz:1;
- unsigned set1_ws_tcy:1;
- unsigned set1_ws_tcx:1;
- unsigned set2_pcd:1;
- unsigned set2_ws_tcz:1;
- unsigned set2_ws_tcy:1;
- unsigned set2_ws_tcx:1;
- unsigned set3_pcd:1;
- unsigned set3_ws_tcz:1;
- unsigned set3_ws_tcy:1;
- unsigned set3_ws_tcx:1;
- unsigned set4_pcd:1;
- unsigned set4_ws_tcz:1;
- unsigned set4_ws_tcy:1;
- unsigned set4_ws_tcx:1;
- unsigned set5_pcd:1;
- unsigned set5_ws_tcz:1;
- unsigned set5_ws_tcy:1;
- unsigned set5_ws_tcx:1;
- unsigned set6_pcd:1;
- unsigned set6_ws_tcz:1;
- unsigned set6_ws_tcy:1;
- unsigned set6_ws_tcx:1;
- unsigned set7_pcd:1;
- unsigned set7_ws_tcz:1;
- unsigned set7_ws_tcy:1;
- unsigned set7_ws_tcx:1;
-};
+#define S3_SET0_PCD (1 << 0*4)
+#define S3_SET1_PCD (1 << 1*4)
+#define S3_SET2_PCD (1 << 2*4)
+#define S3_SET3_PCD (1 << 3*4)
+#define S3_SET4_PCD (1 << 4*4)
+#define S3_SET5_PCD (1 << 5*4)
+#define S3_SET6_PCD (1 << 6*4)
+#define S3_SET7_PCD (1 << 7*4)
#define VERTEXHAS_XYZ 1
#define VERTEXHAS_XYZW 2
@@ -882,42 +856,23 @@ struct s5_dword {
unsigned color_buffer_component_write_disable:4;
};
-struct s6_dword {
- unsigned triangle_pv:2;
- unsigned color_buffer_write:1;
- unsigned depth_buffer_write:1;
- unsigned dest_blend_factor:4;
- unsigned src_blend_factor:4;
- unsigned color_blend_function:3;
- unsigned color_buffer_blend:1;
- unsigned depth_test_function:3;
- unsigned depth_test_enable:1;
- unsigned alpha_reference_value:8;
- unsigned alpha_test_function:3;
- unsigned alpha_test_enable:1;
-
-};
+#define S6_COLOR_BUFFER_WRITE (1 << 2)
+#define S6_DST_BLEND_FACTOR_SHIFT 4
+#define S6_SRC_BLEND_FACTOR_SHIFT 8
+#define S6_DEPTH_TEST_ENABLE (1 << 19)
struct s7_dword {
unsigned global_depth_offset_const;
};
-struct i915_3dstate_load_state_immediate_1 {
- struct {
- unsigned length:4;
- unsigned load_s0:1;
- unsigned load_s1:1;
- unsigned load_s2:1;
- unsigned load_s3:1;
- unsigned load_s4:1;
- unsigned load_s5:1;
- unsigned load_s6:1;
- unsigned load_s7:1;
- unsigned pad0:4;
- unsigned opcode:13;
- unsigned type:3;
- } dw0;
-};
+#define OP_3D_LOAD_STATE_IMM_LOAD_S0 (1 << 4)
+#define OP_3D_LOAD_STATE_IMM_LOAD_S1 (1 << 5)
+#define OP_3D_LOAD_STATE_IMM_LOAD_S2 (1 << 6)
+#define OP_3D_LOAD_STATE_IMM_LOAD_S3 (1 << 7)
+#define OP_3D_LOAD_STATE_IMM_LOAD_S4 (1 << 8)
+#define OP_3D_LOAD_STATE_IMM_LOAD_S5 (1 << 9)
+#define OP_3D_LOAD_STATE_IMM_LOAD_S6 (1 << 10)
+#define OP_3D_LOAD_STATE_IMM_LOAD_S7 (1 << 11)
struct i915_3dstate_scissor_rectangle {
struct {
diff --git a/src/xvmc/i915_xvmc.c b/src/xvmc/i915_xvmc.c
index 8063c5a..0faba95 100644
--- a/src/xvmc/i915_xvmc.c
+++ b/src/xvmc/i915_xvmc.c
@@ -90,11 +90,6 @@ static void i915_emit_batch(void *data, int size, int flag)
intelBatchbufferData(data, size, flag);
}
-/* one time context initialization buffer */
-static uint32_t *one_time_load_state_imm1;
-static uint32_t *one_time_load_indirect;
-static int one_time_load_state_imm1_size, one_time_load_indirect_size;
-
/* load indirect buffer for mc rendering */
static uint32_t *mc_render_load_indirect;
static int mc_render_load_indirect_size;
@@ -324,122 +319,77 @@ static void i915_mc_one_time_context_init(XvMCContext * context)
}
-static void i915_mc_one_time_state_init(XvMCContext * context)
+static void i915_mc_one_time_state_emit(XvMCContext * context)
{
- struct s3_dword *s3 = NULL;
- struct s6_dword *s6 = NULL;
- dis_state *dis = NULL;
- ssb_state *ssb = NULL;
- psp_state *psp = NULL;
- psc_state *psc = NULL;
+ uint32_t buffer_address;
i915XvMCContext *pI915XvMC = (i915XvMCContext *) context->privData;
- struct i915_3dstate_load_state_immediate_1 *load_state_immediate_1;
- struct i915_3dstate_load_indirect *load_indirect;
+ uint32_t load_state_immediate_1, load_indirect, s3_dword, s6_dword;
int mem_select;
+ BATCH_LOCALS;
/* 3DSTATE_LOAD_STATE_IMMEDIATE_1 */
- one_time_load_state_imm1_size =
- sizeof(*load_state_immediate_1) + sizeof(*s3) + sizeof(*s6);
- one_time_load_state_imm1 = calloc(1, one_time_load_state_imm1_size);
- load_state_immediate_1 = (struct i915_3dstate_load_state_immediate_1 *)
- one_time_load_state_imm1;
- load_state_immediate_1->dw0.type = CMD_3D;
- load_state_immediate_1->dw0.opcode = OPC_3DSTATE_LOAD_STATE_IMMEDIATE_1;
- load_state_immediate_1->dw0.load_s3 = 1;
- load_state_immediate_1->dw0.load_s6 = 1;
- load_state_immediate_1->dw0.length =
- (one_time_load_state_imm1_size >> 2) - 2;
-
- s3 = (struct s3_dword *)(++load_state_immediate_1);
- s3->set0_pcd = 1;
- s3->set1_pcd = 1;
- s3->set2_pcd = 1;
- s3->set3_pcd = 1;
- s3->set4_pcd = 1;
- s3->set5_pcd = 1;
- s3->set6_pcd = 1;
- s3->set7_pcd = 1;
-
- s6 = (struct s6_dword *)(++s3);
- s6->alpha_test_enable = 0;
- s6->alpha_test_function = 0;
- s6->alpha_reference_value = 0;
- s6->depth_test_enable = 1;
- s6->depth_test_function = 0;
- s6->color_buffer_blend = 0;
- s6->color_blend_function = 0;
- s6->src_blend_factor = 1;
- s6->dest_blend_factor = 1;
- s6->depth_buffer_write = 0;
- s6->color_buffer_write = 1;
- s6->triangle_pv = 0;
+ BEGIN_BATCH(3 + 8);
+ load_state_immediate_1 = OP_3D_LOAD_STATE_IMMEDIATE_1;
+ load_state_immediate_1 |= OP_3D_LOAD_STATE_IMM_LOAD_S3;
+ load_state_immediate_1 |= OP_3D_LOAD_STATE_IMM_LOAD_S6;
+ load_state_immediate_1 |= 3 - 2; /* length */
+ OUT_BATCH(load_state_immediate_1);
+
+ s3_dword = S3_SET0_PCD | S3_SET1_PCD |
+ S3_SET2_PCD | S3_SET3_PCD |
+ S3_SET4_PCD | S3_SET5_PCD |
+ S3_SET6_PCD | S3_SET7_PCD;
+ OUT_BATCH(s3_dword);
+
+ s6_dword = S6_COLOR_BUFFER_WRITE | S6_DEPTH_TEST_ENABLE;
+ s6_dword |= 1 << S6_SRC_BLEND_FACTOR_SHIFT;
+ s6_dword |= 1 << S6_DST_BLEND_FACTOR_SHIFT;
+ OUT_BATCH(s6_dword);
/* 3DSTATE_LOAD_INDIRECT */
- one_time_load_indirect_size =
- sizeof(*load_indirect) + sizeof(*dis) + sizeof(*ssb) +
- sizeof(*psp) + sizeof(*psc);
- one_time_load_indirect = calloc(1, one_time_load_indirect_size);
- load_indirect =
- (struct i915_3dstate_load_indirect *)one_time_load_indirect;
- load_indirect->dw0.type = CMD_3D;
- load_indirect->dw0.opcode = OPC_3DSTATE_LOAD_INDIRECT;
- load_indirect->dw0.block_mask =
- BLOCK_DIS | BLOCK_SSB | BLOCK_PSP | BLOCK_PSC;
- load_indirect->dw0.length = (one_time_load_indirect_size >> 2) - 2;
+ load_indirect = OP_3D_LOAD_INDIRECT;
+ load_indirect |= (BLOCK_DIS | BLOCK_SSB | BLOCK_PSP | BLOCK_PSC)
+ << BLOCK_MASK_SHIFT;
+ load_indirect |= 8 - 2; /* length */
if (pI915XvMC->deviceID == PCI_CHIP_I915_G ||
pI915XvMC->deviceID == PCI_CHIP_I915_GM)
mem_select = 0; /* use physical address */
- else
+ else {
+ load_indirect |= OP_3D_LOAD_INDIRECT_GFX_ADDR;
mem_select = 1; /* use gfx address */
+ }
- load_indirect->dw0.mem_select = mem_select;
+ OUT_BATCH(load_indirect);
/* Dynamic indirect state buffer */
- dis = (dis_state *) (++load_indirect);
- dis->dw0.valid = 0;
- dis->dw0.reset = 0;
- dis->dw0.buffer_address = 0;
+ OUT_BATCH(0); /* no dynamic indirect state */
/* Sample state buffer */
- ssb = (ssb_state *) (++dis);
- ssb->dw0.valid = 1;
- ssb->dw0.force = 1;
- ssb->dw1.length = 7; /* 8 - 1 */
-
if (mem_select)
- ssb->dw0.buffer_address = (pI915XvMC->ssb.offset >> 2);
+ buffer_address = pI915XvMC->ssb.offset;
else
- ssb->dw0.buffer_address = (pI915XvMC->ssb.bus_addr >> 2);
+ buffer_address = pI915XvMC->ssb.bus_addr;
+ OUT_BATCH(STATE_VALID | STATE_FORCE | buffer_address);
+ OUT_BATCH(7); /* 8 - 1 */
/* Pixel shader program buffer */
- psp = (psp_state *) (++ssb);
- psp->dw0.valid = 1;
- psp->dw0.force = 1;
- psp->dw1.length = 66; /* 4 + 16 + 16 + 31 - 1 */
-
if (mem_select)
- psp->dw0.buffer_address = (pI915XvMC->psp.offset >> 2);
+ buffer_address = pI915XvMC->psp.offset;
else
- psp->dw0.buffer_address = (pI915XvMC->psp.bus_addr >> 2);
+ buffer_address = pI915XvMC->psp.bus_addr;
- /* Pixel shader constant buffer */
- psc = (psc_state *) (++psp);
- psc->dw0.valid = 1;
- psc->dw0.force = 1;
- psc->dw1.length = 5; /* 6 - 1 */
+ OUT_BATCH(STATE_VALID | STATE_FORCE | buffer_address);
+ OUT_BATCH(66); /* 4 + 16 + 16 + 31 - 1 */
+ /* Pixel shader constant buffer */
if (mem_select)
- psc->dw0.buffer_address = (pI915XvMC->psc.offset >> 2);
+ buffer_address = pI915XvMC->psc.offset;
else
- psc->dw0.buffer_address = (pI915XvMC->psc.bus_addr >> 2);
-}
-
-static void i915_mc_one_time_state_emit(void)
-{
- i915_emit_batch(one_time_load_state_imm1, one_time_load_state_imm1_size,
- 0);
- i915_emit_batch(one_time_load_indirect, one_time_load_indirect_size, 0);
+ buffer_address = pI915XvMC->psc.bus_addr;
+ OUT_BATCH(STATE_VALID | STATE_FORCE | buffer_address);
+ OUT_BATCH(5); /* 6 - 1 */
+ ADVANCE_BATCH();
}
static void i915_mc_static_indirect_state_init(XvMCContext * context)
@@ -1085,7 +1035,6 @@ static Status i915_xvmc_mc_create_context(Display * display,
/* pre-init state buffers */
i915_mc_one_time_context_init(context);
- i915_mc_one_time_state_init(context);
i915_mc_static_indirect_state_init(context);
@@ -1106,8 +1055,6 @@ static int i915_xvmc_mc_destroy_context(Display * display,
/* Pass Control to the X server to destroy the drm_context_t */
i915_release_resource(display, context);
- free(one_time_load_state_imm1);
- free(one_time_load_indirect);
free(mc_render_load_indirect);
return Success;
}
@@ -1355,7 +1302,7 @@ static int i915_xvmc_mc_render_surface(Display * display, XvMCContext * context,
// i915_mc_invalidate_subcontext_buffers(context, BLOCK_SIS | BLOCK_DIS | BLOCK_SSB
// | BLOCK_MSB | BLOCK_PSP | BLOCK_PSC);
- i915_mc_one_time_state_emit();
+ i915_mc_one_time_state_emit(context);
i915_mc_static_indirect_state_set(context, target_surface,
picture_structure, flags,
commit 24d787335a0c319b8d9243ea1f2726575cf73b2b
Author: Daniel Vetter <daniel.vetter at ffwll.ch>
Date: Tue Mar 2 21:53:12 2010 +0100
XvMC: kill dead code in i915_xvmc.c
WIP code that hasn't changed for over two years is unlikely to
suddenly start progressing. Drop it. After all, git can easily
resurect it in cases it's needed.
Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
Reviewed-by: Carl Worth <cworth at cworth.org>
diff --git a/src/xvmc/i915_xvmc.c b/src/xvmc/i915_xvmc.c
index 84bdaf2..8063c5a 100644
--- a/src/xvmc/i915_xvmc.c
+++ b/src/xvmc/i915_xvmc.c
@@ -43,44 +43,6 @@ typedef union {
int32_t v;
} vector_t;
-#if 0
-static int findOverlap(unsigned int width, unsigned int height,
- short *dstX, short *dstY,
- short *srcX, short *srcY,
- unsigned short *areaW, unsigned short *areaH)
-{
- int w, h;
- unsigned int mWidth, mHeight;
-
- w = *areaW;
- h = *areaH;
-
- if ((*dstX >= width) || (*dstY >= height))
- return 1;
-
- if (*dstX < 0) {
- w += *dstX;
- *srcX -= *dstX;
- *dstX = 0;
- }
-
- if (*dstY < 0) {
- h += *dstY;
- *srcY -= *dstY;
- *dstY = 0;
- }
-
- if ((w <= 0) || ((h <= 0)))
- return 1;
-
- mWidth = width - *dstX;
- mHeight = height - *dstY;
- *areaW = (w <= mWidth) ? w : mWidth;
- *areaH = (h <= mHeight) ? h : mHeight;
- return 0;
-}
-#endif
-
static void i915_inst_arith(unsigned int *inst,
unsigned int op,
unsigned int dest,
@@ -841,38 +803,6 @@ static void i915_mc_mpeg_macroblock_ipicture(XvMCContext * context,
0);
}
-#if 0
-static void i915_mc_mpeg_macroblock_0mv(XvMCContext * context,
- XvMCMacroBlock * mb)
-{
- struct i915_3dmpeg_macroblock_0mv macroblock_0mv;
-
- /* 3DMPEG_MACROBLOCK(0mv) */
- memset(¯oblock_0mv, 0, sizeof(macroblock_0mv));
- macroblock_0mv.header.dw0.type = CMD_3D;
- macroblock_0mv.header.dw0.opcode = OPC_3DMPEG_MACROBLOCK;
- macroblock_0mv.header.dw0.length = 0;
- macroblock_0mv.header.dw1.mb_intra = 1; /* should be 1 */
- macroblock_0mv.header.dw1.forward = 0; /* should be 0 */
- macroblock_0mv.header.dw1.backward = 0; /* should be 0 */
- macroblock_0mv.header.dw1.h263_4mv = 0; /* should be 0 */
- macroblock_0mv.header.dw1.dct_type =
- (mb->dct_type == XVMC_DCT_TYPE_FIELD);
-
-/*
- if (!mb->coded_block_pattern)
- macroblock_0mv.header.dw1.dct_type = XVMC_DCT_TYPE_FRAME;
-*/
-
- macroblock_0mv.header.dw1.motion_type = 0; // (mb->motion_type & 0x3);
- macroblock_0mv.header.dw1.vertical_field_select = 0; // mb->motion_vertical_field_select & 0xf;
- macroblock_0mv.header.dw1.coded_block_pattern = mb->coded_block_pattern;
- macroblock_0mv.header.dw1.skipped_macroblocks = 0;
-
- intelBatchbufferData(¯oblock_0mv, sizeof(macroblock_0mv), 0);
-}
-#endif
-
static void i915_mc_mpeg_macroblock_1fbmv(XvMCContext * context,
XvMCMacroBlock * mb)
{
@@ -976,117 +906,6 @@ static void i915_mc_mpeg_macroblock_2fbmv(XvMCContext * context,
intelBatchbufferData(¯oblock_2fbmv, sizeof(macroblock_2fbmv), 0);
}
-#if 0
-static void i915_mc_invalidate_subcontext_buffers(XvMCContext * context,
- unsigned int mask)
-{
- struct i915_3dstate_load_indirect *load_indirect = NULL;
- sis_state *sis = NULL;
- dis_state *dis = NULL;
- ssb_state *ssb = NULL;
- msb_state *msb = NULL;
- psp_state *psp = NULL;
- psc_state *psc = NULL;
- i915XvMCContext *pI915XvMC = (i915XvMCContext *) context->privData;
- unsigned int size;
- void *base = NULL, *ptr = NULL;
-
- size = sizeof(*load_indirect);
- if (mask & BLOCK_SIS)
- size += sizeof(*sis);
- if (mask & BLOCK_DIS)
- size += sizeof(*dis);
- if (mask & BLOCK_SSB)
- size += sizeof(*ssb);
- if (mask & BLOCK_MSB)
- size += sizeof(*msb);
- if (mask & BLOCK_PSP)
- size += sizeof(*psp);
- if (mask & BLOCK_PSC)
- size += sizeof(*psc);
-
- if (size == sizeof(*load_indirect)) {
- XVMC_ERR("There must be at least one bit set\n");
- return;
- }
-
- /* 3DSTATE_LOAD_INDIRECT */
- base = calloc(1, size);
- load_indirect = (struct i915_3dstate_load_indirect *)base;
- load_indirect->dw0.type = CMD_3D;
- load_indirect->dw0.opcode = OPC_3DSTATE_LOAD_INDIRECT;
-
- if (pI915XvMC->deviceID == PCI_CHIP_I915_G ||
- pI915XvMC->deviceID == PCI_CHIP_I915_GM ||
- pI915XvMC->deviceID == PCI_CHIP_I945_G ||
- pI915XvMC->deviceID == PCI_CHIP_I945_GM)
- load_indirect->dw0.mem_select = 0;
- else
- load_indirect->dw0.mem_select = 1;
-
- load_indirect->dw0.block_mask = mask;
- load_indirect->dw0.length = (size >> 2) - 2;
- ptr = ++load_indirect;
-
- /* SIS */
- if (mask & BLOCK_SIS) {
- sis = (sis_state *) ptr;
- sis->dw0.valid = 0;
- sis->dw0.buffer_address = 0;
- sis->dw1.length = 0;
- ptr = ++sis;
- }
-
- /* DIS */
- if (mask & BLOCK_DIS) {
- dis = (dis_state *) ptr;
- dis->dw0.valid = 0;
- dis->dw0.reset = 0;
- dis->dw0.buffer_address = 0;
- ptr = ++dis;
- }
-
- /* SSB */
- if (mask & BLOCK_SSB) {
- ssb = (ssb_state *) ptr;
- ssb->dw0.valid = 0;
- ssb->dw0.buffer_address = 0;
- ssb->dw1.length = 0;
- ptr = ++ssb;
- }
-
- /* MSB */
- if (mask & BLOCK_MSB) {
- msb = (msb_state *) ptr;
- msb->dw0.valid = 0;
- msb->dw0.buffer_address = 0;
- msb->dw1.length = 0;
- ptr = ++msb;
- }
-
- /* PSP */
- if (mask & BLOCK_PSP) {
- psp = (psp_state *) ptr;
- psp->dw0.valid = 0;
- psp->dw0.buffer_address = 0;
- psp->dw1.length = 0;
- ptr = ++psp;
- }
-
- /* PSC */
- if (mask & BLOCK_PSC) {
- psc = (psc_state *) ptr;
- psc->dw0.valid = 0;
- psc->dw0.buffer_address = 0;
- psc->dw1.length = 0;
- ptr = ++psc;
- }
-
- intelBatchbufferData(base, size, 0);
- free(base);
-}
-#endif
-
static int i915_xvmc_map_buffers(i915XvMCContext * pI915XvMC)
{
if (drmMap(xvmc_driver->fd,
@@ -1167,444 +986,6 @@ static void i915_xvmc_unmap_buffers(i915XvMCContext * pI915XvMC)
}
}
-#if 0
-/*
- * Video post processing
- */
-static void i915_yuv2rgb_map_state_buffer(XvMCSurface * target_surface)
-{
- struct i915_3dstate_map_state *map_state;
- struct texture_map *tm;
- i915XvMCSurface *privTarget = NULL;
- i915XvMCContext *pI915XvMC = NULL;
- unsigned int w = target_surface->width, h = target_surface->height;
-
- privTarget = (i915XvMCSurface *) target_surface->privData;
- pI915XvMC = (i915XvMCContext *) privTarget->privContext;
- /* 3DSATE_MAP_STATE */
- map_state = (struct i915_3dstate_map_state *)pI915XvMC->msb.map;
- memset(map_state, 0, sizeof(*map_state));
- map_state->dw0.type = CMD_3D;
- map_state->dw0.opcode = OPC_3DSTATE_MAP_STATE;
- map_state->dw0.retain = 0;
- map_state->dw0.length = 9;
- map_state->dw1.map_mask = MAP_MAP0 | MAP_MAP1 | MAP_MAP2;
-
- /* texture map 0: V Plane */
- tm = (struct texture_map *)(++map_state);
- memset(tm, 0, sizeof(*tm));
- tm->tm0.v_ls_offset = 0;
- tm->tm0.v_ls = 0;
- tm->tm0.base_address = VOFFSET(privTarget);
- tm->tm1.tile_walk = TILEWALK_XMAJOR;
- tm->tm1.tiled_surface = 0;
- tm->tm1.utilize_fence_regs = 1;
- tm->tm1.texel_fmt = 0;
- tm->tm1.surface_fmt = 1;
- tm->tm1.width = (w >> 1) - 1;
- tm->tm1.height = (h >> 1) - 1;
- tm->tm2.depth = 0;
- tm->tm2.max_lod = 0;
- tm->tm2.cube_face = 0;
- tm->tm2.pitch = (privTarget->uvStride >> 2) - 1; /* in DWords - 1 */
-
- /* texture map 1: Y Plane */
- ++tm;
- memset(tm, 0, sizeof(*tm));
- tm->tm0.v_ls_offset = 0;
- tm->tm0.v_ls = 0;
- tm->tm0.base_address = YOFFSET(privTarget);
- tm->tm1.tile_walk = TILEWALK_XMAJOR;
- tm->tm1.tiled_surface = 0;
- tm->tm1.utilize_fence_regs = 1;
- tm->tm1.texel_fmt = 0;
- tm->tm1.surface_fmt = 1;
- tm->tm1.width = w - 1;
- tm->tm1.height = h - 1;
- tm->tm2.depth = 0;
- tm->tm2.max_lod = 0;
- tm->tm2.cube_face = 0;
- tm->tm2.pitch = (privTarget->yStride >> 2) - 1; /* in DWords - 1 */
-
- /* texture map 2: U Plane */
- ++tm;
- memset(tm, 0, sizeof(*tm));
- tm->tm0.v_ls_offset = 0;
- tm->tm0.v_ls = 0;
- tm->tm0.base_address = UOFFSET(privTarget);
- tm->tm1.tile_walk = TILEWALK_XMAJOR;
- tm->tm1.tiled_surface = 0;
- tm->tm1.utilize_fence_regs = 1;
- tm->tm1.texel_fmt = 0;
- tm->tm1.surface_fmt = 1;
- tm->tm1.width = (w >> 1) - 1;
- tm->tm1.height = (h >> 1) - 1;
- tm->tm2.depth = 0;
- tm->tm2.max_lod = 0;
- tm->tm2.cube_face = 0;
- tm->tm2.pitch = (privTarget->uvStride >> 2) - 1; /* in DWords - 1 */
-}
-#endif
-
-#if 0
-static void i915_yuv2rgb_sampler_state_buffer(XvMCSurface * surface)
-{
- struct i915_3dstate_sampler_state *sampler_state;
- struct texture_sampler *ts;
- i915XvMCSurface *privSurface = (i915XvMCSurface *) surface->privData;
- i915XvMCContext *pI915XvMC =
- (i915XvMCContext *) privSurface->privContext;
-
- /* 3DSATE_SAMPLER_STATE */
- sampler_state = (struct i915_3dstate_sampler_state *)pI915XvMC->ssb.map;
- memset(sampler_state, 0, sizeof(*sampler_state));
- sampler_state->dw0.type = CMD_3D;
- sampler_state->dw0.opcode = OPC_3DSTATE_SAMPLER_STATE;
- sampler_state->dw0.length = 9;
- sampler_state->dw1.sampler_masker =
- SAMPLER_SAMPLER0 | SAMPLER_SAMPLER1 | SAMPLER_SAMPLER2;
-
- /* Sampler 0 */
- ts = (struct texture_sampler *)(++sampler_state);
- memset(ts, 0, sizeof(*ts));
- ts->ts0.reverse_gamma = 0;
- ts->ts0.planar2packet = 1;
- ts->ts0.color_conversion = 1;
- ts->ts0.chromakey_index = 0;
- ts->ts0.base_level = 0;
- ts->ts0.mip_filter = MIPFILTER_NONE; /* NONE */
- ts->ts0.mag_filter = MAPFILTER_LINEAR; /* LINEAR */
- ts->ts0.min_filter = MAPFILTER_LINEAR; /* LINEAR */
- ts->ts0.lod_bias = 0;
- ts->ts0.shadow_enable = 0;
- ts->ts0.max_anisotropy = ANISORATIO_2;
- ts->ts0.shadow_function = PREFILTEROP_ALWAYS;
- ts->ts1.min_lod = 0; /* Maximum Mip Level */
- ts->ts1.kill_pixel = 0;
- ts->ts1.keyed_texture_filter = 0;
- ts->ts1.chromakey_enable = 0;
- ts->ts1.tcx_control = TEXCOORDMODE_CLAMP;
- ts->ts1.tcy_control = TEXCOORDMODE_CLAMP;
- ts->ts1.tcz_control = TEXCOORDMODE_CLAMP;
- ts->ts1.normalized_coor = 0;
- ts->ts1.map_index = 0;
- ts->ts1.east_deinterlacer = 0;
- ts->ts2.default_color = 0;
-
- /* Sampler 1 */
- ++ts;
- memset(ts, 0, sizeof(*ts));
- ts->ts0.reverse_gamma = 0;
- ts->ts0.planar2packet = 1;
- ts->ts0.color_conversion = 1;
- ts->ts0.chromakey_index = 0;
- ts->ts0.base_level = 0;
- ts->ts0.mip_filter = MIPFILTER_NONE; /* NONE */
- ts->ts0.mag_filter = MAPFILTER_LINEAR; /* LINEAR */
- ts->ts0.min_filter = MAPFILTER_LINEAR; /* LINEAR */
- ts->ts0.lod_bias = 0;
- ts->ts0.shadow_enable = 0;
- ts->ts0.max_anisotropy = ANISORATIO_2;
- ts->ts0.shadow_function = PREFILTEROP_ALWAYS;
- ts->ts1.min_lod = 0; /* Maximum Mip Level */
- ts->ts1.kill_pixel = 0;
- ts->ts1.keyed_texture_filter = 0;
- ts->ts1.chromakey_enable = 0;
- ts->ts1.tcx_control = TEXCOORDMODE_CLAMP;
- ts->ts1.tcy_control = TEXCOORDMODE_CLAMP;
- ts->ts1.tcz_control = TEXCOORDMODE_CLAMP;
- ts->ts1.normalized_coor = 0;
- ts->ts1.map_index = 1;
- ts->ts1.east_deinterlacer = 0;
- ts->ts2.default_color = 0;
-
- /* Sampler 2 */
- ++ts;
- memset(ts, 0, sizeof(*ts));
- ts->ts0.reverse_gamma = 0;
- ts->ts0.planar2packet = 1;
- ts->ts0.color_conversion = 1;
- ts->ts0.chromakey_index = 0;
- ts->ts0.base_level = 0;
- ts->ts0.mip_filter = MIPFILTER_NONE; /* NONE */
- ts->ts0.mag_filter = MAPFILTER_LINEAR; /* LINEAR */
- ts->ts0.min_filter = MAPFILTER_LINEAR; /* LINEAR */
- ts->ts0.lod_bias = 0;
- ts->ts0.shadow_enable = 0;
- ts->ts0.max_anisotropy = ANISORATIO_2;
- ts->ts0.shadow_function = PREFILTEROP_ALWAYS;
- ts->ts1.min_lod = 0; /* Maximum Mip Level */
- ts->ts1.kill_pixel = 0;
- ts->ts1.keyed_texture_filter = 0;
- ts->ts1.chromakey_enable = 0;
- ts->ts1.tcx_control = TEXCOORDMODE_CLAMP;
- ts->ts1.tcy_control = TEXCOORDMODE_CLAMP;
- ts->ts1.tcz_control = TEXCOORDMODE_CLAMP;
- ts->ts1.normalized_coor = 0;
- ts->ts1.map_index = 2;
- ts->ts1.east_deinterlacer = 0;
- ts->ts2.default_color = 0;
-}
-#endif
-
-#if 0
-static void i915_yuv2rgb_static_indirect_state_buffer(XvMCSurface * surface,
- unsigned int dstaddr,
- int dstpitch)
-{
- struct i915_3dstate_buffer_info *buffer_info;
- struct i915_3dstate_dest_buffer_variables *dest_buffer_variables;
- i915XvMCSurface *privSurface = (i915XvMCSurface *) surface->privData;
- i915XvMCContext *pI915XvMC =
- (i915XvMCContext *) privSurface->privContext;
-
- /* 3DSTATE_BUFFER_INFO */
- buffer_info = (struct i915_3dstate_buffer_info *)pI915XvMC->sis.map;
- memset(buffer_info, 0, sizeof(*buffer_info));
- buffer_info->dw0.type = CMD_3D;
- buffer_info->dw0.opcode = OPC_3DSTATE_BUFFER_INFO;
- buffer_info->dw0.length = 1;
- buffer_info->dw1.aux_id = 0;
- buffer_info->dw1.buffer_id = BUFFERID_COLOR_BACK;
- buffer_info->dw1.fence_regs = 1;
- buffer_info->dw1.tiled_surface = 0; /* linear */
- buffer_info->dw1.walk = TILEWALK_XMAJOR;
- buffer_info->dw1.pitch = dstpitch;
- buffer_info->dw2.base_address = dstaddr;
-
- /* 3DSTATE_DEST_BUFFER_VARIABLES */
- dest_buffer_variables =
- (struct i915_3dstate_dest_buffer_variables *)(++buffer_info);
- memset(dest_buffer_variables, 0, sizeof(*dest_buffer_variables));
- dest_buffer_variables->dw0.type = CMD_3D;
- dest_buffer_variables->dw0.opcode = OPC_3DSTATE_DEST_BUFFER_VARIABLES;
- dest_buffer_variables->dw0.length = 0;
- dest_buffer_variables->dw1.dest_v_bias = 8; /* FIXME 0x1000 .5 ??? */
- dest_buffer_variables->dw1.dest_h_bias = 8;
- dest_buffer_variables->dw1.color_fmt = COLORBUFFER_A8R8G8B8; /* FIXME */
-}
-#endif
-
-#if 0
-static void i915_yuv2rgb_pixel_shader_program_buffer(XvMCSurface * surface)
-{
- struct i915_3dstate_pixel_shader_program *pixel_shader_program;
- i915XvMCSurface *privSurface = (i915XvMCSurface *) surface->privData;
- i915XvMCContext *pI915XvMC =
- (i915XvMCContext *) privSurface->privContext;
- unsigned int *inst;
- unsigned int dest, src0, src1;
-
- /* Shader 0 */
- pixel_shader_program =
- (struct i915_3dstate_pixel_shader_program *)pI915XvMC->psp.map;
- memset(pixel_shader_program, 0, sizeof(*pixel_shader_program));
- pixel_shader_program->dw0.type = CMD_3D;
- pixel_shader_program->dw0.opcode = OPC_3DSTATE_PIXEL_SHADER_PROGRAM;
- pixel_shader_program->dw0.retain = 0;
- pixel_shader_program->dw0.length = 23;
- /* dcl t0.xy */
- inst = (unsigned int *)(++pixel_shader_program);
- i915_inst_decl(inst, REG_TYPE_T, T_TEX0, D0_CHANNEL_XY);
- /* dcl t1.xy */
- inst += 3;
- i915_inst_decl(inst, REG_TYPE_T, T_TEX1, D0_CHANNEL_XY);
- /* dcl_2D s0 */
- inst += 3;
- i915_inst_decl(inst, REG_TYPE_S, 0, D0_SAMPLE_TYPE_2D);
- /* dcl_2D s1 */
- inst += 3;
- i915_inst_decl(inst, REG_TYPE_S, 1, D0_SAMPLE_TYPE_2D);
- /* dcl_2D s2 */
- inst += 3;
- i915_inst_decl(inst, REG_TYPE_S, 2, D0_SAMPLE_TYPE_2D);
- /* texld r0 t1 s0 */
- inst += 3;
- dest = UREG(REG_TYPE_R, 0);
- src0 = UREG(REG_TYPE_T, 1); /* COORD */
- src1 = UREG(REG_TYPE_S, 0); /* SAMPLER */
- i915_inst_texld(inst, T0_TEXLD, dest, src0, src1);
- /* texld r0 t0 s1 */
- inst += 3;
- dest = UREG(REG_TYPE_R, 0);
- src0 = UREG(REG_TYPE_T, 0); /* COORD */
- src1 = UREG(REG_TYPE_S, 1); /* SAMPLER */
- i915_inst_texld(inst, T0_TEXLD, dest, src0, src1);
- /* texld oC t1 s2 */
- inst += 3;
- dest = UREG(REG_TYPE_OC, 0);
- src0 = UREG(REG_TYPE_T, 1); /* COORD */
- src1 = UREG(REG_TYPE_S, 2); /* SAMPLER */
- i915_inst_texld(inst, T0_TEXLD, dest, src0, src1);
-}
-#endif
-
-#if 0
-static void i915_yuv2rgb_proc(XvMCSurface * surface)
-{
- i915XvMCSurface *privSurface = (i915XvMCSurface *) surface->privData;
- i915XvMCContext *pI915XvMC =
- (i915XvMCContext *) privSurface->privContext;
- struct i915_3dstate_load_state_immediate_1 *load_state_immediate_1 =
- NULL;
- struct s2_dword *s2 = NULL;
- struct s3_dword *s3 = NULL;
- struct s4_dword *s4 = NULL;
- struct s5_dword *s5 = NULL;
- struct s6_dword *s6 = NULL;
- struct s7_dword *s7 = NULL;
- struct i915_3dstate_scissor_rectangle scissor_rectangle;
- struct i915_3dstate_load_indirect *load_indirect = NULL;
- sis_state *sis = NULL;
- ssb_state *ssb = NULL;
- msb_state *msb = NULL;
- psp_state *psp = NULL;
- struct i915_3dprimitive *_3dprimitive = NULL;
- struct vertex_data *vd = NULL;
- unsigned int size;
- void *base = NULL;
-
- /* 3DSTATE_LOAD_STATE_IMMEDIATE_1 */
- size = sizeof(*load_state_immediate_1) + sizeof(*s2) + sizeof(*s3) +
- sizeof(*s4) + sizeof(*s5) + sizeof(*s6) + sizeof(*s7);
- base = calloc(1, size);
- load_state_immediate_1 =
- (struct i915_3dstate_load_state_immediate_1 *)base;
- load_state_immediate_1->dw0.type = CMD_3D;
- load_state_immediate_1->dw0.opcode = OPC_3DSTATE_LOAD_STATE_IMMEDIATE_1;
- load_state_immediate_1->dw0.load_s2 = 1;
- load_state_immediate_1->dw0.load_s3 = 1;
- load_state_immediate_1->dw0.load_s4 = 1;
- load_state_immediate_1->dw0.load_s5 = 1;
- load_state_immediate_1->dw0.load_s6 = 1;
- load_state_immediate_1->dw0.load_s7 = 1;
- load_state_immediate_1->dw0.length = 5;
-
- s2 = (struct s2_dword *)(++load_state_immediate_1);
- s2->set0_texcoord_fmt = TEXCOORDFMT_2FP;
- s2->set1_texcoord_fmt = TEXCOORDFMT_2FP;
- s2->set2_texcoord_fmt = TEXCOORDFMT_NOT_PRESENT;
- s2->set3_texcoord_fmt = TEXCOORDFMT_NOT_PRESENT;
- s2->set4_texcoord_fmt = TEXCOORDFMT_NOT_PRESENT;
- s2->set5_texcoord_fmt = TEXCOORDFMT_NOT_PRESENT;
- s2->set6_texcoord_fmt = TEXCOORDFMT_NOT_PRESENT;
- s2->set7_texcoord_fmt = TEXCOORDFMT_NOT_PRESENT;
-
- s3 = (struct s3_dword *)(++s2);
- s4 = (struct s4_dword *)(++s3);
- s4->position_mask = VERTEXHAS_XY;
- s4->cull_mode = CULLMODE_NONE;
- s4->color_shade_mode = SHADEMODE_FLAT;
- s4->specular_shade_mode = SHADEMODE_FLAT;
- s4->fog_shade_mode = SHADEMODE_FLAT;
- s4->alpha_shade_mode = SHADEMODE_FLAT;
- s4->line_width = 0x2; /* FIXME: 1.0??? */
- s4->point_width = 0x1;
-
- s5 = (struct s5_dword *)(++s4);
- s6 = (struct s6_dword *)(++s5);
- s6->src_blend_factor = 1;
- s6->dest_blend_factor = 1;
- s6->color_buffer_write = 1;
-
- s7 = (struct s7_dword *)(++s6);
- intelBatchbufferData(base, size, 0);
- free(base);
-
- /* 3DSTATE_3DSTATE_SCISSOR_RECTANGLE */
- scissor_rectangle.dw0.type = CMD_3D;
- scissor_rectangle.dw0.opcode = OPC_3DSTATE_SCISSOR_RECTANGLE;
- scissor_rectangle.dw0.length = 1;
- scissor_rectangle.dw1.min_x = 0;
- scissor_rectangle.dw1.min_y = 0;
- scissor_rectangle.dw2.max_x = 2047;
- scissor_rectangle.dw2.max_y = 2047;
- intelBatchbufferData(&scissor_rectangle, sizeof(scissor_rectangle), 0);
-
- /* 3DSTATE_LOAD_INDIRECT */
- size =
- sizeof(*load_indirect) + sizeof(*sis) + sizeof(*ssb) +
- sizeof(*msb) + sizeof(*psp);
- base = calloc(1, size);
- load_indirect = (struct i915_3dstate_load_indirect *)base;
- load_indirect->dw0.type = CMD_3D;
- load_indirect->dw0.opcode = OPC_3DSTATE_LOAD_INDIRECT;
- load_indirect->dw0.mem_select = 1; /* Bearlake only */
- load_indirect->dw0.block_mask =
- BLOCK_SIS | BLOCK_SSB | BLOCK_MSB | BLOCK_PSP;
- load_indirect->dw0.length = 7;
-
- /* SIS */
- sis = (sis_state *) (++load_indirect);
- sis->dw0.valid = 1;
- sis->dw0.buffer_address = pI915XvMC->sis.offset;
- sis->dw1.length = ((sizeof(struct i915_3dstate_buffer_info) +
- sizeof(struct i915_3dstate_dest_buffer_variables))
- >> 2) - 1;
-
- /* SSB */
- ssb = (ssb_state *) (++sis);
- ssb->dw0.valid = 1;
- ssb->dw0.buffer_address = pI915XvMC->ssb.offset;
- ssb->dw1.length = ((sizeof(struct i915_3dstate_sampler_state) +
- sizeof(struct texture_sampler) * 3) >> 2) - 1;
-
- /* MSB */
- msb = (msb_state *) (++ssb);
- msb->dw0.valid = 1;
- msb->dw0.buffer_address = pI915XvMC->msb.offset;
- msb->dw1.length = ((sizeof(struct i915_3dstate_map_state) +
- sizeof(struct texture_map) * 3) >> 2) - 1;
-
- /* PSP */
- psp = (psp_state *) (++msb);
- psp->dw0.valid = 1;
- psp->dw0.buffer_address = pI915XvMC->psp.offset;
- psp->dw1.length = ((sizeof(struct i915_3dstate_pixel_shader_program) +
- sizeof(union shader_inst)) >> 2) - 1;
-
- intelBatchbufferData(base, size, 0);
- free(base);
-
- /* 3DPRIMITIVE */
- size = sizeof(*_3dprimitive) + sizeof(*vd) * 3;
- base = calloc(1, size);
- _3dprimitive = (struct i915_3dprimitive *)base;
- _3dprimitive->dw0.inline_prim.type = CMD_3D;
- _3dprimitive->dw0.inline_prim.opcode = OPC_3DPRIMITIVE;
- _3dprimitive->dw0.inline_prim.vertex_location = VERTEX_INLINE;
- _3dprimitive->dw0.inline_prim.prim = PRIM_RECTLIST;
- _3dprimitive->dw0.inline_prim.length = size - 2;
-
- vd = (struct vertex_data *)(++_3dprimitive);
- vd->x = 0; /* FIXME!!! */
- vd->x = 0; /* FIXME */
- vd->tc0.tcx = 0;
- vd->tc0.tcy = 0;
- vd->tc1.tcx = 0;
- vd->tc1.tcy = 0;
-
- ++vd;
- vd->x = 0; /* FIXME!!! */
- vd->x = 0; /* FIXME */
- vd->tc0.tcx = 0;
- vd->tc0.tcy = 0;
- vd->tc1.tcx = 0;
- vd->tc1.tcy = 0;
-
- ++vd;
- vd->x = 0; /* FIXME!!! */
- vd->x = 0; /* FIXME */
- vd->tc0.tcx = 0;
- vd->tc0.tcy = 0;
- vd->tc1.tcx = 0;
- vd->tc1.tcy = 0;
-
- intelBatchbufferData(base, size, 0);
- free(base);
-}
-#endif
-
/*
* Function: i915_release_resource
*/
@@ -2127,419 +1508,6 @@ static int i915_xvmc_mc_get_surface_status(Display * display,
return 0;
}
-/* XXX WIP code */
-#if 0
-Status XvMCHideSurface(Display * display, XvMCSurface * surface)
-{
- i915XvMCSurface *pI915Surface;
- i915XvMCContext *pI915XvMC;
- int stat = 0, ret;
-
- if (!display || !surface)
- return BadValue;
-
- if (!(pI915Surface = surface->privData))
- return XvMCBadSurface;
-
- /* Get the associated context pointer */
- if (!(pI915XvMC = pI915Surface->privContext))
- return XvMCBadSurface;
-
- XvMCSyncSurface(display, surface);
-
- /*
- Get the status of the surface, if it is not currently displayed
- we don't need to worry about it.
- */
- if ((ret = XvMCGetSurfaceStatus(display, surface, &stat)) != Success)
- return ret;
-
- if (!(stat & XVMC_DISPLAYING))
- return Success;
-
- /* FIXME: */
- return Success;
-}
-
-Status i915_xvmc_create_subpict(Display * display, XvMCContext * context,
- XvMCSubpicture * subpicture,
- unsigned short width, unsigned short height,
- int xvimage_id)
-{
- Status ret;
- i915XvMCContext *pI915XvMC;
- i915XvMCSubpicture *pI915Subpicture;
- I915XvMCCreateSurfaceRec *tmpComm = NULL;
- int priv_count;
- uint *priv_data;
-
- if (!subpicture || !context || !display)
- return BadValue;
-
- pI915XvMC = (i915XvMCContext *) context->privData;
-
- if (!pI915XvMC)
- return XvMCBadContext;
-
- subpicture->privData =
- (i915XvMCSubpicture *) malloc(sizeof(i915XvMCSubpicture));
-
- if (!subpicture->privData)
- return BadAlloc;
-
- PPTHREAD_MUTEX_LOCK();
- subpicture->context_id = context->context_id;
- subpicture->xvimage_id = xvimage_id;
- subpicture->width = width;
- subpicture->height = height;
- pI915Subpicture = (i915XvMCSubpicture *) subpicture->privData;
-
- XLockDisplay(display);
- if ((ret = _xvmc_create_subpicture(display, context, subpicture,
- &priv_count, &priv_data))) {
- XUnlockDisplay(display);
- XVMC_ERR("Unable to create XvMCSubpicture.");
- free(pI915Subpicture);
- subpicture->privData = NULL;
- PPTHREAD_MUTEX_UNLOCK();
- return ret;
- }
- XUnlockDisplay(display);
-
- if (priv_count != (sizeof(I915XvMCCreateSurfaceRec) >> 2)) {
- XVMC_ERR
- ("_xvmc_create_subpicture() returned incorrect data size!");
- XVMC_INFO("\tExpected %d, got %d",
- (int)(sizeof(I915XvMCCreateSurfaceRec) >> 2),
- priv_count);
- XLockDisplay(display);
- _xvmc_destroy_subpicture(display, subpicture);
- XUnlockDisplay(display);
- XFree(priv_data);
- free(pI915Subpicture);
- subpicture->privData = NULL;
- PPTHREAD_MUTEX_UNLOCK();
- return BadAlloc;
- }
-
- tmpComm = (I915XvMCCreateSurfaceRec *) priv_data;
- pI915Subpicture->srfNo = tmpComm->srfno;
- pI915Subpicture->srf.handle = tmpComm->srf.handle;
- pI915Subpicture->srf.offset = tmpComm->srf.offset;
- pI915Subpicture->srf.size = tmpComm->srf.size;
- XFree(priv_data);
-
- if (drmMap(pI915XvMC->fd,
- pI915Subpicture->srf.handle,
- pI915Subpicture->srf.size,
- (drmAddress *) & pI915Subpicture->srf.map) != 0) {
- XLockDisplay(display);
- _xvmc_destroy_subpicture(display, subpicture);
- XUnlockDisplay(display);
- free(pI915Subpicture);
- subpicture->privData = NULL;
- PPTHREAD_MUTEX_UNLOCK();
- return BadAlloc;
- }
-
- /* subpicture */
- subpicture->num_palette_entries = I915_SUBPIC_PALETTE_SIZE;
- subpicture->entry_bytes = 3;
- strncpy(subpicture->component_order, "YUV", 4);
-
- /* Initialize private values */
- pI915Subpicture->privContext = pI915XvMC;
- pI915Subpicture->last_render = 0;
- pI915Subpicture->last_flip = 0;
- pI915Subpicture->pitch = ((subpicture->width + 3) & ~3);
-
- switch (subpicture->xvimage_id) {
- case FOURCC_IA44:
- case FOURCC_AI44:
- break;
-
- default:
- drmUnmap(pI915Subpicture->srf.map, pI915Subpicture->srf.size);
- XLockDisplay(display);
- _xvmc_destroy_subpicture(display, subpicture);
- XUnlockDisplay(display);
- free(pI915Subpicture);
- subpicture->privData = NULL;
- PPTHREAD_MUTEX_UNLOCK();
- return BadMatch;
- }
-
- pI915XvMC->ref++;
- PPTHREAD_MUTEX_UNLOCK();
- return Success;
-}
-
-Status i915_xvmc_clear_subpict(Display * display, XvMCSubpicture * subpicture,
- short x, short y,
- unsigned short width, unsigned short height,
- unsigned int color)
-{
- i915XvMCContext *pI915XvMC;
- i915XvMCSubpicture *pI915Subpicture;
-
- if (!display || !subpicture)
- return BadValue;
-
- if (!(pI915Subpicture = subpicture->privData))
- return XvMCBadSubpicture;
-
- if (!(pI915XvMC = pI915Subpicture->privContext))
- return XvMCBadSubpicture;
-
- if ((x < 0) || (x + width) > subpicture->width)
- return BadValue;
-
- if ((y < 0) || (y + height) > subpicture->height)
- return BadValue;
-
- /* FIXME: clear the area */
-
- return Success;
-}
-
-Status i915_xvmc_composite_subpict(Display * display,
- XvMCSubpicture * subpicture, XvImage * image,
- short srcx, short srcy, unsigned short width,
- unsigned short height, short dstx,
- short dsty)
-{
- i915XvMCContext *pI915XvMC;
- i915XvMCSubpicture *pI915Subpicture;
-
- if (!display || !subpicture)
- return BadValue;
-
- if (!(pI915Subpicture = subpicture->privData))
- return XvMCBadSubpicture;
-
- if (!(pI915XvMC = pI915Subpicture->privContext))
- return XvMCBadSubpicture;
-
- if ((srcx < 0) || (srcx + width) > subpicture->width)
- return BadValue;
-
- if ((srcy < 0) || (srcy + height) > subpicture->height)
- return BadValue;
-
- if ((dstx < 0) || (dstx + width) > subpicture->width)
- return BadValue;
-
- if ((dsty < 0) || (dsty + width) > subpicture->height)
- return BadValue;
-
- if (image->id != subpicture->xvimage_id)
- return BadMatch;
-
- /* FIXME */
- return Success;
-}
-
-Status i915_xvmc_destroy_subpict(Display * display, XvMCSubpicture * subpicture)
-{
- i915XvMCSubpicture *pI915Subpicture;
- i915XvMCContext *pI915XvMC;
-
- if (!display || !subpicture)
- return BadValue;
-
- if (!(pI915Subpicture = subpicture->privData))
- return XvMCBadSubpicture;
-
- if (!(pI915XvMC = pI915Subpicture->privContext))
- return XvMCBadSubpicture;
-
- if (pI915Subpicture->last_render)
- XvMCSyncSubpicture(display, subpicture);
-
- if (pI915Subpicture->srf.map)
- drmUnmap(pI915Subpicture->srf.map, pI915Subpicture->srf.size);
-
- PPTHREAD_MUTEX_LOCK();
- XLockDisplay(display);
- _xvmc_destroy_subpicture(display, subpicture);
- XUnlockDisplay(display);
-
- free(pI915Subpicture);
- subpicture->privData = NULL;
- pI915XvMC->ref--;
- PPTHREAD_MUTEX_UNLOCK();
-
- return Success;
-}
-
-Status i915_xvmc_set_subpict_palette(Display * display,
- XvMCSubpicture * subpicture,
- unsigned char *palette)
-{
- i915XvMCSubpicture *pI915Subpicture;
- int i, j;
-
- if (!display || !subpicture)
- return BadValue;
-
- if (!(pI915Subpicture = subpicture->privData))
- return XvMCBadSubpicture;
-
- j = 0;
- for (i = 0; i < 16; i++) {
- pI915Subpicture->palette[0][i] = palette[j++];
- pI915Subpicture->palette[1][i] = palette[j++];
- pI915Subpicture->palette[2][i] = palette[j++];
- }
-
- /* FIXME: Update the subpicture with the new palette */
- return Success;
-}
-
-Status i915_xvmc_blend_subpict(Display * display, XvMCSurface * target_surface,
- XvMCSubpicture * subpicture,
- short subx, short suby,
- unsigned short subw, unsigned short subh,
- short surfx, short surfy,
- unsigned short surfw, unsigned short surfh)
-{
- i915XvMCSubpicture *pI915Subpicture;
- i915XvMCSurface *privTargetSurface;
-
- if (!display || !target_surface)
- return BadValue;
-
- if (!(privTargetSurface = target_surface->privData))
- return XvMCBadSurface;
-
- if (subpicture) {
- if (!(pI915Subpicture = subpicture->privData))
- return XvMCBadSubpicture;
-
- if ((FOURCC_AI44 != subpicture->xvimage_id) &&
- (FOURCC_IA44 != subpicture->xvimage_id))
- return XvMCBadSubpicture;
-
- privTargetSurface->privSubPic = pI915Subpicture;
- } else {
- privTargetSurface->privSubPic = NULL;
- }
-
- return Success;
-}
-
-Status i915_xvmc_blend_subpict2(Display * display,
- XvMCSurface * source_surface,
- XvMCSurface * target_surface,
- XvMCSubpicture * subpicture,
- short subx, short suby,
- unsigned short subw, unsigned short subh,
- short surfx, short surfy,
- unsigned short surfw, unsigned short surfh)
-{
- i915XvMCContext *pI915XvMC;
- i915XvMCSubpicture *pI915Subpicture;
- i915XvMCSurface *privSourceSurface;
- i915XvMCSurface *privTargetSurface;
-
- if (!display || !source_surface || !target_surface)
- return BadValue;
-
- if (!(privSourceSurface = source_surface->privData))
- return XvMCBadSurface;
-
- if (!(privTargetSurface = target_surface->privData))
- return XvMCBadSurface;
-
- if (!(pI915XvMC = privTargetSurface->privContext))
- return XvMCBadSurface;
-
- if (((surfx + surfw) > privTargetSurface->width) ||
- ((surfy + surfh) > privTargetSurface->height))
- return BadValue;
-
- if ((privSourceSurface->width != privTargetSurface->width) ||
- (privTargetSurface->height != privTargetSurface->height))
- return BadValue;
-
- if (XvMCSyncSurface(display, source_surface))
- return BadValue;
-
- /* FIXME: update Target Surface */
-
- if (subpicture) {
- if (((subx + subw) > subpicture->width) ||
- ((suby + subh) > subpicture->height))
- return BadValue;
-
- if (!(pI915Subpicture = subpicture->privData))
- return XvMCBadSubpicture;
-
- if ((FOURCC_AI44 != subpicture->xvimage_id) &&
- (FOURCC_IA44 != subpicture->xvimage_id))
- return XvMCBadSubpicture;
-
- privTargetSurface->privSubPic = pI915Subpicture;
- } else {
- privTargetSurface->privSubPic = NULL;
- }
-
- return Success;
-}
-
-Status i915_xvmc_sync_subpict(Display * display, XvMCSubpicture * subpicture)
-{
- Status ret;
- int stat = 0;
-
- if (!display || !subpicture)
- return BadValue;
-
- do {
- ret = XvMCGetSubpictureStatus(display, subpicture, &stat);
- } while (!ret && (stat & XVMC_RENDERING));
-
- return ret;
-}
-
-Status i915_xvmc_flush_subpict(Display * display, XvMCSubpicture * subpicture)
-{
- i915XvMCSubpicture *pI915Subpicture;
-
- if (!display || !subpicture)
- return BadValue;
-
- if (!(pI915Subpicture = subpicture->privData))
- return XvMCBadSubpicture;
-
- return Success;
-}
-
-Status i915_xvmc_get_subpict_status(Display * display,
- XvMCSubpicture * subpicture, int *stat)
-{
- i915XvMCSubpicture *pI915Subpicture;
- i915XvMCContext *pI915XvMC;
-
- if (!display || !subpicture || stat)
- return BadValue;
-
- *stat = 0;
-
- if (!(pI915Subpicture = subpicture->privData))
- return XvMCBadSubpicture;
-
- if (!(pI915XvMC = pI915Subpicture->privContext))
- return XvMCBadSubpicture;
-
- PPTHREAD_MUTEX_LOCK();
-
- PPTHREAD_MUTEX_UNLOCK();
- return Success;
-}
-
-#endif
-
struct _intel_xvmc_driver i915_xvmc_mc_driver = {
.type = XVMC_I915_MPEG2_MC,
.num_ctx = 0,
commit 13266b152ae35ed54984844e3282cbdf20dc2e32
Author: Daniel Vetter <daniel.vetter at ffwll.ch>
Date: Tue Mar 2 21:53:11 2010 +0100
XvMC: kill i830_memory in 965 class xvmc
Yes, this breaks binary compat of the struct passed around between
X ddx and the client libXvMC. But we always ship both, so they should
not get out of sync.
Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
Reviewed-by: Carl Worth <cworth at cworth.org>
diff --git a/src/i965_hwmc.h b/src/i965_hwmc.h
index 5bdd452..194d07f 100644
--- a/src/i965_hwmc.h
+++ b/src/i965_hwmc.h
@@ -1,14 +1,5 @@
#define I965_MC_STATIC_BUFFER_SIZE (1024*512)
#define I965_MAX_SURFACES 12
-struct _i830_memory;
-struct drm_memory_block {
- struct _i830_memory *buffer;
- drm_handle_t handle;
- drmAddress ptr;
- size_t size;
- unsigned long offset;
-};
-
struct i965_xvmc_surface {
int w, h;
unsigned int no;
@@ -18,9 +9,6 @@ struct i965_xvmc_surface {
struct i965_xvmc_context {
struct _intel_xvmc_common comm;
- struct drm_memory_block static_buffer;
- struct drm_memory_block blocks;
- struct drm_memory_block slice;
struct i965_xvmc_surface *surfaces[I965_MAX_SURFACES];
unsigned int is_g4x:1;
unsigned int is_965_q:1;
commit d39d822cf887a861b37cee92c0b59533370ded2f
Author: Daniel Vetter <daniel.vetter at ffwll.ch>
Date: Tue Mar 2 09:22:44 2010 +0100
i830_memory: hide as much of the old memory allocator as possible
The only user left of this stuff is the xvmc support.
Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
Reviewed-by: Eric Anholt <eric at anholt.net>
diff --git a/src/i830.h b/src/i830.h
index 8482ca9..46cdd6c 100644
--- a/src/i830.h
+++ b/src/i830.h
@@ -430,14 +430,8 @@ extern Bool i830_crtc_on(xf86CrtcPtr crtc);
extern int i830_crtc_to_pipe(xf86CrtcPtr crtc);
extern Bool I830AccelInit(ScreenPtr pScreen);
-i830_memory *i830_allocate_memory(ScrnInfoPtr scrn, const char *name,
- unsigned long size, unsigned long pitch,
- int flags, uint32_t tile_format);
void i830_reset_allocations(ScrnInfoPtr scrn);
-void i830_free_3d_memory(ScrnInfoPtr scrn);
-void i830_free_memory(ScrnInfoPtr scrn, i830_memory * mem);
Bool i830_allocate_2d_memory(ScrnInfoPtr scrn);
-Bool i830_allocate_3d_memory(ScrnInfoPtr scrn);
void i830_init_bufmgr(ScrnInfoPtr scrn);
#ifdef INTEL_XVMC
Bool i830_allocate_xvmc_buffer(ScrnInfoPtr scrn, const char *name,
diff --git a/src/i830_memory.c b/src/i830_memory.c
index 089667d..c6003a5 100644
--- a/src/i830_memory.c
+++ b/src/i830_memory.c
@@ -163,7 +163,7 @@ i830_check_display_stride(ScrnInfoPtr scrn, int stride, Bool tiling)
return FALSE;
}
-void i830_free_memory(ScrnInfoPtr scrn, i830_memory * mem)
+static void i830_free_memory(ScrnInfoPtr scrn, i830_memory * mem)
{
intel_screen_private *intel = intel_get_screen_private(scrn);
@@ -228,7 +228,7 @@ void i830_reset_allocations(ScrnInfoPtr scrn)
* the entire Screen lifetime. This means not using buffer objects, which
* get their offsets chosen at each EnterVT time.
*/
-i830_memory *i830_allocate_memory(ScrnInfoPtr scrn, const char *name,
+static i830_memory *i830_allocate_memory(ScrnInfoPtr scrn, const char *name,
unsigned long size, unsigned long pitch,
int flags, uint32_t tiling_mode)
{
commit 65267d4bfbf19942beab72858333c6ee3c719223
Author: Daniel Vetter <daniel.vetter at ffwll.ch>
Date: Tue Mar 2 09:22:43 2010 +0100
i830_memory: switch frontbuffer to drm_intel_bo
Yet another user of i830_memory gone for good.
Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
Reviewed-by: Eric Anholt <eric at anholt.net>
diff --git a/src/drmmode_display.c b/src/drmmode_display.c
index 5e2349e..fd31b1d 100644
--- a/src/drmmode_display.c
+++ b/src/drmmode_display.c
@@ -324,7 +324,7 @@ drmmode_set_mode_major(xf86CrtcPtr crtc, DisplayModePtr mode,
ret = drmModeAddFB(drmmode->fd,
scrn->virtualX, scrn->virtualY,
scrn->depth, scrn->bitsPerPixel,
- pitch, intel->front_buffer->bo->handle,
+ pitch, intel->front_buffer->handle,
&drmmode->fb_id);
if (ret < 0) {
ErrorF("failed to add fb\n");
@@ -1240,7 +1240,7 @@ drmmode_xf86crtc_resize (ScrnInfoPtr scrn, int width, int height)
drmmode_crtc = xf86_config->crtc[0]->driver_private;
drmmode_ptr drmmode = drmmode_crtc->drmmode;
intel_screen_private *intel = intel_get_screen_private(scrn);
- i830_memory *old_front = NULL;
+ drm_intel_bo *old_front = NULL;
Bool ret;
ScreenPtr screen = screenInfo.screens[scrn->scrnIndex];
uint32_t old_fb_id;
@@ -1269,12 +1269,12 @@ drmmode_xf86crtc_resize (ScrnInfoPtr scrn, int width, int height)
ret = drmModeAddFB(drmmode->fd, width, height, scrn->depth,
scrn->bitsPerPixel, pitch * intel->cpp,
- intel->front_buffer->bo->handle,
+ intel->front_buffer->handle,
&drmmode->fb_id);
if (ret)
goto fail;
- i830_set_pixmap_bo(screen->GetScreenPixmap(screen), intel->front_buffer->bo);
+ i830_set_pixmap_bo(screen->GetScreenPixmap(screen), intel->front_buffer);
screen->ModifyPixmapHeader(screen->GetScreenPixmap(screen),
width, height, -1, -1, pitch * intel->cpp, NULL);
@@ -1292,13 +1292,13 @@ drmmode_xf86crtc_resize (ScrnInfoPtr scrn, int width, int height)
if (old_fb_id)
drmModeRmFB(drmmode->fd, old_fb_id);
if (old_front)
- i830_free_memory(scrn, old_front);
+ drm_intel_bo_unreference(old_front);
return TRUE;
fail:
if (intel->front_buffer)
- i830_free_memory(scrn, intel->front_buffer);
+ drm_intel_bo_unreference(intel->front_buffer);
intel->front_buffer = old_front;
scrn->virtualX = old_width;
scrn->virtualY = old_height;
@@ -1361,7 +1361,7 @@ drmmode_do_pageflip(ScreenPtr screen, dri_bo *new_front, dri_bo *old_front,
dri_bo_unpin(new_front);
scrn->fbOffset = new_front->offset;
- intel->front_buffer->bo = new_front;
+ intel->front_buffer = new_front;
drmmode->old_fb_id = old_fb_id;
return TRUE;
diff --git a/src/i830.h b/src/i830.h
index 6030dfc..8482ca9 100644
--- a/src/i830.h
+++ b/src/i830.h
@@ -236,7 +236,7 @@ typedef struct intel_screen_private {
/** Linked list of buffer object memory allocations */
i830_memory *bo_list;
- i830_memory *front_buffer;
+ drm_intel_bo *front_buffer;
/* One big buffer for all cursors for kernels that support this */
drm_intel_bo *cursor_mem_argb[2];
@@ -457,7 +457,7 @@ unsigned long i830_get_fence_pitch(intel_screen_private *intel, unsigned long pi
uint32_t tiling_mode);
void i830_set_gem_max_sizes(ScrnInfoPtr scrn);
-i830_memory *i830_allocate_framebuffer(ScrnInfoPtr scrn);
+drm_intel_bo *i830_allocate_framebuffer(ScrnInfoPtr scrn);
/* i830_render.c */
Bool i830_check_composite(int op, PicturePtr sourcec, PicturePtr mask,
diff --git a/src/i830_driver.c b/src/i830_driver.c
index 733f409..99db7c6 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -1199,7 +1199,7 @@ I830ScreenInit(int scrnIndex, ScreenPtr screen, int argc, char **argv)
* set the initial framebuffer pixmap to point at
* it
*/
- scrn->fbOffset = intel->front_buffer->bo->offset;
+ scrn->fbOffset = intel->front_buffer->offset;
DPRINTF(PFX, "assert( if(!fbScreenInit(screen, ...) )\n");
if (!fbScreenInit(screen, NULL,
@@ -1444,7 +1444,7 @@ static Bool I830CloseScreen(int scrnIndex, ScreenPtr screen)
if (intel->front_buffer) {
i830_set_pixmap_bo(screen->GetScreenPixmap(screen), NULL);
drmmode_closefb(scrn);
- i830_free_memory(scrn, intel->front_buffer);
+ drm_intel_bo_unreference(intel->front_buffer);
intel->front_buffer = NULL;
}
diff --git a/src/i830_memory.c b/src/i830_memory.c
index 309656a..089667d 100644
--- a/src/i830_memory.c
+++ b/src/i830_memory.c
@@ -208,6 +208,7 @@ void i830_reset_allocations(ScrnInfoPtr scrn)
intel->cursor_mem_argb[p] = NULL;
}
+ drm_intel_bo_unreference(intel->front_buffer);
intel->front_buffer = NULL;
}
@@ -336,14 +337,14 @@ static Bool IsTileable(ScrnInfoPtr scrn, int pitch)
* Used once for each X screen, so once with RandR 1.2 and twice with classic
* dualhead.
*/
-i830_memory *i830_allocate_framebuffer(ScrnInfoPtr scrn)
+drm_intel_bo *i830_allocate_framebuffer(ScrnInfoPtr scrn)
{
intel_screen_private *intel = intel_get_screen_private(scrn);
unsigned int pitch = scrn->displayWidth * intel->cpp;
long size, fb_height;
- int flags;
- i830_memory *front_buffer = NULL;
- uint32_t tiling_mode;
+ int flags, ret;
+ drm_intel_bo *front_buffer = NULL;
+ uint32_t tiling_mode, requested_tiling_mode;
flags = ALLOW_SHARING | DISABLE_REUSE;
@@ -367,8 +368,13 @@ i830_memory *i830_allocate_framebuffer(ScrnInfoPtr scrn)
return NULL;
}
- front_buffer = i830_allocate_memory(scrn, "front buffer", size,
- pitch, flags, tiling_mode);
+ if (tiling_mode != I915_TILING_NONE) {
+ /* round to size necessary for the fence register to work */
+ size = i830_get_fence_size(intel, size);
+ }
+
+ front_buffer = drm_intel_bo_alloc(intel->bufmgr, "front buffer",
+ size, GTT_PAGE_SIZE);
if (front_buffer == NULL) {
xf86DrvMsg(scrn->scrnIndex, X_ERROR,
@@ -376,6 +382,16 @@ i830_memory *i830_allocate_framebuffer(ScrnInfoPtr scrn)
return NULL;
}
+ requested_tiling_mode = tiling_mode;
+ ret = drm_intel_bo_set_tiling(front_buffer, &tiling_mode, pitch);
+ if (ret != 0 || tiling_mode != requested_tiling_mode) {
+ xf86DrvMsg(scrn->scrnIndex, X_ERROR,
+ "Failed to set tiling on frontbuffer: %s\n",
+ ret == 0 ? "rejected by kernel" : strerror(-ret));
+ }
+
+ drm_intel_bo_disable_reuse(front_buffer);
+
i830_set_gem_max_sizes(scrn);
return front_buffer;
@@ -438,7 +454,7 @@ Bool i830_reinit_memory(ScrnInfoPtr scrn)
i830_set_gem_max_sizes(scrn);
if (intel->front_buffer)
- scrn->fbOffset = intel->front_buffer->bo->offset;
+ scrn->fbOffset = intel->front_buffer->offset;
return TRUE;
}
diff --git a/src/i830_uxa.c b/src/i830_uxa.c
index 50835db..9904311 100644
--- a/src/i830_uxa.c
+++ b/src/i830_uxa.c
@@ -616,7 +616,7 @@ static void i830_uxa_finish_access(PixmapPtr pixmap)
ScrnInfoPtr scrn = xf86Screens[screen->myNum];
intel_screen_private *intel = intel_get_screen_private(scrn);
- if (bo == intel->front_buffer->bo)
+ if (bo == intel->front_buffer)
intel->need_flush = TRUE;
if (bo->size > intel->max_gtt_map_size)
@@ -791,7 +791,7 @@ void i830_uxa_block_handler(ScreenPtr screen)
intel_screen_private *intel = intel_get_screen_private(scrn);
if (intel->need_flush) {
- dri_bo_wait_rendering(intel->front_buffer->bo);
+ dri_bo_wait_rendering(intel->front_buffer);
intel->need_flush = FALSE;
}
}
@@ -900,7 +900,7 @@ void i830_uxa_create_screen_resources(ScreenPtr screen)
{
ScrnInfoPtr scrn = xf86Screens[screen->myNum];
intel_screen_private *intel = intel_get_screen_private(scrn);
- dri_bo *bo = intel->front_buffer->bo;
+ dri_bo *bo = intel->front_buffer;
if (bo != NULL) {
PixmapPtr pixmap = screen->GetScreenPixmap(screen);
commit 06f147dc04629a8a1534703be570e7f25e41cdd9
Author: Daniel Vetter <daniel.vetter at ffwll.ch>
Date: Tue Mar 2 09:22:42 2010 +0100
i830_memory: switch cursors to drm_intel_bo
Minus one user of i830_memory, some more to go.
Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
Reviewed-by: Eric Anholt <eric at anholt.net>
diff --git a/src/i830.h b/src/i830.h
index f531786..6030dfc 100644
--- a/src/i830.h
+++ b/src/i830.h
@@ -238,7 +238,7 @@ typedef struct intel_screen_private {
i830_memory *front_buffer;
/* One big buffer for all cursors for kernels that support this */
- i830_memory *cursor_mem_argb[2];
+ drm_intel_bo *cursor_mem_argb[2];
dri_bufmgr *bufmgr;
diff --git a/src/i830_memory.c b/src/i830_memory.c
index 97ba500..309656a 100644
--- a/src/i830_memory.c
+++ b/src/i830_memory.c
@@ -203,8 +203,10 @@ void i830_reset_allocations(ScrnInfoPtr scrn)
/* Null out the pointers for all the allocations we just freed. This is
* kind of gross, but at least it's just one place now.
*/
- for (p = 0; p < 2; p++)
+ for (p = 0; p < 2; p++) {
+ drm_intel_bo_unreference(intel->cursor_mem_argb[p]);
intel->cursor_mem_argb[p] = NULL;
+ }
intel->front_buffer = NULL;
}
@@ -385,32 +387,27 @@ static Bool i830_allocate_cursor_buffers(ScrnInfoPtr scrn)
xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(scrn);
int i;
- /*
- * Allocate four separate buffers when the kernel doesn't support
- * large allocations as on Linux. If any of these fail, just
- * bail back to software cursors everywhere
- */
for (i = 0; i < xf86_config->num_crtc; i++) {
intel->cursor_mem_argb[i] =
- i830_allocate_memory(scrn, "ARGB cursor",
- HWCURSOR_SIZE_ARGB, PITCH_NONE,
- DISABLE_REUSE, I915_TILING_NONE);
+ drm_intel_bo_alloc(intel->bufmgr, "ARGB cursor",
+ HWCURSOR_SIZE_ARGB, GTT_PAGE_SIZE);
+
if (!intel->cursor_mem_argb[i])
return FALSE;
+ drm_intel_bo_disable_reuse(intel->cursor_mem_argb[i]);
}
return TRUE;
}
/*
* Allocate memory for 2D operation. This includes the (front) framebuffer,
- * ring buffer, scratch memory, HW cursor.
+ * and HW cursor.
*/
Bool i830_allocate_2d_memory(ScrnInfoPtr scrn)
{
intel_screen_private *intel = intel_get_screen_private(scrn);
- /* Next, allocate other fixed-size allocations we have. */
if (!i830_allocate_cursor_buffers(scrn)) {
xf86DrvMsg(scrn->scrnIndex, X_ERROR,
"Failed to allocate HW cursor space.\n");
@@ -436,7 +433,7 @@ Bool i830_reinit_memory(ScrnInfoPtr scrn)
for (i = 0; i < xf86_config->num_crtc; i++)
drmmode_crtc_set_cursor_bo(xf86_config->crtc[i],
- intel->cursor_mem_argb[i]->bo);
+ intel->cursor_mem_argb[i]);
i830_set_gem_max_sizes(scrn);
commit 23d12e3b088f38d25e83d6501d553d98be442d49
Author: Daniel Vetter <daniel.vetter at ffwll.ch>
Date: Tue Mar 2 09:22:41 2010 +0100
i830_memory: kill field "pitch"
Totally unused.
Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
Reviewed-by: Eric Anholt <eric at anholt.net>
diff --git a/src/i830.h b/src/i830.h
index de85f0d..f531786 100644
--- a/src/i830.h
+++ b/src/i830.h
@@ -179,9 +179,6 @@ typedef struct _I830OutputRec I830OutputRec, *I830OutputPtr;
/** Record of a linear allocation in the aperture. */
typedef struct _i830_memory i830_memory;
struct _i830_memory {
- /** Pitch value in bytes for tiled surfaces */
- unsigned int pitch;
-
/** Description of the allocation, for logging */
char *name;
diff --git a/src/i830_memory.c b/src/i830_memory.c
index 434ec38..97ba500 100644
--- a/src/i830_memory.c
+++ b/src/i830_memory.c
@@ -275,8 +275,6 @@ i830_memory *i830_allocate_memory(ScrnInfoPtr scrn, const char *name,
return NULL;
}
- mem->pitch = pitch;
-
ret = drm_intel_bo_set_tiling(mem->bo, &tiling_mode, pitch);
if (ret != 0 || tiling_mode != requested_tiling_mode) {
xf86DrvMsg(scrn->scrnIndex, X_ERROR,
commit 2fb8feeb56fae364380ffd91749eeb69fb461cff
Author: Daniel Vetter <daniel.vetter at ffwll.ch>
Date: Tue Mar 2 09:22:40 2010 +0100
i830_memory: rip out field "size"
Use the one in the drm bo instead.
Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
Reviewed-by: Eric Anholt <eric at anholt.net>
diff --git a/src/i830.h b/src/i830.h
index 5ef3425..de85f0d 100644
--- a/src/i830.h
+++ b/src/i830.h
@@ -179,13 +179,6 @@ typedef struct _I830OutputRec I830OutputRec, *I830OutputPtr;
/** Record of a linear allocation in the aperture. */
typedef struct _i830_memory i830_memory;
struct _i830_memory {
- /**
- * Requested size of the allocation: doesn't count padding.
- *
- * Any bound memory will cover offset to (offset + size).
- */
- unsigned long size;
-
/** Pitch value in bytes for tiled surfaces */
unsigned int pitch;
diff --git a/src/i830_hwmc.c b/src/i830_hwmc.c
index 184c3aa..e60bbb2 100644
--- a/src/i830_hwmc.c
+++ b/src/i830_hwmc.c
@@ -153,7 +153,7 @@ Bool intel_xvmc_init_batch(ScrnInfoPtr scrn)
if (drmAddMap(intel->drmSubFD,
(drm_handle_t) (xvmc_driver->batch->bo->offset +
intel->LinearAddr),
- xvmc_driver->batch->size, DRM_AGP, 0,
+ xvmc_driver->batch->bo->size, DRM_AGP, 0,
&xvmc_driver->batch_handle) < 0) {
xf86DrvMsg(scrn->scrnIndex, X_ERROR,
"[drm] drmAddMap(batchbuffer_handle) failed!\n");
diff --git a/src/i830_memory.c b/src/i830_memory.c
index 8d0d1d4..434ec38 100644
--- a/src/i830_memory.c
+++ b/src/i830_memory.c
@@ -275,7 +275,6 @@ i830_memory *i830_allocate_memory(ScrnInfoPtr scrn, const char *name,
return NULL;
}
- mem->size = size;
mem->pitch = pitch;
ret = drm_intel_bo_set_tiling(mem->bo, &tiling_mode, pitch);
diff --git a/src/i915_hwmc.c b/src/i915_hwmc.c
index 9721eba..4395cdc 100644
--- a/src/i915_hwmc.c
+++ b/src/i915_hwmc.c
@@ -214,7 +214,7 @@ static Bool i915_map_xvmc_buffers(ScrnInfoPtr scrn,
if (drmAddMap(intel->drmSubFD,
(drm_handle_t) (ctxpriv->mcStaticIndirectState->bo->offset +
intel->LinearAddr),
- ctxpriv->mcStaticIndirectState->size, DRM_AGP, 0,
+ ctxpriv->mcStaticIndirectState->bo->size, DRM_AGP, 0,
(drmAddress) & ctxpriv->sis_handle) < 0) {
xf86DrvMsg(scrn->scrnIndex, X_ERROR,
"[drm] drmAddMap(sis_handle) failed!\n");
@@ -224,7 +224,7 @@ static Bool i915_map_xvmc_buffers(ScrnInfoPtr scrn,
if (drmAddMap(intel->drmSubFD,
(drm_handle_t) (ctxpriv->mcSamplerState->bo->offset +
intel->LinearAddr),
- ctxpriv->mcSamplerState->size, DRM_AGP, 0,
+ ctxpriv->mcSamplerState->bo->size, DRM_AGP, 0,
(drmAddress) & ctxpriv->ssb_handle) < 0) {
xf86DrvMsg(scrn->scrnIndex, X_ERROR,
"[drm] drmAddMap(ssb_handle) failed!\n");
@@ -234,7 +234,7 @@ static Bool i915_map_xvmc_buffers(ScrnInfoPtr scrn,
if (drmAddMap(intel->drmSubFD,
(drm_handle_t) (ctxpriv->mcMapState->bo->offset +
intel->LinearAddr),
- ctxpriv->mcMapState->size, DRM_AGP, 0,
+ ctxpriv->mcMapState->bo->size, DRM_AGP, 0,
(drmAddress) & ctxpriv->msb_handle) < 0) {
xf86DrvMsg(scrn->scrnIndex, X_ERROR,
"[drm] drmAddMap(msb_handle) failed!\n");
@@ -244,7 +244,7 @@ static Bool i915_map_xvmc_buffers(ScrnInfoPtr scrn,
if (drmAddMap(intel->drmSubFD,
(drm_handle_t) (ctxpriv->mcPixelShaderProgram->bo->offset +
intel->LinearAddr),
- ctxpriv->mcPixelShaderProgram->size, DRM_AGP, 0,
+ ctxpriv->mcPixelShaderProgram->bo->size, DRM_AGP, 0,
(drmAddress) & ctxpriv->psp_handle) < 0) {
xf86DrvMsg(scrn->scrnIndex, X_ERROR,
"[drm] drmAddMap(psp_handle) failed!\n");
@@ -254,7 +254,7 @@ static Bool i915_map_xvmc_buffers(ScrnInfoPtr scrn,
if (drmAddMap(intel->drmSubFD,
(drm_handle_t) (ctxpriv->mcPixelShaderConstants->bo->offset +
intel->LinearAddr),
- ctxpriv->mcPixelShaderConstants->size, DRM_AGP, 0,
+ ctxpriv->mcPixelShaderConstants->bo->size, DRM_AGP, 0,
(drmAddress) & ctxpriv->psc_handle) < 0) {
xf86DrvMsg(scrn->scrnIndex, X_ERROR,
"[drm] drmAddMap(psc_handle) failed!\n");
@@ -264,7 +264,7 @@ static Bool i915_map_xvmc_buffers(ScrnInfoPtr scrn,
if (drmAddMap(intel->drmSubFD,
(drm_handle_t) (ctxpriv->mcCorrdata->bo->offset +
intel->LinearAddr),
- ctxpriv->mcCorrdata->size, DRM_AGP, 0,
+ ctxpriv->mcCorrdata->bo->size, DRM_AGP, 0,
(drmAddress) & ctxpriv->corrdata_handle) < 0) {
xf86DrvMsg(scrn->scrnIndex, X_ERROR,
"[drm] drmAddMap(corrdata_handle) failed!\n");
@@ -486,29 +486,29 @@ static int i915_xvmc_create_context(ScrnInfoPtr scrn, XvMCContextPtr pContext,
/* common context items */
contextRec->comm.type = xvmc_driver->flag;
contextRec->comm.batchbuffer.offset = xvmc_driver->batch->bo->offset;
- contextRec->comm.batchbuffer.size = xvmc_driver->batch->size;
+ contextRec->comm.batchbuffer.size = xvmc_driver->batch->bo->size;
contextRec->comm.batchbuffer.handle = xvmc_driver->batch_handle;
/* i915 private context */
contextRec->ctxno = i;
contextRec->sis.handle = ctxpriv->sis_handle;
contextRec->sis.offset = ctxpriv->mcStaticIndirectState->bo->offset;
- contextRec->sis.size = ctxpriv->mcStaticIndirectState->size;
+ contextRec->sis.size = ctxpriv->mcStaticIndirectState->bo->size;
contextRec->ssb.handle = ctxpriv->ssb_handle;
contextRec->ssb.offset = ctxpriv->mcSamplerState->bo->offset;
- contextRec->ssb.size = ctxpriv->mcSamplerState->size;
+ contextRec->ssb.size = ctxpriv->mcSamplerState->bo->size;
contextRec->msb.handle = ctxpriv->msb_handle;
contextRec->msb.offset = ctxpriv->mcMapState->bo->offset;
- contextRec->msb.size = ctxpriv->mcMapState->size;
+ contextRec->msb.size = ctxpriv->mcMapState->bo->size;
contextRec->psp.handle = ctxpriv->psp_handle;
contextRec->psp.offset = ctxpriv->mcPixelShaderProgram->bo->offset;
- contextRec->psp.size = ctxpriv->mcPixelShaderProgram->size;
+ contextRec->psp.size = ctxpriv->mcPixelShaderProgram->bo->size;
contextRec->psc.handle = ctxpriv->psc_handle;
contextRec->psc.offset = ctxpriv->mcPixelShaderConstants->bo->offset;
- contextRec->psc.size = ctxpriv->mcPixelShaderConstants->size;
+ contextRec->psc.size = ctxpriv->mcPixelShaderConstants->bo->size;
contextRec->corrdata.handle = ctxpriv->corrdata_handle;
contextRec->corrdata.offset = ctxpriv->mcCorrdata->bo->offset;
- contextRec->corrdata.size = ctxpriv->mcCorrdata->size;
+ contextRec->corrdata.size = ctxpriv->mcCorrdata->bo->size;
contextRec->deviceID = DEVICE_ID(intel->PciInfo);
/* XXX: KMS */
@@ -603,7 +603,7 @@ static int i915_xvmc_create_surface(ScrnInfoPtr scrn, XvMCSurfacePtr pSurf,
if (drmAddMap(intel->drmSubFD,
(drm_handle_t) (sfpriv->surface->bo->offset +
- intel->LinearAddr), sfpriv->surface->size,
+ intel->LinearAddr), sfpriv->surface->bo->size,
DRM_AGP, 0, (drmAddress) & sfpriv->surface_handle) < 0) {
xf86DrvMsg(scrn->scrnIndex, X_ERROR,
"[drm] drmAddMap(surface_handle) failed!\n");
@@ -618,7 +618,7 @@ static int i915_xvmc_create_surface(ScrnInfoPtr scrn, XvMCSurfacePtr pSurf,
surfaceRec->srfno = srfno;
surfaceRec->srf.handle = sfpriv->surface_handle;
surfaceRec->srf.offset = sfpriv->surface->bo->offset;
- surfaceRec->srf.size = sfpriv->surface->size;
+ surfaceRec->srf.size = sfpriv->surface->bo->size;
pXvMC->surfaces[srfno] = pSurf->surface_id;
pXvMC->sfprivs[srfno] = sfpriv;
@@ -692,7 +692,7 @@ static int i915_xvmc_create_subpict(ScrnInfoPtr scrn, XvMCSubpicturePtr pSubp,
if (drmAddMap(intel->drmSubFD,
(drm_handle_t) (sfpriv->surface->bo->offset +
- intel->LinearAddr), sfpriv->surface->size,
+ intel->LinearAddr), sfpriv->surface->bo->size,
DRM_AGP, 0, (drmAddress) & sfpriv->surface_handle) < 0) {
xf86DrvMsg(scrn->scrnIndex, X_ERROR,
"[drm] drmAddMap(surface_handle) failed!\n");
@@ -707,7 +707,7 @@ static int i915_xvmc_create_subpict(ScrnInfoPtr scrn, XvMCSubpicturePtr pSubp,
surfaceRec->srfno = srfno;
surfaceRec->srf.handle = sfpriv->surface_handle;
surfaceRec->srf.offset = sfpriv->surface->bo->offset;
- surfaceRec->srf.size = sfpriv->surface->size;
+ surfaceRec->srf.size = sfpriv->surface->bo->size;
pXvMC->sfprivs[srfno] = sfpriv;
pXvMC->surfaces[srfno] = pSubp->subpicture_id;
commit 4d4d763b3d96e2cac99a0b7b03ad9bcaf4465c61
Author: Daniel Vetter <daniel.vetter at ffwll.ch>
Date: Tue Mar 2 09:22:39 2010 +0100
i830_memory: kill field "tiling_mode"
Totally unused.
Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
Reviewed-by: Eric Anholt <eric at anholt.net>
diff --git a/src/i830.h b/src/i830.h
index 8449dc6..5ef3425 100644
--- a/src/i830.h
+++ b/src/i830.h
@@ -186,7 +186,6 @@ struct _i830_memory {
*/
unsigned long size;
- uint32_t tiling_mode;
/** Pitch value in bytes for tiled surfaces */
unsigned int pitch;
diff --git a/src/i830_memory.c b/src/i830_memory.c
index f97efc9..8d0d1d4 100644
--- a/src/i830_memory.c
+++ b/src/i830_memory.c
@@ -284,7 +284,6 @@ i830_memory *i830_allocate_memory(ScrnInfoPtr scrn, const char *name,
"Failed to set tiling on %s: %s\n", mem->name,
ret == 0 ? "rejected by kernel" : strerror(-ret));
}
- mem->tiling_mode = tiling_mode;
if (flags & DISABLE_REUSE)
drm_intel_bo_disable_reuse(mem->bo);
commit d0800d098739d5e8ea94be9c5ed2f7a8a86c06dc
Author: Daniel Vetter <daniel.vetter at ffwll.ch>
Date: Tue Mar 2 09:22:38 2010 +0100
i830_memory: no memory allocations without a bo!
Kill the corresponding !bo path in i830_free_memory.
Also kill another remnant of the pre-kms era in the same file, while I
was looking at the code.
Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
Reviewed-by: Eric Anholt <eric at anholt.net>
diff --git a/src/i830_memory.c b/src/i830_memory.c
index 2c00d43..f97efc9 100644
--- a/src/i830_memory.c
+++ b/src/i830_memory.c
@@ -87,9 +87,6 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#include "i810_reg.h"
#include "i915_drm.h"
-/* Our hardware status area is just a single page */
-#define HWSTATUS_PAGE_SIZE GTT_PAGE_SIZE
-
/**
* Returns the fence size for a tiled area of the given size.
*/
@@ -168,34 +165,27 @@ i830_check_display_stride(ScrnInfoPtr scrn, int stride, Bool tiling)
void i830_free_memory(ScrnInfoPtr scrn, i830_memory * mem)
{
+ intel_screen_private *intel = intel_get_screen_private(scrn);
+
if (mem == NULL)
return;
- if (mem->bo != NULL) {
- intel_screen_private *intel = intel_get_screen_private(scrn);
- dri_bo_unreference(mem->bo);
- if (intel->bo_list == mem) {
- intel->bo_list = mem->next;
- if (mem->next)
- mem->next->prev = NULL;
- } else {
- if (mem->prev)
- mem->prev->next = mem->next;
- if (mem->next)
- mem->next->prev = mem->prev;
- }
- xfree(mem->name);
- xfree(mem);
- return;
- }
- /* Disconnect from the list of allocations */
- if (mem->prev != NULL)
- mem->prev->next = mem->next;
- if (mem->next != NULL)
- mem->next->prev = mem->prev;
+ assert(mem->bo != NULL);
+ dri_bo_unreference(mem->bo);
+ if (intel->bo_list == mem) {
+ intel->bo_list = mem->next;
+ if (mem->next)
+ mem->next->prev = NULL;
+ } else {
+ if (mem->prev)
+ mem->prev->next = mem->next;
+ if (mem->next)
+ mem->next->prev = mem->prev;
+ }
xfree(mem->name);
xfree(mem);
+ return;
}
/* Resets the state of the aperture allocator, freeing all memory that had
commit 086c0e25cac1d3dd0a37def8b5cb82c1c6279edf
Author: Daniel Vetter <daniel.vetter at ffwll.ch>
Date: Tue Mar 2 09:22:37 2010 +0100
i830_memory: rename i830_bind_all_memory to reflect code reality
It doesn't bind anything anymore, but does a few random things.
Give it a hopefully vague enough name to cover all cases ;)
Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
Reviewed-by: Eric Anholt <eric at anholt.net>
diff --git a/src/i830.h b/src/i830.h
index 45b6028..8449dc6 100644
--- a/src/i830.h
+++ b/src/i830.h
@@ -462,7 +462,7 @@ Bool i830_tiled_width(intel_screen_private *intel, int *width, int cpp);
int i830_pad_drawable_width(int width, int cpp);
/* i830_memory.c */
-Bool i830_bind_all_memory(ScrnInfoPtr scrn);
+Bool i830_reinit_memory(ScrnInfoPtr scrn);
unsigned long i830_get_fence_size(intel_screen_private *intel, unsigned long size);
unsigned long i830_get_fence_pitch(intel_screen_private *intel, unsigned long pitch,
uint32_t tiling_mode);
diff --git a/src/i830_driver.c b/src/i830_driver.c
index 4b2e617..733f409 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -1403,7 +1403,7 @@ static Bool I830EnterVT(int scrnIndex, int flags)
}
}
- if (!i830_bind_all_memory(scrn))
+ if (!i830_reinit_memory(scrn))
return FALSE;
intel_batch_init(scrn);
diff --git a/src/i830_memory.c b/src/i830_memory.c
index 0d7ae43..2c00d43 100644
--- a/src/i830_memory.c
+++ b/src/i830_memory.c
@@ -439,13 +439,10 @@ Bool i830_allocate_2d_memory(ScrnInfoPtr scrn)
}
/**
- * Called at EnterVT to grab the AGP GART and bind our allocations.
- *
- * In zaphod mode, this will walk the list trying to bind twice, since each
- * intel points to the same allocation list, but the bind_memory will just
- * no-op then.
+ * Called at EnterVT to reinit memory related stuff. Also reinits the drmmode
+ * cursors.
*/
-Bool i830_bind_all_memory(ScrnInfoPtr scrn)
+Bool i830_reinit_memory(ScrnInfoPtr scrn)
{
intel_screen_private *intel = intel_get_screen_private(scrn);
xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(scrn);
commit 2a989aa057cee74154419fd0a4911ba1e95582cf
Author: Daniel Vetter <daniel.vetter at ffwll.ch>
Date: Tue Mar 2 09:22:36 2010 +0100
i830_memory: rip out the old video memory allocator
Besides the debug stuff the went away in the previous patch,
this stuff was totally unused ...
Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
Reviewed-by: Eric Anholt <eric at anholt.net>
diff --git a/src/i830.h b/src/i830.h
index 5789976..45b6028 100644
--- a/src/i830.h
+++ b/src/i830.h
@@ -244,11 +244,6 @@ typedef struct intel_screen_private {
long FbMapSize;
long GTTMapSize;
- /**
- * Linked list of video memory allocations. The head and tail are
- * dummy entries that bound the allocation area.
- */
- i830_memory *memory_list;
/** Linked list of buffer object memory allocations */
i830_memory *bo_list;
@@ -446,8 +441,6 @@ extern Bool i830_crtc_on(xf86CrtcPtr crtc);
extern int i830_crtc_to_pipe(xf86CrtcPtr crtc);
extern Bool I830AccelInit(ScreenPtr pScreen);
-Bool i830_allocator_init(ScrnInfoPtr scrn, unsigned long size);
-void i830_allocator_fini(ScrnInfoPtr scrn);
i830_memory *i830_allocate_memory(ScrnInfoPtr scrn, const char *name,
unsigned long size, unsigned long pitch,
int flags, uint32_t tile_format);
diff --git a/src/i830_driver.c b/src/i830_driver.c
index 14d4432..4b2e617 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -1016,13 +1016,6 @@ static Bool i830_memory_init(ScrnInfoPtr scrn)
Bool tiled = FALSE;
tiled = i830_tiled_width(intel, &scrn->displayWidth, intel->cpp);
- /* Set up our video memory allocator for the chosen videoRam */
- if (!i830_allocator_init(scrn, scrn->videoRam * KB(1))) {
- xf86DrvMsg(scrn->scrnIndex, X_ERROR,
- "Couldn't initialize video memory allocator\n");
- PreInitCleanup(scrn);
- return FALSE;
- }
xf86DrvMsg(scrn->scrnIndex,
intel->pEnt->device->videoRam ? X_CONFIG : X_DEFAULT,
@@ -1457,7 +1450,8 @@ static Bool I830CloseScreen(int scrnIndex, ScreenPtr screen)
xf86_cursors_fini(screen);
- i830_allocator_fini(scrn);
+ /* Free most of the allocations */
+ i830_reset_allocations(scrn);
i965_free_video(scrn);
diff --git a/src/i830_memory.c b/src/i830_memory.c
index 4202aa5..0d7ae43 100644
--- a/src/i830_memory.c
+++ b/src/i830_memory.c
@@ -206,13 +206,6 @@ void i830_reset_allocations(ScrnInfoPtr scrn)
intel_screen_private *intel = intel_get_screen_private(scrn);
int p;
- /* While there is any memory between the start and end markers, free it. */
- while (intel->memory_list->next->next != NULL) {
- i830_memory *mem = intel->memory_list->next;
-
- i830_free_memory(scrn, mem);
- }
-
/* Free any allocations in buffer objects */
while (intel->bo_list != NULL)
i830_free_memory(scrn, intel->bo_list);
@@ -226,65 +219,6 @@ void i830_reset_allocations(ScrnInfoPtr scrn)
intel->front_buffer = NULL;
}
-/**
- * Initialize's the driver's video memory allocator to allocate in the
- * given range.
- *
- * This sets up the kernel memory manager to manage as much of the memory
- * as we think it can, while leaving enough to us to fulfill our non-GEM
- * static allocations. Some of these exist because of the need for physical
- * addresses to reference.
- */
-Bool i830_allocator_init(ScrnInfoPtr scrn, unsigned long size)
-{
- intel_screen_private *intel = intel_get_screen_private(scrn);
- i830_memory *start, *end;
-
- start = xcalloc(1, sizeof(*start));
- if (start == NULL)
- return FALSE;
- start->name = xstrdup("start marker");
- if (start->name == NULL) {
- xfree(start);
- return FALSE;
- }
- end = xcalloc(1, sizeof(*end));
- if (end == NULL) {
- xfree(start->name);
- xfree(start);
- return FALSE;
- }
- end->name = xstrdup("end marker");
- if (end->name == NULL) {
- xfree(start->name);
- xfree(start);
- xfree(end);
- return FALSE;
- }
-
- start->size = 0;
- start->next = end;
- end->size = 0;
- end->prev = start;
-
- intel->memory_list = start;
-
- return TRUE;
-}
-
-void i830_allocator_fini(ScrnInfoPtr scrn)
-{
- intel_screen_private *intel = intel_get_screen_private(scrn);
-
- /* Free most of the allocations */
- i830_reset_allocations(scrn);
-
- /* Free the start/end markers */
- free(intel->memory_list->next);
- free(intel->memory_list);
- intel->memory_list = NULL;
-}
-
/* Allocates video memory at the given size, pitch, alignment and tile format.
*
* The memory will be bound automatically when the driver is in control of the
@@ -517,9 +451,6 @@ Bool i830_bind_all_memory(ScrnInfoPtr scrn)
xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(scrn);
int i;
- if (intel->memory_list == NULL)
- return TRUE;
-
for (i = 0; i < xf86_config->num_crtc; i++)
drmmode_crtc_set_cursor_bo(xf86_config->crtc[i],
intel->cursor_mem_argb[i]->bo);
commit bf83b9a10254966cb73b24e08954154d4296dac3
Author: Daniel Vetter <daniel.vetter at ffwll.ch>
Date: Tue Mar 2 09:22:35 2010 +0100
i830_memory: kill i830_desribe_allocations
Totally useless debug function from the pre-gem era. No point
to occasionally spam Xorg.log with a bogus "No memory allocations"
message.
Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
Reviewed-by: Eric Anholt <eric at anholt.net>
diff --git a/src/i830.h b/src/i830.h
index 0924d71..5789976 100644
--- a/src/i830.h
+++ b/src/i830.h
@@ -451,8 +451,6 @@ void i830_allocator_fini(ScrnInfoPtr scrn);
i830_memory *i830_allocate_memory(ScrnInfoPtr scrn, const char *name,
unsigned long size, unsigned long pitch,
int flags, uint32_t tile_format);
-void i830_describe_allocations(ScrnInfoPtr scrn, int verbosity,
- const char *prefix);
void i830_reset_allocations(ScrnInfoPtr scrn);
void i830_free_3d_memory(ScrnInfoPtr scrn);
void i830_free_memory(ScrnInfoPtr scrn, i830_memory * mem);
diff --git a/src/i830_driver.c b/src/i830_driver.c
index 75b3303..14d4432 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -1413,8 +1413,6 @@ static Bool I830EnterVT(int scrnIndex, int flags)
if (!i830_bind_all_memory(scrn))
return FALSE;
- i830_describe_allocations(scrn, 1, "");
-
intel_batch_init(scrn);
if (IS_I965G(intel))
diff --git a/src/i830_memory.c b/src/i830_memory.c
index f1804f4..4202aa5 100644
--- a/src/i830_memory.c
+++ b/src/i830_memory.c
@@ -375,61 +375,6 @@ i830_memory *i830_allocate_memory(ScrnInfoPtr scrn, const char *name,
return mem;
}
-void
-i830_describe_allocations(ScrnInfoPtr scrn, int verbosity, const char *prefix)
-{
- intel_screen_private *intel = intel_get_screen_private(scrn);
- i830_memory *mem;
-
- if (intel->memory_list == NULL) {
- xf86DrvMsgVerb(scrn->scrnIndex, X_INFO, verbosity,
- "%sMemory allocator not initialized\n", prefix);
- return;
- }
-
- if (intel->memory_list->next->next == NULL) {
- xf86DrvMsgVerb(scrn->scrnIndex, X_INFO, verbosity,
- "%sNo memory allocations\n", prefix);
- return;
- }
-
- xf86DrvMsgVerb(scrn->scrnIndex, X_INFO, verbosity,
- "%sFixed memory allocation layout:\n", prefix);
-
- for (mem = intel->memory_list->next; mem->next != NULL; mem = mem->next) {
- char phys_suffix[32] = "";
- char *tile_suffix = "";
-
- if (mem->tiling_mode == I915_TILING_X)
- tile_suffix = " X tiled";
- else if (mem->tiling_mode == I915_TILING_Y)
- tile_suffix = " Y tiled";
-
- xf86DrvMsgVerb(scrn->scrnIndex, X_INFO, verbosity,
- "%s0x%08lx: %s (%ld kB%s)%s\n", prefix,
- mem->bo->offset, mem->name,
- mem->size / 1024, phys_suffix, tile_suffix);
- }
- xf86DrvMsgVerb(scrn->scrnIndex, X_INFO, verbosity,
- "%s0x%08lx: end of aperture\n",
- prefix, intel->FbMapSize);
-
- xf86DrvMsgVerb(scrn->scrnIndex, X_INFO, verbosity,
- "%sBO memory allocation layout:\n", prefix);
- for (mem = intel->bo_list; mem != NULL; mem = mem->next) {
- char *tile_suffix = "";
-
- if (mem->tiling_mode == I915_TILING_X)
- tile_suffix = " X tiled";
- else if (mem->tiling_mode == I915_TILING_Y)
- tile_suffix = " Y tiled";
-
- xf86DrvMsgVerb(scrn->scrnIndex, X_INFO, verbosity,
- "%sunpinned : %s (%ld kB)%s\n", prefix,
- mem->name, mem->size / 1024, tile_suffix);
- }
-}
-
static Bool IsTileable(ScrnInfoPtr scrn, int pitch)
{
intel_screen_private *intel = intel_get_screen_private(scrn);
diff --git a/src/i915_hwmc.c b/src/i915_hwmc.c
index 43b9fcc..9721eba 100644
--- a/src/i915_hwmc.c
+++ b/src/i915_hwmc.c
@@ -357,9 +357,6 @@ static Bool i915_allocate_xvmc_buffers(ScrnInfoPtr scrn,
return FALSE;
}
- if (1)
- i830_describe_allocations(scrn, 1, "i915_mc: ");
-
return TRUE;
}
@@ -604,9 +601,6 @@ static int i915_xvmc_create_surface(ScrnInfoPtr scrn, XvMCSurfacePtr pSurf,
return BadAlloc;
}
- if (0)
- i830_describe_allocations(scrn, 1, "");
-
if (drmAddMap(intel->drmSubFD,
(drm_handle_t) (sfpriv->surface->bo->offset +
intel->LinearAddr), sfpriv->surface->size,
commit ff8a1e1cf728eeae848f6284bb4272193dfa918b
Author: Daniel Vetter <daniel.vetter at ffwll.ch>
Date: Tue Mar 2 09:22:34 2010 +0100
i830_memory: rip out field "offset"
Use the one in the drm bo instead.
Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
Reviewed-by: Eric Anholt <eric at anholt.net>
diff --git a/src/drmmode_display.c b/src/drmmode_display.c
index 52a21f5..5e2349e 100644
--- a/src/drmmode_display.c
+++ b/src/drmmode_display.c
@@ -1362,7 +1362,6 @@ drmmode_do_pageflip(ScreenPtr screen, dri_bo *new_front, dri_bo *old_front,
scrn->fbOffset = new_front->offset;
intel->front_buffer->bo = new_front;
- intel->front_buffer->offset = new_front->offset;
drmmode->old_fb_id = old_fb_id;
return TRUE;
diff --git a/src/i830.h b/src/i830.h
index 9c0c1de..0924d71 100644
--- a/src/i830.h
+++ b/src/i830.h
@@ -179,8 +179,6 @@ typedef struct _I830OutputRec I830OutputRec, *I830OutputPtr;
/** Record of a linear allocation in the aperture. */
typedef struct _i830_memory i830_memory;
struct _i830_memory {
- /** Offset of the allocation in card VM */
- unsigned long offset;
/**
* Requested size of the allocation: doesn't count padding.
*
diff --git a/src/i830_driver.c b/src/i830_driver.c
index 2403a5a..75b3303 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -1206,7 +1206,7 @@ I830ScreenInit(int scrnIndex, ScreenPtr screen, int argc, char **argv)
* set the initial framebuffer pixmap to point at
* it
*/
- scrn->fbOffset = intel->front_buffer->offset;
+ scrn->fbOffset = intel->front_buffer->bo->offset;
DPRINTF(PFX, "assert( if(!fbScreenInit(screen, ...) )\n");
if (!fbScreenInit(screen, NULL,
diff --git a/src/i830_hwmc.c b/src/i830_hwmc.c
index 3471524..184c3aa 100644
--- a/src/i830_hwmc.c
+++ b/src/i830_hwmc.c
@@ -151,7 +151,7 @@ Bool intel_xvmc_init_batch(ScrnInfoPtr scrn)
return FALSE;
if (drmAddMap(intel->drmSubFD,
- (drm_handle_t) (xvmc_driver->batch->offset +
+ (drm_handle_t) (xvmc_driver->batch->bo->offset +
intel->LinearAddr),
xvmc_driver->batch->size, DRM_AGP, 0,
&xvmc_driver->batch_handle) < 0) {
diff --git a/src/i830_memory.c b/src/i830_memory.c
index e3d7819..f1804f4 100644
--- a/src/i830_memory.c
+++ b/src/i830_memory.c
@@ -262,10 +262,8 @@ Bool i830_allocator_init(ScrnInfoPtr scrn, unsigned long size)
return FALSE;
}
- start->offset = 0;
start->size = 0;
start->next = end;
- end->offset = size;
end->size = 0;
end->prev = start;
@@ -353,8 +351,6 @@ i830_memory *i830_allocate_memory(ScrnInfoPtr scrn, const char *name,
return NULL;
}
- /* Give buffer obviously wrong offset/end until it's pinned. */
- mem->offset = -1;
mem->size = size;
mem->pitch = pitch;
@@ -411,7 +407,7 @@ i830_describe_allocations(ScrnInfoPtr scrn, int verbosity, const char *prefix)
xf86DrvMsgVerb(scrn->scrnIndex, X_INFO, verbosity,
"%s0x%08lx: %s (%ld kB%s)%s\n", prefix,
- mem->offset, mem->name,
+ mem->bo->offset, mem->name,
mem->size / 1024, phys_suffix, tile_suffix);
}
xf86DrvMsgVerb(scrn->scrnIndex, X_INFO, verbosity,
@@ -586,7 +582,7 @@ Bool i830_bind_all_memory(ScrnInfoPtr scrn)
i830_set_gem_max_sizes(scrn);
if (intel->front_buffer)
- scrn->fbOffset = intel->front_buffer->offset;
+ scrn->fbOffset = intel->front_buffer->bo->offset;
return TRUE;
}
@@ -615,8 +611,6 @@ Bool i830_allocate_xvmc_buffer(ScrnInfoPtr scrn, const char *name,
"Failed to bind XvMC buffer bo!\n");
return FALSE;
}
-
- (*buffer)->offset = (*buffer)->bo->offset;
}
return TRUE;
diff --git a/src/i915_hwmc.c b/src/i915_hwmc.c
index cbf3830..43b9fcc 100644
--- a/src/i915_hwmc.c
+++ b/src/i915_hwmc.c
@@ -212,7 +212,7 @@ static Bool i915_map_xvmc_buffers(ScrnInfoPtr scrn,
intel_screen_private *intel = intel_get_screen_private(scrn);
if (drmAddMap(intel->drmSubFD,
- (drm_handle_t) (ctxpriv->mcStaticIndirectState->offset +
+ (drm_handle_t) (ctxpriv->mcStaticIndirectState->bo->offset +
intel->LinearAddr),
ctxpriv->mcStaticIndirectState->size, DRM_AGP, 0,
(drmAddress) & ctxpriv->sis_handle) < 0) {
@@ -222,7 +222,7 @@ static Bool i915_map_xvmc_buffers(ScrnInfoPtr scrn,
}
if (drmAddMap(intel->drmSubFD,
- (drm_handle_t) (ctxpriv->mcSamplerState->offset +
+ (drm_handle_t) (ctxpriv->mcSamplerState->bo->offset +
intel->LinearAddr),
ctxpriv->mcSamplerState->size, DRM_AGP, 0,
(drmAddress) & ctxpriv->ssb_handle) < 0) {
@@ -232,7 +232,7 @@ static Bool i915_map_xvmc_buffers(ScrnInfoPtr scrn,
}
if (drmAddMap(intel->drmSubFD,
- (drm_handle_t) (ctxpriv->mcMapState->offset +
+ (drm_handle_t) (ctxpriv->mcMapState->bo->offset +
intel->LinearAddr),
ctxpriv->mcMapState->size, DRM_AGP, 0,
(drmAddress) & ctxpriv->msb_handle) < 0) {
@@ -242,7 +242,7 @@ static Bool i915_map_xvmc_buffers(ScrnInfoPtr scrn,
}
if (drmAddMap(intel->drmSubFD,
- (drm_handle_t) (ctxpriv->mcPixelShaderProgram->offset +
+ (drm_handle_t) (ctxpriv->mcPixelShaderProgram->bo->offset +
intel->LinearAddr),
ctxpriv->mcPixelShaderProgram->size, DRM_AGP, 0,
(drmAddress) & ctxpriv->psp_handle) < 0) {
@@ -252,7 +252,7 @@ static Bool i915_map_xvmc_buffers(ScrnInfoPtr scrn,
}
if (drmAddMap(intel->drmSubFD,
- (drm_handle_t) (ctxpriv->mcPixelShaderConstants->offset +
+ (drm_handle_t) (ctxpriv->mcPixelShaderConstants->bo->offset +
intel->LinearAddr),
ctxpriv->mcPixelShaderConstants->size, DRM_AGP, 0,
(drmAddress) & ctxpriv->psc_handle) < 0) {
@@ -262,7 +262,7 @@ static Bool i915_map_xvmc_buffers(ScrnInfoPtr scrn,
}
if (drmAddMap(intel->drmSubFD,
- (drm_handle_t) (ctxpriv->mcCorrdata->offset +
+ (drm_handle_t) (ctxpriv->mcCorrdata->bo->offset +
intel->LinearAddr),
ctxpriv->mcCorrdata->size, DRM_AGP, 0,
(drmAddress) & ctxpriv->corrdata_handle) < 0) {
@@ -488,29 +488,29 @@ static int i915_xvmc_create_context(ScrnInfoPtr scrn, XvMCContextPtr pContext,
/* common context items */
contextRec->comm.type = xvmc_driver->flag;
- contextRec->comm.batchbuffer.offset = xvmc_driver->batch->offset;
+ contextRec->comm.batchbuffer.offset = xvmc_driver->batch->bo->offset;
contextRec->comm.batchbuffer.size = xvmc_driver->batch->size;
contextRec->comm.batchbuffer.handle = xvmc_driver->batch_handle;
/* i915 private context */
contextRec->ctxno = i;
contextRec->sis.handle = ctxpriv->sis_handle;
- contextRec->sis.offset = ctxpriv->mcStaticIndirectState->offset;
+ contextRec->sis.offset = ctxpriv->mcStaticIndirectState->bo->offset;
contextRec->sis.size = ctxpriv->mcStaticIndirectState->size;
contextRec->ssb.handle = ctxpriv->ssb_handle;
- contextRec->ssb.offset = ctxpriv->mcSamplerState->offset;
+ contextRec->ssb.offset = ctxpriv->mcSamplerState->bo->offset;
contextRec->ssb.size = ctxpriv->mcSamplerState->size;
contextRec->msb.handle = ctxpriv->msb_handle;
- contextRec->msb.offset = ctxpriv->mcMapState->offset;
+ contextRec->msb.offset = ctxpriv->mcMapState->bo->offset;
contextRec->msb.size = ctxpriv->mcMapState->size;
contextRec->psp.handle = ctxpriv->psp_handle;
- contextRec->psp.offset = ctxpriv->mcPixelShaderProgram->offset;
+ contextRec->psp.offset = ctxpriv->mcPixelShaderProgram->bo->offset;
contextRec->psp.size = ctxpriv->mcPixelShaderProgram->size;
contextRec->psc.handle = ctxpriv->psc_handle;
- contextRec->psc.offset = ctxpriv->mcPixelShaderConstants->offset;
+ contextRec->psc.offset = ctxpriv->mcPixelShaderConstants->bo->offset;
contextRec->psc.size = ctxpriv->mcPixelShaderConstants->size;
contextRec->corrdata.handle = ctxpriv->corrdata_handle;
- contextRec->corrdata.offset = ctxpriv->mcCorrdata->offset;
+ contextRec->corrdata.offset = ctxpriv->mcCorrdata->bo->offset;
contextRec->corrdata.size = ctxpriv->mcCorrdata->size;
contextRec->deviceID = DEVICE_ID(intel->PciInfo);
@@ -608,7 +608,7 @@ static int i915_xvmc_create_surface(ScrnInfoPtr scrn, XvMCSurfacePtr pSurf,
i830_describe_allocations(scrn, 1, "");
if (drmAddMap(intel->drmSubFD,
- (drm_handle_t) (sfpriv->surface->offset +
+ (drm_handle_t) (sfpriv->surface->bo->offset +
intel->LinearAddr), sfpriv->surface->size,
DRM_AGP, 0, (drmAddress) & sfpriv->surface_handle) < 0) {
xf86DrvMsg(scrn->scrnIndex, X_ERROR,
@@ -623,7 +623,7 @@ static int i915_xvmc_create_surface(ScrnInfoPtr scrn, XvMCSurfacePtr pSurf,
surfaceRec->srfno = srfno;
surfaceRec->srf.handle = sfpriv->surface_handle;
- surfaceRec->srf.offset = sfpriv->surface->offset;
+ surfaceRec->srf.offset = sfpriv->surface->bo->offset;
surfaceRec->srf.size = sfpriv->surface->size;
pXvMC->surfaces[srfno] = pSurf->surface_id;
@@ -697,7 +697,7 @@ static int i915_xvmc_create_subpict(ScrnInfoPtr scrn, XvMCSubpicturePtr pSubp,
}
if (drmAddMap(intel->drmSubFD,
- (drm_handle_t) (sfpriv->surface->offset +
+ (drm_handle_t) (sfpriv->surface->bo->offset +
intel->LinearAddr), sfpriv->surface->size,
DRM_AGP, 0, (drmAddress) & sfpriv->surface_handle) < 0) {
xf86DrvMsg(scrn->scrnIndex, X_ERROR,
@@ -712,7 +712,7 @@ static int i915_xvmc_create_subpict(ScrnInfoPtr scrn, XvMCSubpicturePtr pSubp,
surfaceRec->srfno = srfno;
surfaceRec->srf.handle = sfpriv->surface_handle;
- surfaceRec->srf.offset = sfpriv->surface->offset;
+ surfaceRec->srf.offset = sfpriv->surface->bo->offset;
surfaceRec->srf.size = sfpriv->surface->size;
pXvMC->sfprivs[srfno] = sfpriv;
@@ -816,7 +816,7 @@ static int i915_xvmc_put_image(ScrnInfoPtr scrn,
/* use char *buf to hold our surface offset...hacky! */
buf =
(unsigned char *)pXvMC->sfprivs[xvmc_cmd->srfNo]->
- surface->offset;
+ surface->bo->offset;
break;
default:
return 0;
commit e18ffceb142a9e18968900dd526a2d50fab72900
Author: Daniel Vetter <daniel.vetter at ffwll.ch>
Date: Tue Mar 2 09:22:32 2010 +0100
i830_memory: rip out field "end"
It's a left-over from the non-gem era and no longer used at all.
Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
Reviewed-by: Eric Anholt <eric at anholt.net>
diff --git a/src/i830.h b/src/i830.h
index 753eeb7..9c0c1de 100644
--- a/src/i830.h
+++ b/src/i830.h
@@ -181,8 +181,6 @@ typedef struct _i830_memory i830_memory;
struct _i830_memory {
/** Offset of the allocation in card VM */
unsigned long offset;
- /** End of the allocation in card VM */
- unsigned long end;
/**
* Requested size of the allocation: doesn't count padding.
*
@@ -204,7 +202,7 @@ struct _i830_memory {
i830_memory *prev;
/** @} */
- dri_bo *bo;
+ drm_intel_bo *bo;
uint32_t gem_name;
};
diff --git a/src/i830_memory.c b/src/i830_memory.c
index 289c5f0..e3d7819 100644
--- a/src/i830_memory.c
+++ b/src/i830_memory.c
@@ -263,11 +263,9 @@ Bool i830_allocator_init(ScrnInfoPtr scrn, unsigned long size)
}
start->offset = 0;
- start->end = start->offset;
start->size = 0;
start->next = end;
end->offset = size;
- end->end = end->offset;
end->size = 0;
end->prev = start;
@@ -357,7 +355,6 @@ i830_memory *i830_allocate_memory(ScrnInfoPtr scrn, const char *name,
/* Give buffer obviously wrong offset/end until it's pinned. */
mem->offset = -1;
- mem->end = -1;
mem->size = size;
mem->pitch = pitch;
@@ -413,8 +410,8 @@ i830_describe_allocations(ScrnInfoPtr scrn, int verbosity, const char *prefix)
tile_suffix = " Y tiled";
xf86DrvMsgVerb(scrn->scrnIndex, X_INFO, verbosity,
- "%s0x%08lx-0x%08lx: %s (%ld kB%s)%s\n", prefix,
- mem->offset, mem->end - 1, mem->name,
+ "%s0x%08lx: %s (%ld kB%s)%s\n", prefix,
+ mem->offset, mem->name,
mem->size / 1024, phys_suffix, tile_suffix);
}
xf86DrvMsgVerb(scrn->scrnIndex, X_INFO, verbosity,
commit 5018fd3097d77a5f31af4cb27e39daa37557b64e
Author: Daniel Vetter <daniel.vetter at ffwll.ch>
Date: Mon Mar 1 22:57:40 2010 +0100
libIntelXvMC: kill ums leftovers
On i965 class hw, kernel_exec_fencing was 1 always, anyway. And on
i945, this patch kills a memory leak (dunno how, but it does).
Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
diff --git a/src/xvmc/i965_xvmc.c b/src/xvmc/i965_xvmc.c
index ff67995..3de6054 100644
--- a/src/xvmc/i965_xvmc.c
+++ b/src/xvmc/i965_xvmc.c
@@ -731,11 +731,8 @@ static Status render_surface(Display * display,
}
if (media_state.indirect_data.bo) {
- if (xvmc_driver->kernel_exec_fencing)
- drm_intel_gem_bo_unmap_gtt(media_state.
- indirect_data.bo);
- else
- drm_intel_bo_unmap(media_state.indirect_data.bo);
+ drm_intel_gem_bo_unmap_gtt(media_state.
+ indirect_data.bo);
drm_intel_bo_unreference(media_state.indirect_data.bo);
}
@@ -755,10 +752,7 @@ static Status render_surface(Display * display,
interface_descriptor(&media_state);
vfe_state(&media_state);
- if (xvmc_driver->kernel_exec_fencing)
- drm_intel_gem_bo_map_gtt(media_state.indirect_data.bo);
- else
- drm_intel_bo_map(media_state.indirect_data.bo, 1);
+ drm_intel_gem_bo_map_gtt(media_state.indirect_data.bo);
block_ptr = media_state.indirect_data.bo->virtual;
for (i = first_macroblock; i < num_macroblocks + first_macroblock; i++) {
diff --git a/src/xvmc/intel_batchbuffer.c b/src/xvmc/intel_batchbuffer.c
index 1807d2c..fcd2866 100644
--- a/src/xvmc/intel_batchbuffer.c
+++ b/src/xvmc/intel_batchbuffer.c
@@ -73,10 +73,7 @@ Bool intelInitBatchBuffer(void)
return False;
}
- if (xvmc_driver->kernel_exec_fencing)
- drm_intel_gem_bo_map_gtt(xvmc_driver->batch.buf);
- else
- drm_intel_bo_map(xvmc_driver->batch.buf, 1);
+ drm_intel_gem_bo_map_gtt(xvmc_driver->batch.buf);
xvmc_driver->batch.init_ptr = xvmc_driver->batch.buf->virtual;
xvmc_driver->batch.size = BATCH_SIZE;
@@ -87,10 +84,7 @@ Bool intelInitBatchBuffer(void)
void intelFiniBatchBuffer(void)
{
- if (xvmc_driver->kernel_exec_fencing)
- drm_intel_gem_bo_unmap_gtt(xvmc_driver->batch.buf);
- else
- drm_intel_bo_unmap(xvmc_driver->batch.buf);
+ drm_intel_gem_bo_unmap_gtt(xvmc_driver->batch.buf);
drm_intel_bo_unreference(xvmc_driver->batch.buf);
}
@@ -99,10 +93,7 @@ void intelFlushBatch(Bool refill)
{
i965_end_batch();
- if (xvmc_driver->kernel_exec_fencing)
- drm_intel_gem_bo_unmap_gtt(xvmc_driver->batch.buf);
- else
- drm_intel_bo_unmap(xvmc_driver->batch.buf);
+ drm_intel_gem_bo_unmap_gtt(xvmc_driver->batch.buf);
drm_intel_bo_exec(xvmc_driver->batch.buf,
xvmc_driver->batch.ptr - xvmc_driver->batch.init_ptr,
@@ -118,10 +109,7 @@ void intelFlushBatch(Bool refill)
fprintf(stderr, "unable to alloc batch buffer\n");
}
- if (xvmc_driver->kernel_exec_fencing)
- drm_intel_gem_bo_map_gtt(xvmc_driver->batch.buf);
- else
- drm_intel_bo_map(xvmc_driver->batch.buf, 1);
+ drm_intel_gem_bo_map_gtt(xvmc_driver->batch.buf);
xvmc_driver->batch.init_ptr = xvmc_driver->batch.buf->virtual;
xvmc_driver->batch.size = BATCH_SIZE;
diff --git a/src/xvmc/intel_xvmc.c b/src/xvmc/intel_xvmc.c
index c94ae4a..328d3c1 100644
--- a/src/xvmc/intel_xvmc.c
+++ b/src/xvmc/intel_xvmc.c
@@ -421,8 +421,6 @@ _X_EXPORT Status XvMCCreateContext(Display * display, XvPortID port,
XVMC_INFO("decoder type is %s", intel_xvmc_decoder_string(comm->type));
- xvmc_driver->kernel_exec_fencing = comm->kernel_exec_fencing;
-
/* assign local ctx info */
intel_ctx = intel_xvmc_new_context(display);
if (!intel_ctx) {
diff --git a/src/xvmc/intel_xvmc.h b/src/xvmc/intel_xvmc.h
index 43153cc..60a2fbb 100644
--- a/src/xvmc/intel_xvmc.h
+++ b/src/xvmc/intel_xvmc.h
@@ -131,7 +131,6 @@ typedef struct _intel_xvmc_driver {
int fd; /* drm file handler */
dri_bufmgr *bufmgr;
- unsigned int kernel_exec_fencing:1;
struct {
unsigned int init_offset;
diff --git a/src/xvmc/xvmc_vld.c b/src/xvmc/xvmc_vld.c
index dca0573..bea1ec7 100644
--- a/src/xvmc/xvmc_vld.c
+++ b/src/xvmc/xvmc_vld.c
@@ -1010,10 +1010,7 @@ static Status put_slice2(Display * display, XvMCContext * context,
q_scale_code = bit_buf >> 27;
if (media_state.slice_data.bo) {
- if (xvmc_driver->kernel_exec_fencing)
- drm_intel_gem_bo_unmap_gtt(media_state.slice_data.bo);
- else
- drm_intel_bo_unmap(media_state.slice_data.bo);
+ drm_intel_gem_bo_unmap_gtt(media_state.slice_data.bo);
drm_intel_bo_unreference(media_state.slice_data.bo);
}
@@ -1022,10 +1019,7 @@ static Status put_slice2(Display * display, XvMCContext * context,
VLD_MAX_SLICE_SIZE, 64);
if (!media_state.slice_data.bo)
return BadAlloc;
- if (xvmc_driver->kernel_exec_fencing)
- drm_intel_gem_bo_map_gtt(media_state.slice_data.bo);
- else
- drm_intel_bo_map(media_state.slice_data.bo, 1);
+ drm_intel_gem_bo_map_gtt(media_state.slice_data.bo);
memcpy(media_state.slice_data.bo->virtual, slice, nbytes);
@@ -1110,10 +1104,7 @@ static Status render_surface(Display * display,
return ret;
if (media_state.mb_data.bo) {
- if (xvmc_driver->kernel_exec_fencing)
- drm_intel_gem_bo_unmap_gtt(media_state.mb_data.bo);
- else
- drm_intel_bo_unmap(media_state.mb_data.bo);
+ drm_intel_gem_bo_unmap_gtt(media_state.mb_data.bo);
drm_intel_bo_unreference(media_state.mb_data.bo);
}
@@ -1125,10 +1116,7 @@ static Status render_surface(Display * display,
surface_size, 64);
if (!media_state.mb_data.bo)
return BadAlloc;
- if (xvmc_driver->kernel_exec_fencing)
- drm_intel_gem_bo_map_gtt(media_state.mb_data.bo);
- else
- drm_intel_bo_map(media_state.mb_data.bo, 1);
+ drm_intel_gem_bo_map_gtt(media_state.mb_data.bo);
block_ptr = media_state.mb_data.bo->virtual;
unsigned short *mb_block_ptr;
commit cb06aa32d433f54affe87da2cf964f0308d3c258
Author: Daniel Vetter <daniel.vetter at ffwll.ch>
Date: Mon Mar 1 22:57:39 2010 +0100
Xv: fixup XvMC on i915
I've accidentally broken i915 xvmc due to alignment constrains that
break my assumption that Y-pitch == UV-pitch*2. Fix this up by consistenly
using dstPitch2 for the Y-pitch. This also unifies the dst pitch
computation slightly, now that the i915 xvmc special case is gone.
Bugzilla: http://bugs.freedesktop.org/show_bug.cgi?id=25949
Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
(Minor edit to support compilation without INTEL_XVMC defined by
Carl Worth <cworth at cworth.org>)
diff --git a/src/i830_video.c b/src/i830_video.c
index 2092a18..8a4f5ed 100644
--- a/src/i830_video.c
+++ b/src/i830_video.c
@@ -267,7 +267,7 @@ static void drmmode_overlay_off(ScrnInfoPtr scrn)
static Bool
drmmode_overlay_put_image(ScrnInfoPtr scrn, xf86CrtcPtr crtc,
int id, short width, short height,
- int dstPitch,
+ int dstPitch, int dstPitch2,
BoxPtr dstBox, short src_w, short src_h, short drw_w,
short drw_h)
{
@@ -282,7 +282,7 @@ drmmode_overlay_put_image(ScrnInfoPtr scrn, xf86CrtcPtr crtc,
request.bo_handle = adaptor_priv->buf->handle;
if (planar) {
- request.stride_Y = dstPitch * 2;
+ request.stride_Y = dstPitch2;
request.stride_UV = dstPitch;
} else {
request.stride_Y = dstPitch;
@@ -959,12 +959,12 @@ static void i830_memcpy_plane(unsigned char *dst, unsigned char *src,
static void
I830CopyPlanarData(intel_adaptor_private *adaptor_priv,
- unsigned char *buf, int srcPitch,
- int srcPitch2, int dstPitch, int srcH, int top, int left,
+ unsigned char *buf, int srcPitch, int srcPitch2,
+ int dstPitch, int dstPitch2,
+ int srcH, int top, int left,
int h, int w, int id)
{
unsigned char *src1, *src2, *src3, *dst_base, *dst1, *dst2, *dst3;
- int dstPitch2 = dstPitch << 1;
#if 0
ErrorF("I830CopyPlanarData: srcPitch %d, srcPitch %d, dstPitch %d\n"
@@ -1181,7 +1181,7 @@ static int xvmc_passthrough(int id)
static Bool
i830_display_overlay(ScrnInfoPtr scrn, xf86CrtcPtr crtc,
int id, short width, short height,
- int dstPitch,
+ int dstPitch, int dstPitch2,
BoxPtr dstBox, short src_w, short src_h, short drw_w,
short drw_h)
{
@@ -1214,7 +1214,7 @@ i830_display_overlay(ScrnInfoPtr scrn, xf86CrtcPtr crtc,
}
return drmmode_overlay_put_image(scrn, crtc, id, width, height,
- dstPitch, dstBox,
+ dstPitch, dstPitch2, dstBox,
src_w, src_h, drw_w, drw_h);
}
@@ -1362,28 +1362,33 @@ i830_setup_dst_params(ScrnInfoPtr scrn, intel_adaptor_private *adaptor_priv, sho
if (IS_I965G(intel))
pitchAlignMask = 255;
else
- pitchAlignMask = 63;
+ pitchAlignMask = 255;
}
+#if INTEL_XVMC
+ /* for i915 xvmc, hw requires 1kb aligned surfaces */
+ if ((id == FOURCC_XVMC) && IS_I915(intel))
+ pitchAlignMask = 0x3ff;
+#endif
+
/* Determine the desired destination pitch (representing the chroma's pitch,
* in the planar case.
*/
- switch (id) {
- case FOURCC_YV12:
- case FOURCC_I420:
+ if (is_planar_fourcc(id)) {
if (adaptor_priv->rotation & (RR_Rotate_90 | RR_Rotate_270)) {
*dstPitch =
((height / 2) + pitchAlignMask) & ~pitchAlignMask;
+ *dstPitch2 =
+ (height + pitchAlignMask) & ~pitchAlignMask;
*size = *dstPitch * width * 3;
} else {
*dstPitch =
((width / 2) + pitchAlignMask) & ~pitchAlignMask;
+ *dstPitch2 =
+ (width + pitchAlignMask) & ~pitchAlignMask;
*size = *dstPitch * height * 3;
}
- break;
- case FOURCC_UYVY:
- case FOURCC_YUY2:
-
+ } else {
if (adaptor_priv->rotation & (RR_Rotate_90 | RR_Rotate_270)) {
*dstPitch =
((height << 1) + pitchAlignMask) & ~pitchAlignMask;
@@ -1393,18 +1398,7 @@ i830_setup_dst_params(ScrnInfoPtr scrn, intel_adaptor_private *adaptor_priv, sho
((width << 1) + pitchAlignMask) & ~pitchAlignMask;
*size = *dstPitch * height;
}
- break;
-#ifdef INTEL_XVMC
- case FOURCC_XVMC:
- *dstPitch = ((width / 2) + pitchAlignMask) & ~pitchAlignMask;
- *dstPitch2 = (width + pitchAlignMask) & ~pitchAlignMask;
- *size = 0;
- break;
-#endif
- default:
- *dstPitch = 0;
- *size = 0;
- break;
+ *dstPitch2 = 0;
}
#if 0
ErrorF("srcPitch: %d, dstPitch: %d, size: %d\n", srcPitch, *dstPitch,
@@ -1415,12 +1409,12 @@ i830_setup_dst_params(ScrnInfoPtr scrn, intel_adaptor_private *adaptor_priv, sho
if (adaptor_priv->rotation & (RR_Rotate_90 | RR_Rotate_270)) {
adaptor_priv->UBufOffset =
- adaptor_priv->YBufOffset + (*dstPitch * 2 * width);
+ adaptor_priv->YBufOffset + (*dstPitch2 * width);
adaptor_priv->VBufOffset =
adaptor_priv->UBufOffset + (*dstPitch * width / 2);
} else {
adaptor_priv->UBufOffset =
- adaptor_priv->YBufOffset + (*dstPitch * 2 * height);
+ adaptor_priv->YBufOffset + (*dstPitch2 * height);
adaptor_priv->VBufOffset =
adaptor_priv->UBufOffset + (*dstPitch * height / 2);
}
@@ -1451,7 +1445,8 @@ i830_copy_video_data(ScrnInfoPtr scrn, intel_adaptor_private *adaptor_priv,
/* copy data */
if (is_planar_fourcc(id)) {
I830CopyPlanarData(adaptor_priv, buf, srcPitch, srcPitch2,
- *dstPitch, height, top, left, nlines,
+ *dstPitch, *dstPitch2,
+ height, top, left, nlines,
npixels, id);
} else {
I830CopyPackedData(adaptor_priv, buf, srcPitch, *dstPitch, top, left,
@@ -1488,8 +1483,7 @@ I830PutImageTextured(ScrnInfoPtr scrn,
intel_screen_private *intel = intel_get_screen_private(scrn);
intel_adaptor_private *adaptor_priv = (intel_adaptor_private *) data;
PixmapPtr pixmap = get_drawable_pixmap(drawable);
- int dstPitch;
- int dstPitch2 = 0;
+ int dstPitch, dstPitch2;
BoxRec dstBox;
xf86CrtcPtr crtc;
int top, left, npixels, nlines;
@@ -1515,8 +1509,8 @@ I830PutImageTextured(ScrnInfoPtr scrn,
int size;
i830_free_video_buffers(adaptor_priv);
- i830_setup_dst_params(scrn, adaptor_priv, width, height, &dstPitch,
- &dstPitch2, &size, id);
+ i830_setup_dst_params(scrn, adaptor_priv, width, height,
+ &dstPitch, &dstPitch2, &size, id);
if (IS_I965G(intel)) {
adaptor_priv->buf =
@@ -1552,8 +1546,7 @@ I830PutImageTextured(ScrnInfoPtr scrn,
drw_w, drw_h, pixmap);
} else {
I915DisplayVideoTextured(scrn, adaptor_priv, id, clipBoxes,
- width, height, dstPitch,
- dstPitch2,
+ width, height, dstPitch, dstPitch2,
src_w, src_h, drw_w, drw_h,
pixmap);
}
@@ -1575,8 +1568,8 @@ I830PutImageOverlay(ScrnInfoPtr scrn,
DrawablePtr drawable)
{
intel_adaptor_private *adaptor_priv = (intel_adaptor_private *) data;
- int dstPitch;
- int dstPitch2 = 0;
+ ScreenPtr screen = screenInfo.screens[scrn->scrnIndex];
+ int dstPitch, dstPitch2;
BoxRec dstBox;
xf86CrtcPtr crtc;
int top, left, npixels, nlines;
@@ -1622,7 +1615,7 @@ I830PutImageOverlay(ScrnInfoPtr scrn,
return BadAlloc;
if (!i830_display_overlay
- (scrn, crtc, id, width, height, dstPitch,
+ (scrn, crtc, id, width, height, dstPitch, dstPitch2,
&dstBox, src_w, src_h, drw_w, drw_h))
return BadAlloc;
commit 80f2a1f3b5e477a12899ea2251aebcfa62689943
Author: Daniel Vetter <daniel.vetter at ffwll.ch>
Date: Mon Mar 1 22:57:38 2010 +0100
Xv: fixup YUV plane offset for xvmc case
In my previous cleanup I've inadvertedly dropped the offset adjustment
code for the xvmc passthrough case. Fix this up.
Also reimplement that ugly hack I've accidently killed to keep i915 class
xvmc a tad bit longer on life support.
Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
Tested-by: xunx.fang at intel.com
diff --git a/src/i830_video.c b/src/i830_video.c
index d1f391b..2092a18 100644
--- a/src/i830_video.c
+++ b/src/i830_video.c
@@ -574,7 +574,7 @@ static XF86VideoAdaptorPtr I830SetupImageVideoTextured(ScreenPtr screen)
adapt->pAttributes = attrs;
memcpy(attrs, TexturedAttributes,
nAttributes * sizeof(XF86AttributeRec));
- if (IS_I915(intel))
+ if (IS_I915G(intel) || IS_I915GM(intel))
adapt->nImages = NUM_IMAGES - XVMC_IMAGE;
else
adapt->nImages = NUM_IMAGES;
@@ -1346,7 +1346,7 @@ i830_setup_video_buffer(ScrnInfoPtr scrn, intel_adaptor_private *adaptor_priv,
}
static void
-i830_dst_pitch_and_size(ScrnInfoPtr scrn, intel_adaptor_private *adaptor_priv, short width,
+i830_setup_dst_params(ScrnInfoPtr scrn, intel_adaptor_private *adaptor_priv, short width,
short height, int *dstPitch, int *dstPitch2, int *size,
int id)
{
@@ -1410,6 +1410,20 @@ i830_dst_pitch_and_size(ScrnInfoPtr scrn, intel_adaptor_private *adaptor_priv, s
ErrorF("srcPitch: %d, dstPitch: %d, size: %d\n", srcPitch, *dstPitch,
size);
#endif
+
+ adaptor_priv->YBufOffset = 0;
+
+ if (adaptor_priv->rotation & (RR_Rotate_90 | RR_Rotate_270)) {
+ adaptor_priv->UBufOffset =
+ adaptor_priv->YBufOffset + (*dstPitch * 2 * width);
+ adaptor_priv->VBufOffset =
+ adaptor_priv->UBufOffset + (*dstPitch * width / 2);
+ } else {
+ adaptor_priv->UBufOffset =
+ adaptor_priv->YBufOffset + (*dstPitch * 2 * height);
+ adaptor_priv->VBufOffset =
+ adaptor_priv->UBufOffset + (*dstPitch * height / 2);
+ }
}
static Bool
@@ -1428,27 +1442,12 @@ i830_copy_video_data(ScrnInfoPtr scrn, intel_adaptor_private *adaptor_priv,
srcPitch = width << 1;
}
- i830_dst_pitch_and_size(scrn, adaptor_priv, width, height, dstPitch,
+ i830_setup_dst_params(scrn, adaptor_priv, width, height, dstPitch,
dstPitch2, &size, id);
if (!i830_setup_video_buffer(scrn, adaptor_priv, size, id, buf))
return FALSE;
- /* fixup pointers */
- adaptor_priv->YBufOffset = 0;
-
- if (adaptor_priv->rotation & (RR_Rotate_90 | RR_Rotate_270)) {
- adaptor_priv->UBufOffset =
- adaptor_priv->YBufOffset + (*dstPitch * 2 * width);
- adaptor_priv->VBufOffset =
- adaptor_priv->UBufOffset + (*dstPitch * width / 2);
- } else {
- adaptor_priv->UBufOffset =
- adaptor_priv->YBufOffset + (*dstPitch * 2 * height);
- adaptor_priv->VBufOffset =
- adaptor_priv->UBufOffset + (*dstPitch * height / 2);
- }
-
/* copy data */
if (is_planar_fourcc(id)) {
I830CopyPlanarData(adaptor_priv, buf, srcPitch, srcPitch2,
@@ -1513,16 +1512,27 @@ I830PutImageTextured(ScrnInfoPtr scrn,
return Success;
if (xvmc_passthrough(id)) {
+ int size;
i830_free_video_buffers(adaptor_priv);
+
+ i830_setup_dst_params(scrn, adaptor_priv, width, height, &dstPitch,
+ &dstPitch2, &size, id);
+
if (IS_I965G(intel)) {
adaptor_priv->buf =
drm_intel_bo_gem_create_from_name(intel->bufmgr,
"xvmc surface",
(uintptr_t)buf);
} else {
- /* XXX: i915 is not support and needs some serious care.
- * grep for KMS in i915_hwmc.c */
- return BadAlloc;
+ if (IS_I915G(intel) || IS_I915GM(intel)) {
+ /* XXX: i915 is not support and needs some
+ * serious care. grep for KMS in i915_hwmc.c */
+ return BadAlloc;
+ }
+ /* fixup pointers */
+ adaptor_priv->YBufOffset += (uint32_t) buf;
+ adaptor_priv->UBufOffset += (uint32_t) buf;
+ adaptor_priv->VBufOffset += (uint32_t) buf;
}
} else {
if (!i830_copy_video_data(scrn, adaptor_priv, width, height,
More information about the xorg-commit
mailing list