xf86-video-ati: Branch 'master'

[Alex Deucher]

 src/atombios_crtc.c   |    6 ++++--
 src/atombios_output.c |   11 +++++++----
 2 files changed, 11 insertions(+), 6 deletions(-)

New commits:
commit 8d63d70f7ebaf9d250f0449d3720ef47516c05df
Author: Alex Deucher <alexdeucher at gmail.com>
Date:   Wed Feb 3 15:22:22 2010 -0500

    evergreen: use external clock source for DP PHY
    
    DP CRTC clock always comes from DCPLL.  This frees
    up PPll1/2 for non-DP-mode PHYs and CRTCs

diff --git a/src/atombios_crtc.c b/src/atombios_crtc.c
index 5a88bad..07fa807 100644
--- a/src/atombios_crtc.c
+++ b/src/atombios_crtc.c
@@ -324,9 +324,11 @@ atombios_pick_pll(xf86CrtcPtr crtc)
 		}
 	    }
 	}
-	/* All DP ports need to use the same PPLL */
+	/* DP clock comes from DCPLL, DP PHY CLK comes from ext source
+	 * setting ATOM_PPLL_INVALID skips the PPLL programming for DP
+	 */
 	if (is_dp)
-	    radeon_crtc->pll_id = ATOM_PPLL2;
+	    radeon_crtc->pll_id = ATOM_PPLL_INVALID;
 	else if (!(pll_use_mask & 1))
 	    radeon_crtc->pll_id = ATOM_PPLL1;
 	else
diff --git a/src/atombios_output.c b/src/atombios_output.c
index 547cd13..61f5373 100644
--- a/src/atombios_output.c
+++ b/src/atombios_output.c
@@ -762,11 +762,14 @@ atombios_output_dig_transmitter_setup(xf86OutputPtr output, int action, uint8_t
 	if (radeon_output->linkb)
 	    disp_data.v3.acConfig.ucLinkSel = 1;
 
-	//if (radeon_output->dig_encoder)
-	// disp_data.v2.acConfig.ucEncoderSel = 1;
+	if (radeon_output->dig_encoder & 1)
+	    disp_data.v2.acConfig.ucEncoderSel = 1;
 
-	// select the PLL
-	disp_data.v3.acConfig.ucRefClkSource = radeon_output->pll_id;
+	// select the PLL for the UNIPHY
+	if (radeon_output->MonType == MT_DP)
+	    disp_data.v3.acConfig.ucRefClkSource = 2; /* ext clk */
+	else
+	    disp_data.v3.acConfig.ucRefClkSource = radeon_output->pll_id;
 
 	switch (radeon_encoder->encoder_id) {
 	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY: