xf86-video-ati: Branch 'displayport' - 2 commits
Dave Airlie
airlied at kemper.freedesktop.org
Mon Jul 13 21:37:55 PDT 2009
src/atombios_crtc.c | 73 +++++++++++++++++++----------
src/atombios_output.c | 125 +++++++++++++++++++++++++++++++-------------------
2 files changed, 128 insertions(+), 70 deletions(-)
New commits:
commit 93ba90e7adfec7fb79c40506405ef48eee4d5c22
Author: Dave Airlie <airlied at redhat.com>
Date: Mon Jul 13 23:47:27 2009 -0400
atombios: displayport + adjust pll support
diff --git a/src/atombios_crtc.c b/src/atombios_crtc.c
index d3fb62b..cf2d0d3 100644
--- a/src/atombios_crtc.c
+++ b/src/atombios_crtc.c
@@ -269,11 +269,53 @@ atombios_crtc_set_pll(xf86CrtcPtr crtc, DisplayModePtr mode)
radeon_encoder_ptr radeon_encoder = NULL;
int pll_flags = 0;
uint32_t temp;
-
+ uint32_t adj_pixel_clock = mode->Clock;
void *ptr;
AtomBiosArgRec data;
unsigned char *space;
+ /* Can't really do cloning easily on DCE3 cards */
+ for (i = 0; i < xf86_config->num_output; i++) {
+ output = xf86_config->output[i];
+ if (output->crtc == crtc) {
+ radeon_output = output->driver_private;
+ radeon_encoder = radeon_get_encoder(output);
+ break;
+ }
+ }
+
+ if (radeon_output == NULL) {
+ xf86DrvMsg(crtc->scrn->scrnIndex, X_ERROR, "No output assigned to crtc!\n");
+ return;
+ }
+
+ if (radeon_encoder == NULL) {
+ xf86DrvMsg(crtc->scrn->scrnIndex, X_ERROR, "No encoder assigned to output!\n");
+ return;
+ }
+
+ {
+ ADJUST_DISPLAY_PLL_PS_ALLOCATION adj_display;
+ memset(&adj_display, 0, sizeof(adj_display));
+ adj_display.usPixelClock = adj_pixel_clock / 10;
+ adj_display.ucTransmitterID = radeon_encoder->encoder_id;
+ adj_display.ucEncodeMode = atombios_get_encoder_mode(output);
+
+ index = GetIndexIntoMasterTable(COMMAND, AdjustDisplayPll);
+
+ atombios_get_command_table_version(info->atomBIOS, index, &major, &minor);
+
+ data.exec.index = index;
+ data.exec.dataSpace = (void *)&space;
+ data.exec.pspace = &adj_display;
+
+ if (RHDAtomBiosFunc(info->atomBIOS->scrnIndex, info->atomBIOS, ATOMBIOS_EXEC, &data) == ATOM_SUCCESS) {
+ ErrorF("sclock %d, adj %d: %d\n", sclock, adj_display.usPixelClock, adj_display.ucEncodeMode);
+ }
+
+ adj_pixel_clock = adj_display.usPixelClock * 10;
+ }
+
memset(&spc_param, 0, sizeof(spc_param));
if (IS_AVIVO_VARIANT) {
if ((info->ChipFamily == CHIP_FAMILY_RS600) ||
@@ -315,37 +357,20 @@ atombios_crtc_set_pll(xf86CrtcPtr crtc, DisplayModePtr mode)
pll_flags |= RADEON_PLL_PREFER_LOW_REF_DIV;
}
- RADEONComputePLL(&info->pll, mode->Clock, &temp, &fb_div, &frac_fb_div, &ref_div, &post_div, pll_flags);
+ RADEONComputePLL(&info->pll, adj_pixel_clock, &temp, &fb_div, &frac_fb_div, &ref_div, &post_div, pll_flags);
sclock = temp;
+
+ sclock = mode->Clock / 10;
xf86DrvMsg(crtc->scrn->scrnIndex, X_INFO,
- "crtc(%d) Clock: mode %d, PLL %lu\n",
- radeon_crtc->crtc_id, mode->Clock, (long unsigned int)sclock * 10);
+ "crtc(%d) Clock: mode %d, PLL %lu, adj %d\n",
+ radeon_crtc->crtc_id, mode->Clock, (long unsigned int)sclock * 10, adj_pixel_clock);
xf86DrvMsg(crtc->scrn->scrnIndex, X_INFO,
"crtc(%d) PLL : refdiv %u, fbdiv 0x%X(%u), fracfbdiv %u, pdiv %u\n",
radeon_crtc->crtc_id, (unsigned int)ref_div, (unsigned int)fb_div,
(unsigned int)fb_div, (unsigned int)frac_fb_div, (unsigned int)post_div);
- /* Can't really do cloning easily on DCE3 cards */
- for (i = 0; i < xf86_config->num_output; i++) {
- output = xf86_config->output[i];
- if (output->crtc == crtc) {
- radeon_output = output->driver_private;
- radeon_encoder = radeon_get_encoder(output);
- break;
- }
- }
-
- if (radeon_output == NULL) {
- xf86DrvMsg(crtc->scrn->scrnIndex, X_ERROR, "No output assigned to crtc!\n");
- return;
- }
-
- if (radeon_encoder == NULL) {
- xf86DrvMsg(crtc->scrn->scrnIndex, X_ERROR, "No encoder assigned to output!\n");
- return;
- }
-
+ index = GetIndexIntoMasterTable(COMMAND, SetPixelClock);
atombios_get_command_table_version(info->atomBIOS, index, &major, &minor);
/*ErrorF("table is %d %d\n", major, minor);*/
diff --git a/src/atombios_output.c b/src/atombios_output.c
index 1e8ad74..ad0cd0a 100644
--- a/src/atombios_output.c
+++ b/src/atombios_output.c
@@ -461,14 +461,14 @@ atombios_get_encoder_mode(xf86OutputPtr output)
}
static const int dp_clocks[] = {
- 16200,
- 27000,
- 32400,
54000,
+ 81000,
+ 108000,
+ 162000,
0,
0,
- 64800,
- 108000,
+ 100000,
+ 324000,
};
static const int num_dp_clocks = sizeof(dp_clocks) / sizeof(int);
@@ -491,7 +491,7 @@ dp_link_clock_for_mode_clock(int mode_clock)
for (i = 0; i < num_dp_clocks; i++)
if (dp_clocks[i] > (mode_clock / 10))
- return (dp_clocks[i % 2]);
+ return (i % 2) ? 27000 : 16200;
return 0;
}
@@ -2557,19 +2557,17 @@ static void do_displayport_dance(xf86OutputPtr output, DisplayModePtr mode, Disp
RADEONDPEncoderService(output, ATOM_DP_ACTION_TRAINING_START, enc_id, 0);
RADEONDPEncoderService(output, ATOM_DP_ACTION_TRAINING_PATTERN_SEL, enc_id, 0);
+
dp_update_dpvs_emph(output, train_set);
+ usleep(400);
+ dp_set_training(output, DP_TRAINING_PATTERN_1);
+
/* loop around doing configuration reads and DP encoder setups */
clock_recovery = FALSE;
tries = 0;
voltage = 0xff;
for (;;) {
-
- // if (!atom_dp_set_link_train(output, DP_TRAINING_PATTERN_1, train_set))
- // break;
- usleep(400);
- dp_set_training(output, DP_TRAINING_PATTERN_1);
-
- usleep(100);
+ usleep(100);
if (!atom_dp_get_link_status(output, link_status))
break;
commit 04cc99f3090877a1a55252f762bcc3568739033a
Author: Dave Airlie <airlied at redhat.com>
Date: Mon Jul 13 23:46:30 2009 -0400
radeon: more displayport fixes
diff --git a/src/atombios_output.c b/src/atombios_output.c
index ccd7fd7..1e8ad74 100644
--- a/src/atombios_output.c
+++ b/src/atombios_output.c
@@ -1528,14 +1528,15 @@ atombios_output_mode_set(xf86OutputPtr output,
atombios_output_dig_transmitter_setup(output, ATOM_TRANSMITTER_ACTION_DISABLE);
atombios_output_dig_encoder_setup(output, ATOM_DISABLE);
+ /* setup and enable the encoder and transmitter */
+ atombios_output_dig_encoder_setup(output, ATOM_ENABLE);
+ atombios_output_dig_transmitter_setup(output, ATOM_TRANSMITTER_ACTION_SETUP);
+ atombios_output_dig_transmitter_setup(output, ATOM_TRANSMITTER_ACTION_ENABLE);
+
if (radeon_output->ConnectorType == CONNECTOR_DISPLAY_PORT && radeon_output->MonType == MT_DP) {
do_displayport_dance(output, mode, adjusted_mode);
- //return;
} else {
- /* setup and enable the encoder and transmitter */
- atombios_output_dig_encoder_setup(output, ATOM_ENABLE);
- atombios_output_dig_transmitter_setup(output, ATOM_TRANSMITTER_ACTION_SETUP);
- atombios_output_dig_transmitter_setup(output, ATOM_TRANSMITTER_ACTION_ENABLE);
+
}
break;
case ENCODER_OBJECT_ID_INTERNAL_DDI:
@@ -1881,47 +1882,80 @@ int RADEON_DP_DigTransmitterSetup_VSEMPH(xf86OutputPtr output, uint8_t lane_num,
RADEONOutputPrivatePtr radeon_output = output->driver_private;
RADEONInfoPtr info = RADEONPTR(output->scrn);
radeon_encoder_ptr radeon_encoder = radeon_get_encoder(output);
- DIG_TRANSMITTER_CONTROL_PARAMETERS_V2 v2;
+ union dig_transmitter_control disp_data;
AtomBiosArgRec data;
unsigned char *space;
int clock = radeon_output->pixel_clock;
int dig_block = radeon_output->dig_block;
int num = 0;
int index = 0;
+ int major, minor;
if (radeon_encoder == NULL)
return ATOM_NOT_IMPLEMENTED;
- memset(&v2,0, sizeof(v2));
+ memset(&disp_data, 0, sizeof(disp_data));
- index = GetIndexIntoMasterTable(COMMAND, UNIPHYTransmitterControl);
+ if (IS_DCE32_VARIANT)
+ index = GetIndexIntoMasterTable(COMMAND, UNIPHYTransmitterControl);
+ else {
+ switch (radeon_encoder->encoder_id) {
+ case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
+ if (radeon_output->linkb)
+ index = GetIndexIntoMasterTable(COMMAND, DIG2TransmitterControl);
+ else
+ index = GetIndexIntoMasterTable(COMMAND, DIG1TransmitterControl);
+ break;
+ case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
+ index = GetIndexIntoMasterTable(COMMAND, DIG2TransmitterControl);
+ break;
+ }
+ }
- v2.asMode.ucLaneSel = lane_num;
- v2.asMode.ucLaneSet = lane_set;
- v2.ucAction = ATOM_TRANSMITTER_ACTION_SETUP_VSEMPH;
- v2.acConfig.fDPConnector = 1;
- if (dig_block)
- v2.acConfig.ucEncoderSel = 1;
+ atombios_get_command_table_version(info->atomBIOS, index, &major, &minor);
+ disp_data.v1.ucAction = ATOM_TRANSMITTER_ACTION_SETUP_VSEMPH;
- switch (radeon_encoder->encoder_id) {
- case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
- v2.acConfig.ucTransmitterSel = 0;
- num = 0;
- break;
- case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
- v2.acConfig.ucTransmitterSel = 1;
- num = 1;
- break;
- case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
- v2.acConfig.ucTransmitterSel = 2;
- num = 2;
- break;
- }
+ disp_data.v1.asMode.ucLaneSel = lane_num;
+ disp_data.v1.asMode.ucLaneSet = lane_set;
+
+ if (IS_DCE32_VARIANT) {
+ disp_data.v2.acConfig.fDPConnector = 1;
+ if (dig_block)
+ disp_data.v2.acConfig.ucEncoderSel = 1;
+
+ switch (radeon_encoder->encoder_id) {
+ case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
+ disp_data.v2.acConfig.ucTransmitterSel = 0;
+ num = 0;
+ break;
+ case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
+ disp_data.v2.acConfig.ucTransmitterSel = 1;
+ num = 1;
+ break;
+ case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
+ disp_data.v2.acConfig.ucTransmitterSel = 2;
+ num = 2;
+ break;
+ }
+ } else {
+ switch (radeon_encoder->encoder_id) {
+ case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
+ if (radeon_output->linkb)
+ disp_data.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_DIG2_ENCODER;
+ else
+ disp_data.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_DIG1_ENCODER;
+ break;
+ if (info->IsIGP) {
+ } else {
+
+ }
+ }
+ }
data.exec.index = index;
data.exec.dataSpace = (void *)&space;
- data.exec.pspace = &v2;
+ data.exec.pspace = &disp_data;
if (RHDAtomBiosFunc(info->atomBIOS->scrnIndex, info->atomBIOS, ATOMBIOS_EXEC, &data) == ATOM_SUCCESS) {
if (IS_DCE32_VARIANT)
@@ -1944,9 +1978,9 @@ static Bool atom_dp_aux_native_write(xf86OutputPtr output, uint16_t address,
int ret;
dp_msg_len = 4;
- msg[2] = AUX_NATIVE_WRITE << 4;
msg[0] = address;
msg[1] = address >> 8;
+ msg[2] = AUX_NATIVE_WRITE << 4;
dp_msg_len += send_bytes;
msg[3] = (dp_msg_len << 4)| (send_bytes - 1);
@@ -2231,7 +2265,7 @@ atom_dp_get_link_status(xf86OutputPtr output,
RADEONOutputPrivatePtr radeon_output = output->driver_private;
ScrnInfoPtr pScrn = output->scrn;
int ret;
- ret = atom_dp_aux_native_read(output, DP_LANE0_1_STATUS, 1,
+ ret = atom_dp_aux_native_read(output, DP_LANE0_1_STATUS, 100,
DP_LINK_STATUS_SIZE, link_status);
if (!ret) {
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "dp link status failed\n");
@@ -2477,7 +2511,7 @@ static void dp_update_dpvs_emph(xf86OutputPtr output, uint8_t train_set[4])
for (i = 0; i < radeon_output->dp_lane_count; i++)
RADEON_DP_DigTransmitterSetup_VSEMPH(output, i, train_set[i]);
- atom_dp_aux_native_write(output, DP_TRAINING_LANE0_SET, 4, train_set);
+ atom_dp_aux_native_write(output, DP_TRAINING_LANE0_SET, radeon_output->dp_lane_count, train_set);
}
static void do_displayport_dance(xf86OutputPtr output, DisplayModePtr mode, DisplayModePtr adjusted_mode)
@@ -2504,6 +2538,8 @@ static void do_displayport_dance(xf86OutputPtr output, DisplayModePtr mode, Disp
return;
}
+ memset(train_set, 0, 4);
+
/* set up link configuration */
radeon_dp_mode_set(output, mode, adjusted_mode);
@@ -2522,7 +2558,6 @@ static void do_displayport_dance(xf86OutputPtr output, DisplayModePtr mode, Disp
RADEONDPEncoderService(output, ATOM_DP_ACTION_TRAINING_PATTERN_SEL, enc_id, 0);
dp_update_dpvs_emph(output, train_set);
- memset(train_set, 0, 4);
/* loop around doing configuration reads and DP encoder setups */
clock_recovery = FALSE;
tries = 0;
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