xf86-video-ati: Branch 'master'

[Alex Deucher]

 src/legacy_crtc.c |   10 ++++++++++
 1 file changed, 10 insertions(+)

New commits:
commit 3a30210d50b27f8772fc5045133940246764fce9
Author: Matthias Hopf <mhopf at suse.de>
Date:   Tue Dec 15 10:53:48 2009 -0500

    fix 200M freezes on VT switch if CRTC is disabled
    
    It appears that RS4xx chips need to have the crtc
    enabled when the timing is programmed.
    
    agd5f: minor fixes/cleanup of the original patch

diff --git a/src/legacy_crtc.c b/src/legacy_crtc.c
index ed339ab..0ad762b 100644
--- a/src/legacy_crtc.c
+++ b/src/legacy_crtc.c
@@ -912,6 +912,11 @@ RADEONInitCrtcRegisters(xf86CrtcPtr crtc, RADEONSavePtr save,
 			      ? RADEON_CRTC_INTERLACE_EN
 			      : 0));
 
+    /* 200M freezes on VT switch sometimes if CRTC is disabled */
+    if ((info->ChipFamily == CHIP_FAMILY_RS400) ||
+	(info->ChipFamily == CHIP_FAMILY_RS480))
+	save->crtc_gen_cntl |= RADEON_CRTC_EN;
+
     save->crtc_ext_cntl |= (RADEON_XCRT_CNT_EN|
 			    RADEON_CRTC_VSYNC_DIS |
 			    RADEON_CRTC_HSYNC_DIS |
@@ -1162,6 +1167,11 @@ RADEONInitCrtc2Registers(xf86CrtcPtr crtc, RADEONSavePtr save,
 				? RADEON_CRTC2_INTERLACE_EN
 				: 0));
 
+    /* 200M freezes on VT switch sometimes if CRTC is disabled */
+    if ((info->ChipFamily == CHIP_FAMILY_RS400) ||
+	(info->ChipFamily == CHIP_FAMILY_RS480))
+	save->crtc2_gen_cntl |= RADEON_CRTC2_EN;
+
     save->disp2_merge_cntl = info->SavedReg->disp2_merge_cntl;
     save->disp2_merge_cntl &= ~(RADEON_DISP2_RGB_OFFSET_EN);