xf86-video-intel: src/i830.h

[Zhenyu Wang]

 src/i830.h |    2 ++
 1 file changed, 2 insertions(+)

New commits:
commit 8f64837e56b2de0fb8a9100d1a844fd3f18d751c
Author: Shaohua Li <shaohua.li at intel.com>
Date:   Mon Feb 23 15:19:25 2009 +0800

    Disable FBC on IGD for UMS
    
    It appears the new chip doesn't support FBC currently.
    
    Signed-off-by: Shaohua Li<shaohua.li at intel.com>
    Signed-off-by: Zhenyu Wang <zhenyu.z.wang at intel.com>

diff --git a/src/i830.h b/src/i830.h
index 5772f1d..9b99110 100644
--- a/src/i830.h
+++ b/src/i830.h
@@ -955,6 +955,8 @@ static inline int i830_fb_compression_supported(I830Ptr pI830)
 	return FALSE;
     if (IS_I810(pI830) || IS_I815(pI830) || IS_I830(pI830))
 	return FALSE;
+    if (IS_IGD(pI830))
+	return FALSE;
     /* fbc depends on tiled surface. And we don't support tiled
      * front buffer with XAA now.
      */