xf86-video-intel: src/i830_memory.c

[Carl Worth]

 src/i830_memory.c |   17 +++++++++--------
 1 file changed, 9 insertions(+), 8 deletions(-)

New commits:
commit 620e97bbd6a811ad69b8ac94df1fe2c9edf65549
Author: Jesse Barnes <jbarnes at virtuousgeek.org>
Date:   Wed Apr 8 15:49:00 2009 -0700

    Don't enable kernel execbuf fencing w/EXA
    
    If we enable kernel execbuf fence register management, it's best if the
    kernel manages all fence registers.  This works fine if the accel
    method is managing pixmaps or doesn't use offscreen pixmaps.  However
    with EXA, pixmap accesses are done relative to the framebuffer BAR
    mapping (pI830->FbBase) and the Screen pixmap address.  So if we try to
    set the screen pixmap to point at a GTT mapped (and therefore properly
    fenced) address, later calls to intel_get_pixmap_offset() will call
    into EXA, which will use the pseudo-random pixmap addr and the EXA
    offscreen base addr (which is really just FbBase) to calculate the
    offset.  This will fail.  So disable kernel fence reg management in the
    EXA case (this is easier than adding proper EXA pixmap management to
    xf86-video-intel, and makes more sense since we'll be removing EXA soon
    anyway).
    
    Fixes FDO #21027.
    
    Also happens to fix FDO #21029 (as tested by Carl Worth <cworth at cworth.org).

diff --git a/src/i830_memory.c b/src/i830_memory.c
index e3314c5..0f8d90d 100644
--- a/src/i830_memory.c
+++ b/src/i830_memory.c
@@ -533,14 +533,15 @@ i830_allocator_init(ScrnInfoPtr pScrn, unsigned long offset, unsigned long size)
 		struct drm_i915_gem_init init;
 		int ret;
 
-		sp.param = I915_SETPARAM_NUM_USED_FENCES;
-		sp.value = 0; /* kernel gets them all */
-
-		ret = drmCommandWrite(pI830->drmSubFD, DRM_I915_SETPARAM, &sp,
-				      sizeof(sp));
-		if (ret == 0)
-		    pI830->kernel_exec_fencing = TRUE;
-
+		if (pI830->accel == ACCEL_UXA) {
+		    sp.param = I915_SETPARAM_NUM_USED_FENCES;
+		    sp.value = 0; /* kernel gets them all */
+
+		    ret = drmCommandWrite(pI830->drmSubFD, DRM_I915_SETPARAM,
+					  &sp, sizeof(sp));
+		    if (ret == 0)
+			pI830->kernel_exec_fencing = TRUE;
+		}
 		init.gtt_start = pI830->memory_manager->offset;
 		init.gtt_end = pI830->memory_manager->offset +
 		    pI830->memory_manager->size;