xf86-video-ati: Branch 'master'

[Alex Deucher]

 src/atombios_crtc.c |   14 ++++++++++++++
 src/radeon_reg.h    |    7 +++++++
 2 files changed, 21 insertions(+)

New commits:
commit 215e12f9c0e8ac62c23af1add776ef88f9a0dc54
Author: Eduard Fuchs <edfuchs at uni-kassel.de>
Date:   Thu Apr 2 12:36:59 2009 -0400

    Enable byte swapping for r6xx/r7xx Hardware
    
    Patch from Eduard Fuchs with some cleanup from me.
    
    Tested at 32 bpp on MPC8641HPCN board (PowerPC) with
    HD2400 PCIe card

diff --git a/src/atombios_crtc.c b/src/atombios_crtc.c
index 50db578..31c032b 100644
--- a/src/atombios_crtc.c
+++ b/src/atombios_crtc.c
@@ -517,6 +517,9 @@ atombios_crtc_mode_set(xf86CrtcPtr crtc,
 
     if (IS_AVIVO_VARIANT) {
 	uint32_t fb_format;
+#if X_BYTE_ORDER == X_BIG_ENDIAN
+	uint32_t fb_swap = R600_D1GRPH_SWAP_ENDIAN_NONE;
+#endif
 
 	switch (crtc->scrn->bitsPerPixel) {
 	case 15:
@@ -524,10 +527,16 @@ atombios_crtc_mode_set(xf86CrtcPtr crtc,
 	    break;
 	case 16:
 	    fb_format = AVIVO_D1GRPH_CONTROL_DEPTH_16BPP | AVIVO_D1GRPH_CONTROL_16BPP_RGB565;
+#if X_BYTE_ORDER == X_BIG_ENDIAN
+	    fb_swap = R600_D1GRPH_SWAP_ENDIAN_16BIT;
+#endif
 	    break;
 	case 24:
 	case 32:
 	    fb_format = AVIVO_D1GRPH_CONTROL_DEPTH_32BPP | AVIVO_D1GRPH_CONTROL_32BPP_ARGB8888;
+#if X_BYTE_ORDER == X_BIG_ENDIAN
+	    fb_swap = R600_D1GRPH_SWAP_ENDIAN_32BIT;
+#endif
 	    break;
 	default:
 	    FatalError("Unsupported screen depth: %d\n", xf86GetDepth());
@@ -555,6 +564,11 @@ atombios_crtc_mode_set(xf86CrtcPtr crtc,
 	OUTREG(AVIVO_D1GRPH_SECONDARY_SURFACE_ADDRESS + radeon_crtc->crtc_offset, fb_location);
 	OUTREG(AVIVO_D1GRPH_CONTROL + radeon_crtc->crtc_offset, fb_format);
 
+#if X_BYTE_ORDER == X_BIG_ENDIAN
+	if (info->ChipFamily >= CHIP_FAMILY_R600)
+	    OUTREG(R600_D1GRPH_SWAP_CONTROL + radeon_crtc->crtc_offset, fb_swap);
+#endif
+
 	OUTREG(AVIVO_D1GRPH_SURFACE_OFFSET_X + radeon_crtc->crtc_offset, 0);
 	OUTREG(AVIVO_D1GRPH_SURFACE_OFFSET_Y + radeon_crtc->crtc_offset, 0);
 	OUTREG(AVIVO_D1GRPH_X_START + radeon_crtc->crtc_offset, 0);
diff --git a/src/radeon_reg.h b/src/radeon_reg.h
index a130794..d74a30a 100644
--- a/src/radeon_reg.h
+++ b/src/radeon_reg.h
@@ -3627,6 +3627,13 @@
 #       define AVIVO_D1GRPH_MACRO_ADDRESS_MODE          (1<<21)
 
 #define AVIVO_D1GRPH_LUT_SEL                                    0x6108
+
+#define R600_D1GRPH_SWAP_CONTROL                               0x610C
+#       define R600_D1GRPH_SWAP_ENDIAN_NONE                    (0 << 0)
+#       define R600_D1GRPH_SWAP_ENDIAN_16BIT                   (1 << 0)
+#       define R600_D1GRPH_SWAP_ENDIAN_32BIT                   (2 << 0)
+#       define R600_D1GRPH_SWAP_ENDIAN_64BIT                   (3 << 0)
+
 #define AVIVO_D1GRPH_PRIMARY_SURFACE_ADDRESS                    0x6110
 #define AVIVO_D1GRPH_SECONDARY_SURFACE_ADDRESS                  0x6118
 #define AVIVO_D1GRPH_PITCH                                      0x6120