xf86-video-ati: Branch 'master' - 3 commits
Michel Dänzer
daenzer at kemper.freedesktop.org
Tue Sep 30 02:38:28 PDT 2008
src/legacy_crtc.c | 3 +++
src/radeon_driver.c | 2 +-
src/radeon_drm.h | 5 +++--
src/radeon_video.c | 30 +++++++++++++++++-------------
4 files changed, 24 insertions(+), 16 deletions(-)
New commits:
commit c359c2a31caf9f75b9fc6b6bcbc3e9dc1fe404ba
Author: Michel Dänzer <michel at tungstengraphics.com>
Date: Tue Sep 30 11:04:54 2008 +0200
Pass base offset into RADEONDisplayVideo() explicitly.
This prevents the base offset from flipping back and forth if double buffering
is enabled and the two buffers start on different sides of a 4 MB boundary.
Should fix http://bugs.freedesktop.org/show_bug.cgi?id=17254 ; please don't
reopen that bug report without attaching a log file captured after reproducing
the problem with this fix.
diff --git a/src/radeon_video.c b/src/radeon_video.c
index 18299d5..47b0497 100644
--- a/src/radeon_video.c
+++ b/src/radeon_video.c
@@ -2425,6 +2425,7 @@ RADEONDisplayVideo(
xf86CrtcPtr crtc,
RADEONPortPrivPtr pPriv,
int id,
+ int base_offset,
int offset1, int offset2,
int offset3, int offset4,
int offset5, int offset6,
@@ -2464,7 +2465,6 @@ RADEONDisplayVideo(
RADEONOutputPrivatePtr radeon_output;
xf86OutputPtr output;
RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private;
- int base_offset;
is_rgb=0; is_planar=0;
switch(id){
@@ -2598,9 +2598,7 @@ RADEONDisplayVideo(
* prevent the buffer offsets from exceeding the hardware limit of 128 MB.
* The base address must be aligned to a multiple of 4 MB.
*/
- base_offset = ((info->fbLocation +
- min(offset1, min(offset2, min(offset3, min(offset4,
- min(offset5, offset6)))))) & (~0 << 22)) -
+ base_offset = ((info->fbLocation + base_offset) & (~0 << 22)) -
info->fbLocation;
offset1 -= base_offset;
@@ -2742,6 +2740,8 @@ RADEONDisplayVideo(
OUTREG(RADEON_OV0_P2_X_START_END, (src_w + leftuv - 1) | (leftuv << 16));
OUTREG(RADEON_OV0_P3_X_START_END, (src_w + leftuv - 1) | (leftuv << 16));
if (info->ModeReg->ov0_base_addr != (info->fbLocation + base_offset)) {
+ ErrorF("Changing OV0_BASE_ADDR from 0x%08x to 0x%08x\n",
+ info->ModeReg->ov0_base_addr, info->fbLocation + base_offset);
info->ModeReg->ov0_base_addr = info->fbLocation + base_offset;
OUTREG(RADEON_OV0_BASE_ADDR, info->ModeReg->ov0_base_addr);
}
@@ -3049,9 +3049,10 @@ RADEONPutImage(
/* FIXME: someone should look at these offsets, I don't think it makes sense how
they are handled throughout the source. */
- RADEONDisplayVideo(pScrn, crtc, pPriv, idconv, offset, offset + d2line, offset + d3line,
- offset, offset + d2line, offset + d3line, width, height, dstPitch,
- xa, xb, ya, &dstBox, src_w, src_h, drw_w, drw_h, METHOD_BOB);
+ RADEONDisplayVideo(pScrn, crtc, pPriv, idconv, pPriv->video_offset, offset,
+ offset + d2line, offset + d3line, offset, offset + d2line,
+ offset + d3line, width, height, dstPitch, xa, xb, ya,
+ &dstBox, src_w, src_h, drw_w, drw_h, METHOD_BOB);
pPriv->videoStatus = CLIENT_VIDEO_ON;
@@ -3317,8 +3318,9 @@ RADEONDisplaySurface(
surface->offsets[0], surface->offsets[0],
surface->offsets[0], surface->offsets[0],
surface->offsets[0], surface->offsets[0],
- surface->width, surface->height, surface->pitches[0],
- xa, xb, ya, &dstBox, src_w, src_h, drw_w, drw_h, METHOD_BOB);
+ surface->offsets[0], surface->width, surface->height,
+ surface->pitches[0], xa, xb, ya, &dstBox, src_w, src_h,
+ drw_w, drw_h, METHOD_BOB);
if (portPriv->autopaint_colorkey)
xf86XVFillKeyHelper(pScrn->pScreen, portPriv->colorKey, clipBoxes);
@@ -3605,10 +3607,12 @@ RADEONPutVideo(
RADEONFillKeyHelper(pDraw, pPriv->colorKey, clipBoxes);
}
- RADEONDisplayVideo(pScrn, crtc, pPriv, id, offset1+top*srcPitch, offset2+top*srcPitch,
- offset3+top*srcPitch, offset4+top*srcPitch, offset1+top*srcPitch,
- offset2+top*srcPitch, width, height, dstPitch*mult/2,
- xa, xb, ya, &dstBox, src_w, src_h*mult/2, drw_w, drw_h, pPriv->overlay_deinterlacing_method);
+ RADEONDisplayVideo(pScrn, crtc, pPriv, id, pPriv->video_offset,
+ offset1+top*srcPitch, offset2+top*srcPitch,
+ offset3+top*srcPitch, offset4+top*srcPitch,
+ offset1+top*srcPitch, offset2+top*srcPitch, width, height,
+ dstPitch*mult/2, xa, xb, ya, &dstBox, src_w, src_h*mult/2,
+ drw_w, drw_h, pPriv->overlay_deinterlacing_method);
RADEONWaitForFifo(pScrn, 1);
OUTREG(RADEON_OV0_REG_LOAD_CNTL, RADEON_REG_LD_CTL_LOCK);
commit ba21d5ae7fbbf5828c44c41655aff8b182453e2e
Author: Michel Dänzer <michel at tungstengraphics.com>
Date: Tue Sep 30 11:03:04 2008 +0200
Update GEN_INT_CNTL register value after calling DRM modeset ioctl.
Fixes sync-to-vblank hangs after mode switch with DRM vblank-rework.
diff --git a/src/legacy_crtc.c b/src/legacy_crtc.c
index 89fbb03..75ab6c8 100644
--- a/src/legacy_crtc.c
+++ b/src/legacy_crtc.c
@@ -623,6 +623,7 @@ radeon_crtc_modeset_ioctl(xf86CrtcPtr crtc, Bool post)
RADEONInfoPtr info = RADEONPTR(crtc->scrn);
RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private;
struct drm_modeset_ctl modeset;
+ unsigned char *RADEONMMIO = info->MMIO;
if (!info->directRenderingEnabled)
return;
@@ -631,6 +632,8 @@ radeon_crtc_modeset_ioctl(xf86CrtcPtr crtc, Bool post)
modeset.cmd = post ? _DRM_POST_MODESET : _DRM_PRE_MODESET;
ioctl(info->dri->drmFD, DRM_IOCTL_MODESET_CTL, &modeset);
+
+ info->ModeReg->gen_int_cntl = INREG( RADEON_GEN_INT_CNTL );
#endif
}
commit 3110646daf05fa09faaa70066cc8c3db1bb07cec
Author: Michel Dänzer <michel at tungstengraphics.com>
Date: Sun Sep 14 11:46:36 2008 +0200
Fix -Werror build.
diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index 42b6d0c..67f70cb 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -5519,7 +5519,7 @@ void RADEONLeaveVT(int scrnIndex, int flags)
if (info->dri->textureSize) {
drm_radeon_sarea_t *pSAREAPriv =
(drm_radeon_sarea_t*)DRIGetSAREAPrivate(pScrn->pScreen);
- drmTextureRegionPtr list = pSAREAPriv->tex_list[0];
+ struct drm_tex_region *list = pSAREAPriv->tex_list[0];
int age = ++pSAREAPriv->tex_age[0];
i = 0;
diff --git a/src/radeon_drm.h b/src/radeon_drm.h
index c0d566c..66cefb7 100644
--- a/src/radeon_drm.h
+++ b/src/radeon_drm.h
@@ -543,8 +543,9 @@ typedef struct drm_radeon_init {
unsigned int depth_bpp;
unsigned int depth_offset, depth_pitch;
- unsigned long fb_offset DEPRECATED; /* deprecated, driver asks hardware */
- unsigned long mmio_offset DEPRECATED; /* deprecated, driver asks hardware */
+ /* DEPRECATED commented out below to allow for -Werror build */
+ unsigned long fb_offset /*DEPRECATED*/; /* deprecated, driver asks hardware */
+ unsigned long mmio_offset /*DEPRECATED*/; /* deprecated, driver asks hardware */
unsigned long ring_offset;
unsigned long ring_rptr_offset;
unsigned long buffers_offset;
More information about the xorg-commit
mailing list