xf86-video-intel: Branch 'xf86-video-intel-2.5-branch' - 7 commits - src/i830_crt.c src/i830_hdmi.c src/i830_memory.c src/i830_video.c src/i965_render.c
Jesse Barnes
jbarnes at kemper.freedesktop.org
Mon Sep 22 09:59:57 PDT 2008
src/i830_crt.c | 45 ++++++++++++++++++++++++++++++++++++++++++++-
src/i830_hdmi.c | 10 +++++++++-
src/i830_memory.c | 29 +++++++++++++++++++++++++++++
src/i830_video.c | 14 +++++++++-----
src/i965_render.c | 4 ++--
5 files changed, 93 insertions(+), 9 deletions(-)
New commits:
commit 9a7da65e624060a37eef989963a9c79f13df30d3
Merge: 043b6e7... 2f93cfb...
Author: Jesse Barnes <jbarnes at virtuousgeek.org>
Date: Mon Sep 22 09:59:52 2008 -0700
Merge branch 'master' into xf86-video-intel-2.5-branch
commit 2f93cfbc7e96acc32efb5e1ca49b817a81cba6e3
Author: Zhenyu Wang <zhenyu.z.wang at intel.com>
Date: Fri Sep 19 15:20:55 2008 +0800
Fix output detection for DVI-I
For CRT this trys to probe all possible port for EDID and
detects got confirmed by EDID's d/a type bit.
For HDMI/DVI, also using EDID d/a type bit to ensure it should
handle the connect or not.
diff --git a/src/i830_crt.c b/src/i830_crt.c
index 8274c0c..5812e2b 100644
--- a/src/i830_crt.c
+++ b/src/i830_crt.c
@@ -410,6 +410,49 @@ i830_crt_get_crtc(xf86OutputPtr output)
}
#endif
+static xf86MonPtr
+i830_get_edid(xf86OutputPtr output, int gpio_reg, char *gpio_str)
+{
+ I830OutputPrivatePtr intel_output = output->driver_private;
+ xf86MonPtr edid_mon = NULL;
+
+ /* Set up the DDC bus. */
+ if (gpio_reg != GPIOA)
+ I830I2CInit(output->scrn, &intel_output->pDDCBus, gpio_reg, gpio_str);
+
+ edid_mon = xf86OutputGetEDID (output, intel_output->pDDCBus);
+
+ if (!edid_mon || DIGITAL(edid_mon->features.input_type)) {
+ xf86DestroyI2CBusRec(intel_output->pDDCBus, TRUE, TRUE);
+ if (edid_mon) {
+ xfree(edid_mon);
+ edid_mon = NULL;
+ }
+ }
+ return edid_mon;
+}
+
+static DisplayModePtr
+i830_crt_get_modes (xf86OutputPtr output)
+{
+ DisplayModePtr modes;
+ xf86MonPtr edid_mon = NULL;
+
+ /* Try to probe normal CRT port, and also digital port for output
+ in DVI-I mode. */
+ if ((edid_mon = i830_get_edid(output, GPIOA, "CRTDDC_A")))
+ goto found;
+ if ((edid_mon = i830_get_edid(output, GPIOD, "CRTDDC_D")))
+ goto found;
+ if ((edid_mon = i830_get_edid(output, GPIOE, "CRTDDC_E")))
+ goto found;
+found:
+ xf86OutputSetEDID (output, edid_mon);
+
+ modes = xf86OutputGetEDIDModes (output);
+ return modes;
+}
+
static const xf86OutputFuncsRec i830_crt_output_funcs = {
.dpms = i830_crt_dpms,
.save = i830_crt_save,
@@ -420,7 +463,7 @@ static const xf86OutputFuncsRec i830_crt_output_funcs = {
.mode_set = i830_crt_mode_set,
.commit = i830_output_commit,
.detect = i830_crt_detect,
- .get_modes = i830_ddc_get_modes,
+ .get_modes = i830_crt_get_modes,
.destroy = i830_crt_destroy,
#ifdef RANDR_GET_CRTC_INTERFACE
.get_crtc = i830_crt_get_crtc,
diff --git a/src/i830_hdmi.c b/src/i830_hdmi.c
index d56eec9..44e5c05 100644
--- a/src/i830_hdmi.c
+++ b/src/i830_hdmi.c
@@ -139,6 +139,8 @@ i830_hdmi_detect(xf86OutputPtr output)
struct i830_hdmi_priv *dev_priv = intel_output->dev_priv;
I830Ptr pI830 = I830PTR(pScrn);
uint32_t temp, bit;
+ xf86OutputStatus status;
+ xf86MonPtr edid_mon;
/* For G4X, PEG_BAND_GAP_DATA 3:0 must first be written 0xd.
* Failure to do so will result in spurious interrupts being
@@ -171,9 +173,15 @@ i830_hdmi_detect(xf86OutputPtr output)
}
if ((INREG(PORT_HOTPLUG_STAT) & bit) != 0)
- return XF86OutputStatusConnected;
+ status = XF86OutputStatusConnected;
else
return XF86OutputStatusDisconnected;
+
+ edid_mon = xf86OutputGetEDID (output, intel_output->pDDCBus);
+ if (!edid_mon || !DIGITAL(edid_mon->features.input_type))
+ status = XF86OutputStatusDisconnected;
+ xfree(edid_mon);
+ return status;
}
static void
commit 1fbe4d602816c9dfc5fba917b9fdc257d8d025b0
Author: David Schleef <ds at schleef.org>
Date: Thu Sep 18 15:37:00 2008 +0800
Bug #17277: fix upscaling limit
Oh duh (i830_video.c):
/* Clamp dst width & height to 7x of src (overlay limit) */
if(drw_w > (src_w * 7))
drw_w = src_w * 7;
if(drw_h > (src_h * 7))
drw_h = src_h * 7;
The condition I see in the documentation appears to be src_h/drw_h < 8, that
is, src_h < 8*drw_h. It appears this was "fixed" incorrectly in e784e152.
It seems difficult to believe that this limitation would exist at all for the
texture unit.
diff --git a/src/i830_video.c b/src/i830_video.c
index 5e6ebd7..6645daa 100644
--- a/src/i830_video.c
+++ b/src/i830_video.c
@@ -2245,12 +2245,16 @@ I830PutImage(ScrnInfoPtr pScrn,
pI830->entityPrivate->XvInUse = i830_crtc_pipe (pPriv->current_crtc);;
}
- /* Clamp dst width & height to 7x of src (overlay limit) */
- if(drw_w > (src_w * 7))
- drw_w = src_w * 7;
+ if (!pPriv->textured) {
+ /* If dst width and height are less than 1/8th the src size, the
+ * src/dst scale factor becomes larger than 8 and doesn't fit in
+ * the scale register. */
+ if(src_w >= (drw_w * 8))
+ drw_w = src_w/7;
- if(drw_h > (src_h * 7))
- drw_h = src_h * 7;
+ if(src_h >= (drw_h * 8))
+ drw_h = src_h/7;
+ }
/* Clip */
x1 = src_x;
commit bc36608e321e01a2be792688b4b734bb7c0667f7
Author: Zhenyu Wang <zhenyu.z.wang at intel.com>
Date: Thu Sep 18 10:42:33 2008 +0800
Check display stride limit when allocate front buffer
diff --git a/src/i830_memory.c b/src/i830_memory.c
index 2cbdd17..ecfdf2a 100644
--- a/src/i830_memory.c
+++ b/src/i830_memory.c
@@ -158,6 +158,29 @@ i830_get_fence_size(ScrnInfoPtr pScrn, unsigned long size)
}
static Bool
+i830_check_display_stride(ScrnInfoPtr pScrn, int stride, Bool tiling)
+{
+ I830Ptr pI830 = I830PTR(pScrn);
+ int limit = KB(32);
+
+ /* 8xx spec has always 8K limit, but tests show larger limit in
+ non-tiling mode, which makes large monitor work. */
+ if ((IS_845G(pI830) || IS_I85X(pI830)) && tiling)
+ limit = KB(8);
+
+ if (IS_I915(pI830) && tiling)
+ limit = KB(8);
+
+ if (IS_I965G(pI830) && tiling)
+ limit = KB(16);
+
+ if (stride <= limit)
+ return TRUE;
+ else
+ return FALSE;
+}
+
+static Bool
i830_bind_memory(ScrnInfoPtr pScrn, i830_memory *mem)
{
I830Ptr pI830 = I830PTR(pScrn);
@@ -1200,6 +1223,12 @@ i830_allocate_framebuffer(ScrnInfoPtr pScrn, I830Ptr pI830, BoxPtr FbMemBox,
else
tiling = pI830->tiling;
+ if (!i830_check_display_stride(pScrn, pitch, tiling)) {
+ xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Front buffer stride %d kB "
+ "exceed display limit\n", pitch/1024);
+ return NULL;
+ }
+
/* Attempt to allocate it tiled first if we have page flipping on. */
if (tiling && IsTileable(pScrn, pitch)) {
/* XXX: probably not the case on 965 */
commit 62b75df84c893bf28e20014cf88ce45064611dc9
Author: Xiang, Haihao <haihao.xiang at intel.com>
Date: Tue Sep 16 13:21:43 2008 -0700
Move bufmgr init earlier so it's available at I830DRIDoMappings time.
Fixes a crash with non-GEM mode. Bug #17540.
diff --git a/src/i830_driver.c b/src/i830_driver.c
index 5e505cf..9bf0a64 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -3254,6 +3254,14 @@ I830ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
}
#endif
+ if (!pI830->use_drm_mode) {
+ DPRINTF(PFX, "assert( if(!I830MapMem(pScrn)) )\n");
+ if (!I830MapMem(pScrn))
+ return FALSE;
+ pScrn->memPhysBase = (unsigned long)pI830->FbBase;
+ }
+ i830_init_bufmgr(pScrn);
+
#ifdef XF86DRI
/*
* Setup DRI after visuals have been established, but before fbScreenInit
@@ -3287,13 +3295,6 @@ I830ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
pI830->allowPageFlip ? "en" : "dis");
#endif
- if (!pI830->use_drm_mode) {
- DPRINTF(PFX, "assert( if(!I830MapMem(pScrn)) )\n");
- if (!I830MapMem(pScrn))
- return FALSE;
- pScrn->memPhysBase = (unsigned long)pI830->FbBase;
- }
-
if (I830IsPrimary(pScrn)) {
pScrn->fbOffset = pI830->front_buffer->offset;
} else {
@@ -3311,8 +3312,6 @@ I830ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
return FALSE;
}
- i830_init_bufmgr(pScrn);
-
i830_disable_render_standby(pScrn);
DPRINTF(PFX, "assert( if(!I830EnterVT(scrnIndex, 0)) )\n");
commit 188d58dac9a87b56dbc34ec219cd196928bbcf64
Author: Xiang, Haihao <haihao.xiang at intel.com>
Date: Tue Sep 16 11:49:39 2008 -0700
Put back check for pI830->hw_status in setting hws in non-GEM mode.
Fixes crashes on non-GEM systems with physical hardware status page.
Bug #17540
diff --git a/src/i830_driver.c b/src/i830_driver.c
index e48e20e..5e505cf 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -3693,7 +3693,7 @@ I830EnterVT(int scrnIndex, int flags)
* operation which accessing that page, like irq install, etc.
*/
if (pI830->starting && !pI830->memory_manager) {
- if (!I830DRISetHWS(pScrn)) {
+ if (pI830->hw_status != NULL && !I830DRISetHWS(pScrn)) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"Fail to setup hardware status page.\n");
I830DRICloseScreen(pScrn->pScreen);
commit e2743a409a02978ca8e953dbbeeb96f61bbd5ce6
Author: Jesse Barnes <jbarnes at virtuousgeek.org>
Date: Fri Sep 12 14:22:48 2008 -0700
Only BO map render state if kernel mode setting is active
We'll probably end up doing this differently, but avoid this path for now.
diff --git a/src/i965_render.c b/src/i965_render.c
index a4334c6..7dee5f3 100644
--- a/src/i965_render.c
+++ b/src/i965_render.c
@@ -1450,7 +1450,7 @@ gen4_render_state_init(ScrnInfoPtr pScrn)
render_state->card_state_offset = pI830->gen4_render_state_mem->offset;
- if (pI830->gen4_render_state_mem->bo) {
+ if (pI830->use_drm_mode) {
ret = dri_bo_map(pI830->gen4_render_state_mem->bo, 1);
if (ret) {
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
@@ -1474,7 +1474,7 @@ gen4_render_state_cleanup(ScrnInfoPtr pScrn)
{
I830Ptr pI830 = I830PTR(pScrn);
- if (pI830->gen4_render_state_mem->bo) {
+ if (pI830->use_drm_mode) {
dri_bo_unmap(pI830->gen4_render_state_mem->bo);
dri_bo_unreference(pI830->gen4_render_state_mem->bo);
}
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