xf86-video-intel: src/i830_memory.c

[Zhenyu Wang]

 src/i830_memory.c |   29 +++++++++++++++++++++++++++++
 1 file changed, 29 insertions(+)

New commits:
commit bc36608e321e01a2be792688b4b734bb7c0667f7
Author: Zhenyu Wang <zhenyu.z.wang at intel.com>
Date:   Thu Sep 18 10:42:33 2008 +0800

    Check display stride limit when allocate front buffer

diff --git a/src/i830_memory.c b/src/i830_memory.c
index 2cbdd17..ecfdf2a 100644
--- a/src/i830_memory.c
+++ b/src/i830_memory.c
@@ -158,6 +158,29 @@ i830_get_fence_size(ScrnInfoPtr pScrn, unsigned long size)
 }
 
 static Bool
+i830_check_display_stride(ScrnInfoPtr pScrn, int stride, Bool tiling)
+{
+    I830Ptr pI830 = I830PTR(pScrn);
+    int limit = KB(32);
+
+    /* 8xx spec has always 8K limit, but tests show larger limit in
+       non-tiling mode, which makes large monitor work. */
+    if ((IS_845G(pI830) || IS_I85X(pI830)) && tiling)
+	limit = KB(8);
+
+    if (IS_I915(pI830) && tiling)
+	limit = KB(8);
+
+    if (IS_I965G(pI830) && tiling)
+	limit = KB(16);
+
+    if (stride <= limit)
+	return TRUE;
+    else
+	return FALSE;
+}
+
+static Bool
 i830_bind_memory(ScrnInfoPtr pScrn, i830_memory *mem)
 {
     I830Ptr pI830 = I830PTR(pScrn);
@@ -1200,6 +1223,12 @@ i830_allocate_framebuffer(ScrnInfoPtr pScrn, I830Ptr pI830, BoxPtr FbMemBox,
     else
 	tiling = pI830->tiling;
 
+    if (!i830_check_display_stride(pScrn, pitch, tiling)) {
+	xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Front buffer stride %d kB "
+		"exceed display limit\n", pitch/1024);
+	return NULL;
+    }
+
     /* Attempt to allocate it tiled first if we have page flipping on. */
     if (tiling && IsTileable(pScrn, pitch)) {
 	/* XXX: probably not the case on 965 */