xf86-video-intel: Branch 'dri2' - 18 commits - man/intel.man src/drmmode_display.c src/drmmode_display.h src/i810_reg.h src/i830_accel.c src/i830_batchbuffer.c src/i830_batchbuffer.h src/i830_debug.c src/i830_dri.c src/i830_driver.c src/i830_exa.c src/i830.h src/i830_memory.c src/i830_quirks.c src/Makefile.am uxa/uxa.c uxa/uxa-priv.h
Eric Anholt
anholt at kemper.freedesktop.org
Wed Sep 10 14:55:06 PDT 2008
man/intel.man | 17 ++++--
src/Makefile.am | 2
src/drmmode_display.c | 2
src/drmmode_display.h | 2
src/i810_reg.h | 14 +++++
src/i830.h | 1
src/i830_accel.c | 3 -
src/i830_batchbuffer.c | 136 ++++++++++++++++++++++++++++---------------------
src/i830_batchbuffer.h | 4 -
src/i830_debug.c | 42 +++++++++++++++
src/i830_dri.c | 34 +++++++-----
src/i830_driver.c | 50 ++----------------
src/i830_exa.c | 17 ++----
src/i830_memory.c | 6 +-
src/i830_quirks.c | 2
uxa/uxa-priv.h | 4 -
uxa/uxa.c | 4 -
17 files changed, 198 insertions(+), 142 deletions(-)
New commits:
commit 7e8eb6e20b6b1a2a3c1ef28f694fa23c68a15c48
Merge: fba9b5a... 58a3817...
Author: Eric Anholt <eric at anholt.net>
Date: Wed Sep 10 14:10:26 2008 -0700
Merge branch 'master' into dri2
Conflicts:
src/i830_batchbuffer.c
src/i830_display.c
commit 58a3817305ef1455a11be6ead8a8521dfc5875c7
Author: Eric Anholt <eric at anholt.net>
Date: Tue Sep 9 11:02:49 2008 -0700
Track move of exec to bufmgr, and restoration of emit/wait funcs for non-drm.
diff --git a/src/i830_batchbuffer.c b/src/i830_batchbuffer.c
index 75e98e0..3727f0e 100644
--- a/src/i830_batchbuffer.c
+++ b/src/i830_batchbuffer.c
@@ -39,6 +39,65 @@
#include "i830_ring.h"
#include "i915_drm.h"
+static int
+intel_nondrm_exec(dri_bo *bo, unsigned int used, void *priv)
+{
+ ScrnInfoPtr pScrn = priv;
+ I830Ptr pI830 = I830PTR(pScrn);
+
+ BEGIN_LP_RING(2);
+ OUT_RING(MI_BATCH_BUFFER_START | (2 << 6));
+ OUT_RING(bo->offset);
+ ADVANCE_LP_RING();
+
+ return 0;
+}
+
+static int
+intel_nondrm_exec_i830(dri_bo *bo, unsigned int used, void *priv)
+{
+ ScrnInfoPtr pScrn = priv;
+ I830Ptr pI830 = I830PTR(pScrn);
+
+ BEGIN_LP_RING(4);
+ OUT_RING(MI_BATCH_BUFFER);
+ OUT_RING(bo->offset);
+ OUT_RING(bo->offset + pI830->batch_used - 4);
+ OUT_RING(MI_NOOP);
+
+ return 0;
+}
+
+/**
+ * Creates a fence value representing a request to be passed.
+ *
+ * Stub implementation that should be avoided when DRM functions are available.
+ */
+static unsigned int
+intel_nondrm_emit(void *priv)
+{
+ static unsigned int fence = 0;
+
+ /* Match DRM in not using half the range. The fake bufmgr relies on this. */
+ if (++fence >= 0x8000000)
+ fence = 1;
+
+ return fence;
+}
+
+/**
+ * Waits on a fence representing a request to be passed.
+ *
+ * Stub implementation that should be avoided when DRM functions are available.
+ */
+static void
+intel_nondrm_wait(unsigned int fence, void *priv)
+{
+ ScrnInfoPtr pScrn = priv;
+
+ i830_wait_ring_idle(pScrn);
+}
+
static void
intel_next_batch(ScrnInfoPtr pScrn)
{
@@ -64,6 +123,22 @@ intel_batch_init(ScrnInfoPtr pScrn)
pI830->batch_emitting = 0;
intel_next_batch(pScrn);
+
+ if (!pI830->directRenderingEnabled) {
+ if (IS_I830(pI830) || IS_845G(pI830)) {
+ intel_bufmgr_fake_set_exec_callback(pI830->bufmgr,
+ intel_nondrm_exec_i830,
+ pScrn);
+ } else {
+ intel_bufmgr_fake_set_exec_callback(pI830->bufmgr,
+ intel_nondrm_exec,
+ pScrn);
+ }
+ intel_bufmgr_fake_set_fence_callback(pI830->bufmgr,
+ intel_nondrm_emit,
+ intel_nondrm_wait,
+ pScrn);
+ }
}
void
@@ -81,6 +156,7 @@ void
intel_batch_flush(ScrnInfoPtr pScrn)
{
I830Ptr pI830 = I830PTR(pScrn);
+ int ret;
if (pI830->batch_used == 0)
return;
@@ -98,63 +174,9 @@ intel_batch_flush(ScrnInfoPtr pScrn)
dri_bo_unmap(pI830->batch_bo);
pI830->batch_ptr = NULL;
- if (pI830->memory_manager) {
- struct drm_i915_gem_execbuffer *exec;
- int ret;
-
- exec = dri_process_relocs(pI830->batch_bo);
-
- exec->batch_start_offset = 0;
- exec->batch_len = pI830->batch_used;
- exec->cliprects_ptr = 0;
- exec->num_cliprects = 0;
- exec->DR1 = 0;
- exec->DR4 = 0xffffffff;
-
- do {
- ret = drmCommandWriteRead(pI830->drmSubFD, DRM_I915_GEM_EXECBUFFER,
- exec, sizeof(*exec));
- } while (ret == -EINTR);
- if (ret != 0)
- FatalError("Failed to submit batchbuffer: %s\n", strerror(errno));
- } else {
- dri_process_relocs(pI830->batch_bo);
-
- if (pI830->directRenderingEnabled) {
- drm_i915_batchbuffer_t batch;
- int ret;
-
- batch.start = pI830->batch_bo->offset;
- batch.used = pI830->batch_used;
- batch.cliprects = NULL;
- batch.num_cliprects = 0;
- batch.DR1 = 0;
- batch.DR4 = 0xffffffff;
-
- ret = drmCommandWrite(pI830->drmSubFD, DRM_I915_BATCHBUFFER,
- &batch, sizeof(batch));
- if (ret != 0)
- FatalError("Failed to submit batchbuffer: %s\n", strerror(errno));
-
- i830_refresh_ring(pScrn);
- } else {
- if (!IS_I830(pI830) && !IS_845G(pI830)) {
- BEGIN_LP_RING(2);
- OUT_RING(MI_BATCH_BUFFER_START | (2 << 6));
- OUT_RING(pI830->batch_bo->offset);
- ADVANCE_LP_RING();
- } else {
- BEGIN_LP_RING(4);
- OUT_RING(MI_BATCH_BUFFER);
- OUT_RING(pI830->batch_bo->offset);
- OUT_RING(pI830->batch_bo->offset + pI830->batch_used - 4);
- OUT_RING(MI_NOOP);
- ADVANCE_LP_RING();
- }
- }
- }
-
- dri_post_submit(pI830->batch_bo);
+ ret = dri_bo_exec(pI830->batch_bo, pI830->batch_used, NULL, 0, 0xffffffff);
+ if (ret != 0)
+ FatalError("Failed to submit batchbuffer: %s\n", strerror(-ret));
dri_bo_unreference(pI830->batch_bo);
intel_next_batch(pScrn);
commit f367334c6392a717f6cd2f4ed02200be1c6d356a
Author: Eric Anholt <eric at anholt.net>
Date: Tue Sep 9 11:01:33 2008 -0700
Track the move of irq emit/wait to fake bufmgr.
diff --git a/src/i830_dri.c b/src/i830_dri.c
index d068271..fb9b6f6 100644
--- a/src/i830_dri.c
+++ b/src/i830_dri.c
@@ -834,6 +834,11 @@ I830DRIDoMappings(ScreenPtr pScreen)
return FALSE;
}
+ if (pI830->memory_manager == NULL)
+ intel_bufmgr_fake_set_last_dispatch(pI830->bufmgr,
+ (volatile unsigned int *)
+ &sarea->last_dispatch);
+
/* init to zero to be safe */
sarea->front_handle = 0;
sarea->back_handle = 0;
diff --git a/src/i830_driver.c b/src/i830_driver.c
index b9705cf..491ec5e 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -2886,39 +2886,6 @@ i830_memory_init(ScrnInfoPtr pScrn)
return FALSE;
}
-/**
- * Returns a cookie to be waited on. This is just a stub implementation, and
- * should be hooked up to the emit/wait irq functions when available (DRI
- * enabled).
- */
-static unsigned int
-i830_fake_fence_emit(void *priv)
-{
- static unsigned int fence = 0;
-
- /* Match DRM in not using half the range. The fake bufmgr relies on this. */
- if (++fence >= 0x8000000)
- fence = 1;
-
- return fence;
-}
-
-/**
- * Waits on a cookie representing a request to be passed.
- *
- * Stub implementation that should be replaced with DRM functions when
- * available.
- */
-static int
-i830_fake_fence_wait(void *priv, unsigned int fence)
-{
- ScrnInfoPtr pScrn = priv;
-
- i830_wait_ring_idle(pScrn);
-
- return 0;
-}
-
void
i830_init_bufmgr(ScrnInfoPtr pScrn)
{
@@ -2940,13 +2907,12 @@ i830_init_bufmgr(ScrnInfoPtr pScrn)
intel_bufmgr_gem_enable_reuse(pI830->bufmgr);
} else {
assert(pI830->FbBase != NULL);
- pI830->bufmgr = intel_bufmgr_fake_init(pI830->fake_bufmgr_mem->offset,
+ pI830->bufmgr = intel_bufmgr_fake_init(pI830->drmSubFD,
+ pI830->fake_bufmgr_mem->offset,
pI830->FbBase +
pI830->fake_bufmgr_mem->offset,
pI830->fake_bufmgr_mem->size,
- i830_fake_fence_emit,
- i830_fake_fence_wait,
- pScrn);
+ NULL);
}
}
commit 0b4f7b630312b148ce4e172cb7cd9f673751b2a3
Author: Eric Anholt <eric at anholt.net>
Date: Tue Sep 9 10:57:08 2008 -0700
Track move of bufmgr functions to libdrm_intel.
diff --git a/src/Makefile.am b/src/Makefile.am
index 97feea4..8966bd6 100644
--- a/src/Makefile.am
+++ b/src/Makefile.am
@@ -39,7 +39,7 @@ intel_drv_la_LDFLAGS = -module -avoid-version
intel_drv_ladir = @moduledir@/drivers
intel_drv_la_LIBADD = -lm ../uxa/libuxa.la
if XSERVER_LIBPCIACCESS
-intel_drv_la_LIBADD += @PCIACCESS_LIBS@
+intel_drv_la_LIBADD += @PCIACCESS_LIBS@ @DRM_LIBS@ -ldrm_intel
endif
XMODE_SRCS=\
diff --git a/src/drmmode_display.h b/src/drmmode_display.h
index fc7c1df..ee51c95 100644
--- a/src/drmmode_display.h
+++ b/src/drmmode_display.h
@@ -29,7 +29,7 @@
#ifdef XF86DRM_MODE
-#include "dri_bufmgr.h"
+#include "intel_bufmgr.h"
#include "xf86drmMode.h"
typedef struct {
diff --git a/src/i830.h b/src/i830.h
index f0efc4e..5fb7e24 100644
--- a/src/i830.h
+++ b/src/i830.h
@@ -79,7 +79,6 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#endif
#include "drmmode_display.h"
#endif
-#include "dri_bufmgr.h"
#include "intel_bufmgr.h"
#include "i915_drm.h"
diff --git a/src/i830_batchbuffer.h b/src/i830_batchbuffer.h
index 2a23cae..3c7a69b 100644
--- a/src/i830_batchbuffer.h
+++ b/src/i830_batchbuffer.h
@@ -68,8 +68,8 @@ intel_batch_emit_reloc (I830Ptr pI830,
{
assert(intel_batch_space(pI830) >= 4);
*(uint32_t *)(pI830->batch_ptr + pI830->batch_used) = bo->offset + delta;
- intel_bo_emit_reloc (pI830->batch_bo, read_domains, write_domains, delta,
- pI830->batch_used, bo);
+ dri_bo_emit_reloc(pI830->batch_bo, read_domains, write_domains, delta,
+ pI830->batch_used, bo);
pI830->batch_used += 4;
}
diff --git a/src/i830_dri.c b/src/i830_dri.c
index ca3bc62..d068271 100644
--- a/src/i830_dri.c
+++ b/src/i830_dri.c
@@ -1542,7 +1542,7 @@ i830_name_buffer (ScrnInfoPtr pScrn, i830_memory *mem)
if (!mem->gem_name)
{
int ret;
- ret = intel_bo_flink(mem->bo, &mem->gem_name);
+ ret = dri_bo_flink(mem->bo, &mem->gem_name);
if (ret != 0)
{
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
diff --git a/src/i830_memory.c b/src/i830_memory.c
index 443cc4e..2cbdd17 100644
--- a/src/i830_memory.c
+++ b/src/i830_memory.c
@@ -167,7 +167,7 @@ i830_bind_memory(ScrnInfoPtr pScrn, i830_memory *mem)
#ifdef XF86DRI
if (mem->bo != NULL) {
- if (intel_bo_pin (mem->bo, mem->alignment) != 0) {
+ if (dri_bo_pin(mem->bo, mem->alignment) != 0) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"Failed to pin %s: %s\n",
mem->name, strerror(errno));
@@ -214,7 +214,7 @@ i830_unbind_memory(ScrnInfoPtr pScrn, i830_memory *mem)
#ifdef XF86DRI
if (mem->bo != NULL) {
- if (intel_bo_unpin (mem->bo) == 0) {
+ if (dri_bo_unpin(mem->bo) == 0) {
mem->bound = FALSE;
/* Give buffer obviously wrong offset/end until it's re-pinned. */
mem->offset = -1;
@@ -897,7 +897,7 @@ i830_allocate_memory_tiled(ScrnInfoPtr pScrn, const char *name,
else
tiling_mode = I915_TILING_Y;
- ret = intel_bo_set_tiling (mem->bo, &tiling_mode);
+ ret = dri_bo_set_tiling(mem->bo, &tiling_mode);
if (ret != 0 || tiling_mode == I915_TILING_NONE) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"Failed to set tiling on %s: %s\n",
commit 0f804bfa1e1e972e9b4e3b7c8db61e9877c50f50
Author: Eric Anholt <eric at anholt.net>
Date: Tue Sep 9 19:17:05 2008 -0700
Bug #17446: Don't try to manage IRQs in GEM mode.
The kernel told us that it was already doing so, resulting in failure.
diff --git a/src/i830_driver.c b/src/i830_driver.c
index 1a50d7b..b9705cf 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -3702,8 +3702,8 @@ I830EnterVT(int scrnIndex, int flags)
/* HW status is fixed, we need to set it up before any drm
* operation which accessing that page, like irq install, etc.
*/
- if (pI830->starting) {
- if (pI830->hw_status != NULL && !I830DRISetHWS(pScrn)) {
+ if (pI830->starting && !pI830->memory_manager) {
+ if (!I830DRISetHWS(pScrn)) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"Fail to setup hardware status page.\n");
I830DRICloseScreen(pScrn->pScreen);
commit da63b5adec8555cc7b3e71f33933f4c9dd6f714e
Author: Eric Anholt <eric at anholt.net>
Date: Sun Aug 31 14:27:29 2008 -0700
Add some MCHBAR registers for debugging tile swizzling issues.
diff --git a/src/i810_reg.h b/src/i810_reg.h
index a73709b..9a85d09 100644
--- a/src/i810_reg.h
+++ b/src/i810_reg.h
@@ -113,6 +113,20 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define COLEXP_RESERVED 0x30
#define BITBLT_STATUS 0x01
+#define CHDECMISC 0x10111
+#define C0DRB0 0x10200
+#define C0DRB1 0x10202
+#define C0DRB2 0x10204
+#define C0DRB3 0x10206
+#define C0DRA01 0x10208
+#define C0DRA23 0x1020a
+#define C1DRB0 0x10600
+#define C1DRB1 0x10602
+#define C1DRB2 0x10604
+#define C1DRB3 0x10606
+#define C1DRA01 0x10608
+#define C1DRA23 0x1060a
+
/* p375.
*/
#define DISPLAY_CNTL 0x70008
diff --git a/src/i830_debug.c b/src/i830_debug.c
index 21afb46..17ee40f 100644
--- a/src/i830_debug.c
+++ b/src/i830_debug.c
@@ -48,6 +48,32 @@
#define DEBUGSTRING(func) static char *func(I830Ptr pI830, int reg, \
uint32_t val)
+DEBUGSTRING(i830_16bit_func)
+{
+ return XNFprintf("0x%04x", (uint16_t)val);
+}
+
+DEBUGSTRING(i830_debug_chdecmisc)
+{
+ char *enhmodesel = NULL;
+
+ switch ((val >> 5) & 3) {
+ case 1: enhmodesel = "XOR bank/rank"; break;
+ case 2: enhmodesel = "swap bank"; break;
+ case 3: enhmodesel = "XOR bank"; break;
+ case 0: enhmodesel = "none"; break;
+ }
+
+ return XNFprintf("%s, ch2 enh %sabled, ch1 enh %sabled, ch0 enh %sabled, "
+ "flex %sabled, ep %spresent",
+ enhmodesel,
+ (val & (1 << 4)) ? "en" : "dis",
+ (val & (1 << 3)) ? "en" : "dis",
+ (val & (1 << 2)) ? "en" : "dis",
+ (val & (1 << 1)) ? "en" : "dis",
+ (val & (1 << 0)) ? "" : "not ");
+}
+
DEBUGSTRING(i830_debug_xyminus1)
{
return XNFprintf("%d, %d", (val & 0xffff) + 1,
@@ -481,6 +507,8 @@ DEBUGSTRING(i810_debug_fence_new)
#define DEFINEREG(reg) \
{ reg, #reg, NULL, 0 }
+#define DEFINEREG_16BIT(reg) \
+ { reg, #reg, i830_16bit_func, 0 }
#define DEFINEREG2(reg, func) \
{ reg, #reg, func, 0 }
@@ -490,6 +518,20 @@ static struct i830SnapshotRec {
char *(*debug_output)(I830Ptr pI830, int reg, uint32_t val);
uint32_t val;
} i830_snapshot[] = {
+ DEFINEREG2(CHDECMISC, i830_debug_chdecmisc),
+ DEFINEREG_16BIT(C0DRB0),
+ DEFINEREG_16BIT(C0DRB1),
+ DEFINEREG_16BIT(C0DRB2),
+ DEFINEREG_16BIT(C0DRB3),
+ DEFINEREG_16BIT(C1DRB0),
+ DEFINEREG_16BIT(C1DRB1),
+ DEFINEREG_16BIT(C1DRB2),
+ DEFINEREG_16BIT(C1DRB3),
+ DEFINEREG_16BIT(C0DRA01),
+ DEFINEREG_16BIT(C0DRA23),
+ DEFINEREG_16BIT(C1DRA01),
+ DEFINEREG_16BIT(C1DRA23),
+
DEFINEREG2(VCLK_DIVISOR_VGA0, i830_debug_fp),
DEFINEREG2(VCLK_DIVISOR_VGA1, i830_debug_fp),
DEFINEREG2(VCLK_POST_DIV, i830_debug_vga_pd),
commit c7aaf0118baa34e583df5f1c29c9dab9a6af6eb7
Author: Dave Airlie <airlied at linux.ie>
Date: Tue Sep 9 18:13:56 2008 +1000
mode: fix missing comma
diff --git a/src/drmmode_display.c b/src/drmmode_display.c
index 5154b42..680071a 100644
--- a/src/drmmode_display.c
+++ b/src/drmmode_display.c
@@ -505,7 +505,7 @@ const char *output_names[] = { "None",
"DVI",
"DVI",
"DVI",
- "Composite"
+ "Composite",
"TV",
"LVDS",
"CTV",
commit b9ef0ed7d7b96eca6394cd0d367369ec511d1bcd
Author: Daniel Stone <daniel at fooishbar.org>
Date: Fri Sep 5 05:02:08 2008 +0300
i830: Fix timer leak
TimerCancel just cancels the timer: it still leaves the TimerRec intact and
unfreed.
diff --git a/src/i830_driver.c b/src/i830_driver.c
index afce718..1a50d7b 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -3528,7 +3528,7 @@ I830LeaveVT(int scrnIndex, int flags)
pI830->leaving = TRUE;
if (pI830->devicesTimer)
- TimerCancel(pI830->devicesTimer);
+ TimerFree(pI830->devicesTimer);
pI830->devicesTimer = NULL;
i830SetHotkeyControl(pScrn, HOTKEY_BIOS_SWITCH);
@@ -3787,7 +3787,7 @@ I830CloseScreen(int scrnIndex, ScreenPtr pScreen)
}
if (pI830->devicesTimer)
- TimerCancel(pI830->devicesTimer);
+ TimerFree(pI830->devicesTimer);
pI830->devicesTimer = NULL;
if (!pI830->use_drm_mode) {
@@ -3936,7 +3936,7 @@ I830PMEvent(int scrnIndex, pmEvent event, Bool undo)
/* If we had status checking turned on, turn it off now */
if (pI830->checkDevices) {
if (pI830->devicesTimer)
- TimerCancel(pI830->devicesTimer);
+ TimerFree(pI830->devicesTimer);
pI830->devicesTimer = NULL;
pI830->checkDevices = FALSE;
}
commit fba9b5aff450d874ef98cafd3ecc0fd85f9597b5
Author: Eric Anholt <eric at anholt.net>
Date: Wed Sep 3 16:49:07 2008 +0100
DRI2: Move pixmap pitch alignment for use with depth to pixmap create.
The previous location for pitch fixup would have only worked when depth was
used with the backbuffer, and no page flipping or other adventures occurred.
diff --git a/src/i830_accel.c b/src/i830_accel.c
index 4059121..c6044a5 100644
--- a/src/i830_accel.c
+++ b/src/i830_accel.c
@@ -302,6 +302,7 @@ I830AccelInit(ScreenPtr pScreen)
* i915 limits 3D textures to pitch of 16B - 8kB, in dwords.
* i915 limits 3D destination to ~4kB-aligned offset if tiled.
* i915 limits 3D destination to pitch of 16B - 8kB, in dwords, if un-tiled.
+ * i915 limits 3D destination to pitch 64B-aligned if used with depth.
* i915 limits 3D destination to pitch of 512B - 8kB, in tiles, if tiled.
* i915 limits 3D destination to POT aligned pitch if tiled.
* i915 limits 3D destination drawing rect to w,h of 2048,2048.
@@ -326,7 +327,7 @@ I830AccelInit(ScreenPtr pScreen)
pI830->accel_max_y = 8192;
} else {
pI830->accel_pixmap_offset_alignment = 4;
- pI830->accel_pixmap_pitch_alignment = 16;
+ pI830->accel_pixmap_pitch_alignment = 64;
pI830->accel_max_x = 2048;
pI830->accel_max_y = 2048;
}
diff --git a/src/i830_dri.c b/src/i830_dri.c
index 56339f3..3168a4b 100644
--- a/src/i830_dri.c
+++ b/src/i830_dri.c
@@ -1830,7 +1830,7 @@ I830DRI2CreateBuffers(DrawablePtr pDraw, unsigned int *attachments, int count)
ScreenPtr pScreen = pDraw->pScreen;
DRI2BufferPtr buffers;
dri_bo *bo;
- int i, depth, width, cpp;
+ int i;
I830DRI2BufferPrivatePtr privates;
PixmapPtr pPixmap, pDepthPixmap;
@@ -1841,11 +1841,7 @@ I830DRI2CreateBuffers(DrawablePtr pDraw, unsigned int *attachments, int count)
if (privates == NULL) {
xfree(buffers);
return NULL;
- }
-
- /* The byte rowstride for 3D buffers must be a multiple of 64 bytes. */
- cpp = pDraw->bitsPerPixel / 8;
- width = ((pDraw->width * cpp + 63) & ~63) / cpp;
+ }
pDepthPixmap = NULL;
for (i = 0; i < count; i++) {
@@ -1860,9 +1856,9 @@ I830DRI2CreateBuffers(DrawablePtr pDraw, unsigned int *attachments, int count)
pPixmap->refcnt++;
} else {
pPixmap = (*pScreen->CreatePixmap)(pScreen,
- width,
- pDraw->height,
- pDraw->depth, 0);
+ pDraw->width,
+ pDraw->height,
+ pDraw->depth, 0);
}
if (attachments[i] == DRI2_BUFFER_DEPTH)
commit 71ec627c3a65cfc7bca7353af43c60b18e73230d
Author: Eric Anholt <eric at anholt.net>
Date: Wed Sep 3 16:37:25 2008 +0100
DRI2: Emit the MI_FLUSH before flushing batch in swapbuffers.
Should fix issues with swapbuffers flushing to front buffer on 965.
diff --git a/src/i830_dri.c b/src/i830_dri.c
index 6519b48..56339f3 100644
--- a/src/i830_dri.c
+++ b/src/i830_dri.c
@@ -1576,7 +1576,7 @@ i830_update_sarea(ScrnInfoPtr pScrn, drmI830Sarea *sarea)
I830Ptr pI830 = I830PTR(pScrn);
if (pI830->directRenderingType == DRI_DRI2)
- return TRUE;
+ return;
sarea->width = pScreen->width;
sarea->height = pScreen->height;
@@ -1921,12 +1921,17 @@ I830DRI2SwapBuffers(DrawablePtr pDraw, DRI2BufferPtr pSrcBuffer,
(*pGC->ops->CopyArea)(&pPixmap->drawable,
pDraw, pGC, x, y, width, height, x, y);
FreeScratchGC(pGC);
-
+
+ /* Emit a flush of the rendering cache, or on the 965 and beyond
+ * rendering results may not hit the framebuffer until significantly
+ * later.
+ */
+ I830EmitFlush(pScrn);
+ pI830->need_mi_flush = FALSE;
+
/* We can't rely on getting into the block handler before the DRI
* client gets to run again so flush now. */
intel_batch_flush(pScrn);
- I830EmitFlush(pScrn);
- pI830->need_mi_flush = FALSE;
#if ALWAYS_SYNC
I830Sync(pScrn);
#endif
commit daaefd173b4c98d0ebabd43352bfa3a030a62e4b
Author: Eric Anholt <eric at anholt.net>
Date: Wed Sep 3 16:26:27 2008 +0100
UXA: Re-enable non-965 render.
diff --git a/src/i830_exa.c b/src/i830_exa.c
index 4cfbdb9..a90bd85 100644
--- a/src/i830_exa.c
+++ b/src/i830_exa.c
@@ -903,7 +903,6 @@ i830_uxa_init (ScreenPtr pScreen)
i830->uxa_driver->copy = I830EXACopy;
i830->uxa_driver->done_copy = I830EXADoneCopy;
-#if 0
/* Composite */
if (!IS_I9XX(i830)) {
i830->uxa_driver->check_composite = i830_check_composite;
@@ -918,12 +917,13 @@ i830_uxa_init (ScreenPtr pScreen)
i830->uxa_driver->composite = i830_composite;
i830->uxa_driver->done_composite = i830_done_composite;
} else {
+#if 0
i830->uxa_driver->check_composite = i965_check_composite;
i830->uxa_driver->prepare_composite = i965_prepare_composite;
i830->uxa_driver->composite = i965_composite;
i830->uxa_driver->done_composite = i830_done_composite;
- }
#endif
+ }
i830->uxa_driver->prepare_access = i830_uxa_prepare_access;
i830->uxa_driver->finish_access = i830_uxa_finish_access;
commit fca7a4e9a5c73e1c129e94eeccf8fc795f729931
Author: Stefan Dirsch <sndirsch at suse.de>
Date: Wed Sep 3 15:32:11 2008 +0200
Pipe A force quirk for Toshiba Satellite A30.
diff --git a/src/i830_quirks.c b/src/i830_quirks.c
index 038676e..089e458 100644
--- a/src/i830_quirks.c
+++ b/src/i830_quirks.c
@@ -293,6 +293,8 @@ static i830_quirk i830_quirk_list[] = {
{ PCI_CHIP_I855_GM, 0x1028, 0x014f, quirk_pipea_force },
/* Dell Inspiron 510m needs pipe A force quirk */
{ PCI_CHIP_I855_GM, 0x1028, 0x0164, quirk_pipea_force },
+ /* Toshiba Satellite A30 needs pipe A force quirk */
+ { PCI_CHIP_I855_GM, 0x1179, 0xff00 , quirk_pipea_force },
/* Toshiba Protege R-205, S-209 needs pipe A force quirk */
{ PCI_CHIP_I915_GM, 0x1179, 0x0001, quirk_pipea_force },
/* Intel 855GM hardware (See LP: #216490) */
commit 57ad9cc689724a2f3583eda862250eab0a6798d5
Author: Fabio <fabio.ped at libero.it>
Date: Mon Sep 1 13:33:50 2008 +0800
Man page patch to clarify meaning of VideoRam option with i810/i815
diff --git a/man/intel.man b/man/intel.man
index e9ae240..6969a15 100644
--- a/man/intel.man
+++ b/man/intel.man
@@ -41,10 +41,13 @@ than has been pre-allocated at boot time by the BIOS. This is usually
achieved with an "agpgart" or "agp" kernel driver. Linux, FreeBSD, OpenBSD,
NetBSD, and Solaris have such kernel drivers available.
.PP
-By default, the i810 will use 8 megabytes
-of system memory for graphics. For the 830M and later, the driver will
-automatically size its memory allocation according to the features it will
-support. Therefore, the
+By default, the i810/i815 will use 8 MB of system memory for graphics if AGP
+allocable memory is < 128 MB, 16 MB if < 192 MB or 24 MB if higher. Use the
+.B VideoRam
+option to change the default value.
+.PP
+For the 830M and later, the driver will automatically size its memory
+allocation according to the features it will support. Therefore, the
.B VideoRam
option, which in the past had been necessary to allow more than some small
amount of memory to be allocated, is now ignored.
@@ -109,6 +112,12 @@ Default: 8-bits per RGB for 8-bit modes.
This option enables XvMC. The integer parameter specifies the number of
surfaces to use. Valid values are 6 and 7.
Default: XvMC is disabled.
+.TP
+.BI "VideoRam " integer
+This option specifies the amount of system memory to use for graphics, in KB.
+The default is 8192 if AGP allocable memory is < 128 MB, 16384 if < 192 MB,
+24576 if higher. DRI require at least a value of 16384. Higher values may give
+better 3D performance, at expense of available system memory.
.PP
The following driver
commit a1c802e4a0324386cf7370594a46354c89e3b646
Merge: 3733a1b... 808b72f...
Author: Jesse Barnes <jbarnes at virtuousgeek.org>
Date: Fri Aug 29 09:23:35 2008 -0700
Merge branch 'master' of ssh://git.freedesktop.org/git/xorg/driver/xf86-video-intel
commit 3733a1b54c95aa378f32577f9e996946e8e8e48c
Author: Jesse Barnes <jbarnes at virtuousgeek.org>
Date: Fri Aug 29 09:12:05 2008 -0700
Fix build when using kernel DRM headers
Unfortunate mismatch between kernel and DRM master headers.
Kernel:
typedef struct _drm_i915_batchbuffer { ... } drm_i915_batchbuffer_t;
DRM master:
typedef struct drm_i915_batchbuffer { ... } drm_i915_batchbuffer_t;
so use the typedef rather than the morphing structure name.
diff --git a/src/i830_batchbuffer.c b/src/i830_batchbuffer.c
index 07ea082..75e98e0 100644
--- a/src/i830_batchbuffer.c
+++ b/src/i830_batchbuffer.c
@@ -121,7 +121,7 @@ intel_batch_flush(ScrnInfoPtr pScrn)
dri_process_relocs(pI830->batch_bo);
if (pI830->directRenderingEnabled) {
- struct drm_i915_batchbuffer batch;
+ drm_i915_batchbuffer_t batch;
int ret;
batch.start = pI830->batch_bo->offset;
commit 808b72f81454061c815321e51a9b9f925c4bf786
Author: Eamon Walsh <ewalsh at tycho.nsa.gov>
Date: Tue Aug 26 22:24:36 2008 -0400
Change uxa private keys to integer variables.
Prepares for a devPrivates system that will store an index.
diff --git a/src/i830_exa.c b/src/i830_exa.c
index fdce65f..fd29df1 100644
--- a/src/i830_exa.c
+++ b/src/i830_exa.c
@@ -726,12 +726,12 @@ I830EXAInit(ScreenPtr pScreen)
return TRUE;
}
-static DevPrivateKey uxa_pixmap_key = &uxa_pixmap_key;
+static int uxa_pixmap_index;
static void
i830_uxa_set_pixmap_bo (PixmapPtr pixmap, dri_bo *bo)
{
- dixSetPrivate(&pixmap->devPrivates, uxa_pixmap_key, bo);
+ dixSetPrivate(&pixmap->devPrivates, &uxa_pixmap_index, bo);
}
dri_bo *
@@ -742,7 +742,7 @@ i830_get_pixmap_bo(PixmapPtr pixmap)
I830Ptr i830 = I830PTR(scrn);
if (i830->accel == ACCEL_UXA) {
- return dixLookupPrivate(&pixmap->devPrivates, uxa_pixmap_key);
+ return dixLookupPrivate(&pixmap->devPrivates, &uxa_pixmap_index);
} else if (i830->accel == ACCEL_EXA) {
struct i830_exa_pixmap_priv *driver_priv =
exaGetPixmapDriverPrivate(pixmap);
@@ -874,7 +874,7 @@ i830_uxa_init (ScreenPtr pScreen)
ScrnInfoPtr scrn = xf86Screens[pScreen->myNum];
I830Ptr i830 = I830PTR(scrn);
- if (!dixRequestPrivate(uxa_pixmap_key, 0))
+ if (!dixRequestPrivate(&uxa_pixmap_index, 0))
return FALSE;
i830->uxa_driver = uxa_driver_alloc();
diff --git a/uxa/uxa-priv.h b/uxa/uxa-priv.h
index c50ab3a..1353587 100644
--- a/uxa/uxa-priv.h
+++ b/uxa/uxa-priv.h
@@ -155,8 +155,8 @@ typedef struct {
(PixmapWidthPaddingInfo[d].padRoundUp+1)))
#endif
-extern DevPrivateKey uxa_screen_key;
-#define uxa_get_screen(s) ((uxa_screen_t *)dixLookupPrivate(&(s)->devPrivates, uxa_screen_key))
+extern int uxa_screen_index;
+#define uxa_get_screen(s) ((uxa_screen_t *)dixLookupPrivate(&(s)->devPrivates, &uxa_screen_index))
/** Align an offset to an arbitrary alignment */
#define UXA_ALIGN(offset, align) (((offset) + (align) - 1) - \
diff --git a/uxa/uxa.c b/uxa/uxa.c
index aac3d68..8658406 100644
--- a/uxa/uxa.c
+++ b/uxa/uxa.c
@@ -39,7 +39,7 @@
#include "dixfontstr.h"
#include "uxa.h"
-DevPrivateKey uxa_screen_key = &uxa_screen_key;
+int uxa_screen_index;
/**
* uxa_get_drawable_pixmap() returns a backing pixmap for a given drawable.
@@ -422,7 +422,7 @@ uxa_driver_init(ScreenPtr screen, uxa_driver_t *uxa_driver)
uxa_screen->info = uxa_driver;
- dixSetPrivate(&screen->devPrivates, uxa_screen_key, uxa_screen);
+ dixSetPrivate(&screen->devPrivates, &uxa_screen_index, uxa_screen);
// exaDDXDriverInit(screen);
commit 62ce9e8f9c8cc2014645d58f4249c496aebc36e8
Author: Eamon Walsh <ewalsh at tycho.nsa.gov>
Date: Tue Aug 26 22:23:06 2008 -0400
Remove unused exa_pixmap_key.
diff --git a/src/i830_exa.c b/src/i830_exa.c
index e73bc36..fdce65f 100644
--- a/src/i830_exa.c
+++ b/src/i830_exa.c
@@ -465,8 +465,6 @@ i830_transform_is_affine (PictTransformPtr t)
return t->matrix[2][0] == 0 && t->matrix[2][1] == 0;
}
-static DevPrivateKey exa_pixmap_key = &exa_pixmap_key;
-
#ifdef XF86DRM_MODE
static void *
@@ -618,9 +616,6 @@ I830EXAInit(ScreenPtr pScreen)
ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
I830Ptr pI830 = I830PTR(pScrn);
- if (!dixRequestPrivate(exa_pixmap_key, 0))
- return FALSE;
-
pI830->EXADriverPtr = exaDriverAlloc();
if (pI830->EXADriverPtr == NULL) {
pI830->accel = ACCEL_NONE;
commit 087ade8e66cf7a34b8a96e1efe438099376cd896
Author: Robert Noland <rnoland at 2hip.net>
Date: Tue Aug 26 16:35:07 2008 -0400
Fix typo in last commit
diff --git a/src/i830_display.c b/src/i830_display.c
index cfd4e6f..ed49fb0 100644
--- a/src/i830_display.c
+++ b/src/i830_display.c
@@ -753,7 +753,7 @@ static void i830_modeset_ctl(xf86CrtcPtr crtc, int pre)
I830CrtcPrivatePtr intel_crtc = crtc->driver_private;
struct drm_modeset_ctl modeset;
- if (!pI830-directRenderingEnabled)
+ if (!pI830->directRenderingEnabled)
return;
modeset.crtc = intel_crtc->plane;
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