xf86-video-intel: 11 commits - src/i810_reg.h src/i830_sdvo.c src/i830_sdvo_regs.h src/i830_tv.c
Zhenyu Wang
zhen at kemper.freedesktop.org
Wed Nov 5 18:55:26 PST 2008
src/i810_reg.h | 2
src/i830_sdvo.c | 5 -
src/i830_sdvo_regs.h | 137 ++++++++++++++++++++++++++++++--
src/i830_tv.c | 216 +++++++++++++++++++++++++--------------------------
4 files changed, 241 insertions(+), 119 deletions(-)
New commits:
commit 226efa7c74c0ed8a7b974a3727c5d7322c8ef815
Author: Zhenyu Wang <zhenyu.z.wang at intel.com>
Date: Wed Oct 29 22:41:20 2008 +0800
TV: subcarrier fix for NTSC and PAL
Using subcarrier DDA values from spec give more close result to
standard frequency.
diff --git a/src/i830_tv.c b/src/i830_tv.c
index 112c588..5c6a031 100644
--- a/src/i830_tv.c
+++ b/src/i830_tv.c
@@ -225,7 +225,7 @@ typedef struct {
const static tv_mode_t tv_modes[] = {
{
.name = "NTSC-M",
- .clock = 107520,
+ .clock = 108000,
.refresh = 29.97,
.oversample = TV_OVERSAMPLE_8X,
.component_only = 0,
@@ -253,8 +253,8 @@ const static tv_mode_t tv_modes[] = {
.vburst_start_f4 = 10, .vburst_end_f4 = 240,
/* desired 3.5800000 actual 3.5800000 clock 107.52 */
- .dda1_inc = 136,
- .dda2_inc = 7624, .dda2_size = 20013,
+ .dda1_inc = 135,
+ .dda2_inc = 20800, .dda2_size = 27456,
.dda3_inc = 0, .dda3_size = 0,
.sc_reset = TV_SC_RESET_EVERY_4,
.pal_burst = FALSE,
@@ -276,7 +276,7 @@ const static tv_mode_t tv_modes[] = {
},
{
.name = "NTSC-443",
- .clock = 107520,
+ .clock = 108000,
.refresh = 29.97,
.oversample = TV_OVERSAMPLE_8X,
.component_only = 0,
@@ -304,10 +304,10 @@ const static tv_mode_t tv_modes[] = {
/* desired 4.4336180 actual 4.4336180 clock 107.52 */
.dda1_inc = 168,
- .dda2_inc = 18557, .dda2_size = 20625,
- .dda3_inc = 0, .dda3_size = 0,
- .sc_reset = TV_SC_RESET_EVERY_8,
- .pal_burst = TRUE,
+ .dda2_inc = 4093, .dda2_size = 27456,
+ .dda3_inc = 310, .dda3_size = 525,
+ .sc_reset = TV_SC_RESET_NEVER,
+ .pal_burst = FALSE,
.composite_levels = { .blank = 225, .black = 267, .burst = 113 },
.composite_color = {
@@ -326,7 +326,7 @@ const static tv_mode_t tv_modes[] = {
},
{
.name = "NTSC-J",
- .clock = 107520,
+ .clock = 108000,
.refresh = 29.97,
.oversample = TV_OVERSAMPLE_8X,
.component_only = 0,
@@ -354,8 +354,8 @@ const static tv_mode_t tv_modes[] = {
.vburst_start_f4 = 10, .vburst_end_f4 = 240,
/* desired 3.5800000 actual 3.5800000 clock 107.52 */
- .dda1_inc = 136,
- .dda2_inc = 7624, .dda2_size = 20013,
+ .dda1_inc = 135,
+ .dda2_inc = 20800, .dda2_size = 27456,
.dda3_inc = 0, .dda3_size = 0,
.sc_reset = TV_SC_RESET_EVERY_4,
.pal_burst = FALSE,
@@ -377,7 +377,7 @@ const static tv_mode_t tv_modes[] = {
},
{
.name = "PAL-M",
- .clock = 107520,
+ .clock = 108000,
.refresh = 29.97,
.oversample = TV_OVERSAMPLE_8X,
.component_only = 0,
@@ -405,11 +405,11 @@ const static tv_mode_t tv_modes[] = {
.vburst_start_f4 = 10, .vburst_end_f4 = 240,
/* desired 3.5800000 actual 3.5800000 clock 107.52 */
- .dda1_inc = 136,
- .dda2_inc = 7624, .dda2_size = 20013,
+ .dda1_inc = 135,
+ .dda2_inc = 16704, .dda2_size = 27456,
.dda3_inc = 0, .dda3_size = 0,
- .sc_reset = TV_SC_RESET_EVERY_4,
- .pal_burst = FALSE,
+ .sc_reset = TV_SC_RESET_EVERY_8,
+ .pal_burst = TRUE,
.composite_levels = { .blank = 225, .black = 267, .burst = 113 },
.composite_color = {
@@ -429,7 +429,7 @@ const static tv_mode_t tv_modes[] = {
{
/* 625 Lines, 50 Fields, 15.625KHz line, Sub-Carrier 4.434MHz */
.name = "PAL-N",
- .clock = 107520,
+ .clock = 108000,
.refresh = 25.0,
.oversample = TV_OVERSAMPLE_8X,
.component_only = 0,
@@ -458,9 +458,9 @@ const static tv_mode_t tv_modes[] = {
/* desired 4.4336180 actual 4.4336180 clock 107.52 */
- .dda1_inc = 168,
- .dda2_inc = 18557, .dda2_size = 20625,
- .dda3_inc = 0, .dda3_size = 0,
+ .dda1_inc = 135,
+ .dda2_inc = 23578, .dda2_size = 27648,
+ .dda3_inc = 134, .dda3_size = 625,
.sc_reset = TV_SC_RESET_EVERY_8,
.pal_burst = TRUE,
@@ -482,7 +482,7 @@ const static tv_mode_t tv_modes[] = {
{
/* 625 Lines, 50 Fields, 15.625KHz line, Sub-Carrier 4.434MHz */
.name = "PAL",
- .clock = 107520,
+ .clock = 108000,
.refresh = 25.0,
.oversample = TV_OVERSAMPLE_8X,
.component_only = 0,
@@ -510,8 +510,8 @@ const static tv_mode_t tv_modes[] = {
/* desired 4.4336180 actual 4.4336180 clock 107.52 */
.dda1_inc = 168,
- .dda2_inc = 18557, .dda2_size = 20625,
- .dda3_inc = 0, .dda3_size = 0,
+ .dda2_inc = 4122, .dda2_size = 27648,
+ .dda3_inc = 67, .dda3_size = 625,
.sc_reset = TV_SC_RESET_EVERY_8,
.pal_burst = TRUE,
commit 3651341292d90b7ded4c3f013bcb0f46537a113a
Author: Zhenyu Wang <zhenyu.z.wang at intel.com>
Date: Wed Oct 29 20:41:46 2008 +0800
TV: fix timing parameters for PAL, 480p, 1080i
diff --git a/src/i830_tv.c b/src/i830_tv.c
index d02bc11..112c588 100644
--- a/src/i830_tv.c
+++ b/src/i830_tv.c
@@ -487,7 +487,7 @@ const static tv_mode_t tv_modes[] = {
.oversample = TV_OVERSAMPLE_8X,
.component_only = 0,
- .hsync_end = 64, .hblank_end = 128,
+ .hsync_end = 64, .hblank_end = 142,
.hblank_start = 844, .htotal = 863,
.progressive = FALSE, .trilevel_sync = FALSE,
@@ -548,7 +548,7 @@ const static tv_mode_t tv_modes[] = {
.veq_ena = FALSE,
.vi_end_f1 = 44, .vi_end_f2 = 44,
- .nbr_end = 496,
+ .nbr_end = 479,
.burst_ena = FALSE,
@@ -572,7 +572,7 @@ const static tv_mode_t tv_modes[] = {
.veq_ena = FALSE,
.vi_end_f1 = 44, .vi_end_f2 = 44,
- .nbr_end = 496,
+ .nbr_end = 479,
.burst_ena = FALSE,
@@ -733,7 +733,7 @@ const static tv_mode_t tv_modes[] = {
.component_only = 1,
.hsync_end = 88, .hblank_end = 235,
- .hblank_start = 2155, .htotal = 2200,
+ .hblank_start = 2155, .htotal = 2201,
.progressive = FALSE, .trilevel_sync = TRUE,
commit b404afb755b608b02bcf0be1f8fe8a38d3d7bc1e
Author: Zhenyu Wang <zhenyu.z.wang at intel.com>
Date: Wed Oct 29 20:32:18 2008 +0800
TV: save serveral TV_CTL register fields in mode set
Driver should keep those fields according with spec.
diff --git a/src/i810_reg.h b/src/i810_reg.h
index 6458008..e9c03e5 100644
--- a/src/i810_reg.h
+++ b/src/i810_reg.h
@@ -1577,7 +1577,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
# define TV_ENC_C0_FIX (1 << 10)
/** Bits that must be preserved by software */
-# define TV_CTL_SAVE ((3 << 8) | (3 << 6))
+# define TV_CTL_SAVE ((1 << 11) | (3 << 9) | (7 << 6) | 0xf)
# define TV_FUSE_STATE_MASK (3 << 4)
/** Read-only state that reports all features enabled */
# define TV_FUSE_STATE_ENABLED (0 << 4)
diff --git a/src/i830_tv.c b/src/i830_tv.c
index 4063588..d02bc11 100644
--- a/src/i830_tv.c
+++ b/src/i830_tv.c
@@ -1042,7 +1042,8 @@ i830_tv_mode_set(xf86OutputPtr output, DisplayModePtr mode,
if (!tv_mode)
return; /* can't happen (mode_prepare prevents this) */
- tv_ctl = 0;
+ tv_ctl = INREG(TV_CTL);
+ tv_ctl &= TV_CTL_SAVE;
switch (dev_priv->type) {
default:
commit 2ae91f0ffdadfb393d526b94e21914a31aa14232
Author: Zhenyu Wang <zhenyu.z.wang at intel.com>
Date: Wed Oct 29 20:26:44 2008 +0800
TV: fix default contrast and saturation modifier
Color knobs was set with higher modifier which caused strong color
on TV screen. Setting fixed point modifier to default 1.0 makes picture
on TV look nicer.
diff --git a/src/i830_tv.c b/src/i830_tv.c
index de0e15d..4063588 100644
--- a/src/i830_tv.c
+++ b/src/i830_tv.c
@@ -1179,7 +1179,9 @@ i830_tv_mode_set(xf86OutputPtr output, DisplayModePtr mode,
(i830_float_to_csc(color_conversion->bv) << 16) |
(i830_float_to_luma(color_conversion->av)));
- OUTREG(TV_CLR_KNOBS, 0x00606000);
+ /* 2.6 fixed point value for contrast and saturation modifier,
+ use 1 as default */
+ OUTREG(TV_CLR_KNOBS, 0x00404000);
OUTREG(TV_CLR_LEVEL, ((video_levels->black << TV_BLACK_LEVEL_SHIFT) |
(video_levels->blank << TV_BLANK_LEVEL_SHIFT)));
{
commit c4cab00ef7f57fc27776f53263aacec2edf6f959
Author: Zhenyu Wang <zhenyu.z.wang at intel.com>
Date: Wed Oct 29 20:26:03 2008 +0800
TV: white space cleanup
diff --git a/src/i830_tv.c b/src/i830_tv.c
index 0a33357..de0e15d 100644
--- a/src/i830_tv.c
+++ b/src/i830_tv.c
@@ -144,7 +144,7 @@ static const uint32_t filter_table[] = {
0x2EC03C80, 0x320029C0, 0x3D403080, 0x29402F00,
0x308031C0, 0x2F203DC0, 0x31802900, 0x3E8030C0,
0x28802F40, 0x30C03140, 0x2F203F40, 0x31402840,
- 0x28003100, 0x28002F00, 0x00003100, 0x36403000,
+ 0x28003100, 0x28002F00, 0x00003100, 0x36403000,
0x2D002CC0, 0x30003640, 0x2D0036C0,
0x35C02CC0, 0x37403000, 0x2C802D40, 0x30003540,
0x2D8037C0, 0x34C02C40, 0x38403000, 0x2BC02E00,
@@ -215,7 +215,7 @@ typedef struct {
*
* The constants below were all computed using a 107.520MHz clock
*/
-
+
/**
* Register programming values for TV modes.
*
@@ -225,7 +225,7 @@ typedef struct {
const static tv_mode_t tv_modes[] = {
{
.name = "NTSC-M",
- .clock = 107520,
+ .clock = 107520,
.refresh = 29.97,
.oversample = TV_OVERSAMPLE_8X,
.component_only = 0,
@@ -239,7 +239,7 @@ const static tv_mode_t tv_modes[] = {
.vsync_start_f1 = 6, .vsync_start_f2 = 7,
.vsync_len = 6,
- .veq_ena = TRUE, .veq_start_f1 = 0,
+ .veq_ena = TRUE, .veq_start_f1 = 0,
.veq_start_f2 = 1, .veq_len = 18,
.vi_end_f1 = 20, .vi_end_f2 = 21,
@@ -249,7 +249,7 @@ const static tv_mode_t tv_modes[] = {
.hburst_start = 72, .hburst_len = 34,
.vburst_start_f1 = 9, .vburst_end_f1 = 240,
.vburst_start_f2 = 10, .vburst_end_f2 = 240,
- .vburst_start_f3 = 9, .vburst_end_f3 = 240,
+ .vburst_start_f3 = 9, .vburst_end_f3 = 240,
.vburst_start_f4 = 10, .vburst_end_f4 = 240,
/* desired 3.5800000 actual 3.5800000 clock 107.52 */
@@ -276,7 +276,7 @@ const static tv_mode_t tv_modes[] = {
},
{
.name = "NTSC-443",
- .clock = 107520,
+ .clock = 107520,
.refresh = 29.97,
.oversample = TV_OVERSAMPLE_8X,
.component_only = 0,
@@ -289,7 +289,7 @@ const static tv_mode_t tv_modes[] = {
.vsync_start_f1 = 6, .vsync_start_f2 = 7,
.vsync_len = 6,
- .veq_ena = TRUE, .veq_start_f1 = 0,
+ .veq_ena = TRUE, .veq_start_f1 = 0,
.veq_start_f2 = 1, .veq_len = 18,
.vi_end_f1 = 20, .vi_end_f2 = 21,
@@ -299,7 +299,7 @@ const static tv_mode_t tv_modes[] = {
.hburst_start = 72, .hburst_len = 34,
.vburst_start_f1 = 9, .vburst_end_f1 = 240,
.vburst_start_f2 = 10, .vburst_end_f2 = 240,
- .vburst_start_f3 = 9, .vburst_end_f3 = 240,
+ .vburst_start_f3 = 9, .vburst_end_f3 = 240,
.vburst_start_f4 = 10, .vburst_end_f4 = 240,
/* desired 4.4336180 actual 4.4336180 clock 107.52 */
@@ -326,7 +326,7 @@ const static tv_mode_t tv_modes[] = {
},
{
.name = "NTSC-J",
- .clock = 107520,
+ .clock = 107520,
.refresh = 29.97,
.oversample = TV_OVERSAMPLE_8X,
.component_only = 0,
@@ -340,7 +340,7 @@ const static tv_mode_t tv_modes[] = {
.vsync_start_f1 = 6, .vsync_start_f2 = 7,
.vsync_len = 6,
- .veq_ena = TRUE, .veq_start_f1 = 0,
+ .veq_ena = TRUE, .veq_start_f1 = 0,
.veq_start_f2 = 1, .veq_len = 18,
.vi_end_f1 = 20, .vi_end_f2 = 21,
@@ -350,7 +350,7 @@ const static tv_mode_t tv_modes[] = {
.hburst_start = 72, .hburst_len = 34,
.vburst_start_f1 = 9, .vburst_end_f1 = 240,
.vburst_start_f2 = 10, .vburst_end_f2 = 240,
- .vburst_start_f3 = 9, .vburst_end_f3 = 240,
+ .vburst_start_f3 = 9, .vburst_end_f3 = 240,
.vburst_start_f4 = 10, .vburst_end_f4 = 240,
/* desired 3.5800000 actual 3.5800000 clock 107.52 */
@@ -377,7 +377,7 @@ const static tv_mode_t tv_modes[] = {
},
{
.name = "PAL-M",
- .clock = 107520,
+ .clock = 107520,
.refresh = 29.97,
.oversample = TV_OVERSAMPLE_8X,
.component_only = 0,
@@ -391,7 +391,7 @@ const static tv_mode_t tv_modes[] = {
.vsync_start_f1 = 6, .vsync_start_f2 = 7,
.vsync_len = 6,
- .veq_ena = TRUE, .veq_start_f1 = 0,
+ .veq_ena = TRUE, .veq_start_f1 = 0,
.veq_start_f2 = 1, .veq_len = 18,
.vi_end_f1 = 20, .vi_end_f2 = 21,
@@ -401,7 +401,7 @@ const static tv_mode_t tv_modes[] = {
.hburst_start = 72, .hburst_len = 34,
.vburst_start_f1 = 9, .vburst_end_f1 = 240,
.vburst_start_f2 = 10, .vburst_end_f2 = 240,
- .vburst_start_f3 = 9, .vburst_end_f3 = 240,
+ .vburst_start_f3 = 9, .vburst_end_f3 = 240,
.vburst_start_f4 = 10, .vburst_end_f4 = 240,
/* desired 3.5800000 actual 3.5800000 clock 107.52 */
@@ -429,7 +429,7 @@ const static tv_mode_t tv_modes[] = {
{
/* 625 Lines, 50 Fields, 15.625KHz line, Sub-Carrier 4.434MHz */
.name = "PAL-N",
- .clock = 107520,
+ .clock = 107520,
.refresh = 25.0,
.oversample = TV_OVERSAMPLE_8X,
.component_only = 0,
@@ -443,17 +443,17 @@ const static tv_mode_t tv_modes[] = {
.vsync_start_f1 = 6, .vsync_start_f2 = 7,
.vsync_len = 6,
- .veq_ena = TRUE, .veq_start_f1 = 0,
+ .veq_ena = TRUE, .veq_start_f1 = 0,
.veq_start_f2 = 1, .veq_len = 18,
.vi_end_f1 = 24, .vi_end_f2 = 25,
.nbr_end = 286,
.burst_ena = TRUE,
- .hburst_start = 73, .hburst_len = 34,
+ .hburst_start = 73, .hburst_len = 34,
.vburst_start_f1 = 8, .vburst_end_f1 = 285,
.vburst_start_f2 = 8, .vburst_end_f2 = 286,
- .vburst_start_f3 = 9, .vburst_end_f3 = 286,
+ .vburst_start_f3 = 9, .vburst_end_f3 = 286,
.vburst_start_f4 = 9, .vburst_end_f4 = 285,
@@ -482,7 +482,7 @@ const static tv_mode_t tv_modes[] = {
{
/* 625 Lines, 50 Fields, 15.625KHz line, Sub-Carrier 4.434MHz */
.name = "PAL",
- .clock = 107520,
+ .clock = 107520,
.refresh = 25.0,
.oversample = TV_OVERSAMPLE_8X,
.component_only = 0,
@@ -495,7 +495,7 @@ const static tv_mode_t tv_modes[] = {
.vsync_start_f1 = 5, .vsync_start_f2 = 6,
.vsync_len = 5,
- .veq_ena = TRUE, .veq_start_f1 = 0,
+ .veq_ena = TRUE, .veq_start_f1 = 0,
.veq_start_f2 = 1, .veq_len = 15,
.vi_end_f1 = 24, .vi_end_f2 = 25,
@@ -505,7 +505,7 @@ const static tv_mode_t tv_modes[] = {
.hburst_start = 73, .hburst_len = 32,
.vburst_start_f1 = 8, .vburst_end_f1 = 285,
.vburst_start_f2 = 8, .vburst_end_f2 = 286,
- .vburst_start_f3 = 9, .vburst_end_f3 = 286,
+ .vburst_start_f3 = 9, .vburst_end_f3 = 286,
.vburst_start_f4 = 9, .vburst_end_f4 = 285,
/* desired 4.4336180 actual 4.4336180 clock 107.52 */
@@ -532,7 +532,7 @@ const static tv_mode_t tv_modes[] = {
},
{
.name = "480p at 59.94Hz",
- .clock = 107520,
+ .clock = 107520,
.refresh = 59.94,
.oversample = TV_OVERSAMPLE_4X,
.component_only = 1,
@@ -540,7 +540,7 @@ const static tv_mode_t tv_modes[] = {
.hsync_end = 64, .hblank_end = 122,
.hblank_start = 842, .htotal = 857,
- .progressive = TRUE,.trilevel_sync = FALSE,
+ .progressive = TRUE, .trilevel_sync = FALSE,
.vsync_start_f1 = 12, .vsync_start_f2 = 12,
.vsync_len = 12,
@@ -556,7 +556,7 @@ const static tv_mode_t tv_modes[] = {
},
{
.name = "480p at 60Hz",
- .clock = 107520,
+ .clock = 107520,
.refresh = 60.0,
.oversample = TV_OVERSAMPLE_4X,
.component_only = 1,
@@ -564,7 +564,7 @@ const static tv_mode_t tv_modes[] = {
.hsync_end = 64, .hblank_end = 122,
.hblank_start = 842, .htotal = 856,
- .progressive = TRUE,.trilevel_sync = FALSE,
+ .progressive = TRUE, .trilevel_sync = FALSE,
.vsync_start_f1 = 12, .vsync_start_f2 = 12,
.vsync_len = 12,
@@ -580,7 +580,7 @@ const static tv_mode_t tv_modes[] = {
},
{
.name = "576p",
- .clock = 107520,
+ .clock = 107520,
.refresh = 50.0,
.oversample = TV_OVERSAMPLE_4X,
.component_only = 1,
@@ -588,7 +588,7 @@ const static tv_mode_t tv_modes[] = {
.hsync_end = 64, .hblank_end = 139,
.hblank_start = 859, .htotal = 863,
- .progressive = TRUE, .trilevel_sync = FALSE,
+ .progressive = TRUE, .trilevel_sync = FALSE,
.vsync_start_f1 = 10, .vsync_start_f2 = 10,
.vsync_len = 10,
@@ -604,7 +604,7 @@ const static tv_mode_t tv_modes[] = {
},
{
.name = "720p at 60Hz",
- .clock = 148800,
+ .clock = 148800,
.refresh = 60.0,
.oversample = TV_OVERSAMPLE_2X,
.component_only = 1,
@@ -612,7 +612,7 @@ const static tv_mode_t tv_modes[] = {
.hsync_end = 80, .hblank_end = 300,
.hblank_start = 1580, .htotal = 1649,
- .progressive = TRUE, .trilevel_sync = TRUE,
+ .progressive = TRUE, .trilevel_sync = TRUE,
.vsync_start_f1 = 10, .vsync_start_f2 = 10,
.vsync_len = 10,
@@ -628,7 +628,7 @@ const static tv_mode_t tv_modes[] = {
},
{
.name = "720p at 59.94Hz",
- .clock = 148800,
+ .clock = 148800,
.refresh = 59.94,
.oversample = TV_OVERSAMPLE_2X,
.component_only = 1,
@@ -636,7 +636,7 @@ const static tv_mode_t tv_modes[] = {
.hsync_end = 80, .hblank_end = 300,
.hblank_start = 1580, .htotal = 1651,
- .progressive = TRUE, .trilevel_sync = TRUE,
+ .progressive = TRUE, .trilevel_sync = TRUE,
.vsync_start_f1 = 10, .vsync_start_f2 = 10,
.vsync_len = 10,
@@ -652,7 +652,7 @@ const static tv_mode_t tv_modes[] = {
},
{
.name = "720p at 50Hz",
- .clock = 148800,
+ .clock = 148800,
.refresh = 50.0,
.oversample = TV_OVERSAMPLE_2X,
.component_only = 1,
@@ -660,7 +660,7 @@ const static tv_mode_t tv_modes[] = {
.hsync_end = 80, .hblank_end = 300,
.hblank_start = 1580, .htotal = 1979,
- .progressive = TRUE, .trilevel_sync = TRUE,
+ .progressive = TRUE, .trilevel_sync = TRUE,
.vsync_start_f1 = 10, .vsync_start_f2 = 10,
.vsync_len = 10,
@@ -677,7 +677,7 @@ const static tv_mode_t tv_modes[] = {
},
{
.name = "1080i at 50Hz",
- .clock = 148800,
+ .clock = 148800,
.refresh = 25.0,
.oversample = TV_OVERSAMPLE_2X,
.component_only = 1,
@@ -685,14 +685,13 @@ const static tv_mode_t tv_modes[] = {
.hsync_end = 88, .hblank_end = 235,
.hblank_start = 2155, .htotal = 2639,
- .progressive = FALSE, .trilevel_sync = TRUE,
+ .progressive = FALSE, .trilevel_sync = TRUE,
- .vsync_start_f1 = 4, .vsync_start_f2 = 5,
+ .vsync_start_f1 = 4, .vsync_start_f2 = 5,
.vsync_len = 10,
- .veq_ena = TRUE, .veq_start_f1 = 4,
- .veq_start_f2 = 4, .veq_len = 10,
-
+ .veq_ena = TRUE, .veq_start_f1 = 4,
+ .veq_start_f2 = 4, .veq_len = 10,
.vi_end_f1 = 21, .vi_end_f2 = 22,
.nbr_end = 539,
@@ -703,7 +702,7 @@ const static tv_mode_t tv_modes[] = {
},
{
.name = "1080i at 60Hz",
- .clock = 148800,
+ .clock = 148800,
.refresh = 30.0,
.oversample = TV_OVERSAMPLE_2X,
.component_only = 1,
@@ -711,15 +710,14 @@ const static tv_mode_t tv_modes[] = {
.hsync_end = 88, .hblank_end = 235,
.hblank_start = 2155, .htotal = 2199,
- .progressive = FALSE, .trilevel_sync = TRUE,
+ .progressive = FALSE, .trilevel_sync = TRUE,
- .vsync_start_f1 = 4, .vsync_start_f2 = 5,
+ .vsync_start_f1 = 4, .vsync_start_f2 = 5,
.vsync_len = 10,
- .veq_ena = TRUE, .veq_start_f1 = 4,
+ .veq_ena = TRUE, .veq_start_f1 = 4,
.veq_start_f2 = 4, .veq_len = 10,
-
.vi_end_f1 = 21, .vi_end_f2 = 22,
.nbr_end = 539,
@@ -729,7 +727,7 @@ const static tv_mode_t tv_modes[] = {
},
{
.name = "1080i at 59.94Hz",
- .clock = 148800,
+ .clock = 148800,
.refresh = 29.97,
.oversample = TV_OVERSAMPLE_2X,
.component_only = 1,
@@ -737,16 +735,16 @@ const static tv_mode_t tv_modes[] = {
.hsync_end = 88, .hblank_end = 235,
.hblank_start = 2155, .htotal = 2200,
- .progressive = FALSE, .trilevel_sync = TRUE,
+ .progressive = FALSE, .trilevel_sync = TRUE,
- .vsync_start_f1 = 4, .vsync_start_f2 = 5,
+ .vsync_start_f1 = 4, .vsync_start_f2 = 5,
.vsync_len = 10,
.veq_ena = TRUE, .veq_start_f1 = 4,
- .veq_start_f2 = 4, .veq_len = 10,
+ .veq_start_f2 = 4, .veq_len = 10,
- .vi_end_f1 = 21, .vi_end_f2 = 22,
+ .vi_end_f1 = 21, .vi_end_f2 = 22,
.nbr_end = 539,
.burst_ena = FALSE,
@@ -758,7 +756,7 @@ const static tv_mode_t tv_modes[] = {
#define NUM_TV_MODES sizeof(tv_modes) / sizeof (tv_modes[0])
static const video_levels_t component_level = {
- .blank = 279, .black = 279
+ .blank = 279, .black = 279, .burst = 0,
};
static const color_conversion_t sdtv_component_color = {
@@ -929,8 +927,8 @@ static const tv_mode_t *
i830_tv_mode_lookup (char *tv_format)
{
int i;
-
- for (i = 0; i < sizeof(tv_modes) / sizeof (tv_modes[0]); i++)
+
+ for (i = 0; i < sizeof(tv_modes) / sizeof (tv_modes[0]); i++)
{
const tv_mode_t *tv_mode = &tv_modes[i];
@@ -953,7 +951,7 @@ static int
i830_tv_mode_valid(xf86OutputPtr output, DisplayModePtr mode)
{
const tv_mode_t *tv_mode = i830_tv_mode_find (output);
-
+
if (tv_mode && fabs (tv_mode->refresh - xf86ModeVRefresh (mode)) < 1.0)
return MODE_OK;
return MODE_CLOCK_RANGE;
@@ -971,8 +969,8 @@ i830_tv_mode_fixup(xf86OutputPtr output, DisplayModePtr mode,
if (!tv_mode)
return FALSE;
-
- for (i = 0; i < xf86_config->num_output; i++)
+
+ for (i = 0; i < xf86_config->num_output; i++)
{
xf86OutputPtr other_output = xf86_config->output[i];
@@ -1040,10 +1038,10 @@ i830_tv_mode_set(xf86OutputPtr output, DisplayModePtr mode,
const video_levels_t *video_levels;
const color_conversion_t *color_conversion;
Bool burst_ena;
-
+
if (!tv_mode)
return; /* can't happen (mode_prepare prevents this) */
-
+
tv_ctl = 0;
switch (dev_priv->type) {
@@ -1207,7 +1205,7 @@ i830_tv_mode_set(xf86OutputPtr output, DisplayModePtr mode,
i830WaitForVblank(pScrn);
/* Filter ctl must be set before TV_WIN_SIZE */
- OUTREG(TV_FILTER_CTL_1, TV_AUTO_SCALE);
+ OUTREG(TV_FILTER_CTL_1, TV_AUTO_SCALE);
xsize = tv_mode->hblank_start - tv_mode->hblank_end;
if (tv_mode->progressive)
ysize = tv_mode->nbr_end + 1;
@@ -1216,9 +1214,9 @@ i830_tv_mode_set(xf86OutputPtr output, DisplayModePtr mode,
xpos += dev_priv->margin[TV_MARGIN_LEFT];
ypos += dev_priv->margin[TV_MARGIN_TOP];
- xsize -= (dev_priv->margin[TV_MARGIN_LEFT] +
+ xsize -= (dev_priv->margin[TV_MARGIN_LEFT] +
dev_priv->margin[TV_MARGIN_RIGHT]);
- ysize -= (dev_priv->margin[TV_MARGIN_TOP] +
+ ysize -= (dev_priv->margin[TV_MARGIN_TOP] +
dev_priv->margin[TV_MARGIN_BOTTOM]);
OUTREG(TV_WIN_POS, (xpos<<16)|ypos);
OUTREG(TV_WIN_SIZE, (xsize<<16)|ysize);
@@ -1227,7 +1225,7 @@ i830_tv_mode_set(xf86OutputPtr output, DisplayModePtr mode,
OUTREG(dspcntr_reg, dspcntr);
/* Flush the plane changes */
OUTREG(dspbase_reg, INREG(dspbase_reg));
- }
+ }
j = 0;
for (i = 0; i < 60; i++)
@@ -1381,7 +1379,7 @@ i830_tv_detect(xf86OutputPtr output)
i830_tv_format_configure_property (output);
#endif
}
-
+
switch (type) {
case TV_TYPE_NONE:
return XF86OutputStatusDisconnected;
@@ -1394,8 +1392,8 @@ i830_tv_detect(xf86OutputPtr output)
static struct input_res {
char *name;
- int w, h;
-} input_res_table[] =
+ int w, h;
+} input_res_table[] =
{
{"640x480", 640, 480},
{"800x600", 800, 600},
@@ -1425,16 +1423,16 @@ i830_tv_get_modes(xf86OutputPtr output)
struct input_res *input = &input_res_table[j];
unsigned int hactive_s = input->w;
unsigned int vactive_s = input->h;
-
+
if (tv_mode->max_srcw && input->w > tv_mode->max_srcw)
continue;
- if (input->w > 1024 && (!tv_mode->progressive
+ if (input->w > 1024 && (!tv_mode->progressive
&& !tv_mode->component_only))
continue;
mode_ptr = xnfcalloc(1, sizeof(DisplayModeRec));
- mode_ptr->name = xnfalloc(strlen(input->name) + 1);
+ mode_ptr->name = xnfalloc(strlen(input->name) + 1);
strcpy (mode_ptr->name, input->name);
mode_ptr->HDisplay = hactive_s;
@@ -1451,17 +1449,17 @@ i830_tv_get_modes(xf86OutputPtr output)
mode_ptr->VSyncEnd = mode_ptr->VSyncStart + 1;
mode_ptr->VTotal = vactive_s + 33;
- mode_ptr->Clock = (int) (tv_mode->refresh *
- mode_ptr->VTotal *
+ mode_ptr->Clock = (int) (tv_mode->refresh *
+ mode_ptr->VTotal *
mode_ptr->HTotal / 1000.0);
-
+
mode_ptr->type = M_T_DRIVER;
mode_ptr->next = ret;
mode_ptr->prev = NULL;
if (ret != NULL)
ret->prev = mode_ptr;
ret = mode_ptr;
- }
+ }
return ret;
}
@@ -1499,7 +1497,6 @@ i830_tv_format_set_property (xf86OutputPtr output)
return err == Success;
}
-
/**
* Configure the TV_FORMAT property to list only supported formats
*
@@ -1515,16 +1512,16 @@ i830_tv_format_configure_property (xf86OutputPtr output)
Atom current_atoms[NUM_TV_MODES];
int num_atoms = 0;
int i;
-
+
if (!output->randr_output)
return Success;
for (i = 0; i < NUM_TV_MODES; i++)
if (!tv_modes[i].component_only || dev_priv->type == TV_TYPE_COMPONENT)
current_atoms[num_atoms++] = tv_format_name_atoms[i];
-
+
return RRConfigureOutputProperty(output->randr_output, tv_format_atom,
- TRUE, FALSE, FALSE,
+ TRUE, FALSE, FALSE,
num_atoms, (INT32 *) current_atoms);
}
@@ -1573,7 +1570,7 @@ i830_tv_create_resources(xf86OutputPtr output)
range[1] = 100;
err = RRConfigureOutputProperty(output->randr_output, margin_atoms[i],
TRUE, TRUE, FALSE, 2, range);
-
+
if (err != 0)
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"RRConfigureOutputProperty error, %d\n", err);
@@ -1595,8 +1592,8 @@ i830_tv_set_property(xf86OutputPtr output, Atom property,
RRPropertyValuePtr value)
{
int i;
-
- if (property == tv_format_atom)
+
+ if (property == tv_format_atom)
{
I830OutputPrivatePtr intel_output = output->driver_private;
struct i830_tv_priv *dev_priv = intel_output->dev_priv;
@@ -1609,7 +1606,7 @@ i830_tv_set_property(xf86OutputPtr output, Atom property,
memcpy (&atom, value->data, 4);
name = NameForAtom (atom);
-
+
val = xalloc (strlen (name) + 1);
if (!val)
return FALSE;
@@ -1652,7 +1649,7 @@ i830_tv_get_crtc(xf86OutputPtr output)
ScrnInfoPtr pScrn = output->scrn;
I830Ptr pI830 = I830PTR(pScrn);
int pipe = !!(INREG(TV_CTL) & TV_ENC_PIPEB_SELECT);
-
+
return i830_pipe_to_crtc(pScrn, pipe);
}
#endif
@@ -1712,7 +1709,7 @@ i830_tv_init(ScrnInfoPtr pScrn)
* bit, (either as a 0 or a 1), assume it doesn't really
* exist
*/
- if ((tv_dac_on & TVDAC_STATE_CHG_EN) == 0 ||
+ if ((tv_dac_on & TVDAC_STATE_CHG_EN) == 0 ||
(tv_dac_off & TVDAC_STATE_CHG_EN) != 0)
return;
@@ -1739,24 +1736,24 @@ i830_tv_init(ScrnInfoPtr pScrn)
dev_priv->type = TV_TYPE_UNKNOWN;
dev_priv->tv_format = NULL;
-
+
/* BIOS margin values */
dev_priv->margin[TV_MARGIN_LEFT] = 54;
dev_priv->margin[TV_MARGIN_TOP] = 36;
dev_priv->margin[TV_MARGIN_RIGHT] = 46;
dev_priv->margin[TV_MARGIN_BOTTOM] = 37;
-
+
if (output->conf_monitor)
{
char *tv_format;
-
+
tv_format = xf86findOptionValue (output->conf_monitor->mon_option_lst, "TV Format");
if (tv_format)
dev_priv->tv_format = xstrdup (tv_format);
}
if (!dev_priv->tv_format)
dev_priv->tv_format = xstrdup (tv_modes[0].name);
-
+
output->driver_private = intel_output;
output->interlaceAllowed = FALSE;
output->doubleScanAllowed = FALSE;
commit b130f94f26111e1a12ce869292915504588d0369
Author: Zhenyu Wang <zhenyu.z.wang at intel.com>
Date: Thu Nov 6 10:14:00 2008 +0800
SDVO: fix more command definition errors
diff --git a/src/i830_sdvo_regs.h b/src/i830_sdvo_regs.h
index 11e49c8..5d5bf98 100644
--- a/src/i830_sdvo_regs.h
+++ b/src/i830_sdvo_regs.h
@@ -566,7 +566,7 @@ struct i830_sdvo_enhancements_reply {
#define SDVO_CMD_GET_MAX_2D_FLICKER_FITER 0x52
#define SDVO_CMD_GET_MAX_SATURATION 0x55
#define SDVO_CMD_GET_MAX_HUE 0x58
-#define SDVO_CMD_GET_MAX_BRIGHTNESS 0x5c
+#define SDVO_CMD_GET_MAX_BRIGHTNESS 0x5b
#define SDVO_CMD_GET_MAX_CONTRAST 0x5e
#define SDVO_CMD_GET_MAX_OVERSCAN_H 0x61
#define SDVO_CMD_GET_MAX_OVERSCAN_V 0x64
@@ -580,8 +580,8 @@ struct i830_sdvo_enhancement_limits_reply {
uint16_t default_value;
} __attribute__((packed));
-#define SDVO_CMD_GET_FLICKER_FITER 0x4d
-#define SDVO_CMD_SET_FLICKER_FITER 0x4e
+#define SDVO_CMD_GET_FLICKER_FILTER 0x4e
+#define SDVO_CMD_SET_FLICKER_FILTER 0x4f
#define SDVO_CMD_GET_ADAPTIVE_FLICKER_FITER 0x50
#define SDVO_CMD_SET_ADAPTIVE_FLICKER_FITER 0x51
#define SDVO_CMD_GET_2D_FLICKER_FITER 0x53
commit 3ab979da5c867fb862e33a80b973a35d56d56a55
Author: Zhenyu Wang <zhenyu.z.wang at intel.com>
Date: Mon Nov 3 16:05:28 2008 +0800
SDVO: add command for set monitor power state
SDVO encoder power state must be higher than monitor's state.
This only adds command and doesn't enable monitor power state
setting yet.
diff --git a/src/i830_sdvo.c b/src/i830_sdvo.c
index 75a8d02..4a424de 100644
--- a/src/i830_sdvo.c
+++ b/src/i830_sdvo.c
@@ -231,8 +231,9 @@ const static struct _sdvo_cmd_name {
SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
- SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODER_POWER_STATE),
+ SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
+ SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
diff --git a/src/i830_sdvo_regs.h b/src/i830_sdvo_regs.h
index 5ec22d4..11e49c8 100644
--- a/src/i830_sdvo_regs.h
+++ b/src/i830_sdvo_regs.h
@@ -513,13 +513,29 @@ struct i830_sdvo_hdtv_resolution_reply {
unsigned int pad5:7;
} __attribute__((packed));
+/* Get supported power state returns info for encoder and monitor, rely on
+ last SetTargetInput and SetTargetOutput calls */
#define SDVO_CMD_GET_SUPPORTED_POWER_STATES 0x2a
-#define SDVO_CMD_GET_ENCODER_POWER_STATE 0x2b
+/* Get power state returns info for encoder and monitor, rely on last
+ SetTargetInput and SetTargetOutput calls */
+#define SDVO_CMD_GET_POWER_STATE 0x2b
+/* Set encoder power state */
#define SDVO_CMD_SET_ENCODER_POWER_STATE 0x2c
# define SDVO_ENCODER_STATE_ON (1 << 0)
# define SDVO_ENCODER_STATE_STANDBY (1 << 1)
# define SDVO_ENCODER_STATE_SUSPEND (1 << 2)
# define SDVO_ENCODER_STATE_OFF (1 << 3)
+# define SDVO_MONITOR_STATE_ON (1 << 4)
+# define SDVO_MONITOR_STATE_STANDBY (1 << 5)
+# define SDVO_MONITOR_STATE_SUSPEND (1 << 6)
+# define SDVO_MONITOR_STATE_OFF (1 << 7)
+
+/* Set display power state */
+#define SDVO_CMD_SET_DISPLAY_POWER_STATE 0x7d
+# define SDVO_DISPLAY_STATE_ON (1 << 0)
+# define SDVO_DISPLAY_STATE_STANDBY (1 << 1)
+# define SDVO_DISPLAY_STATE_SUSPEND (1 << 2)
+# define SDVO_DISPLAY_STATE_OFF (1 << 3)
#define SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS 0x84
struct i830_sdvo_enhancements_reply {
commit f558a4972d1cca03785da025170259c61541ee63
Author: Zhenyu Wang <zhenyu.z.wang at intel.com>
Date: Mon Nov 3 16:01:40 2008 +0800
SDVO: add GetScaledHDTVResolutionSupport command
diff --git a/src/i830_sdvo.c b/src/i830_sdvo.c
index 35fccd5..75a8d02 100644
--- a/src/i830_sdvo.c
+++ b/src/i830_sdvo.c
@@ -235,6 +235,7 @@ const static struct _sdvo_cmd_name {
SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
+ SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
/* HDMI op code */
SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
@@ -1417,6 +1418,7 @@ i830_sdvo_dump_device(xf86OutputPtr output)
i830_sdvo_dump_cmd(output, SDVO_CMD_GET_SUPPORTED_TV_FORMATS);
i830_sdvo_dump_cmd(output, SDVO_CMD_GET_TV_FORMAT);
i830_sdvo_dump_cmd(output, SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT);
+ i830_sdvo_dump_cmd(output, SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT);
i830_sdvo_dump_cmd(output, SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS);
i830_sdvo_dump_cmd(output, SDVO_CMD_GET_SUPP_ENCODE);
diff --git a/src/i830_sdvo_regs.h b/src/i830_sdvo_regs.h
index 7ca85f3..5ec22d4 100644
--- a/src/i830_sdvo_regs.h
+++ b/src/i830_sdvo_regs.h
@@ -422,6 +422,97 @@ struct i830_sdvo_sdtv_resolution_reply {
unsigned int pad:5;
} __attribute__((packed));
+/* Get supported resolution with squire pixel aspect ratio that can be
+ scaled for the requested HDTV format */
+#define SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT 0x85
+
+struct i830_sdvo_hdtv_resolution_request {
+ unsigned int hdtv_std_smpte_240m_1080i_59:1;
+ unsigned int hdtv_std_smpte_240m_1080i_60:1;
+ unsigned int hdtv_std_smpte_260m_1080i_59:1;
+ unsigned int hdtv_std_smpte_260m_1080i_60:1;
+ unsigned int hdtv_std_smpte_274m_1080i_50:1;
+ unsigned int hdtv_std_smpte_274m_1080i_59:1;
+ unsigned int hdtv_std_smpte_274m_1080i_60:1;
+ unsigned int hdtv_std_smpte_274m_1080p_23:1;
+
+ unsigned int hdtv_std_smpte_274m_1080p_24:1;
+ unsigned int hdtv_std_smpte_274m_1080p_25:1;
+ unsigned int hdtv_std_smpte_274m_1080p_29:1;
+ unsigned int hdtv_std_smpte_274m_1080p_30:1;
+ unsigned int hdtv_std_smpte_274m_1080p_50:1;
+ unsigned int hdtv_std_smpte_274m_1080p_59:1;
+ unsigned int hdtv_std_smpte_274m_1080p_60:1;
+ unsigned int hdtv_std_smpte_295m_1080i_50:1;
+
+ unsigned int hdtv_std_smpte_295m_1080p_50:1;
+ unsigned int hdtv_std_smpte_296m_720p_59:1;
+ unsigned int hdtv_std_smpte_296m_720p_60:1;
+ unsigned int hdtv_std_smpte_296m_720p_50:1;
+ unsigned int hdtv_std_smpte_293m_480p_59:1;
+ unsigned int hdtv_std_smpte_170m_480i_59:1;
+ unsigned int hdtv_std_iturbt601_576i_50:1;
+ unsigned int hdtv_std_iturbt601_576p_50:1;
+
+ unsigned int hdtv_std_eia_7702a_480i_60:1;
+ unsigned int hdtv_std_eia_7702a_480p_60:1;
+ unsigned int pad:6;
+} __attribute__((packed));
+
+struct i830_sdvo_hdtv_resolution_reply {
+ unsigned int res_640x480:1;
+ unsigned int res_800x600:1;
+ unsigned int res_1024x768:1;
+ unsigned int res_1280x960:1;
+ unsigned int res_1400x1050:1;
+ unsigned int res_1600x1200:1;
+ unsigned int res_1920x1440:1;
+ unsigned int res_2048x1536:1;
+
+ unsigned int res_2560x1920:1;
+ unsigned int res_3200x2400:1;
+ unsigned int res_3840x2880:1;
+ unsigned int pad1:5;
+
+ unsigned int res_848x480:1;
+ unsigned int res_1064x600:1;
+ unsigned int res_1280x720:1;
+ unsigned int res_1360x768:1;
+ unsigned int res_1704x960:1;
+ unsigned int res_1864x1050:1;
+ unsigned int res_1920x1080:1;
+ unsigned int res_2128x1200:1;
+
+ unsigned int res_2560x1400:1;
+ unsigned int res_2728x1536:1;
+ unsigned int res_3408x1920:1;
+ unsigned int res_4264x2400:1;
+ unsigned int res_5120x2880:1;
+ unsigned int pad2:3;
+
+ unsigned int res_768x480:1;
+ unsigned int res_960x600:1;
+ unsigned int res_1152x720:1;
+ unsigned int res_1124x768:1;
+ unsigned int res_1536x960:1;
+ unsigned int res_1680x1050:1;
+ unsigned int res_1728x1080:1;
+ unsigned int res_1920x1200:1;
+
+ unsigned int res_2304x1440:1;
+ unsigned int res_2456x1536:1;
+ unsigned int res_3072x1920:1;
+ unsigned int res_3840x2400:1;
+ unsigned int res_4608x2880:1;
+ unsigned int pad3:3;
+
+ unsigned int res_1280x1024:1;
+ unsigned int pad4:7;
+
+ unsigned int res_1280x768:1;
+ unsigned int pad5:7;
+} __attribute__((packed));
+
#define SDVO_CMD_GET_SUPPORTED_POWER_STATES 0x2a
#define SDVO_CMD_GET_ENCODER_POWER_STATE 0x2b
#define SDVO_CMD_SET_ENCODER_POWER_STATE 0x2c
commit cd8cbff5d7921d2f4fdac106c3d54414310af94d
Author: Zhenyu Wang <zhenyu.z.wang at intel.com>
Date: Mon Nov 3 15:20:18 2008 +0800
SDVO: fix sdvo tv format and sdtv resolution request/reply definition
diff --git a/src/i830_sdvo_regs.h b/src/i830_sdvo_regs.h
index 53544ae..7ca85f3 100644
--- a/src/i830_sdvo_regs.h
+++ b/src/i830_sdvo_regs.h
@@ -337,15 +337,15 @@ struct i830_sdvo_tv_format {
unsigned int hdtv_std_smpte_240m_1080i_60:1;
unsigned int hdtv_std_smpte_260m_1080i_59:1;
unsigned int hdtv_std_smpte_260m_1080i_60:1;
- unsigned int hdtv_std_smpte_270m_1080i_50:1;
-
unsigned int hdtv_std_smpte_274m_1080i_50:1;
+
unsigned int hdtv_std_smpte_274m_1080i_59:1;
unsigned int hdtv_std_smpte_274m_1080i_60:1;
unsigned int hdtv_std_smpte_274m_1080p_23:1;
unsigned int hdtv_std_smpte_274m_1080p_24:1;
unsigned int hdtv_std_smpte_274m_1080p_25:1;
unsigned int hdtv_std_smpte_274m_1080p_29:1;
+ unsigned int hdtv_std_smpte_274m_1080p_30:1;
unsigned int hdtv_std_smpte_274m_1080p_50:1;
unsigned int hdtv_std_smpte_274m_1080p_59:1;
@@ -357,7 +357,7 @@ struct i830_sdvo_tv_format {
unsigned int hdtv_std_smpte_296m_720p_50:1;
unsigned int hdtv_std_smpte_293m_480p_59:1;
- unsigned int hdtv_std_smpte_270m_480i_59:1;
+ unsigned int hdtv_std_smpte_170m_480i_59:1;
unsigned int hdtv_std_iturbt601_576i_50:1;
unsigned int hdtv_std_iturbt601_576p_50:1;
unsigned int hdtv_std_eia_7702a_480i_60:1;
@@ -386,7 +386,17 @@ struct i830_sdvo_sdtv_resolution_request {
unsigned int pal_n:1;
unsigned int pal_nc:1;
unsigned int pal_60:1;
+ unsigned int secam_b:1;
+ unsigned int secam_d:1;
+ unsigned int secam_g:1;
+ unsigned int secam_k:1;
+
+ unsigned int secam_k1:1;
+ unsigned int secam_l:1;
+ unsigned int secam_60:1;
+ unsigned int pad:5;
} __attribute__((packed));
+
struct i830_sdvo_sdtv_resolution_reply {
unsigned int res_320x200:1;
unsigned int res_320x240:1;
@@ -402,6 +412,7 @@ struct i830_sdvo_sdtv_resolution_reply {
unsigned int res_720x480:1;
unsigned int res_720x540:1;
unsigned int res_720x576:1;
+ unsigned int res_768x576:1;
unsigned int res_800x600:1;
unsigned int res_832x624:1;
commit 61672b8c458ecf449138c51aeb12cf24dbbd59d9
Author: Zhenyu Wang <zhenyu.z.wang at intel.com>
Date: Mon Nov 3 14:59:53 2008 +0800
SDVO: add HDMI audio encrypt change bit for GetInterruptEventSource command
diff --git a/src/i830_sdvo_regs.h b/src/i830_sdvo_regs.h
index be35b8d..53544ae 100644
--- a/src/i830_sdvo_regs.h
+++ b/src/i830_sdvo_regs.h
@@ -210,7 +210,8 @@ struct i830_sdvo_in_out_map {
struct i830_sdvo_get_interrupt_event_source_response {
uint16_t interrupt_status;
unsigned int ambient_light_interrupt:1;
- unsigned int pad:7;
+ unsigned int hdmi_audio_encrypt_change:1;
+ unsigned int pad:6;
} __attribute__((packed));
/**
commit 45fb04474d0e67643a633dcc3aeb4efe7fd71ea1
Author: Zhenyu Wang <zhenyu.z.wang at intel.com>
Date: Mon Nov 3 14:51:14 2008 +0800
SDVO: fix wrong order of sdvo version's major/minor
diff --git a/src/i830_sdvo_regs.h b/src/i830_sdvo_regs.h
index 4d55555..be35b8d 100644
--- a/src/i830_sdvo_regs.h
+++ b/src/i830_sdvo_regs.h
@@ -50,8 +50,8 @@ struct i830_sdvo_caps {
uint8_t vendor_id;
uint8_t device_id;
uint8_t device_rev_id;
- uint8_t sdvo_version_major;
uint8_t sdvo_version_minor;
+ uint8_t sdvo_version_major;
unsigned int sdvo_input_count:2;
unsigned int smooth_scaling:1;
unsigned int sharp_scaling:1;
More information about the xorg-commit
mailing list