xf86-video-intel: src/i830_exa.c src/i830.h src/i830_render.c src/i915_render.c

[Zhenyu Wang]

 src/i830.h        |   11 +++++++++++
 src/i830_exa.c    |    5 +++++
 src/i830_render.c |    5 +++++
 src/i915_render.c |    5 +++++
 4 files changed, 26 insertions(+)

New commits:
commit 79fde3ad7a949fb7f0dc9907cb6eea6ca9a910ae
Author: Zhenyu Wang <zhenyu.z.wang at intel.com>
Date:   Sat Apr 19 08:54:38 2008 +0800

    Check pitch for EXA operation
    
    2D pitch limit applys to all chips. Pre-965 chip has
    8KB pitch limit for 3D. 965 supports max pitch by current
    exa (128KB).
    (cherry picked from commit 8187a5a16f8bd8f0ba5e7f5357f355928b3b8f07)

diff --git a/src/i830.h b/src/i830.h
index f8845bf..67241dd 100644
--- a/src/i830.h
+++ b/src/i830.h
@@ -865,6 +865,17 @@ static inline int i830_fb_compression_supported(I830Ptr pI830)
 
 Bool i830_pixmap_tiled(PixmapPtr p);
 
+#define i830_exa_check_pitch_2d(p) do {\
+    uint32_t pitch = intel_get_pixmap_pitch(p);\
+    if (pitch > KB(32)) return FALSE;\
+} while(0)
+
+/* For pre-965 chip only, as they have 8KB limit for 3D */
+#define i830_exa_check_pitch_3d(p) do {\
+    uint32_t pitch = intel_get_pixmap_pitch(p);\
+    if (pitch > KB(8)) return FALSE;\
+} while(0)
+
 /* Batchbuffer compatibility handling */
 #define BEGIN_BATCH(n) BEGIN_LP_RING(n)
 #define ENSURE_BATCH(n)
diff --git a/src/i830_exa.c b/src/i830_exa.c
index 9b5bb93..2c807c5 100644
--- a/src/i830_exa.c
+++ b/src/i830_exa.c
@@ -170,6 +170,8 @@ I830EXAPrepareSolid(PixmapPtr pPixmap, int alu, Pixel planemask, Pixel fg)
     if (pPixmap->drawable.bitsPerPixel == 24)
 	I830FALLBACK("solid 24bpp unsupported!\n");
 
+    i830_exa_check_pitch_2d(pPixmap);
+
     offset = exaGetPixmapOffset(pPixmap);
     pitch = exaGetPixmapPitch(pPixmap);
 
@@ -255,6 +257,9 @@ I830EXAPrepareCopy(PixmapPtr pSrcPixmap, PixmapPtr pDstPixmap, int xdir,
     if (!EXA_PM_IS_SOLID(&pSrcPixmap->drawable, planemask))
 	I830FALLBACK("planemask is not solid");
 
+    i830_exa_check_pitch_2d(pSrcPixmap);
+    i830_exa_check_pitch_2d(pDstPixmap);
+
     pI830->pSrcPixmap = pSrcPixmap;
 
     pI830->BR[13] = I830CopyROP[alu] << 16;
diff --git a/src/i830_render.c b/src/i830_render.c
index 195e9a8..3a959e8 100644
--- a/src/i830_render.c
+++ b/src/i830_render.c
@@ -398,6 +398,11 @@ i830_prepare_composite(int op, PicturePtr pSrcPicture,
     Bool is_affine_src, is_affine_mask;
     Bool is_nearest = FALSE;
 
+    i830_exa_check_pitch_3d(pSrc);
+    if (pMask)
+	i830_exa_check_pitch_3d(pMask);
+    i830_exa_check_pitch_3d(pDst);
+
     IntelEmitInvarientState(pScrn);
     *pI830->last_3d = LAST_3D_RENDER;
 
diff --git a/src/i915_render.c b/src/i915_render.c
index 2b9ed04..4a02cf5 100644
--- a/src/i915_render.c
+++ b/src/i915_render.c
@@ -323,6 +323,11 @@ i915_prepare_composite(int op, PicturePtr pSrcPicture,
     Bool is_affine_src, is_affine_mask;
     Bool is_nearest = FALSE;
 
+    i830_exa_check_pitch_3d(pSrc);
+    if (pMask)
+	i830_exa_check_pitch_3d(pMask);
+    i830_exa_check_pitch_3d(pDst);
+
     IntelEmitInvarientState(pScrn);
     *pI830->last_3d = LAST_3D_RENDER;