xf86-video-intel: Branch 'intel-kernelmode' - 9 commits - src/common.h src/i830_dri.c src/i830_driver.c src/i830_exa.c src/i830_memory.c src/i830_video.c src/i830_video.h src/i915_video.c src/i965_render.c src/i965_video.c src/intel_batchbuffer.c src/intel_batchbuffer.h src/intel_bufmgr_exa.c src/intel_bufmgr_exa.h src/Makefile.am
Dave Airlie
airlied at kemper.freedesktop.org
Tue Mar 4 21:25:04 PST 2008
src/Makefile.am | 2
src/common.h | 3
src/i830_dri.c | 19 ++---
src/i830_driver.c | 17 +++-
src/i830_exa.c | 12 ++-
src/i830_memory.c | 4 -
src/i830_video.c | 61 ++++++++---------
src/i830_video.h | 2
src/i915_video.c | 34 +++------
src/i965_render.c | 34 +++++----
src/i965_video.c | 85 ++++++++++++++++++++----
src/intel_batchbuffer.c | 5 -
src/intel_batchbuffer.h | 45 ++++++++----
src/intel_bufmgr_exa.c | 167 ++++++++++++++++++++++++++++++++++++++++++++++++
src/intel_bufmgr_exa.h | 8 ++
15 files changed, 376 insertions(+), 122 deletions(-)
New commits:
commit 0de94db938989bd4c04dc617b2eef3796b14ade7
Author: Dave Airlie <airlied at panoply-rh.(none)>
Date: Wed Mar 5 15:24:17 2008 +1000
more work towards getting DRI2 + modeset going
diff --git a/src/i830_dri.c b/src/i830_dri.c
index 3628dd3..7cfe806 100644
--- a/src/i830_dri.c
+++ b/src/i830_dri.c
@@ -1938,6 +1938,11 @@ I830DRI2Prepare(ScreenPtr pScreen)
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"[DRI2] Opened DRM device successfully\n");
+ if (pI830->drmMinor < 11) {
+ pI830->use_ttm_batch = FALSE;
+ } else
+ I830InitBufMgr(pScrn);
+
if (!pI830->use_ttm_batch)
return;
diff --git a/src/i830_memory.c b/src/i830_memory.c
index 5929f93..92f062a 100644
--- a/src/i830_memory.c
+++ b/src/i830_memory.c
@@ -1060,8 +1060,10 @@ i830_allocate_overlay(ScrnInfoPtr pScrn)
if (pI830->use_ttm_batch) {
int mem_space = DRM_BO_FLAG_MEM_TT;
+
if (flags & NEED_PHYSICAL_ADDR)
- mem_space = DRM_BO_FLAG_MEM_VRAM;
+ if (pI830->use_drm_mode)
+ mem_space = DRM_BO_FLAG_MEM_VRAM;
/* allocate overlay regs from bufmgr */
pI830->overlay_regs_bo = dri_bo_alloc(pI830->bufmgr,"overlay regs",
commit 8945da3f231edd958380f02659595d74468fa2f1
Author: Dave Airlie <airlied at panoply-rh.(none)>
Date: Wed Mar 5 14:36:46 2008 +1000
check for drm mode setting before calling rotate pixmap
diff --git a/src/i830_exa.c b/src/i830_exa.c
index dc707cc..8b81b1d 100644
--- a/src/i830_exa.c
+++ b/src/i830_exa.c
@@ -548,7 +548,7 @@ static Bool I830EXAModifyPixmapHeader(PixmapPtr pPixmap, int width, int height,
if (!driver_priv)
return FALSE;
- if (drmmode_is_rotate_pixmap(pScrn, pPixData, &driver_priv->bo)) {
+ if (pI830->use_drm_mode && drmmode_is_rotate_pixmap(pScrn, pPixData, &driver_priv->bo)) {
/* this is a rotate pixmap */
dri_bo_unmap(driver_priv->bo);
dri_bo_reference(driver_priv->bo);
commit e77871a06a067112ff04bcb6d766001c7d113e0c
Author: Dave Airlie <airlied at panoply-rh.(none)>
Date: Wed Mar 5 14:36:25 2008 +1000
fix up ordering of bufmgr vs batch init
diff --git a/src/i830_dri.c b/src/i830_dri.c
index c59a3fb..3628dd3 100644
--- a/src/i830_dri.c
+++ b/src/i830_dri.c
@@ -541,7 +541,6 @@ I830InitBufMgr(ScrnInfoPtr pScrn)
if (!pI830->bufmgr)
return;
- pI830->batch = intelddx_batchbuffer_alloc(pScrn);
pI830->use_ttm_batch = TRUE;
#ifdef XF86DRM_MODE
drmmode_set_bufmgr(pScrn, &pI830->drmmode, pI830->bufmgr);
diff --git a/src/i830_driver.c b/src/i830_driver.c
index 7348ee3..8c13a15 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -2640,6 +2640,8 @@ I830ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
return FALSE;
}
+ pI830->batch = intelddx_batchbuffer_alloc(pScrn);
+
xf86DrvMsg(pScrn->scrnIndex,
pI830->pEnt->device->videoRam ? X_CONFIG : X_DEFAULT,
"VideoRam: %d KB\n", pScrn->videoRam);
commit 38c42025a3611b687a62d67ab4d9b81aa02fea8a
Merge: 6d8ceac... 2b6fad7...
Author: Dave Airlie <airlied at panoply-rh.(none)>
Date: Wed Mar 5 10:12:37 2008 +1000
Merge remote branch 'origin/intel-batchbuffer' into intel-kernelmode
Conflicts:
src/i830_dri.c
src/i830_video.c
src/i915_video.c
diff --cc src/Makefile.am
index c453ea9,4f983c7..441f0ca
--- a/src/Makefile.am
+++ b/src/Makefile.am
@@@ -122,11 -122,10 +122,13 @@@ intel_drv_la_SOURCES =
dri_bufmgr_remap.h \
intel_bufmgr_ttm.c \
intel_bufmgr_ttm.h \
+ intel_bufmgr_exa.c \
+ intel_bufmgr_exa.h \
intel_batchbuffer.c \
- intel_batchbuffer.h
+ intel_batchbuffer.h \
+ drmmode_display.c \
+ drmmode_display.h
+
INTEL_G4A = \
packed_yuv_sf.g4a \
diff --cc src/i830_dri.c
index 1360c60,3c439b8..c59a3fb
--- a/src/i830_dri.c
+++ b/src/i830_dri.c
@@@ -1939,11 -1931,11 +1939,8 @@@ I830DRI2Prepare(ScreenPtr pScreen
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"[DRI2] Opened DRM device successfully\n");
- if (pI830->drmMinor < 11) {
- pI830->use_ttm_batch = FALSE;
- } else {
- I830InitBufMgr(pScrn);
- }
-#if 0
- I830InitBufMgr(pScreen);
-#endif
+ if (!pI830->use_ttm_batch)
+ return;
pI830->directRendering = DRI_TYPE_DRI2;
}
diff --cc src/i830_video.c
index 5b4663f,ccde947..3fb702d
--- a/src/i830_video.c
+++ b/src/i830_video.c
@@@ -1340,11 -1209,11 +1340,11 @@@ I830CopyPackedData(ScrnInfoPtr pScrn, I
src = buf + (top * srcPitch) + (left << 1);
- dst = i830_video_map_buf(pI830, pPriv);
+ dri_bo_map(pPriv->buf, TRUE);
if (pPriv->currentBuf == 0)
- dst += pPriv->YBuf0offset;
- dst = (unsigned char *) pPriv->buf->virtual + pPriv->YBuf0offset;
++ dst = (unsigned char *) pPriv->buf->virtual + pPriv->YBuf0offset;
else
- dst += pPriv->YBuf1offset;
+ dst = (unsigned char *) pPriv->buf->virtual + pPriv->YBuf1offset;
switch (pPriv->rotation) {
case RR_Rotate_0:
@@@ -1432,11 -1301,11 +1432,12 @@@ I830CopyPlanarToPackedData(ScrnInfoPtr
CARD8 *dst1, *srcy, *srcu, *srcv;
int y;
- dst1 = i830_video_map_buf(pI830, pPriv);
+ dri_bo_map(pPriv->buf, TRUE);
++
if (pPriv->currentBuf == 0)
- dst1 += pPriv->YBuf0offset;
+ dst1 = (unsigned char *) pPriv->buf->virtual + pPriv->YBuf0offset;
else
- dst1 += pPriv->YBuf1offset;
+ dst1 = (unsigned char *) pPriv->buf->virtual + pPriv->YBuf1offset;
srcy = buf + (top * srcPitch) + left;
if (id == FOURCC_YV12) {
@@@ -1557,17 -1424,16 +1558,17 @@@ I830CopyPlanarData(ScrnInfoPtr pScrn, I
ErrorF("src2 is %p, offset is %ld\n", src2,
(unsigned long)src2 - (unsigned long)buf);
#endif
+ dst2 = i830_video_map_buf(pI830, pPriv);
if (pPriv->currentBuf == 0) {
if (id == FOURCC_I420)
- dst2 += pPriv->UBuf0offset;
+ dst2 = (unsigned char *) pPriv->buf->virtual + pPriv->UBuf0offset;
else
- dst2 += pPriv->VBuf0offset;
+ dst2 = (unsigned char *) pPriv->buf->virtual + pPriv->VBuf0offset;
} else {
if (id == FOURCC_I420)
- dst2 += pPriv->UBuf1offset;
+ dst2 = (unsigned char *) pPriv->buf->virtual + pPriv->UBuf1offset;
else
- dst2 += pPriv->VBuf1offset;
+ dst2 = (unsigned char *) pPriv->buf->virtual + pPriv->VBuf1offset;
}
switch (pPriv->rotation) {
@@@ -2835,14 -2675,10 +2833,11 @@@ I830AllocateSurface(ScrnInfoPtr pScrn
surface->pScrn = pScrn;
surface->id = id;
surface->pitches[0] = pitch;
- if (pI830->use_ttm_batch)
- surface->offsets[0] = 0;//pPriv->buf->offset;
- else
- surface->offsets[0] = pPriv->buf->offset;
+ surface->offsets[0] = 0;
surface->devPrivate.ptr = (pointer) pPriv;
- memset(pI830->FbBase + surface->offsets[0], 0, size);
+ if (!pI830->use_ttm_batch)
+ memset(pI830->FbBase + surface->offsets[0], 0, size);
return Success;
}
commit 2b6fad726fbbd18a9d435f87f9404dfa8695d053
Author: Kristian Høgsberg <krh at redhat.com>
Date: Tue Mar 4 18:59:01 2008 -0500
Convert the textured video code to use the dri_bo API.
Now that we have the exa dri_bo implementation, this will continue to
work for non-ttm cases. It doesn't work for i965 TTM due to strange
relocations, where the offset is shifted 5, 6 or 10 bits.
diff --git a/src/i830_dri.c b/src/i830_dri.c
index d95ecb2..3c439b8 100644
--- a/src/i830_dri.c
+++ b/src/i830_dri.c
@@ -1931,7 +1931,9 @@ I830DRI2Prepare(ScreenPtr pScreen)
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"[DRI2] Opened DRM device successfully\n");
+#if 0
I830InitBufMgr(pScreen);
+#endif
if (!pI830->use_ttm_batch)
return;
diff --git a/src/i830_video.c b/src/i830_video.c
index 8f0ac30..ccde947 100644
--- a/src/i830_video.c
+++ b/src/i830_video.c
@@ -1018,7 +1018,7 @@ I830StopVideo(ScrnInfoPtr pScrn, pointer data, Bool shutdown)
/* Sync before freeing the buffer, because the pages will be unbound.
*/
I830Sync(pScrn);
- i830_free_memory(pScrn, pPriv->buf);
+ dri_bo_unreference(pPriv->buf);
pPriv->buf = NULL;
pPriv->videoStatus = 0;
} else {
@@ -1209,10 +1209,11 @@ I830CopyPackedData(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv,
src = buf + (top * srcPitch) + (left << 1);
+ dri_bo_map(pPriv->buf, TRUE);
if (pPriv->currentBuf == 0)
- dst = pI830->FbBase + pPriv->YBuf0offset;
+ dst = (unsigned char *) pPriv->buf->virtual + pPriv->YBuf0offset;
else
- dst = pI830->FbBase + pPriv->YBuf1offset;
+ dst = (unsigned char *) pPriv->buf->virtual + pPriv->YBuf1offset;
switch (pPriv->rotation) {
case RR_Rotate_0:
@@ -1285,6 +1286,7 @@ I830CopyPackedData(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv,
}
break;
}
+ dri_bo_unmap(pPriv->buf);
}
/* Copies planar data in *buf to UYVY-packed data in the screen atYBufXOffset.
@@ -1299,10 +1301,11 @@ I830CopyPlanarToPackedData(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv,
CARD8 *dst1, *srcy, *srcu, *srcv;
int y;
+ dri_bo_map(pPriv->buf, TRUE);
if (pPriv->currentBuf == 0)
- dst1 = pI830->FbBase + pPriv->YBuf0offset;
+ dst1 = (unsigned char *) pPriv->buf->virtual + pPriv->YBuf0offset;
else
- dst1 = pI830->FbBase + pPriv->YBuf1offset;
+ dst1 = (unsigned char *) pPriv->buf->virtual + pPriv->YBuf1offset;
srcy = buf + (top * srcPitch) + left;
if (id == FOURCC_YV12) {
@@ -1344,6 +1347,7 @@ I830CopyPlanarToPackedData(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv,
srcv += srcPitch2;
}
}
+ dri_bo_unmap(pPriv->buf);
}
static void
@@ -1371,10 +1375,11 @@ I830CopyPlanarData(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv,
ErrorF("src1 is %p, offset is %ld\n", src1,
(unsigned long)src1 - (unsigned long)buf);
#endif
+ dri_bo_map(pPriv->buf, TRUE);
if (pPriv->currentBuf == 0)
- dst1 = pI830->FbBase + pPriv->YBuf0offset;
+ dst1 = (unsigned char *) pPriv->buf->virtual + pPriv->YBuf0offset;
else
- dst1 = pI830->FbBase + pPriv->YBuf1offset;
+ dst1 = (unsigned char *) pPriv->buf->virtual + pPriv->YBuf1offset;
switch (pPriv->rotation) {
case RR_Rotate_0:
@@ -1421,14 +1426,14 @@ I830CopyPlanarData(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv,
#endif
if (pPriv->currentBuf == 0) {
if (id == FOURCC_I420)
- dst2 = pI830->FbBase + pPriv->UBuf0offset;
+ dst2 = (unsigned char *) pPriv->buf->virtual + pPriv->UBuf0offset;
else
- dst2 = pI830->FbBase + pPriv->VBuf0offset;
+ dst2 = (unsigned char *) pPriv->buf->virtual + pPriv->VBuf0offset;
} else {
if (id == FOURCC_I420)
- dst2 = pI830->FbBase + pPriv->UBuf1offset;
+ dst2 = (unsigned char *) pPriv->buf->virtual + pPriv->UBuf1offset;
else
- dst2 = pI830->FbBase + pPriv->VBuf1offset;
+ dst2 = (unsigned char *) pPriv->buf->virtual + pPriv->VBuf1offset;
}
switch (pPriv->rotation) {
@@ -1523,6 +1528,7 @@ I830CopyPlanarData(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv,
}
break;
}
+ dri_bo_unmap(pPriv->buf);
}
typedef struct {
@@ -2341,23 +2347,22 @@ I830PutImage(ScrnInfoPtr pScrn,
/* Free the current buffer if we're going to have to reallocate */
if (pPriv->buf && pPriv->buf->size < alloc_size) {
- i830_free_memory(pScrn, pPriv->buf);
+ dri_bo_unreference(pPriv->buf);
pPriv->buf = NULL;
}
if (pPriv->buf == NULL) {
- pPriv->buf = i830_allocate_memory(pScrn, "xv buffer", alloc_size, 16,
- 0);
+ pPriv->buf = dri_bo_alloc(pI830->bufmgr,
+ "xv buffer", alloc_size, 16, 0);
}
if (pPriv->buf == NULL)
return BadAlloc;
- pPriv->extra_offset = pPriv->buf->offset +
- (pPriv->doubleBuffer ? size * 2 : size);
+ pPriv->extra_offset = (pPriv->doubleBuffer ? size * 2 : size);
/* fixup pointers */
- pPriv->YBuf0offset = pPriv->buf->offset;
+ pPriv->YBuf0offset = 0;
if (pPriv->rotation & (RR_Rotate_90 | RR_Rotate_270)) {
pPriv->UBuf0offset = pPriv->YBuf0offset + (dstPitch * 2 * width);
pPriv->VBuf0offset = pPriv->UBuf0offset + (dstPitch * width / 2);
@@ -2596,7 +2601,7 @@ I830VideoBlockHandler(int i, pointer blockData, pointer pTimeout,
* unbound.
*/
I830Sync(pScrn);
- i830_free_memory(pScrn, pPriv->buf);
+ dri_bo_unreference(pPriv->buf);
pPriv->buf = NULL;
pPriv->videoStatus = 0;
}
@@ -2609,7 +2614,7 @@ I830VideoBlockHandler(int i, pointer blockData, pointer pTimeout,
***************************************************************************/
typedef struct {
- i830_memory *buf;
+ dri_bo *buf;
Bool isOn;
} OffscreenPrivRec, *OffscreenPrivPtr;
@@ -2654,7 +2659,7 @@ I830AllocateSurface(ScrnInfoPtr pScrn,
fbpitch = pI830->cpp * pScrn->displayWidth;
size = pitch * h;
- pPriv->buf = i830_allocate_memory(pScrn, "xv surface buffer", size, 16, 0);
+ pPriv->buf = dri_bo_alloc(pI830->bufmgr, "xv surface buffer", size, 16, 0);
if (pPriv->buf == NULL) {
xfree(surface->pitches);
xfree(surface->offsets);
@@ -2670,7 +2675,7 @@ I830AllocateSurface(ScrnInfoPtr pScrn,
surface->pScrn = pScrn;
surface->id = id;
surface->pitches[0] = pitch;
- surface->offsets[0] = pPriv->buf->offset;
+ surface->offsets[0] = 0;
surface->devPrivate.ptr = (pointer) pPriv;
memset(pI830->FbBase + surface->offsets[0], 0, size);
@@ -2709,7 +2714,7 @@ I830FreeSurface(XF86SurfacePtr surface)
I830StopSurface(surface);
/* Sync before freeing the buffer, because the pages will be unbound. */
I830Sync(pScrn);
- i830_free_memory(surface->pScrn, pPriv->buf);
+ dri_bo_unreference(pPriv->buf);
pPriv->buf = NULL;
xfree(surface->pitches);
xfree(surface->offsets);
diff --git a/src/i830_video.h b/src/i830_video.h
index 1768913..c21e5fa 100644
--- a/src/i830_video.h
+++ b/src/i830_video.h
@@ -58,7 +58,7 @@ typedef struct {
CARD32 videoStatus;
Time offTime;
Time freeTime;
- i830_memory *buf; /** YUV data buffer */
+ dri_bo *buf; /** YUV data buffer */
unsigned int extra_offset;
Bool overlayOK;
diff --git a/src/i915_video.c b/src/i915_video.c
index 6b20ad2..6b3b15e 100644
--- a/src/i915_video.c
+++ b/src/i915_video.c
@@ -128,7 +128,7 @@ I915DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id,
OUT_BATCH(_3DSTATE_BUF_INFO_CMD);
OUT_BATCH(BUF_3D_ID_COLOR_BACK | BUF_3D_USE_FENCE |
BUF_3D_PITCH(intel_get_pixmap_pitch(pPixmap)));
- OUT_BATCH(BUF_3D_ADDR(intel_get_pixmap_offset(pPixmap)));
+ OUT_PIXMAP_RELOC(pPixmap, 0, 0);
ADVANCE_BATCH();
if (!planar) {
@@ -148,7 +148,9 @@ I915DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id,
OUT_BATCH(_3DSTATE_MAP_STATE | 3);
OUT_BATCH(0x00000001); /* texture map #1 */
- OUT_BATCH(pPriv->YBuf0offset);
+ OUT_RELOC(pPriv->buf,
+ DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_READ,
+ pPriv->YBuf0offset);
ms3 = MAPSURF_422 | MS3_USE_FENCE_REGS;
switch (id) {
case FOURCC_YUY2:
@@ -245,21 +247,27 @@ I915DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id,
OUT_BATCH(_3DSTATE_MAP_STATE | 9);
OUT_BATCH(0x00000007);
- OUT_BATCH(pPriv->YBuf0offset);
+ OUT_RELOC(pPriv->buf,
+ DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_READ,
+ pPriv->YBuf0offset);
ms3 = MAPSURF_8BIT | MT_8BIT_I8 | MS3_USE_FENCE_REGS;
ms3 |= (height - 1) << MS3_HEIGHT_SHIFT;
ms3 |= (width - 1) << MS3_WIDTH_SHIFT;
OUT_BATCH(ms3);
OUT_BATCH(((video_pitch * 2 / 4) - 1) << MS4_PITCH_SHIFT);
- OUT_BATCH(pPriv->UBuf0offset);
+ OUT_RELOC(pPriv->buf,
+ DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_READ,
+ pPriv->UBuf0offset);
ms3 = MAPSURF_8BIT | MT_8BIT_I8 | MS3_USE_FENCE_REGS;
ms3 |= (height / 2 - 1) << MS3_HEIGHT_SHIFT;
ms3 |= (width / 2 - 1) << MS3_WIDTH_SHIFT;
OUT_BATCH(ms3);
OUT_BATCH(((video_pitch / 4) - 1) << MS4_PITCH_SHIFT);
- OUT_BATCH(pPriv->VBuf0offset);
+ OUT_RELOC(pPriv->buf,
+ DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_READ,
+ pPriv->VBuf0offset);
ms3 = MAPSURF_8BIT | MT_8BIT_I8 | MS3_USE_FENCE_REGS;
ms3 |= (height / 2 - 1) << MS3_HEIGHT_SHIFT;
ms3 |= (width / 2 - 1) << MS3_WIDTH_SHIFT;
diff --git a/src/i965_video.c b/src/i965_video.c
index 6d04613..fc8b42c 100644
--- a/src/i965_video.c
+++ b/src/i965_video.c
@@ -251,7 +251,9 @@ I965DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id,
state_base_offset = pPriv->extra_offset;
state_base_offset = ALIGN(state_base_offset, 64);
- state_base = (char *)(pI830->FbBase + state_base_offset);
+ dri_bo_map(pPriv->buf, TRUE);
+
+ state_base = (char *) pPriv->buf->virtual + state_base_offset;
/* Set up our pointers to state structures in framebuffer. It would
* probably be a good idea to fill these structures out in system memory
* and then dump them there, instead.
@@ -340,7 +342,10 @@ I965DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id,
cc_state->cc3.ia_blend_enable = 1; /* blend alpha just like colors */
cc_state->cc3.blend_enable = 0; /* disable color blend */
cc_state->cc3.alpha_test = 0; /* disable alpha test */
- cc_state->cc4.cc_viewport_state_offset = (state_base_offset +
+
+ /* FIXME: Eek! No relocation to match this... */
+ cc_state->cc4.cc_viewport_state_offset = (pPriv->buf->offset +
+ state_base_offset +
cc_viewport_offset) >> 5;
cc_state->cc5.dither_enable = 0; /* disable dither */
cc_state->cc5.logicop_func = 0xc; /* WHITE */
@@ -371,7 +376,19 @@ I965DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id,
dest_surf_state->ss0.mipmap_layout_mode = 0;
dest_surf_state->ss0.render_cache_read_mode = 0;
- dest_surf_state->ss1.base_addr = intel_get_pixmap_offset(pPixmap);
+ if (pI830->use_ttm_batch)
+ dest_surf_state->ss1.base_addr =
+ intelddx_batchbuffer_emit_pixmap(pPixmap,
+ DRM_BO_FLAG_MEM_TT |
+ DRM_BO_FLAG_WRITE |
+ DRM_BO_FLAG_READ,
+ pPriv->buf,
+ (char *) &dest_surf_state->ss1.base_addr -
+ (char *) pPriv->buf->virtual,
+ 0);
+ else
+ dest_surf_state->ss1.base_addr = intel_get_pixmap_offset(pPixmap);
+
dest_surf_state->ss2.height = pScrn->virtualY - 1;
dest_surf_state->ss2.width = pScrn->virtualX - 1;
dest_surf_state->ss2.mip_count = 0;
@@ -403,7 +420,20 @@ I965DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id,
src_surf_state->ss0.mipmap_layout_mode = 0;
src_surf_state->ss0.render_cache_read_mode = 0;
- src_surf_state->ss1.base_addr = pPriv->YBuf0offset;
+
+ if (pI830->use_ttm_batch)
+ src_surf_state->ss1.base_addr =
+ intelddx_batchbuffer_emit_pixmap(pPixmap,
+ DRM_BO_FLAG_MEM_TT |
+ DRM_BO_FLAG_READ,
+ pPriv->buf,
+ (char *) &src_surf_state->ss1.base_addr -
+ (char *) pPriv->buf->virtual,
+ pPriv->YBuf0offset);
+ else
+ src_surf_state->ss1.base_addr =
+ pPriv->buf->offset + pPriv->YBuf0offset;
+
src_surf_state->ss2.width = width - 1;
src_surf_state->ss2.height = height - 1;
src_surf_state->ss2.mip_count = 0;
@@ -439,8 +469,11 @@ I965DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id,
memcpy (sf_kernel, sf_kernel_static, sizeof (sf_kernel_static));
memset(sf_state, 0, sizeof(*sf_state));
+
+ /* FIXME: Eek! No relocation to match this... */
sf_state->thread0.kernel_start_pointer =
- (state_base_offset + sf_kernel_offset) >> 6;
+ (pPriv->buf->offset + state_base_offset + sf_kernel_offset) >> 6;
+
sf_state->thread0.grf_reg_count = BRW_GRF_BLOCKS(SF_KERNEL_NUM_GRF);
sf_state->sf1.single_program_flow = 1; /* XXX */
sf_state->sf1.binding_table_entry_count = 0;
@@ -470,16 +503,22 @@ I965DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id,
memcpy (ps_kernel, ps_kernel_static, sizeof (ps_kernel_static));
memset (wm_state, 0, sizeof (*wm_state));
+
+ /* FIXME: Eek! No relocation to match this... */
wm_state->thread0.kernel_start_pointer =
- (state_base_offset + ps_kernel_offset) >> 6;
+ (pPriv->buf->offset + state_base_offset + ps_kernel_offset) >> 6;
+
wm_state->thread0.grf_reg_count = BRW_GRF_BLOCKS(PS_KERNEL_NUM_GRF);
wm_state->thread1.single_program_flow = 1; /* XXX */
wm_state->thread1.binding_table_entry_count = 2;
/* Though we never use the scratch space in our WM kernel, it has to be
* set, and the minimum allocation is 1024 bytes.
*/
- wm_state->thread2.scratch_space_base_pointer = (state_base_offset +
+ /* FIXME: Eek! No relocation to match this... */
+ wm_state->thread2.scratch_space_base_pointer = (pPriv->buf->offset +
+ state_base_offset +
wm_scratch_offset) >> 10;
+
wm_state->thread2.per_thread_scratch_space = 0; /* 1024 bytes */
wm_state->thread3.dispatch_grf_start_reg = 3; /* XXX */
wm_state->thread3.const_urb_entry_read_length = 0;
@@ -487,8 +526,12 @@ I965DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id,
wm_state->thread3.urb_entry_read_length = 1; /* XXX */
wm_state->thread3.urb_entry_read_offset = 0; /* XXX */
wm_state->wm4.stats_enable = 1;
- wm_state->wm4.sampler_state_pointer = (state_base_offset +
+
+ /* FIXME: Eek! No relocation to match this... */
+ wm_state->wm4.sampler_state_pointer = (pPriv->buf->offset +
+ state_base_offset +
src_sampler_offset) >> 5;
+
wm_state->wm4.sampler_count = 1; /* 1-4 samplers used */
wm_state->wm5.max_threads = PS_MAX_THREADS - 1;
wm_state->wm5.thread_dispatch_enable = 1;
@@ -535,8 +578,9 @@ I965DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id,
/* Set system instruction pointer */
OUT_BATCH(BRW_STATE_SIP | 0);
/* system instruction pointer */
- OUT_BATCH(state_base_offset + sip_kernel_offset);
-
+ OUT_RELOC(pPriv->buf,
+ DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_READ,
+ state_base_offset + sip_kernel_offset);
OUT_BATCH(MI_NOOP);
ADVANCE_BATCH();
}
@@ -564,7 +608,9 @@ I965DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id,
OUT_BATCH(0); /* clip */
OUT_BATCH(0); /* sf */
/* Only the PS uses the binding table */
- OUT_BATCH(state_base_offset + binding_table_offset); /* ps */
+ OUT_RELOC(pPriv->buf,
+ DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_READ,
+ state_base_offset + binding_table_offset); /* ps */
/* Blend constant color (magenta is fun) */
OUT_BATCH(BRW_3DSTATE_CONSTANT_COLOR | 3);
@@ -594,9 +640,16 @@ I965DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id,
OUT_BATCH(BRW_GS_DISABLE);
/* disable CLIP, resulting in passthrough */
OUT_BATCH(BRW_CLIP_DISABLE);
- OUT_BATCH(state_base_offset + sf_offset); /* 32 byte aligned */
- OUT_BATCH(state_base_offset + wm_offset); /* 32 byte aligned */
- OUT_BATCH(state_base_offset + cc_offset); /* 64 byte aligned */
+
+ OUT_RELOC(pPriv->buf,
+ DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_READ,
+ state_base_offset + sf_offset); /* 32 byte aligned */
+ OUT_RELOC(pPriv->buf,
+ DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_READ,
+ state_base_offset + wm_offset); /* 32 byte aligned */
+ OUT_RELOC(pPriv->buf,
+ DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_READ,
+ state_base_offset + cc_offset); /* 64 byte aligned */
/* URB fence */
OUT_BATCH(BRW_URB_FENCE |
@@ -623,7 +676,9 @@ I965DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id,
OUT_BATCH((0 << VB0_BUFFER_INDEX_SHIFT) |
VB0_VERTEXDATA |
((4 * 4) << VB0_BUFFER_PITCH_SHIFT));
- OUT_BATCH(state_base_offset + vb_offset);
+ OUT_RELOC(pPriv->buf,
+ DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_READ,
+ state_base_offset + vb_offset);
OUT_BATCH(3); /* four corners to our rectangle */
/* Set up our vertex elements, sourced from the single vertex buffer. */
diff --git a/src/intel_batchbuffer.c b/src/intel_batchbuffer.c
index 460a886..3362a46 100644
--- a/src/intel_batchbuffer.c
+++ b/src/intel_batchbuffer.c
@@ -276,5 +276,5 @@ uint32_t intelddx_batchbuffer_emit_pixmap(PixmapPtr pPixmap,
driver_priv = exaGetPixmapDriverPrivate(pPixmap);
dri_emit_reloc(reloc_buf, flags, delta, offset, driver_priv->bo);
- return driver_priv->bo->offset;
+ return driver_priv->bo->offset + delta;
}
commit 68a38403dbac3a9fa7621cde00914bfaf6542a1c
Author: Kristian Høgsberg <krh at redhat.com>
Date: Tue Mar 4 17:59:53 2008 -0500
Implement a i830_memory.c based bufmgr.
This enables the batchbuffer branch to run on non-ttm capable drms.
diff --git a/src/Makefile.am b/src/Makefile.am
index 701d928..4f983c7 100644
--- a/src/Makefile.am
+++ b/src/Makefile.am
@@ -122,6 +122,8 @@ intel_drv_la_SOURCES = \
dri_bufmgr_remap.h \
intel_bufmgr_ttm.c \
intel_bufmgr_ttm.h \
+ intel_bufmgr_exa.c \
+ intel_bufmgr_exa.h \
intel_batchbuffer.c \
intel_batchbuffer.h
diff --git a/src/common.h b/src/common.h
index 2d3b84b..7100b4e 100644
--- a/src/common.h
+++ b/src/common.h
@@ -229,6 +229,9 @@ union intfloat {
if (I810_DEBUG & DEBUG_VERBOSE_RING) \
ErrorF( "BEGIN_LP_RING %d in %s\n", n, FUNCTION_NAME);
+#define ENSURE_LP_RING(n) \
+ if (RecPtr->LpRing->space < (n) * 4) \
+ WaitRingFunc(pScrn, (n) * 4, 0);
#define BEGIN_LP_RING(n) \
RING_LOCALS \
diff --git a/src/i830_driver.c b/src/i830_driver.c
index ba44645..1556505 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -198,6 +198,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
#include "i830_debug.h"
#include "i830_bios.h"
#include "i830_video.h"
+#include "intel_bufmgr_exa.h"
#ifdef XF86DRI
#include "dri.h"
@@ -2362,7 +2363,7 @@ I830BlockHandler(int i,
pScreen->BlockHandler = I830BlockHandler;
if (pI830->batch)
- intelddx_batchbuffer_flush(pI830->batch);
+ intelddx_batchbuffer_flush(pI830->batch);
I830VideoBlockHandler(i, blockData, pTimeout, pReadmask);
}
@@ -2499,6 +2500,12 @@ I830ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
}
#endif
+ if (pI830->bufmgr == NULL) {
+ pI830->bufmgr = intel_bufmgr_exa_init(pScrn);
+ if (pI830->bufmgr)
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Using EXA bufmgr\n");
+ }
+
/* The batchbuffer branch won't work without a bufmgr, so fail now
* if neither XF86DRI or DRI2 managed to set that up. */
if (pI830->bufmgr == NULL) {
@@ -2902,9 +2909,6 @@ I830ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
if (pScrn->virtualX > pScrn->displayWidth)
pScrn->displayWidth = pScrn->virtualX;
- if (IS_I965G(pI830))
- i965_init_exa_state(pScrn);
-
DPRINTF(PFX, "assert( if(!fbScreenInit(pScreen, ...) )\n");
if (!fbScreenInit(pScreen, pI830->FbBase + pScrn->fbOffset,
pScrn->virtualX, pScrn->virtualY,
@@ -3318,6 +3322,9 @@ I830EnterVT(int scrnIndex, int flags)
if (pI830->checkDevices)
pI830->devicesTimer = TimerSet(NULL, 0, 1000, I830CheckDevicesTimer, pScrn);
+ if (pI830->starting && IS_I965G(pI830))
+ i965_init_exa_state(pScrn);
+
/* Mark 3D state as being clobbered and setup the basics */
*pI830->last_3d = LAST_3D_OTHER;
IntelEmitInvarientState(pScrn);
diff --git a/src/i830_exa.c b/src/i830_exa.c
index 78dccd7..e3b9db5 100644
--- a/src/i830_exa.c
+++ b/src/i830_exa.c
@@ -185,10 +185,10 @@ static void
I830EXASync(ScreenPtr pScreen, int marker)
{
ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+ I830Ptr pI830 = I830PTR(pScrn);
-#if 0
- I830Sync(pScrn);
-#endif
+ if (!pI830->use_ttm_batch)
+ I830Sync(pScrn);
}
/**
diff --git a/src/i965_render.c b/src/i965_render.c
index 307acf2..00463e8 100644
--- a/src/i965_render.c
+++ b/src/i965_render.c
@@ -968,16 +968,20 @@ i965_set_picture_surface_state(ScrnInfoPtr pScrn, unsigned int index,
ss->ss0.vert_line_stride_ofs = 0;
ss->ss0.mipmap_layout_mode = 0;
ss->ss0.render_cache_read_mode = 0;
- ss->ss1.base_addr =
- intelddx_batchbuffer_emit_pixmap(pPixmap,
- DRM_BO_FLAG_MEM_TT |
- (is_dst ? DRM_BO_FLAG_WRITE : 0) |
- DRM_BO_FLAG_READ,
- pI830->exa965->surface_buf,
- offset +
- offsetof(struct brw_surface_state,
- ss1),
- 0);
+ if (pI830->use_ttm_batch)
+ ss->ss1.base_addr =
+ intelddx_batchbuffer_emit_pixmap(pPixmap,
+ DRM_BO_FLAG_MEM_TT |
+ (is_dst ? DRM_BO_FLAG_WRITE : 0) |
+ DRM_BO_FLAG_READ,
+ pI830->exa965->surface_buf,
+ offset +
+ offsetof(struct brw_surface_state,
+ ss1),
+ 0);
+ else
+ ss->ss1.base_addr = intel_get_pixmap_offset(pPixmap);
+
ss->ss2.mip_count = 0;
ss->ss2.render_target_rotation = 0;
ss->ss2.height = pPixmap->drawable.height - 1;
@@ -1024,7 +1028,7 @@ i965_prepare_composite(int op, PicturePtr pSrcPicture,
* And with a 16k batchbuffer, this means we'll be wasting at most
* 1/8 of the total batchbuffer.
*/
- intelddx_batchbuffer_require_space (pI830->batch, 2048, 0);
+ ENSURE_BATCH(512);
i965_exastate_reset(pI830->exa965);
surface_map = pI830->exa965->surface_map;
@@ -1160,7 +1164,7 @@ i965_prepare_composite(int op, PicturePtr pSrcPicture,
gen4_emit_batch_header (pScrn);
{
- BEGIN_BATCH(19);
+ BEGIN_BATCH(18);
/* Flush the map (texture) cache. The rendering cache covers the blit
* and 3D destination parts of the engine and automatically flushes
* between them, but the map cache has to be flushed separately.
@@ -1218,7 +1222,7 @@ i965_prepare_composite(int op, PicturePtr pSrcPicture,
/* Set up our vertex elements, sourced from the single vertex buffer.
* The vertex buffer will be set up later at primitive emit time.
*/
- BEGIN_BATCH(pMask ? 7 : 5);
+ BEGIN_BATCH(pMask ? 8 : 6);
OUT_BATCH(BRW_3DSTATE_VERTEX_ELEMENTS | ((2 * nelem) - 1));
/* vertex coordinates */
OUT_BATCH((0 << VE0_VERTEX_BUFFER_INDEX_SHIFT) |
@@ -1253,6 +1257,7 @@ i965_prepare_composite(int op, PicturePtr pSrcPicture,
(10 << VE1_DESTINATION_ELEMENT_OFFSET_SHIFT));
}
+ OUT_BATCH(MI_NOOP);
ADVANCE_BATCH();
}
@@ -1275,7 +1280,7 @@ i965_composite_flush_prims(ScrnInfoPtr pScrn)
if (pI830->exa965->vbo_used == pI830->exa965->vbo_prim_start)
return;
- BEGIN_BATCH(11);
+ BEGIN_BATCH(12);
/* Set up the pointer to our vertex buffer. We could emit this a lot
* less often (as long as vertex_size and vbo haven't changed).
*/
@@ -1300,6 +1305,7 @@ i965_composite_flush_prims(ScrnInfoPtr pScrn)
OUT_BATCH(1); /* single instance - mbz in docs */
OUT_BATCH(0); /* start instance location */
OUT_BATCH(0); /* index buffer offset, ignored */
+ OUT_BATCH(MI_NOOP);
ADVANCE_BATCH();
pI830->exa965->vbo_prim_start = pI830->exa965->vbo_used;
diff --git a/src/intel_batchbuffer.c b/src/intel_batchbuffer.c
index e15c6ce..460a886 100644
--- a/src/intel_batchbuffer.c
+++ b/src/intel_batchbuffer.c
@@ -272,8 +272,9 @@ uint32_t intelddx_batchbuffer_emit_pixmap(PixmapPtr pPixmap,
unsigned int offset,
unsigned int delta)
{
- struct i830_exa_pixmap_priv *driver_priv = exaGetPixmapDriverPrivate(pPixmap);
+ struct i830_exa_pixmap_priv *driver_priv;
+ driver_priv = exaGetPixmapDriverPrivate(pPixmap);
dri_emit_reloc(reloc_buf, flags, delta, offset, driver_priv->bo);
return driver_priv->bo->offset;
}
diff --git a/src/intel_batchbuffer.h b/src/intel_batchbuffer.h
index 5acdb28..de048d4 100644
--- a/src/intel_batchbuffer.h
+++ b/src/intel_batchbuffer.h
@@ -94,12 +94,20 @@ extern uint32_t intelddx_batchbuffer_emit_pixmap(PixmapPtr pPixmap,
*/
#define BATCH_LOCALS
-#define BEGIN_BATCH(n) \
- RING_LOCALS \
- if (pI830->use_ttm_batch) \
- intelddx_batchbuffer_require_space(pI830->batch, (n)*4, 0); \
- else { \
- DO_LP_RING(n) ; }
+#define BEGIN_BATCH(n) \
+ RING_LOCALS \
+ if (pI830->use_ttm_batch) \
+ intelddx_batchbuffer_require_space(pI830->batch, (n)*4, 0); \
+ else { \
+ DO_LP_RING(n); \
+ }
+
+#define ENSURE_BATCH(n) \
+ if (pI830->use_ttm_batch) \
+ intelddx_batchbuffer_require_space(pI830->batch, (n)*4, 0); \
+ else { \
+ ENSURE_LP_RING(n); \
+ }
#define OUT_BATCH(d) \
if (pI830->use_ttm_batch) \
@@ -112,17 +120,24 @@ extern uint32_t intelddx_batchbuffer_emit_pixmap(PixmapPtr pPixmap,
OUT_BATCH(tmp.ui); \
} while(0)
-#define OUT_RELOC(buf, flags, delta) do { \
- intelddx_batchbuffer_emit_reloc(pI830->batch, buf, flags, delta); \
+#define OUT_RELOC(buf, flags, delta) do { \
+ if (pI830->use_ttm_batch) \
+ intelddx_batchbuffer_emit_reloc(pI830->batch, buf, flags, delta); \
+ else \
+ OUT_RING(buf->offset + delta); \
} while (0)
-#define OUT_PIXMAP_RELOC(pixmap, flags, delta) if (pI830->use_ttm_batch) { \
- uint32_t _retval = intelddx_batchbuffer_emit_pixmap((pixmap), (flags), \
- pI830->batch->buf, (pI830->batch->ptr - pI830->batch->map), (delta)); \
- intelddx_batchbuffer_emit_dword (pI830->batch, _retval + (delta)); \
- } else { \
- OUT_RING(intel_get_pixmap_offset(pixmap) + delta); \
- }
+#define OUT_PIXMAP_RELOC(pixmap, flags, delta) \
+ if (pI830->use_ttm_batch) { \
+ unsigned int offset = pI830->batch->ptr - pI830->batch->map; \
+ uint32_t _retval = \
+ intelddx_batchbuffer_emit_pixmap((pixmap), (flags), \
+ pI830->batch->buf, \
+ offset, delta); \
+ intelddx_batchbuffer_emit_dword (pI830->batch, _retval + (delta)); \
+ } else { \
+ OUT_RING(intel_get_pixmap_offset(pixmap) + delta); \
+ }
#define ADVANCE_BATCH() if (!pI830->use_ttm_batch) { ADVANCE_LP_RING(); }
diff --git a/src/intel_bufmgr_exa.c b/src/intel_bufmgr_exa.c
new file mode 100644
index 0000000..f4a3590
--- /dev/null
+++ b/src/intel_bufmgr_exa.c
@@ -0,0 +1,167 @@
+/**************************************************************************
+ *
+ * Copyright © 2007-2008 Red Hat Inc.
+ * Copyright © 2007 Intel Corporation
+ * Copyright 2006 Tungsten Graphics, Inc., Bismarck, ND., USA
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ *
+ **************************************************************************/
+/*
+ * Authors: Thomas Hellström <thomas-at-tungstengraphics-dot-com>
+ * Keith Whitwell <keithw-at-tungstengraphics-dot-com>
+ * Eric Anholt <eric at anholt.net>
+ * Dave Airlie <airlied at linux.ie>
+ * Kristian Høgsberg <krh at redhat.com>
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <xf86drm.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <unistd.h>
+#include <assert.h>
+
+#include "xf86.h"
+#include "i830.h"
+#include "errno.h"
+#include "dri_bufmgr.h"
+#include "string.h"
+
+#include "i915_drm.h"
+
+#include "intel_bufmgr_exa.h"
+
+typedef struct _dri_bufmgr_exa {
+ dri_bufmgr bufmgr;
+ ScrnInfoPtr pScrn;
+} dri_bufmgr_exa;
+
+typedef struct _dri_bo_exa {
+ dri_bo bo;
+ i830_memory *memory;
+ int refcount;
+} dri_bo_exa;
+
+static dri_bo *
+dri_exa_alloc(dri_bufmgr *bufmgr, const char *name,
+ unsigned long size, unsigned int alignment,
+ uint64_t location_mask)
+{
+ dri_bufmgr_exa *bufmgr_exa = (dri_bufmgr_exa *)bufmgr;
+ I830Ptr pI830 = I830PTR(bufmgr_exa->pScrn);
+ dri_bo_exa *exa_buf;
+
+ exa_buf = malloc(sizeof(*exa_buf));
+ if (!exa_buf)
+ return NULL;
+
+ exa_buf->refcount = 1;
+ exa_buf->memory = i830_allocate_memory(bufmgr_exa->pScrn,
+ name, size, alignment, 0);
+
+ exa_buf->bo.size = exa_buf->memory->size;
+ exa_buf->bo.offset = exa_buf->memory->offset;
+ exa_buf->bo.bufmgr = bufmgr;
+ exa_buf->bo.virtual = pI830->FbBase + exa_buf->memory->offset;
+
+ return &exa_buf->bo;
+}
+
+static void
+dri_exa_bo_reference(dri_bo *buf)
+{
+ dri_bo_exa *exa_buf = (dri_bo_exa *)buf;
+
+ exa_buf->refcount++;
+}
+
+static void
+dri_exa_bo_unreference(dri_bo *buf)
+{
+ dri_bufmgr_exa *bufmgr_exa = (dri_bufmgr_exa *)buf->bufmgr;
+ dri_bo_exa *exa_buf = (dri_bo_exa *)buf;
+
+ if (!buf)
+ return;
+
+ if (--exa_buf->refcount == 0)
+ i830_free_memory(bufmgr_exa->pScrn, exa_buf->memory);
+}
+
+static int
+dri_exa_bo_map(dri_bo *buf, GLboolean write_enable)
+{
+ return 0;
+}
+
+static int
+dri_exa_bo_unmap(dri_bo *buf)
+{
+ return 0;
+}
+
+static void
+dri_bufmgr_exa_destroy(dri_bufmgr *bufmgr)
+{
+ free(bufmgr);
+}
+
+static void
+dri_exa_emit_reloc(dri_bo *reloc_buf, uint64_t flags, GLuint delta,
+ GLuint offset, dri_bo *target_buf)
+{
+}
+
+/**
+ * Initializes the EXA buffer manager, which is just a thin wrapper
+ * around the EXA allocator.
+ *
+ * \param fd File descriptor of the opened DRM device.
+ * \param fence_type Driver-specific fence type used for fences with no flush.
+ * \param fence_type_flush Driver-specific fence type used for fences with a
+ * flush.
+ */
+dri_bufmgr *
+intel_bufmgr_exa_init(ScrnInfoPtr pScrn)
+{
+ dri_bufmgr_exa *bufmgr_exa;
+
+ bufmgr_exa = calloc(1, sizeof(*bufmgr_exa));
+ bufmgr_exa->pScrn = pScrn;
+
+ bufmgr_exa->bufmgr.bo_alloc = dri_exa_alloc;
+ bufmgr_exa->bufmgr.bo_reference = dri_exa_bo_reference;
+ bufmgr_exa->bufmgr.bo_unreference = dri_exa_bo_unreference;
+ bufmgr_exa->bufmgr.bo_map = dri_exa_bo_map;
+ bufmgr_exa->bufmgr.bo_unmap = dri_exa_bo_unmap;
+ bufmgr_exa->bufmgr.destroy = dri_bufmgr_exa_destroy;
+ bufmgr_exa->bufmgr.emit_reloc = dri_exa_emit_reloc;
+
+ return &bufmgr_exa->bufmgr;
+}
+
diff --git a/src/intel_bufmgr_exa.h b/src/intel_bufmgr_exa.h
new file mode 100644
index 0000000..ebfb38f
--- /dev/null
+++ b/src/intel_bufmgr_exa.h
@@ -0,0 +1,8 @@
+#ifndef INTEL_BUFMGR_EXA_H
+#define INTEL_BUFMGR_EXA_H
+
+#include "dri_bufmgr.h"
+
+dri_bufmgr *intel_bufmgr_exa_init(ScrnInfoPtr pScrn);
+
+#endif
commit 6d8ceaca0fe648f729e89a262be6bbe7fa9a9ed2
Merge: 5b3e638... 49af3c4...
Author: Dave Airlie <airlied at panoply-rh.(none)>
Date: Tue Mar 4 11:44:15 2008 +1000
Merge remote branch 'origin/intel-batchbuffer' into intel-kernelmode
commit 49af3c489c86a043a8a787182ee5cfec9773bf74
Author: Kristian Høgsberg <krh at redhat.com>
Date: Mon Mar 3 19:13:12 2008 -0500
I830EXAGetPixmapHandle: set flags to 0 when pixmap isn't tiled.
Instead of leaving it uninitialized...
diff --git a/src/i830_exa.c b/src/i830_exa.c
index daf47e9..78dccd7 100644
--- a/src/i830_exa.c
+++ b/src/i830_exa.c
@@ -456,7 +456,9 @@ unsigned int I830EXAGetPixmapHandle(PixmapPtr pPix, unsigned int *flags)
return 0;
if (i830_pixmap_tiled(pPix))
- *flags = 0x0100;
+ *flags = BUFFER_FLAG_TILED;
+ else
+ *flags = 0;
return dri_bo_get_handle(driver_priv->bo);
}
commit d6f9257e81a3cd41396c88d306b35191782c2573
Author: Kristian Høgsberg <krh at redhat.com>
Date: Fri Feb 29 15:12:23 2008 -0500
Drop DDX version from DRI2 call to track API changes.
diff --git a/src/i830_dri.c b/src/i830_dri.c
index 1c02fbd..d95ecb2 100644
--- a/src/i830_dri.c
+++ b/src/i830_dri.c
@@ -1964,9 +1964,6 @@ I830DRI2ScreenInit(ScreenPtr pScreen)
dri2info.fd = pI830->drmSubFD;
dri2info.driverSareaSize = sizeof *driLock;
dri2info.driverName = IS_I965G(pI830) ? "i965" : "i915";
- dri2info.ddxVersionMajor = I830_MAJOR_VERSION;
- dri2info.ddxVersionMinor = I830_MINOR_VERSION;
- dri2info.ddxVersionPatch = I830_PATCHLEVEL;
dri2info.getPixmapHandle = I830EXAGetPixmapHandle;
dri2info.beginClipNotify = I830DRI2BeginClipNotify;
dri2info.endClipNotify = I830DRI2EndClipNotify;
@@ -1993,8 +1990,7 @@ I830DRI2ScreenInit(ScreenPtr pScreen)
/* Get sarea BO handle... maybe we need a dedicated function for
* that or maybe a DRI2 info struct that it fills out. */
- DRI2Connect(pScreen, &fd, &driverName, &major, &minor, &patch,
- &sarea_handle);
+ DRI2Connect(pScreen, &fd, &driverName, &sarea_handle);
memset(&info, 0, sizeof(info));
info.func = I915_INIT_DMA2;
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