xf86-video-intel: Branch 'intel-batchbuffer' - src/common.h src/i830_driver.c src/i830_exa.c src/i965_render.c src/intel_batchbuffer.c src/intel_batchbuffer.h src/intel_bufmgr_exa.c src/intel_bufmgr_exa.h src/Makefile.am

Kristian Høgsberg krh at kemper.freedesktop.org
Tue Mar 4 15:00:20 PST 2008


 src/Makefile.am         |    2 
 src/common.h            |    3 
 src/i830_driver.c       |   15 +++-
 src/i830_exa.c          |    6 -
 src/i965_render.c       |   34 +++++----
 src/intel_batchbuffer.c |    3 
 src/intel_batchbuffer.h |   45 ++++++++----
 src/intel_bufmgr_exa.c  |  167 ++++++++++++++++++++++++++++++++++++++++++++++++
 src/intel_bufmgr_exa.h  |    8 ++
 9 files changed, 246 insertions(+), 37 deletions(-)

New commits:
commit 68a38403dbac3a9fa7621cde00914bfaf6542a1c
Author: Kristian Høgsberg <krh at redhat.com>
Date:   Tue Mar 4 17:59:53 2008 -0500

    Implement a i830_memory.c based bufmgr.
    
    This enables the batchbuffer branch to run on non-ttm capable drms.

diff --git a/src/Makefile.am b/src/Makefile.am
index 701d928..4f983c7 100644
--- a/src/Makefile.am
+++ b/src/Makefile.am
@@ -122,6 +122,8 @@ intel_drv_la_SOURCES = \
 	 dri_bufmgr_remap.h \
 	 intel_bufmgr_ttm.c \
          intel_bufmgr_ttm.h \
+	 intel_bufmgr_exa.c \
+         intel_bufmgr_exa.h \
          intel_batchbuffer.c \
          intel_batchbuffer.h
 
diff --git a/src/common.h b/src/common.h
index 2d3b84b..7100b4e 100644
--- a/src/common.h
+++ b/src/common.h
@@ -229,6 +229,9 @@ union intfloat {
    if (I810_DEBUG & DEBUG_VERBOSE_RING)					\
       ErrorF( "BEGIN_LP_RING %d in %s\n", n, FUNCTION_NAME);
 
+#define ENSURE_LP_RING(n)			\
+   if (RecPtr->LpRing->space < (n) * 4)		\
+      WaitRingFunc(pScrn, (n) * 4, 0);
 
 #define BEGIN_LP_RING(n)						\
 	RING_LOCALS							\
diff --git a/src/i830_driver.c b/src/i830_driver.c
index ba44645..1556505 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -198,6 +198,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "i830_debug.h"
 #include "i830_bios.h"
 #include "i830_video.h"
+#include "intel_bufmgr_exa.h"
 
 #ifdef XF86DRI
 #include "dri.h"
@@ -2362,7 +2363,7 @@ I830BlockHandler(int i,
     pScreen->BlockHandler = I830BlockHandler;
 
     if (pI830->batch)
-    	intelddx_batchbuffer_flush(pI830->batch);
+	intelddx_batchbuffer_flush(pI830->batch);
     I830VideoBlockHandler(i, blockData, pTimeout, pReadmask);
 }
 
@@ -2499,6 +2500,12 @@ I830ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
    }
 #endif
 
+   if (pI830->bufmgr == NULL) {
+      pI830->bufmgr = intel_bufmgr_exa_init(pScrn);
+      if (pI830->bufmgr)
+	 xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Using EXA bufmgr\n");
+   }
+
    /* The batchbuffer branch won't work without a bufmgr, so fail now
     * if neither XF86DRI or DRI2 managed to set that up. */
    if (pI830->bufmgr == NULL) {
@@ -2902,9 +2909,6 @@ I830ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
     if (pScrn->virtualX > pScrn->displayWidth)
 	pScrn->displayWidth = pScrn->virtualX;
 
-   if (IS_I965G(pI830))
-     i965_init_exa_state(pScrn);
-
    DPRINTF(PFX, "assert( if(!fbScreenInit(pScreen, ...) )\n");
    if (!fbScreenInit(pScreen, pI830->FbBase + pScrn->fbOffset, 
                      pScrn->virtualX, pScrn->virtualY,
@@ -3318,6 +3322,9 @@ I830EnterVT(int scrnIndex, int flags)
    if (pI830->checkDevices)
       pI830->devicesTimer = TimerSet(NULL, 0, 1000, I830CheckDevicesTimer, pScrn);
 
+   if (pI830->starting && IS_I965G(pI830))
+      i965_init_exa_state(pScrn);
+
    /* Mark 3D state as being clobbered and setup the basics */
    *pI830->last_3d = LAST_3D_OTHER;
    IntelEmitInvarientState(pScrn);
diff --git a/src/i830_exa.c b/src/i830_exa.c
index 78dccd7..e3b9db5 100644
--- a/src/i830_exa.c
+++ b/src/i830_exa.c
@@ -185,10 +185,10 @@ static void
 I830EXASync(ScreenPtr pScreen, int marker)
 {
     ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+    I830Ptr pI830 = I830PTR(pScrn);
 
-#if 0
-    I830Sync(pScrn);
-#endif
+    if (!pI830->use_ttm_batch)
+	I830Sync(pScrn);
 }
 
 /**
diff --git a/src/i965_render.c b/src/i965_render.c
index 307acf2..00463e8 100644
--- a/src/i965_render.c
+++ b/src/i965_render.c
@@ -968,16 +968,20 @@ i965_set_picture_surface_state(ScrnInfoPtr pScrn, unsigned int index,
     ss->ss0.vert_line_stride_ofs = 0;
     ss->ss0.mipmap_layout_mode = 0;
     ss->ss0.render_cache_read_mode = 0;
-    ss->ss1.base_addr =
-	intelddx_batchbuffer_emit_pixmap(pPixmap,
-					 DRM_BO_FLAG_MEM_TT |
-					 (is_dst ? DRM_BO_FLAG_WRITE : 0) |
-					 DRM_BO_FLAG_READ,
-					 pI830->exa965->surface_buf,
-					 offset +
-					 offsetof(struct brw_surface_state,
-						  ss1),
-					 0);
+    if (pI830->use_ttm_batch)
+       ss->ss1.base_addr =
+	  intelddx_batchbuffer_emit_pixmap(pPixmap,
+					   DRM_BO_FLAG_MEM_TT |
+					   (is_dst ? DRM_BO_FLAG_WRITE : 0) |
+					   DRM_BO_FLAG_READ,
+					   pI830->exa965->surface_buf,
+					   offset +
+					   offsetof(struct brw_surface_state,
+						    ss1),
+					   0);
+    else
+       ss->ss1.base_addr = intel_get_pixmap_offset(pPixmap);
+
     ss->ss2.mip_count = 0;
     ss->ss2.render_target_rotation = 0;
     ss->ss2.height = pPixmap->drawable.height - 1;
@@ -1024,7 +1028,7 @@ i965_prepare_composite(int op, PicturePtr pSrcPicture,
      * And with a 16k batchbuffer, this means we'll be wasting at most
      * 1/8 of the total batchbuffer.
      */
-    intelddx_batchbuffer_require_space (pI830->batch, 2048, 0);
+    ENSURE_BATCH(512);
 
     i965_exastate_reset(pI830->exa965);
     surface_map = pI830->exa965->surface_map;
@@ -1160,7 +1164,7 @@ i965_prepare_composite(int op, PicturePtr pSrcPicture,
 	gen4_emit_batch_header (pScrn);
 
      {
-	BEGIN_BATCH(19);
+	BEGIN_BATCH(18);
 	/* Flush the map (texture) cache.  The rendering cache covers the blit
 	 * and 3D destination parts of the engine and automatically flushes
 	 * between them, but the map cache has to be flushed separately.
@@ -1218,7 +1222,7 @@ i965_prepare_composite(int op, PicturePtr pSrcPicture,
 	/* Set up our vertex elements, sourced from the single vertex buffer.
 	 * The vertex buffer will be set up later at primitive emit time.
 	 */
-	BEGIN_BATCH(pMask ? 7 : 5);
+	BEGIN_BATCH(pMask ? 8 : 6);
    	OUT_BATCH(BRW_3DSTATE_VERTEX_ELEMENTS | ((2 * nelem) - 1));
 	/* vertex coordinates */
    	OUT_BATCH((0 << VE0_VERTEX_BUFFER_INDEX_SHIFT) |
@@ -1253,6 +1257,7 @@ i965_prepare_composite(int op, PicturePtr pSrcPicture,
 		     (10 << VE1_DESTINATION_ELEMENT_OFFSET_SHIFT));
    	}
 
+	OUT_BATCH(MI_NOOP);
    	ADVANCE_BATCH();
     }
 
@@ -1275,7 +1280,7 @@ i965_composite_flush_prims(ScrnInfoPtr pScrn)
     if (pI830->exa965->vbo_used == pI830->exa965->vbo_prim_start)
 	return;
 
-    BEGIN_BATCH(11);
+    BEGIN_BATCH(12);
     /* Set up the pointer to our vertex buffer.  We could emit this a lot
      * less often (as long as vertex_size and vbo haven't changed).
      */
@@ -1300,6 +1305,7 @@ i965_composite_flush_prims(ScrnInfoPtr pScrn)
     OUT_BATCH(1); /* single instance - mbz in docs */
     OUT_BATCH(0); /* start instance location */
     OUT_BATCH(0); /* index buffer offset, ignored */
+    OUT_BATCH(MI_NOOP);
     ADVANCE_BATCH();
 
     pI830->exa965->vbo_prim_start = pI830->exa965->vbo_used;
diff --git a/src/intel_batchbuffer.c b/src/intel_batchbuffer.c
index e15c6ce..460a886 100644
--- a/src/intel_batchbuffer.c
+++ b/src/intel_batchbuffer.c
@@ -272,8 +272,9 @@ uint32_t intelddx_batchbuffer_emit_pixmap(PixmapPtr pPixmap,
 					  unsigned int offset,
 					  unsigned int delta)
 {
-    struct i830_exa_pixmap_priv *driver_priv = exaGetPixmapDriverPrivate(pPixmap);
+    struct i830_exa_pixmap_priv *driver_priv;
 
+    driver_priv = exaGetPixmapDriverPrivate(pPixmap);
     dri_emit_reloc(reloc_buf, flags, delta, offset, driver_priv->bo);
     return driver_priv->bo->offset;
 }
diff --git a/src/intel_batchbuffer.h b/src/intel_batchbuffer.h
index 5acdb28..de048d4 100644
--- a/src/intel_batchbuffer.h
+++ b/src/intel_batchbuffer.h
@@ -94,12 +94,20 @@ extern uint32_t intelddx_batchbuffer_emit_pixmap(PixmapPtr pPixmap,
  */
 #define BATCH_LOCALS
 
-#define BEGIN_BATCH(n)  							\
-	RING_LOCALS 								\
-	if (pI830->use_ttm_batch)						\
-   		intelddx_batchbuffer_require_space(pI830->batch, (n)*4, 0);	\
-	 else { \
-   DO_LP_RING(n) ; }
+#define BEGIN_BATCH(n)							\
+   RING_LOCALS								\
+   if (pI830->use_ttm_batch)						\
+      intelddx_batchbuffer_require_space(pI830->batch, (n)*4, 0);	\
+   else {								\
+      DO_LP_RING(n);							\
+   }
+
+#define ENSURE_BATCH(n)							\
+   if (pI830->use_ttm_batch)						\
+      intelddx_batchbuffer_require_space(pI830->batch, (n)*4, 0);	\
+   else {								\
+      ENSURE_LP_RING(n);						\
+   }
 
 #define OUT_BATCH(d) \
 	 if (pI830->use_ttm_batch) \
@@ -112,17 +120,24 @@ extern uint32_t intelddx_batchbuffer_emit_pixmap(PixmapPtr pPixmap,
         OUT_BATCH(tmp.ui);                      \
 } while(0)
 
-#define OUT_RELOC(buf, flags, delta) do {	\
-   intelddx_batchbuffer_emit_reloc(pI830->batch, buf, flags, delta);	\
+#define OUT_RELOC(buf, flags, delta) do {				\
+   if (pI830->use_ttm_batch)						\
+      intelddx_batchbuffer_emit_reloc(pI830->batch, buf, flags, delta);	\
+   else									\
+      OUT_RING(buf->offset + delta);					\
 } while (0)
 
-#define OUT_PIXMAP_RELOC(pixmap, flags, delta) if (pI830->use_ttm_batch) { \
-    uint32_t _retval = intelddx_batchbuffer_emit_pixmap((pixmap), (flags),		\
-                                 pI830->batch->buf, (pI830->batch->ptr - pI830->batch->map), (delta)); \
-    intelddx_batchbuffer_emit_dword (pI830->batch, _retval + (delta)); \
-  } else {								\
-    OUT_RING(intel_get_pixmap_offset(pixmap) + delta);			\
-  }
+#define OUT_PIXMAP_RELOC(pixmap, flags, delta)				\
+   if (pI830->use_ttm_batch) {						\
+      unsigned int offset = pI830->batch->ptr - pI830->batch->map;	\
+      uint32_t _retval =						\
+         intelddx_batchbuffer_emit_pixmap((pixmap), (flags),		\
+					  pI830->batch->buf,		\
+					  offset, delta);		\
+      intelddx_batchbuffer_emit_dword (pI830->batch, _retval + (delta)); \
+   } else {								\
+      OUT_RING(intel_get_pixmap_offset(pixmap) + delta);		\
+   }
 
 #define ADVANCE_BATCH() if (!pI830->use_ttm_batch) { ADVANCE_LP_RING(); }
 
diff --git a/src/intel_bufmgr_exa.c b/src/intel_bufmgr_exa.c
new file mode 100644
index 0000000..f4a3590
--- /dev/null
+++ b/src/intel_bufmgr_exa.c
@@ -0,0 +1,167 @@
+/**************************************************************************
+ *
+ * Copyright © 2007-2008 Red Hat Inc.
+ * Copyright © 2007 Intel Corporation
+ * Copyright 2006 Tungsten Graphics, Inc., Bismarck, ND., USA
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ *
+ **************************************************************************/
+/*
+ * Authors: Thomas Hellström <thomas-at-tungstengraphics-dot-com>
+ *          Keith Whitwell <keithw-at-tungstengraphics-dot-com>
+ *	    Eric Anholt <eric at anholt.net>
+ *	    Dave Airlie <airlied at linux.ie>
+ *	    Kristian Høgsberg <krh at redhat.com>
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <xf86drm.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <unistd.h>
+#include <assert.h>
+
+#include "xf86.h"
+#include "i830.h"
+#include "errno.h"
+#include "dri_bufmgr.h"
+#include "string.h"
+
+#include "i915_drm.h"
+
+#include "intel_bufmgr_exa.h"
+
+typedef struct _dri_bufmgr_exa {
+    dri_bufmgr bufmgr;
+    ScrnInfoPtr pScrn;
+} dri_bufmgr_exa;
+
+typedef struct _dri_bo_exa {
+    dri_bo bo;
+    i830_memory *memory;
+    int refcount;
+} dri_bo_exa;
+
+static dri_bo *
+dri_exa_alloc(dri_bufmgr *bufmgr, const char *name,
+	      unsigned long size, unsigned int alignment,
+	      uint64_t location_mask)
+{
+    dri_bufmgr_exa *bufmgr_exa = (dri_bufmgr_exa *)bufmgr;
+    I830Ptr pI830 = I830PTR(bufmgr_exa->pScrn);
+    dri_bo_exa *exa_buf;
+
+    exa_buf = malloc(sizeof(*exa_buf));
+    if (!exa_buf)
+	return NULL;
+
+    exa_buf->refcount = 1;
+    exa_buf->memory = i830_allocate_memory(bufmgr_exa->pScrn,
+					   name, size, alignment, 0);
+
+    exa_buf->bo.size = exa_buf->memory->size;
+    exa_buf->bo.offset = exa_buf->memory->offset;
+    exa_buf->bo.bufmgr = bufmgr;
+    exa_buf->bo.virtual = pI830->FbBase + exa_buf->memory->offset;
+
+    return &exa_buf->bo;
+}
+
+static void
+dri_exa_bo_reference(dri_bo *buf)
+{
+    dri_bo_exa *exa_buf = (dri_bo_exa *)buf;
+
+    exa_buf->refcount++;
+}
+
+static void
+dri_exa_bo_unreference(dri_bo *buf)
+{
+    dri_bufmgr_exa *bufmgr_exa = (dri_bufmgr_exa *)buf->bufmgr;
+    dri_bo_exa *exa_buf = (dri_bo_exa *)buf;
+
+    if (!buf)
+	return;
+
+    if (--exa_buf->refcount == 0)
+	i830_free_memory(bufmgr_exa->pScrn, exa_buf->memory);
+}
+
+static int
+dri_exa_bo_map(dri_bo *buf, GLboolean write_enable)
+{
+    return 0;
+}
+
+static int
+dri_exa_bo_unmap(dri_bo *buf)
+{
+    return 0;
+}
+
+static void
+dri_bufmgr_exa_destroy(dri_bufmgr *bufmgr)
+{
+    free(bufmgr);
+}
+
+static void
+dri_exa_emit_reloc(dri_bo *reloc_buf, uint64_t flags, GLuint delta,
+		   GLuint offset, dri_bo *target_buf)
+{
+}
+
+/**
+ * Initializes the EXA buffer manager, which is just a thin wrapper
+ * around the EXA allocator.
+ *
+ * \param fd File descriptor of the opened DRM device.
+ * \param fence_type Driver-specific fence type used for fences with no flush.
+ * \param fence_type_flush Driver-specific fence type used for fences with a
+ *	  flush.
+ */
+dri_bufmgr *
+intel_bufmgr_exa_init(ScrnInfoPtr pScrn)
+{
+    dri_bufmgr_exa *bufmgr_exa;
+
+    bufmgr_exa = calloc(1, sizeof(*bufmgr_exa));
+    bufmgr_exa->pScrn = pScrn;
+
+    bufmgr_exa->bufmgr.bo_alloc = dri_exa_alloc;
+    bufmgr_exa->bufmgr.bo_reference = dri_exa_bo_reference;
+    bufmgr_exa->bufmgr.bo_unreference = dri_exa_bo_unreference;
+    bufmgr_exa->bufmgr.bo_map = dri_exa_bo_map;
+    bufmgr_exa->bufmgr.bo_unmap = dri_exa_bo_unmap;
+    bufmgr_exa->bufmgr.destroy = dri_bufmgr_exa_destroy;
+    bufmgr_exa->bufmgr.emit_reloc = dri_exa_emit_reloc;
+
+    return &bufmgr_exa->bufmgr;
+}
+
diff --git a/src/intel_bufmgr_exa.h b/src/intel_bufmgr_exa.h
new file mode 100644
index 0000000..ebfb38f
--- /dev/null
+++ b/src/intel_bufmgr_exa.h
@@ -0,0 +1,8 @@
+#ifndef INTEL_BUFMGR_EXA_H
+#define INTEL_BUFMGR_EXA_H
+
+#include "dri_bufmgr.h"
+
+dri_bufmgr *intel_bufmgr_exa_init(ScrnInfoPtr pScrn);
+
+#endif


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