xf86-video-intel: Branch 'xf86-video-intel-2.4-branch' - src/common.h src/i810_driver.c src/i810_reg.h src/i830_driver.c src/i830_memory.c src/i830_video.c src/i965_render.c src/i965_video.c
Eric Anholt
anholt at kemper.freedesktop.org
Tue Jun 17 12:41:56 PDT 2008
src/common.h | 24 ++++++++++++++++++++++--
src/i810_driver.c | 12 ++++++++++++
src/i810_reg.h | 5 +++++
src/i830_driver.c | 37 +++++++++++++++++++++++++++++++++++--
src/i830_memory.c | 9 +++++----
src/i830_video.c | 2 +-
src/i965_render.c | 2 +-
src/i965_video.c | 2 +-
8 files changed, 82 insertions(+), 11 deletions(-)
New commits:
commit 093f65fd04c38e6c1f19889074f9316749959c7a
Author: Zhenyu Wang <zhenyu.z.wang at intel.com>
Date: Tue Jun 17 12:39:28 2008 -0700
Add support for Intel 4 series chipsets.
(cherry picked from commit 1cfe769c74d1a3a392bf1aaaf5c2dcc8273daf66)
diff --git a/src/common.h b/src/common.h
index 9a3e0ac..5efdc0c 100644
--- a/src/common.h
+++ b/src/common.h
@@ -308,6 +308,21 @@ extern int I810_DEBUG;
#define PCI_CHIP_IGD_GM_BRIDGE 0x2A40
#endif
+#ifndef PCI_CHIP_IGD_E_G
+#define PCI_CHIP_IGD_E_G 0x2E02
+#define PCI_CHIP_IGD_E_G_BRIDGE 0x2E00
+#endif
+
+#ifndef PCI_CHIP_G45_G
+#define PCI_CHIP_G45_G 0x2E22
+#define PCI_CHIP_G45_G_BRIDGE 0x2E20
+#endif
+
+#ifndef PCI_CHIP_Q45_G
+#define PCI_CHIP_Q45_G 0x2E12
+#define PCI_CHIP_Q45_G_BRIDGE 0x2E10
+#endif
+
#if XSERVER_LIBPCIACCESS
#define I810_MEMBASE(p,n) (p)->regions[(n)].base_addr
#define VENDOR_ID(p) (p)->vendor_id
@@ -340,8 +355,9 @@ extern int I810_DEBUG;
#define IS_I945G(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I945_G)
#define IS_I945GM(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I945_GM || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I945_GME)
#define IS_IGD_GM(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_IGD_GM)
+#define IS_G4X(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_IGD_E_G || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_G45_G || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_Q45_G)
#define IS_I965GM(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_GM || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_GME)
-#define IS_I965G(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_G || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_G35_G || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_Q || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I946_GZ || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_GM || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_GME || IS_IGD_GM(pI810))
+#define IS_I965G(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_G || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_G35_G || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_Q || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I946_GZ || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_GM || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_GME || IS_IGD_GM(pI810) || IS_G4X(pI810))
#define IS_G33CLASS(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_G33_G ||\
DEVICE_ID(pI810->PciInfo) == PCI_CHIP_Q35_G ||\
DEVICE_ID(pI810->PciInfo) == PCI_CHIP_Q33_G)
@@ -350,8 +366,12 @@ extern int I810_DEBUG;
#define IS_MOBILE(pI810) (IS_I830(pI810) || IS_I85X(pI810) || IS_I915GM(pI810) || IS_I945GM(pI810) || IS_I965GM(pI810) || IS_IGD_GM(pI810))
/* mark chipsets for using gfx VM offset for overlay */
#define OVERLAY_NOPHYSICAL(pI810) (IS_G33CLASS(pI810) || IS_I965G(pI810))
+/* mark chipsets without overlay hw */
+#define OVERLAY_NOEXIST(pI810) (IS_IGD_GM(pI810) || IS_G4X(pI810))
/* chipsets require graphics mem for hardware status page */
-#define HWS_NEED_GFX(pI810) (IS_G33CLASS(pI810) || IS_IGD_GM(pI810))
+#define HWS_NEED_GFX(pI810) (IS_G33CLASS(pI810) || IS_IGD_GM(pI810) || IS_G4X(pI810))
+/* chipsets require status page in non stolen memory */
+#define HWS_NEED_NONSTOLEN(pI810) (IS_IGD_GM(pI810) || IS_G4X(pI810))
#define GTT_PAGE_SIZE KB(4)
#define ROUND_TO(x, y) (((x) + (y) - 1) / (y) * (y))
diff --git a/src/i810_driver.c b/src/i810_driver.c
index 4b71660..de4f3cb 100644
--- a/src/i810_driver.c
+++ b/src/i810_driver.c
@@ -153,6 +153,9 @@ static const struct pci_id_match intel_device_match[] = {
INTEL_DEVICE_MATCH (PCI_CHIP_Q35_G, 0 ),
INTEL_DEVICE_MATCH (PCI_CHIP_Q33_G, 0 ),
INTEL_DEVICE_MATCH (PCI_CHIP_IGD_GM, 0 ),
+ INTEL_DEVICE_MATCH (PCI_CHIP_IGD_E_G, 0 ),
+ INTEL_DEVICE_MATCH (PCI_CHIP_G45_G, 0 ),
+ INTEL_DEVICE_MATCH (PCI_CHIP_Q45_G, 0 ),
{ 0, 0, 0 },
};
@@ -206,6 +209,9 @@ static SymTabRec I810Chipsets[] = {
{PCI_CHIP_Q35_G, "Q35"},
{PCI_CHIP_Q33_G, "Q33"},
{PCI_CHIP_IGD_GM, "Intel Integrated Graphics Device"},
+ {PCI_CHIP_IGD_E_G, "Intel Integrated Graphics Device"},
+ {PCI_CHIP_G45_G, "G45/G43"},
+ {PCI_CHIP_Q45_G, "Q45/Q43"},
{-1, NULL}
};
@@ -236,6 +242,9 @@ static PciChipsets I810PciChipsets[] = {
{PCI_CHIP_Q35_G, PCI_CHIP_Q35_G, RES_SHARED_VGA},
{PCI_CHIP_Q33_G, PCI_CHIP_Q33_G, RES_SHARED_VGA},
{PCI_CHIP_IGD_GM, PCI_CHIP_IGD_GM, RES_SHARED_VGA},
+ {PCI_CHIP_IGD_E_G, PCI_CHIP_IGD_E_G, RES_SHARED_VGA},
+ {PCI_CHIP_G45_G, PCI_CHIP_G45_G, RES_SHARED_VGA},
+ {PCI_CHIP_Q45_G, PCI_CHIP_Q45_G, RES_SHARED_VGA},
{-1, -1, RES_UNDEFINED }
};
@@ -800,6 +809,9 @@ I810Probe(DriverPtr drv, int flags)
case PCI_CHIP_Q35_G:
case PCI_CHIP_Q33_G:
case PCI_CHIP_IGD_GM:
+ case PCI_CHIP_IGD_E_G:
+ case PCI_CHIP_G45_G:
+ case PCI_CHIP_Q45_G:
xf86SetEntitySharable(usedChips[i]);
/* Allocate an entity private if necessary */
diff --git a/src/i810_reg.h b/src/i810_reg.h
index e0b0c27..dc4f5e8 100644
--- a/src/i810_reg.h
+++ b/src/i810_reg.h
@@ -2270,6 +2270,11 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define I915G_GMCH_GMS_STOLEN_64M (0x7 << 4)
#define G33_GMCH_GMS_STOLEN_128M (0x8 << 4)
#define G33_GMCH_GMS_STOLEN_256M (0x9 << 4)
+#define INTEL_GMCH_GMS_STOLEN_96M (0xa << 4)
+#define INTEL_GMCH_GMS_STOLEN_160M (0xb << 4)
+#define INTEL_GMCH_GMS_STOLEN_224M (0xc << 4)
+#define INTEL_GMCH_GMS_STOLEN_352M (0xd << 4)
+
#define I85X_CAPID 0x44
#define I85X_VARIANT_MASK 0x7
diff --git a/src/i830_driver.c b/src/i830_driver.c
index 091b5ca..604665e 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -252,6 +252,9 @@ static SymTabRec I830Chipsets[] = {
{PCI_CHIP_Q35_G, "Q35"},
{PCI_CHIP_Q33_G, "Q33"},
{PCI_CHIP_IGD_GM, "Intel Integrated Graphics Device"},
+ {PCI_CHIP_IGD_E_G, "Intel Integrated Graphics Device"},
+ {PCI_CHIP_G45_G, "G45/G43"},
+ {PCI_CHIP_Q45_G, "Q45/Q43"},
{-1, NULL}
};
@@ -276,6 +279,9 @@ static PciChipsets I830PciChipsets[] = {
{PCI_CHIP_Q35_G, PCI_CHIP_Q35_G, RES_SHARED_VGA},
{PCI_CHIP_Q33_G, PCI_CHIP_Q33_G, RES_SHARED_VGA},
{PCI_CHIP_IGD_GM, PCI_CHIP_IGD_GM, RES_SHARED_VGA},
+ {PCI_CHIP_IGD_E_G, PCI_CHIP_IGD_E_G, RES_SHARED_VGA},
+ {PCI_CHIP_G45_G, PCI_CHIP_G45_G, RES_SHARED_VGA},
+ {PCI_CHIP_Q45_G, PCI_CHIP_Q45_G, RES_SHARED_VGA},
{-1, -1, RES_UNDEFINED}
};
@@ -511,6 +517,10 @@ I830DetectMemory(ScrnInfoPtr pScrn)
*/
range = gtt_size + 4;
+ /* new 4 series hardware has seperate GTT stolen with GFX stolen */
+ if (IS_G4X(pI830))
+ range = 0;
+
if (IS_I85X(pI830) || IS_I865G(pI830) || IS_I9XX(pI830)) {
switch (gmch_ctrl & I855_GMCH_GMS_MASK) {
case I855_GMCH_GMS_STOLEN_1M:
@@ -544,6 +554,22 @@ I830DetectMemory(ScrnInfoPtr pScrn)
if (IS_I9XX(pI830))
memsize = MB(256) - KB(range);
break;
+ case INTEL_GMCH_GMS_STOLEN_96M:
+ if (IS_I9XX(pI830))
+ memsize = MB(96) - KB(range);
+ break;
+ case INTEL_GMCH_GMS_STOLEN_160M:
+ if (IS_I9XX(pI830))
+ memsize = MB(160) - KB(range);
+ break;
+ case INTEL_GMCH_GMS_STOLEN_224M:
+ if (IS_I9XX(pI830))
+ memsize = MB(224) - KB(range);
+ break;
+ case INTEL_GMCH_GMS_STOLEN_352M:
+ if (IS_I9XX(pI830))
+ memsize = MB(352) - KB(range);
+ break;
}
} else {
switch (gmch_ctrl & I830_GMCH_GMS_MASK) {
@@ -627,7 +653,7 @@ I830MapMMIO(ScrnInfoPtr pScrn)
if (IS_I965G(pI830))
{
- if (IS_IGD_GM(pI830)) {
+ if (IS_IGD_GM(pI830) || IS_G4X(pI830)) {
gttaddr = pI830->MMIOAddr + MB(2);
pI830->GTTMapSize = MB(2);
} else {
@@ -1182,8 +1208,15 @@ i830_detect_chipset(ScrnInfoPtr pScrn)
chipname = "Q33";
break;
case PCI_CHIP_IGD_GM:
+ case PCI_CHIP_IGD_E_G:
chipname = "Intel Integrated Graphics Device";
break;
+ case PCI_CHIP_G45_G:
+ chipname = "G45/G43";
+ break;
+ case PCI_CHIP_Q45_G:
+ chipname = "Q45/Q43";
+ break;
default:
chipname = "unknown chipset";
break;
@@ -2952,7 +2985,7 @@ I830ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
"needs 2D acceleration.\n");
pI830->XvEnabled = FALSE;
}
- if (!IS_IGD_GM(pI830) && pI830->overlay_regs == NULL) {
+ if (!OVERLAY_NOEXIST(pI830) && pI830->overlay_regs == NULL) {
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
"Disabling Xv because the overlay register buffer "
"allocation failed.\n");
diff --git a/src/i830_memory.c b/src/i830_memory.c
index 6f7d7cc..6e7a838 100644
--- a/src/i830_memory.c
+++ b/src/i830_memory.c
@@ -447,7 +447,7 @@ i830_allocator_init(ScrnInfoPtr pScrn, unsigned long offset, unsigned long size)
/* Overlay and cursors, if physical, need to be allocated outside
* of the kernel memory manager.
*/
- if (!OVERLAY_NOPHYSICAL(pI830) && !IS_IGD_GM(pI830)) {
+ if (!OVERLAY_NOPHYSICAL(pI830) && !OVERLAY_NOEXIST(pI830)) {
mmsize -= ROUND_TO(OVERLAY_SIZE, GTT_PAGE_SIZE);
}
if (pI830->CursorNeedsPhysical) {
@@ -459,7 +459,8 @@ i830_allocator_init(ScrnInfoPtr pScrn, unsigned long offset, unsigned long size)
/* Can't do TTM on stolen memory */
mmsize -= pI830->stolen_size;
- if (HWS_NEED_GFX(pI830) && IS_IGD_GM(pI830))
+ /* new chipsets need non-stolen status page */
+ if (HWS_NEED_GFX(pI830) && HWS_NEED_NONSTOLEN(pI830))
mmsize -= HWSTATUS_PAGE_SIZE;
/* Create the aperture allocation */
@@ -1027,7 +1028,7 @@ i830_allocate_overlay(ScrnInfoPtr pScrn)
if (!pI830->XvEnabled)
return TRUE;
- if (IS_IGD_GM(pI830))
+ if (OVERLAY_NOEXIST(pI830))
return TRUE;
if (!OVERLAY_NOPHYSICAL(pI830))
@@ -1646,7 +1647,7 @@ i830_allocate_hwstatus(ScrnInfoPtr pScrn)
* (i.e. not through buffer objects).
*/
flags = NEED_LIFETIME_FIXED;
- if (IS_IGD_GM(pI830))
+ if (HWS_NEED_NONSTOLEN(pI830))
flags |= NEED_NON_STOLEN;
pI830->hw_status = i830_allocate_memory(pScrn, "HW status",
HWSTATUS_PAGE_SIZE, GTT_PAGE_SIZE, flags);
diff --git a/src/i830_video.c b/src/i830_video.c
index e109578..7b81b04 100644
--- a/src/i830_video.c
+++ b/src/i830_video.c
@@ -620,7 +620,7 @@ I830InitVideo(ScreenPtr pScreen)
}
/* Set up overlay video if we can do it at this depth. */
- if (!IS_IGD_GM(pI830) && pScrn->bitsPerPixel != 8 &&
+ if (!OVERLAY_NOEXIST(pI830) && pScrn->bitsPerPixel != 8 &&
pI830->overlay_regs != NULL)
{
overlayAdaptor = I830SetupImageVideoOverlay(pScreen);
diff --git a/src/i965_render.c b/src/i965_render.c
index 4a8f9b8..a3c7f49 100644
--- a/src/i965_render.c
+++ b/src/i965_render.c
@@ -1035,7 +1035,7 @@ i965_prepare_composite(int op, PicturePtr pSrcPicture,
BEGIN_BATCH(12);
/* Match Mesa driver setup */
- if (IS_IGD_GM(pI830))
+ if (IS_IGD_GM(pI830) || IS_G4X(pI830))
OUT_BATCH(NEW_PIPELINE_SELECT | PIPELINE_SELECT_3D);
else
OUT_BATCH(BRW_PIPELINE_SELECT | PIPELINE_SELECT_3D);
diff --git a/src/i965_video.c b/src/i965_video.c
index 485c89a..4572e13 100644
--- a/src/i965_video.c
+++ b/src/i965_video.c
@@ -584,7 +584,7 @@ I965DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id,
{
BEGIN_BATCH(12);
/* Match Mesa driver setup */
- if (IS_IGD_GM(pI830))
+ if (IS_IGD_GM(pI830) || IS_G4X(pI830))
OUT_BATCH(NEW_PIPELINE_SELECT | PIPELINE_SELECT_3D);
else
OUT_BATCH(BRW_PIPELINE_SELECT | PIPELINE_SELECT_3D);
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