xf86-video-ati: Branch 'master' - 2 commits
Alex Deucher
agd5f at kemper.freedesktop.org
Thu Jan 17 12:12:16 PST 2008
src/atombios_crtc.c | 28 ++++++++++----------
src/atombios_output.c | 24 ++++++++---------
src/legacy_output.c | 55 +++++++++++++++++++++------------------
src/radeon_output.c | 69 ++++++++++++++++++++++++++++++++------------------
4 files changed, 101 insertions(+), 75 deletions(-)
New commits:
commit 2a89a31481d71a56a9930073cf99d3ae7b4290e1
Author: Alex Deucher <alex at samba.(none)>
Date: Thu Jan 17 15:08:17 2008 -0500
RADEON: use radeon_output->Flags for tracking RMX rather than mode->Flags
diff --git a/src/legacy_output.c b/src/legacy_output.c
index 45706b9..db128ca 100644
--- a/src/legacy_output.c
+++ b/src/legacy_output.c
@@ -893,7 +893,7 @@ RADEONInitFPRegisters(xf86OutputPtr output, RADEONSavePtr save,
if (IS_R300_VARIANT || (info->ChipFamily == CHIP_FAMILY_R200) || !pRADEONEnt->HasCRTC2)
save->tmds_transmitter_cntl &= ~(RADEON_TMDS_TRANSMITTER_PLLEN);
else /* weird, RV chips got this bit reversed? */
- save->tmds_transmitter_cntl |= (RADEON_TMDS_TRANSMITTER_PLLEN);
+ save->tmds_transmitter_cntl |= (RADEON_TMDS_TRANSMITTER_PLLEN);
save->fp_gen_cntl = info->SavedReg->fp_gen_cntl |
(RADEON_FP_CRTC_DONT_SHADOW_VPAR |
@@ -902,25 +902,25 @@ RADEONInitFPRegisters(xf86OutputPtr output, RADEONSavePtr save,
save->fp_gen_cntl &= ~(RADEON_FP_FPON | RADEON_FP_TMDS_EN);
if (pScrn->rgbBits == 8)
- save->fp_gen_cntl |= RADEON_FP_PANEL_FORMAT; /* 24 bit format */
+ save->fp_gen_cntl |= RADEON_FP_PANEL_FORMAT; /* 24 bit format */
else
- save->fp_gen_cntl &= ~RADEON_FP_PANEL_FORMAT;/* 18 bit format */
+ save->fp_gen_cntl &= ~RADEON_FP_PANEL_FORMAT;/* 18 bit format */
if (IsPrimary) {
if ((IS_R300_VARIANT) || (info->ChipFamily == CHIP_FAMILY_R200)) {
save->fp_gen_cntl &= ~R200_FP_SOURCE_SEL_MASK;
- if (mode->Flags & RADEON_USE_RMX)
+ if (radeon_output->Flags & RADEON_USE_RMX)
save->fp_gen_cntl |= R200_FP_SOURCE_SEL_RMX;
else
save->fp_gen_cntl |= R200_FP_SOURCE_SEL_CRTC1;
- } else
+ } else
save->fp_gen_cntl |= RADEON_FP_SEL_CRTC1;
} else {
if ((IS_R300_VARIANT) || (info->ChipFamily == CHIP_FAMILY_R200)) {
save->fp_gen_cntl &= ~R200_FP_SOURCE_SEL_MASK;
save->fp_gen_cntl |= R200_FP_SOURCE_SEL_CRTC2;
- } else
+ } else
save->fp_gen_cntl |= RADEON_FP_SEL_CRTC2;
}
@@ -932,9 +932,9 @@ RADEONInitFP2Registers(xf86OutputPtr output, RADEONSavePtr save,
{
ScrnInfoPtr pScrn = output->scrn;
RADEONInfoPtr info = RADEONPTR(pScrn);
+ RADEONOutputPrivatePtr radeon_output = output->driver_private;
-
- if (pScrn->rgbBits == 8)
+ if (pScrn->rgbBits == 8)
save->fp2_gen_cntl = info->SavedReg->fp2_gen_cntl |
RADEON_FP2_PANEL_FORMAT; /* 24 bit format, */
else
@@ -956,20 +956,20 @@ RADEONInitFP2Registers(xf86OutputPtr output, RADEONSavePtr save,
}
if (IsPrimary) {
- if ((info->ChipFamily == CHIP_FAMILY_R200) || IS_R300_VARIANT) {
- save->fp2_gen_cntl &= ~R200_FP2_SOURCE_SEL_MASK;
- if (mode->Flags & RADEON_USE_RMX)
+ if ((info->ChipFamily == CHIP_FAMILY_R200) || IS_R300_VARIANT) {
+ save->fp2_gen_cntl &= ~R200_FP2_SOURCE_SEL_MASK;
+ if (radeon_output->Flags & RADEON_USE_RMX)
save->fp2_gen_cntl |= R200_FP2_SOURCE_SEL_RMX;
- } else {
- save->fp2_gen_cntl &= ~RADEON_FP2_SRC_SEL_CRTC2;
+ } else {
+ save->fp2_gen_cntl &= ~RADEON_FP2_SRC_SEL_CRTC2;
}
} else {
- if ((info->ChipFamily == CHIP_FAMILY_R200) || IS_R300_VARIANT) {
- save->fp2_gen_cntl &= ~R200_FP2_SOURCE_SEL_MASK;
- save->fp2_gen_cntl |= R200_FP2_SOURCE_SEL_CRTC2;
- } else {
- save->fp2_gen_cntl |= RADEON_FP2_SRC_SEL_CRTC2;
- }
+ if ((info->ChipFamily == CHIP_FAMILY_R200) || IS_R300_VARIANT) {
+ save->fp2_gen_cntl &= ~R200_FP2_SOURCE_SEL_MASK;
+ save->fp2_gen_cntl |= R200_FP2_SOURCE_SEL_CRTC2;
+ } else {
+ save->fp2_gen_cntl |= RADEON_FP2_SRC_SEL_CRTC2;
+ }
}
}
@@ -980,6 +980,7 @@ RADEONInitLVDSRegisters(xf86OutputPtr output, RADEONSavePtr save,
{
ScrnInfoPtr pScrn = output->scrn;
RADEONInfoPtr info = RADEONPTR(pScrn);
+ RADEONOutputPrivatePtr radeon_output = output->driver_private;
save->lvds_pll_cntl = (info->SavedReg->lvds_pll_cntl |
RADEON_LVDS_PLL_EN);
@@ -998,7 +999,7 @@ RADEONInitLVDSRegisters(xf86OutputPtr output, RADEONSavePtr save,
if (IsPrimary) {
if (IS_R300_VARIANT) {
- if (mode->Flags & RADEON_USE_RMX)
+ if (radeon_output->Flags & RADEON_USE_RMX)
save->lvds_pll_cntl |= R300_LVDS_SRC_SEL_RMX;
} else
save->lvds_gen_cntl &= ~RADEON_LVDS_SEL_CRTC2;
@@ -1042,7 +1043,7 @@ RADEONInitRMXRegisters(xf86OutputPtr output, RADEONSavePtr save,
Vratio = (float)yres/(float)radeon_output->PanelYRes;
}
- if (Hratio == 1.0 || !(mode->Flags & RADEON_USE_RMX)) {
+ if (Hratio == 1.0 || !(radeon_output->Flags & RADEON_USE_RMX)) {
save->fp_horz_stretch |= ((xres/8-1)<<16);
} else {
save->fp_horz_stretch |= ((((unsigned long)
@@ -1053,7 +1054,7 @@ RADEONInitRMXRegisters(xf86OutputPtr output, RADEONSavePtr save,
((radeon_output->PanelXRes/8-1)<<16));
}
- if (Vratio == 1.0 || !(mode->Flags & RADEON_USE_RMX)) {
+ if (Vratio == 1.0 || !(radeon_output->Flags & RADEON_USE_RMX)) {
save->fp_vert_stretch |= ((yres-1)<<12);
} else {
save->fp_vert_stretch |= ((((unsigned long)(Vratio * RADEON_VERT_STRETCH_RATIO_MAX)) &
@@ -1235,14 +1236,18 @@ legacy_output_mode_set(xf86OutputPtr output, DisplayModePtr mode,
CARD32 fp2_gen_cntl;
atombios_external_tmds_setup(output, mode);
- /* r4xx atom seems to have hard coded crtc mappings in the atom code
+ /* r4xx atom has hard coded crtc mappings in the atom code
* Fix it up here.
*/
fp2_gen_cntl = INREG(RADEON_FP2_GEN_CNTL) & ~R200_FP2_SOURCE_SEL_MASK;
if (radeon_crtc->crtc_id == 1)
fp2_gen_cntl |= R200_FP2_SOURCE_SEL_CRTC2;
- else
- fp2_gen_cntl |= R200_FP2_SOURCE_SEL_CRTC1;
+ else {
+ if (radeon_output->Flags & RADEON_USE_RMX)
+ fp2_gen_cntl |= R200_FP2_SOURCE_SEL_RMX;
+ else
+ fp2_gen_cntl |= R200_FP2_SOURCE_SEL_CRTC1;
+ }
OUTREG(RADEON_FP2_GEN_CNTL, fp2_gen_cntl);
} else {
RADEONRestoreDVOChip(pScrn, output);
commit 495e3119250ffb48489debbaabe560d23753cc43
Author: Alex Deucher <alex at samba.(none)>
Date: Thu Jan 17 14:56:19 2008 -0500
AVIVO: Add support for RMX
Both centered and expansion modes are supported. Select
using output attributes.
diff --git a/src/atombios_crtc.c b/src/atombios_crtc.c
index 4941e60..bc2df18 100644
--- a/src/atombios_crtc.c
+++ b/src/atombios_crtc.c
@@ -31,7 +31,7 @@
*
*/
/*
- * avivo crtc handling functions.
+ * avivo crtc handling functions.
*/
#ifdef HAVE_CONFIG_H
#include "config.h"
@@ -65,12 +65,12 @@ atombios_enable_crtc(atomBiosHandlePtr atomBIOS, int crtc, int state)
data.exec.index = GetIndexIntoMasterTable(COMMAND, EnableCRTC);
data.exec.dataSpace = (void *)&space;
data.exec.pspace = &crtc_data;
-
+
if (RHDAtomBiosFunc(atomBIOS->scrnIndex, atomBIOS, ATOMBIOS_EXEC, &data) == ATOM_SUCCESS) {
ErrorF("%s CRTC %d success\n", state? "Enable":"Disable", crtc);
return ATOM_SUCCESS ;
}
-
+
ErrorF("Enable CRTC failed\n");
return ATOM_NOT_IMPLEMENTED;
}
@@ -89,12 +89,12 @@ atombios_blank_crtc(atomBiosHandlePtr atomBIOS, int crtc, int state)
data.exec.index = offsetof(ATOM_MASTER_LIST_OF_COMMAND_TABLES, BlankCRTC) / sizeof(unsigned short);
data.exec.dataSpace = (void *)&space;
data.exec.pspace = &crtc_data;
-
+
if (RHDAtomBiosFunc(atomBIOS->scrnIndex, atomBIOS, ATOMBIOS_EXEC, &data) == ATOM_SUCCESS) {
ErrorF("%s CRTC %d success\n", state? "Blank":"Unblank", crtc);
return ATOM_SUCCESS ;
}
-
+
ErrorF("Blank CRTC failed\n");
return ATOM_NOT_IMPLEMENTED;
}
@@ -107,7 +107,7 @@ atombios_crtc_enable(xf86CrtcPtr crtc, int enable)
RADEONInfoPtr info = RADEONPTR(crtc->scrn);
atombios_enable_crtc(info->atomBIOS, radeon_crtc->crtc_id, enable);
-
+
//TODOavivo_wait_idle(avivo);
}
#endif
@@ -123,11 +123,11 @@ atombios_crtc_dpms(xf86CrtcPtr crtc, int mode)
case DPMSModeSuspend:
atombios_enable_crtc(info->atomBIOS, radeon_crtc->crtc_id, 1);
atombios_blank_crtc(info->atomBIOS, radeon_crtc->crtc_id, 0);
- break;
+ break;
case DPMSModeOff:
atombios_blank_crtc(info->atomBIOS, radeon_crtc->crtc_id, 1);
atombios_enable_crtc(info->atomBIOS, radeon_crtc->crtc_id, 0);
- break;
+ break;
}
}
@@ -140,12 +140,12 @@ atombios_set_crtc_timing(atomBiosHandlePtr atomBIOS, SET_CRTC_TIMING_PARAMETERS_
data.exec.index = GetIndexIntoMasterTable(COMMAND, SetCRTC_Timing);
data.exec.dataSpace = (void *)&space;
data.exec.pspace = crtc_param;
-
+
if (RHDAtomBiosFunc(atomBIOS->scrnIndex, atomBIOS, ATOMBIOS_EXEC, &data) == ATOM_SUCCESS) {
ErrorF("Set CRTC Timing success\n");
return ATOM_SUCCESS ;
}
-
+
ErrorF("Set CRTC Timing failed\n");
return ATOM_NOT_IMPLEMENTED;
}
@@ -334,20 +334,20 @@ atombios_crtc_mode_set(xf86CrtcPtr crtc,
RADEONRestoreMemMapRegisters(pScrn, info->ModeReg);
if (IS_AVIVO_VARIANT) {
- radeon_crtc->fb_width = adjusted_mode->CrtcHDisplay;
+ radeon_crtc->fb_width = mode->CrtcHDisplay;
radeon_crtc->fb_height = pScrn->virtualY;
- radeon_crtc->fb_pitch = adjusted_mode->CrtcHDisplay;
+ radeon_crtc->fb_pitch = mode->CrtcHDisplay;
radeon_crtc->fb_length = radeon_crtc->fb_pitch * radeon_crtc->fb_height * 4;
switch (crtc->scrn->bitsPerPixel) {
case 15:
radeon_crtc->fb_format = AVIVO_D1GRPH_CONTROL_DEPTH_16BPP | AVIVO_D1GRPH_CONTROL_16BPP_ARGB1555;
break;
case 16:
- radeon_crtc->fb_format = AVIVO_D1GRPH_CONTROL_DEPTH_16BPP | AVIVO_D1GRPH_CONTROL_16BPP_RGB565;
+ radeon_crtc->fb_format = AVIVO_D1GRPH_CONTROL_DEPTH_16BPP | AVIVO_D1GRPH_CONTROL_16BPP_RGB565;
break;
case 24:
case 32:
- radeon_crtc->fb_format = AVIVO_D1GRPH_CONTROL_DEPTH_32BPP | AVIVO_D1GRPH_CONTROL_32BPP_ARGB8888;
+ radeon_crtc->fb_format = AVIVO_D1GRPH_CONTROL_DEPTH_32BPP | AVIVO_D1GRPH_CONTROL_32BPP_ARGB8888;
break;
default:
FatalError("Unsupported screen depth: %d\n", xf86GetDepth());
diff --git a/src/atombios_output.c b/src/atombios_output.c
index 68478a2..d6228df 100644
--- a/src/atombios_output.c
+++ b/src/atombios_output.c
@@ -28,7 +28,7 @@
*/
/*
- * avivo output handling functions.
+ * avivo output handling functions.
*/
#ifdef HAVE_CONFIG_H
#include "config.h"
@@ -192,12 +192,12 @@ atombios_output_tv1_setup(xf86OutputPtr output, DisplayModePtr mode)
data.exec.index = GetIndexIntoMasterTable(COMMAND, TVEncoderControl);
data.exec.dataSpace = (void *)&space;
data.exec.pspace = &disp_data;
-
+
if (RHDAtomBiosFunc(info->atomBIOS->scrnIndex, info->atomBIOS, ATOMBIOS_EXEC, &data) == ATOM_SUCCESS) {
ErrorF("Output TV1 setup success\n");
return ATOM_SUCCESS;
}
-
+
ErrorF("Output TV1 setup failed\n");
return ATOM_NOT_IMPLEMENTED;
@@ -224,12 +224,12 @@ atombios_external_tmds_setup(xf86OutputPtr output, DisplayModePtr mode)
data.exec.index = GetIndexIntoMasterTable(COMMAND, DVOEncoderControl);
data.exec.dataSpace = (void *)&space;
data.exec.pspace = &disp_data;
-
+
if (RHDAtomBiosFunc(info->atomBIOS->scrnIndex, info->atomBIOS, ATOMBIOS_EXEC, &data) == ATOM_SUCCESS) {
ErrorF("External TMDS setup success\n");
return ATOM_SUCCESS;
}
-
+
ErrorF("External TMDS setup failed\n");
return ATOM_NOT_IMPLEMENTED;
}
@@ -251,12 +251,12 @@ atombios_output_tmds1_setup(xf86OutputPtr output, DisplayModePtr mode)
data.exec.index = GetIndexIntoMasterTable(COMMAND, TMDS1EncoderControl);
data.exec.dataSpace = (void *)&space;
data.exec.pspace = &disp_data;
-
+
if (RHDAtomBiosFunc(info->atomBIOS->scrnIndex, info->atomBIOS, ATOMBIOS_EXEC, &data) == ATOM_SUCCESS) {
ErrorF("Output TMDS1 setup success\n");
return ATOM_SUCCESS;
}
-
+
ErrorF("Output TMDS1 setup failed\n");
return ATOM_NOT_IMPLEMENTED;
@@ -279,12 +279,12 @@ atombios_output_tmds2_setup(xf86OutputPtr output, DisplayModePtr mode)
data.exec.index = GetIndexIntoMasterTable(COMMAND, TMDS2EncoderControl);
data.exec.dataSpace = (void *)&space;
data.exec.pspace = &disp_data;
-
+
if (RHDAtomBiosFunc(info->atomBIOS->scrnIndex, info->atomBIOS, ATOMBIOS_EXEC, &data) == ATOM_SUCCESS) {
ErrorF("Output TMDS2 setup success\n");
return ATOM_SUCCESS;
}
-
+
ErrorF("Output TMDS2 setup failed\n");
return ATOM_NOT_IMPLEMENTED;
}
@@ -306,12 +306,12 @@ atombios_output_lvds_setup(xf86OutputPtr output, DisplayModePtr mode)
data.exec.index = GetIndexIntoMasterTable(COMMAND, LVDSEncoderControl);
data.exec.dataSpace = (void *)&space;
data.exec.pspace = &disp_data;
-
+
if (RHDAtomBiosFunc(info->atomBIOS->scrnIndex, info->atomBIOS, ATOMBIOS_EXEC, &data) == ATOM_SUCCESS) {
ErrorF("Output LVDS setup success\n");
return ATOM_SUCCESS;
}
-
+
ErrorF("Output LVDS setup failed\n");
return ATOM_NOT_IMPLEMENTED;
}
@@ -328,7 +328,7 @@ atombios_output_scaler_setup(xf86OutputPtr output, DisplayModePtr mode)
disp_data.ucScaler = radeon_crtc->crtc_id;
- if (mode->Flags & RADEON_USE_RMX) {
+ if (radeon_output->Flags & RADEON_USE_RMX) {
ErrorF("Using RMX\n");
if (radeon_output->rmx_type == RMX_FULL ||
radeon_output->rmx_type == RMX_ASPECT)
diff --git a/src/radeon_output.c b/src/radeon_output.c
index be28110..c807bfa 100644
--- a/src/radeon_output.c
+++ b/src/radeon_output.c
@@ -199,7 +199,7 @@ void RADEONPrintPortMap(ScrnInfoPtr pScrn)
output = xf86_config->output[o];
radeon_output = output->driver_private;
- xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"Port%d:\n Monitor -- %s\n Connector -- %s\n DAC Type -- %s\n TMDS Type -- %s\n DDC Type -- 0x%x\n",
o,
MonTypeName[radeon_output->MonType+1],
@@ -568,33 +568,54 @@ radeon_mode_fixup(xf86OutputPtr output, DisplayModePtr mode,
if (IS_AVIVO_VARIANT || radeon_crtc->crtc_id == 0) {
if (mode->HDisplay < radeon_output->PanelXRes ||
- mode->VDisplay < radeon_output->PanelYRes)
+ mode->VDisplay < radeon_output->PanelYRes) {
radeon_output->Flags |= RADEON_USE_RMX;
+ if (IS_AVIVO_VARIANT) {
+ /* set to the panel's native mode */
+ adjusted_mode->HDisplay = radeon_output->PanelXRes;
+ adjusted_mode->HDisplay = radeon_output->PanelYRes;
+ adjusted_mode->HTotal = radeon_output->PanelXRes + radeon_output->HBlank;
+ adjusted_mode->HSyncStart = radeon_output->PanelXRes + radeon_output->HOverPlus;
+ adjusted_mode->HSyncEnd = adjusted_mode->HSyncStart + radeon_output->HSyncWidth;
+ adjusted_mode->VTotal = radeon_output->PanelYRes + radeon_output->VBlank;
+ adjusted_mode->VSyncStart = radeon_output->PanelYRes + radeon_output->VOverPlus;
+ adjusted_mode->VSyncEnd = adjusted_mode->VSyncStart + radeon_output->VSyncWidth;
+ /* update crtc values */
+ xf86SetModeCrtc(adjusted_mode, INTERLACE_HALVE_V);
+ /* adjust crtc values */
+ adjusted_mode->CrtcHDisplay = radeon_output->PanelXRes;
+ adjusted_mode->CrtcVDisplay = radeon_output->PanelYRes;
+ adjusted_mode->CrtcHTotal = adjusted_mode->CrtcHDisplay + radeon_output->HBlank;
+ adjusted_mode->CrtcHSyncStart = adjusted_mode->CrtcHDisplay + radeon_output->HOverPlus;
+ adjusted_mode->CrtcHSyncEnd = adjusted_mode->CrtcHSyncStart + radeon_output->HSyncWidth;
+ adjusted_mode->CrtcVTotal = adjusted_mode->CrtcVDisplay + radeon_output->VBlank;
+ adjusted_mode->CrtcVSyncStart = adjusted_mode->CrtcVDisplay + radeon_output->VOverPlus;
+ adjusted_mode->CrtcVSyncEnd = adjusted_mode->CrtcVSyncStart + radeon_output->VSyncWidth;
+ } else {
+ /* set to the panel's native mode */
+ adjusted_mode->HTotal = radeon_output->PanelXRes + radeon_output->HBlank;
+ adjusted_mode->HSyncStart = radeon_output->PanelXRes + radeon_output->HOverPlus;
+ adjusted_mode->HSyncEnd = adjusted_mode->HSyncStart + radeon_output->HSyncWidth;
+ adjusted_mode->VTotal = radeon_output->PanelYRes + radeon_output->VBlank;
+ adjusted_mode->VSyncStart = radeon_output->PanelYRes + radeon_output->VOverPlus;
+ adjusted_mode->VSyncEnd = adjusted_mode->VSyncStart + radeon_output->VSyncWidth;
+ adjusted_mode->Clock = radeon_output->DotClock;
+ /* update crtc values */
+ xf86SetModeCrtc(adjusted_mode, INTERLACE_HALVE_V);
+ /* adjust crtc values */
+ adjusted_mode->CrtcHTotal = adjusted_mode->CrtcHDisplay + radeon_output->HBlank;
+ adjusted_mode->CrtcHSyncStart = adjusted_mode->CrtcHDisplay + radeon_output->HOverPlus;
+ adjusted_mode->CrtcHSyncEnd = adjusted_mode->CrtcHSyncStart + radeon_output->HSyncWidth;
+ adjusted_mode->CrtcVTotal = adjusted_mode->CrtcVDisplay + radeon_output->VBlank;
+ adjusted_mode->CrtcVSyncStart = adjusted_mode->CrtcVDisplay + radeon_output->VOverPlus;
+ adjusted_mode->CrtcVSyncEnd = adjusted_mode->CrtcVSyncStart + radeon_output->VSyncWidth;
+ }
+ adjusted_mode->Clock = radeon_output->DotClock;
+ adjusted_mode->Flags = radeon_output->Flags;
+ }
}
}
- /* update timing for LVDS and DFP if RMX is active */
- if (radeon_output->Flags & RADEON_USE_RMX) {
- /* set to the panel's native mode */
- adjusted_mode->HTotal = radeon_output->PanelXRes + radeon_output->HBlank;
- adjusted_mode->HSyncStart = radeon_output->PanelXRes + radeon_output->HOverPlus;
- adjusted_mode->HSyncEnd = adjusted_mode->HSyncStart + radeon_output->HSyncWidth;
- adjusted_mode->VTotal = radeon_output->PanelYRes + radeon_output->VBlank;
- adjusted_mode->VSyncStart = radeon_output->PanelYRes + radeon_output->VOverPlus;
- adjusted_mode->VSyncEnd = adjusted_mode->VSyncStart + radeon_output->VSyncWidth;
- /* update crtc values */
- xf86SetModeCrtc(adjusted_mode, INTERLACE_HALVE_V);
- /* adjust crtc values */
- adjusted_mode->CrtcHTotal = adjusted_mode->CrtcHDisplay + radeon_output->HBlank;
- adjusted_mode->CrtcHSyncStart = adjusted_mode->CrtcHDisplay + radeon_output->HOverPlus;
- adjusted_mode->CrtcHSyncEnd = adjusted_mode->CrtcHSyncStart + radeon_output->HSyncWidth;
- adjusted_mode->CrtcVTotal = adjusted_mode->CrtcVDisplay + radeon_output->VBlank;
- adjusted_mode->CrtcVSyncStart = adjusted_mode->CrtcVDisplay + radeon_output->VOverPlus;
- adjusted_mode->CrtcVSyncEnd = adjusted_mode->CrtcVSyncStart + radeon_output->VSyncWidth;
- adjusted_mode->Clock = radeon_output->DotClock;
- adjusted_mode->Flags = radeon_output->Flags;
- }
-
return TRUE;
}
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