xf86-video-intel: Branch 'xf86-video-intel-2.2-branch' - 15 commits - configure.ac .gitignore man/intel.man src/i830_3d.c src/i830_crt.c src/i830_driver.c src/i830.h src/i830_lvds.c src/i830_quirks.c src/i830_sdvo.c src/i830_tv.c src/i830_video.c src/ivch/ivch.c
Jesse Barnes
jbarnes at kemper.freedesktop.org
Thu Jan 3 09:54:27 PST 2008
.gitignore | 1
configure.ac | 1
man/intel.man | 80 +++++++++++++++++++++++++-------
src/i830.h | 18 +++----
src/i830_3d.c | 135 ++++++++++++++++++++++++++++++++++++++++++++++++++----
src/i830_crt.c | 42 +++++++++-------
src/i830_driver.c | 97 +++++++++++++++++++++++++++-----------
src/i830_lvds.c | 38 +++++++--------
src/i830_quirks.c | 11 ++--
src/i830_sdvo.c | 4 -
src/i830_tv.c | 2
src/i830_video.c | 2
src/ivch/ivch.c | 1
13 files changed, 322 insertions(+), 110 deletions(-)
New commits:
commit 83d304c61ad5fdc58b0a9309dbd1e5a3f6cd9b01
Author: Nanhai Zou <nanhai.zou at intel.com>
Date: Wed Jan 2 10:50:44 2008 +0800
TV: fix 576p refresh rate
diff --git a/src/i830_tv.c b/src/i830_tv.c
index 14f4089..9add367 100644
--- a/src/i830_tv.c
+++ b/src/i830_tv.c
@@ -580,7 +580,7 @@ const static tv_mode_t tv_modes[] = {
{
.name = "576p",
.clock = 107520,
- .refresh = 59.94,
+ .refresh = 50.0,
.oversample = TV_OVERSAMPLE_4X,
.component_only = 1,
commit 96246c27cb836bae8ee02c46c68a1f2102efd14b
Author: Joakim <elupus at ecce.se>
Date: Thu Dec 27 17:09:02 2007 +0800
Aopen Minipc 965GM LVDS quirk
diff --git a/src/i830_quirks.c b/src/i830_quirks.c
index 87d9a8a..323962c 100644
--- a/src/i830_quirks.c
+++ b/src/i830_quirks.c
@@ -58,28 +58,29 @@ static void quirk_mac_mini (I830Ptr pI830)
static i830_quirk i830_quirk_list[] = {
/* Aopen mini pc */
{ PCI_CHIP_I945_GM, 0xa0a0, SUBSYS_ANY, quirk_ignore_lvds },
+ { PCI_CHIP_I965_GM, 0xa0a0, SUBSYS_ANY, quirk_ignore_lvds },
{ PCI_CHIP_I965_GM, 0x8086, 0x1999, quirk_ignore_lvds },
/* Apple Mac mini has no lvds, but macbook pro does */
{ PCI_CHIP_I945_GM, 0x8086, 0x7270, quirk_mac_mini },
-
+
/* Dell Latitude X1 */
{ PCI_CHIP_I915_GM, 0x1028, 0x01a3, quirk_ignore_tv },
/* Dell XPS 1330 */
{ PCI_CHIP_I965_GM, 0x1028, 0x0209, quirk_ignore_tv },
-
+
/* Lenovo X60s has no TV output */
{ PCI_CHIP_I945_GM, 0x17aa, 0x201a, quirk_ignore_tv },
/* Lenovo T61 has no TV output */
{ PCI_CHIP_I965_GM, 0x17aa, 0x20b5, quirk_ignore_tv },
/* Lenovo 3000 v200 */
{ PCI_CHIP_I965_GM, 0x17aa, 0x3c18, quirk_ignore_tv },
-
+
/* Panasonic Toughbook CF-Y4 has no TV output */
{ PCI_CHIP_I915_GM, 0x10f7, 0x8338, quirk_ignore_tv },
/* Panasonic Toughbook CF-Y7 has no TV output */
{ PCI_CHIP_I965_GM, 0x10f7, 0x8338, quirk_ignore_tv },
-
+
/* Toshiba Satellite U300 has no TV output */
{ PCI_CHIP_I965_GM, 0x1179, 0xff50, quirk_ignore_tv },
commit f69b48fe24ef94dac44b8123884ca71df675be4b
Author: Jesse Barnes <jbarnes at hobbes.virtuousgeek.org>
Date: Tue Dec 18 18:10:33 2007 -0800
Unconditionally restore pipe configuration
This is a partial fix for #13196, which covers both leaving pipes disabled at
server exit time and problems with restoring the pipe configuration on certain
chipsets. It restores the pipe configuration unconditionally (previously we
made sure the PLL was running and we weren't in VGA mode) but also adds some
additional PLL settle time to the PLL register write paths.
diff --git a/src/i830_driver.c b/src/i830_driver.c
index 7818ee4..ca4544d 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -1991,6 +1991,13 @@ SaveHWState(ScrnInfoPtr pScrn)
return TRUE;
}
+/* Wait for the PLL to settle down after programming */
+static void
+i830_dpll_settle(void)
+{
+ usleep(10000); /* 10 ms *should* be plenty */
+}
+
static Bool
RestoreHWState(ScrnInfoPtr pScrn)
{
@@ -2025,6 +2032,23 @@ RestoreHWState(ScrnInfoPtr pScrn)
if (!IS_I830(pI830) && !IS_845G(pI830))
OUTREG(PFIT_CONTROL, pI830->savePFIT_CONTROL);
+ /*
+ * Pipe regs
+ * To restore the saved state, we first need to program the PLL regs,
+ * followed by the pipe configuration and finally the display plane
+ * configuration. The VGA registers can program one, both or neither
+ * of the PLL regs, depending on their VGA_MOD_DIS bit value.
+ */
+
+ /*
+ * Since either or both pipes may use the VGA clocks, make sure the
+ * regs are valid.
+ */
+ OUTREG(VCLK_DIVISOR_VGA0, pI830->saveVCLK_DIVISOR_VGA0);
+ OUTREG(VCLK_DIVISOR_VGA1, pI830->saveVCLK_DIVISOR_VGA1);
+ OUTREG(VCLK_POST_DIV, pI830->saveVCLK_POST_DIV);
+
+ /* If the pipe A PLL is active, we can restore the pipe & plane config */
if (pI830->saveDPLL_A & DPLL_VCO_ENABLE)
{
OUTREG(DPLL_A, pI830->saveDPLL_A & ~DPLL_VCO_ENABLE);
@@ -2033,13 +2057,14 @@ RestoreHWState(ScrnInfoPtr pScrn)
OUTREG(FPA0, pI830->saveFPA0);
OUTREG(FPA1, pI830->saveFPA1);
OUTREG(DPLL_A, pI830->saveDPLL_A);
- usleep(150);
+ i830_dpll_settle();
if (IS_I965G(pI830))
OUTREG(DPLL_A_MD, pI830->saveDPLL_A_MD);
else
OUTREG(DPLL_A, pI830->saveDPLL_A);
- usleep(150);
+ i830_dpll_settle();
+ /* Restore mode config */
OUTREG(HTOTAL_A, pI830->saveHTOTAL_A);
OUTREG(HBLANK_A, pI830->saveHBLANK_A);
OUTREG(HSYNC_A, pI830->saveHSYNC_A);
@@ -2058,20 +2083,31 @@ RestoreHWState(ScrnInfoPtr pScrn)
OUTREG(DSPASURF, pI830->saveDSPASURF);
OUTREG(DSPATILEOFF, pI830->saveDSPATILEOFF);
}
+
+ OUTREG(PIPEACONF, pI830->savePIPEACONF);
+ i830WaitForVblank(pScrn);
+
/*
- * Make sure the DPLL is active and not in VGA mode or the
- * write of PIPEnCONF may cause a crash
+ * Program Pipe A's plane
+ * The corresponding display plane may be disabled, and should only be
+ * enabled if pipe A is actually on (otherwise we have a bug in the initial
+ * state).
*/
- if ((pI830->saveDPLL_A & DPLL_VCO_ENABLE) &&
- (pI830->saveDPLL_A & DPLL_VGA_MODE_DIS))
- OUTREG(PIPEACONF, pI830->savePIPEACONF);
- i830WaitForVblank(pScrn);
- OUTREG(DSPACNTR, pI830->saveDSPACNTR);
- OUTREG(DSPABASE, INREG(DSPABASE));
- i830WaitForVblank(pScrn);
-
+ if (pI830->saveDSPACNTR & DISPPLANE_SEL_PIPE_A) {
+ OUTREG(DSPACNTR, pI830->saveDSPACNTR);
+ OUTREG(DSPABASE, INREG(DSPABASE));
+ i830WaitForVblank(pScrn);
+ }
+ if (pI830->saveDSPBCNTR & DISPPLANE_SEL_PIPE_A) {
+ OUTREG(DSPBCNTR, pI830->saveDSPBCNTR);
+ OUTREG(DSPBBASE, INREG(DSPBBASE));
+ i830WaitForVblank(pScrn);
+ }
+
+ /* See note about pipe programming above */
if(xf86_config->num_crtc == 2)
{
+ /* If the pipe B PLL is active, we can restore the pipe & plane config */
if (pI830->saveDPLL_B & DPLL_VCO_ENABLE)
{
OUTREG(DPLL_B, pI830->saveDPLL_B & ~DPLL_VCO_ENABLE);
@@ -2080,13 +2116,14 @@ RestoreHWState(ScrnInfoPtr pScrn)
OUTREG(FPB0, pI830->saveFPB0);
OUTREG(FPB1, pI830->saveFPB1);
OUTREG(DPLL_B, pI830->saveDPLL_B);
- usleep(150);
+ i830_dpll_settle();
if (IS_I965G(pI830))
OUTREG(DPLL_B_MD, pI830->saveDPLL_B_MD);
else
OUTREG(DPLL_B, pI830->saveDPLL_B);
- usleep(150);
+ i830_dpll_settle();
+ /* Restore mode config */
OUTREG(HTOTAL_B, pI830->saveHTOTAL_B);
OUTREG(HBLANK_B, pI830->saveHBLANK_B);
OUTREG(HSYNC_B, pI830->saveHSYNC_B);
@@ -2105,18 +2142,28 @@ RestoreHWState(ScrnInfoPtr pScrn)
OUTREG(DSPBTILEOFF, pI830->saveDSPBTILEOFF);
}
+ OUTREG(PIPEBCONF, pI830->savePIPEBCONF);
+ i830WaitForVblank(pScrn);
+
/*
- * See PIPEnCONF note above
+ * Program Pipe B's plane
+ * Note that pipe B may be disabled, and in that case, the plane
+ * should also be disabled or we must have had a bad initial state.
*/
- if ((pI830->saveDPLL_B & DPLL_VCO_ENABLE) &&
- (pI830->saveDPLL_B & DPLL_VGA_MODE_DIS))
- OUTREG(PIPEBCONF, pI830->savePIPEBCONF);
- i830WaitForVblank(pScrn);
- OUTREG(DSPBCNTR, pI830->saveDSPBCNTR);
- OUTREG(DSPBBASE, INREG(DSPBBASE));
- i830WaitForVblank(pScrn);
+ if (pI830->saveDSPACNTR & DISPPLANE_SEL_PIPE_B) {
+ OUTREG(DSPACNTR, pI830->saveDSPACNTR);
+ OUTREG(DSPABASE, INREG(DSPABASE));
+ i830WaitForVblank(pScrn);
+ }
+ if (pI830->saveDSPBCNTR & DISPPLANE_SEL_PIPE_B) {
+ OUTREG(DSPBCNTR, pI830->saveDSPBCNTR);
+ OUTREG(DSPBBASE, INREG(DSPBBASE));
+ i830WaitForVblank(pScrn);
+ }
}
+ OUTREG(VGACNTRL, pI830->saveVGACNTRL);
+
/* Restore outputs */
for (i = 0; i < xf86_config->num_output; i++) {
xf86OutputPtr output = xf86_config->output[i];
@@ -2124,12 +2171,6 @@ RestoreHWState(ScrnInfoPtr pScrn)
output->funcs->restore(output);
}
- OUTREG(VGACNTRL, pI830->saveVGACNTRL);
-
- OUTREG(VCLK_DIVISOR_VGA0, pI830->saveVCLK_DIVISOR_VGA0);
- OUTREG(VCLK_DIVISOR_VGA1, pI830->saveVCLK_DIVISOR_VGA1);
- OUTREG(VCLK_POST_DIV, pI830->saveVCLK_POST_DIV);
-
i830_restore_palette(pI830, PIPE_A);
i830_restore_palette(pI830, PIPE_B);
commit 4757a218d733af12d04674455fc6e1fad48a1cd0
Author: Michel Dänzer <michel at tungstengraphics.com>
Date: Tue Dec 18 19:37:46 2007 +0100
Always set pPriv->buf to NULL after freeing the memory it pointed to.
Fixes https://bugs.freedesktop.org/show_bug.cgi?id=13108 .
diff --git a/src/i830_video.c b/src/i830_video.c
index 5325bbd..9688aaa 100644
--- a/src/i830_video.c
+++ b/src/i830_video.c
@@ -2574,6 +2574,7 @@ I830VideoBlockHandler(int i, pointer blockData, pointer pTimeout,
*/
I830Sync(pScrn);
i830_free_memory(pScrn, pPriv->buf);
+ pPriv->buf = NULL;
pPriv->videoStatus = 0;
}
}
@@ -2686,6 +2687,7 @@ I830FreeSurface(XF86SurfacePtr surface)
/* Sync before freeing the buffer, because the pages will be unbound. */
I830Sync(pScrn);
i830_free_memory(surface->pScrn, pPriv->buf);
+ pPriv->buf = NULL;
xfree(surface->pitches);
xfree(surface->offsets);
xfree(surface->devPrivate.ptr);
commit 5cbb4110116f6d4187fd27660a78203caa1da46b
Author: Adam Jackson <ajax at redhat.com>
Date: Thu Dec 13 15:10:43 2007 -0500
i830_sdvo_mode_valid: Fix return values to match what we actually check.
diff --git a/src/i830_sdvo.c b/src/i830_sdvo.c
index 2767715..6b7037e 100644
--- a/src/i830_sdvo.c
+++ b/src/i830_sdvo.c
@@ -900,10 +900,10 @@ i830_sdvo_mode_valid(xf86OutputPtr output, DisplayModePtr pMode)
return MODE_NO_DBLESCAN;
if (dev_priv->pixel_clock_min > pMode->Clock)
- return MODE_CLOCK_HIGH;
+ return MODE_CLOCK_LOW;
if (dev_priv->pixel_clock_max < pMode->Clock)
- return MODE_CLOCK_LOW;
+ return MODE_CLOCK_HIGH;
return MODE_OK;
}
commit e03bc385e924222d3d5f3c9a8d65e1ef63b858dc
Author: Jesse Barnes <jbarnes at hobbes.virtuousgeek.org>
Date: Tue Dec 11 13:28:01 2007 -0800
Add cscope files to .gitignore
diff --git a/.gitignore b/.gitignore
index 410a074..998021b 100644
--- a/.gitignore
+++ b/.gitignore
@@ -25,3 +25,4 @@ missing
stamp-h1
i810.4
intel.4
+cscope.*
commit e720ae4476c3f986f623ce0f0ab9775b8b9b7e05
Author: Jesse Barnes <jbarnes at jbarnes-mobile.amr.corp.intel.com>
Date: Mon Dec 10 13:00:14 2007 -0800
CRT hotplug detection improvements
Patch from Hong Liu.
Fixup CRT detection by making sure the pipe is enabled before CRT
detection actually occurs. Fixes bugs Hong was seeing on G35 and other
machines.
diff --git a/src/i830_crt.c b/src/i830_crt.c
index d7762a0..cd71dc5 100644
--- a/src/i830_crt.c
+++ b/src/i830_crt.c
@@ -349,34 +349,38 @@ i830_crt_detect(xf86OutputPtr output)
I830Ptr pI830 = I830PTR(pScrn);
xf86CrtcPtr crtc;
int dpms_mode;
-
+ xf86OutputStatus status;
+ Bool connected;
+
+ crtc = i830GetLoadDetectPipe (output, NULL, &dpms_mode);
+ if (!crtc)
+ return XF86OutputStatusUnknown;
+
if (IS_I945G(pI830) || IS_I945GM(pI830) || IS_I965G(pI830) ||
IS_G33CLASS(pI830)) {
if (i830_crt_detect_hotplug(output))
- return XF86OutputStatusConnected;
+ status = XF86OutputStatusConnected;
else
- return XF86OutputStatusDisconnected;
+ status = XF86OutputStatusDisconnected;
+
+ goto out;
}
- if (i830_crt_detect_ddc(output))
- return XF86OutputStatusConnected;
+ if (i830_crt_detect_ddc(output)) {
+ status = XF86OutputStatusConnected;
+ goto out;
+ }
/* Use the load-detect method if we have no other way of telling. */
- crtc = i830GetLoadDetectPipe (output, NULL, &dpms_mode);
-
- if (crtc)
- {
- Bool connected;
-
- connected = i830_crt_detect_load (crtc, output);
- i830ReleaseLoadDetectPipe (output, dpms_mode);
- if (connected)
- return XF86OutputStatusConnected;
- else
- return XF86OutputStatusDisconnected;
- }
+ connected = i830_crt_detect_load (crtc, output);
+ if (connected)
+ status = XF86OutputStatusConnected;
+ else
+ status = XF86OutputStatusDisconnected;
- return XF86OutputStatusUnknown;
+out:
+ i830ReleaseLoadDetectPipe (output, dpms_mode);
+ return status;
}
static void
commit d9df93578b74785c08ba860b4c9aa23b0c89c91c
Author: Dave Airlie <airlied at linux.ie>
Date: Mon Dec 10 16:41:24 2007 +1000
ivch: fails on address mismatch as I seem to get this on my 865 system
diff --git a/src/ivch/ivch.c b/src/ivch/ivch.c
index ac57ff3..eb5dc21 100644
--- a/src/ivch/ivch.c
+++ b/src/ivch/ivch.c
@@ -188,6 +188,7 @@ ivch_init(I2CBusPtr b, I2CSlaveAddr addr)
"ivch detect failed due to address mismatch "
"(%d vs %d)\n",
(temp & VR00_BASE_ADDRESS_MASK), priv->d.SlaveAddr >> 1);
+ goto out;
}
if (!xf86I2CDevInit(&priv->d)) {
commit cd6f83519c69f72f146fea59afbd6a3542da783a
Author: Zhenyu Wang <zhenyu.z.wang at intel.com>
Date: Mon Dec 10 05:49:58 2007 +0800
Fix tv quirk for Dell Latitude X1
which is actually 915GM, reported by
Andreas Schildbach <andreas at schildbach.de>
diff --git a/src/i830_quirks.c b/src/i830_quirks.c
index 1ed6503..87d9a8a 100644
--- a/src/i830_quirks.c
+++ b/src/i830_quirks.c
@@ -64,7 +64,7 @@ static i830_quirk i830_quirk_list[] = {
{ PCI_CHIP_I945_GM, 0x8086, 0x7270, quirk_mac_mini },
/* Dell Latitude X1 */
- { PCI_CHIP_I945_GM, 0x1028, 0x01a3, quirk_ignore_tv },
+ { PCI_CHIP_I915_GM, 0x1028, 0x01a3, quirk_ignore_tv },
/* Dell XPS 1330 */
{ PCI_CHIP_I965_GM, 0x1028, 0x0209, quirk_ignore_tv },
commit 13ec9c8141a9f794258869a04a6bab59dac5eefa
Author: Zhenyu Wang <zhenyu.z.wang at intel.com>
Date: Sun Dec 9 00:52:13 2007 +0800
exa: fix rendering issue on some 855GM laptops
This trys to initialize more 3d states on i830 like mesa
code, which fixes exa rendering failure for some 855GM users.
diff --git a/src/i830_3d.c b/src/i830_3d.c
index 563dcef..45e02c4 100644
--- a/src/i830_3d.c
+++ b/src/i830_3d.c
@@ -38,7 +38,7 @@ void I830EmitInvarientState( ScrnInfoPtr pScrn )
{
I830Ptr pI830 = I830PTR(pScrn);
- BEGIN_LP_RING(40);
+ BEGIN_LP_RING(58);
OUT_RING(_3DSTATE_MAP_CUBE | MAP_UNIT(0));
OUT_RING(_3DSTATE_MAP_CUBE | MAP_UNIT(1));
@@ -62,7 +62,6 @@ void I830EmitInvarientState( ScrnInfoPtr pScrn )
OUT_RING(0);
OUT_RING(0);
-
OUT_RING(_3DSTATE_MAP_TEX_STREAM_CMD |
MAP_UNIT(0) |
DISABLE_TEX_STREAM_BUMP |
@@ -97,12 +96,6 @@ void I830EmitInvarientState( ScrnInfoPtr pScrn )
OUT_RING(_3DSTATE_MAP_COORD_TRANSFORM);
OUT_RING(DISABLE_TEX_TRANSFORM | TEXTURE_SET(3));
- OUT_RING(_3DSTATE_MAP_COORD_SETBIND_CMD);
- OUT_RING(TEXBIND_SET3(TEXCOORDSRC_VTXSET_3) |
- TEXBIND_SET2(TEXCOORDSRC_VTXSET_2) |
- TEXBIND_SET1(TEXCOORDSRC_VTXSET_1) |
- TEXBIND_SET0(TEXCOORDSRC_VTXSET_0));
-
OUT_RING(_3DSTATE_RASTER_RULES_CMD |
ENABLE_POINT_RASTER_RULE |
OGL_POINT_RASTER_RULE |
@@ -127,9 +120,133 @@ void I830EmitInvarientState( ScrnInfoPtr pScrn )
OUT_RING(MAGIC_W_STATE_DWORD1);
OUT_RING(0x3f800000 /* 1.0 in IEEE float */ );
-
OUT_RING(_3DSTATE_COLOR_FACTOR_CMD);
OUT_RING(0x80808080); /* .5 required in alpha for GL_DOT3_RGBA_EXT */
+ OUT_RING(_3DSTATE_MAP_COORD_SETBIND_CMD);
+ OUT_RING(TEXBIND_SET3(TEXCOORDSRC_VTXSET_3) |
+ TEXBIND_SET2(TEXCOORDSRC_VTXSET_2) |
+ TEXBIND_SET1(TEXCOORDSRC_VTXSET_1) |
+ TEXBIND_SET0(TEXCOORDSRC_VTXSET_0));
+
+ /* copy from mesa */
+ OUT_RING(_3DSTATE_INDPT_ALPHA_BLEND_CMD |
+ DISABLE_INDPT_ALPHA_BLEND |
+ ENABLE_ALPHA_BLENDFUNC |
+ ABLENDFUNC_ADD);
+
+ OUT_RING(_3DSTATE_FOG_COLOR_CMD |
+ FOG_COLOR_RED(0) |
+ FOG_COLOR_GREEN(0) |
+ FOG_COLOR_BLUE(0));
+
+ OUT_RING(_3DSTATE_CONST_BLEND_COLOR_CMD);
+ OUT_RING(0);
+
+ OUT_RING(_3DSTATE_MODES_1_CMD |
+ ENABLE_COLR_BLND_FUNC |
+ BLENDFUNC_ADD |
+ ENABLE_SRC_BLND_FACTOR |
+ SRC_BLND_FACT(BLENDFACTOR_ONE) |
+ ENABLE_DST_BLND_FACTOR |
+ DST_BLND_FACT(BLENDFACTOR_ZERO));
+ OUT_RING(_3DSTATE_MODES_2_CMD |
+ ENABLE_GLOBAL_DEPTH_BIAS |
+ GLOBAL_DEPTH_BIAS(0) |
+ ENABLE_ALPHA_TEST_FUNC|
+ ALPHA_TEST_FUNC(0) | /* always */
+ ALPHA_REF_VALUE(0));
+ OUT_RING(_3DSTATE_MODES_3_CMD |
+ ENABLE_DEPTH_TEST_FUNC |
+ DEPTH_TEST_FUNC(0x2) | /* COMPAREFUNC_LESS */
+ ENABLE_ALPHA_SHADE_MODE |
+ ALPHA_SHADE_MODE(SHADE_MODE_LINEAR)
+ | ENABLE_FOG_SHADE_MODE |
+ FOG_SHADE_MODE(SHADE_MODE_LINEAR) |
+ ENABLE_SPEC_SHADE_MODE |
+ SPEC_SHADE_MODE(SHADE_MODE_LINEAR) |
+ ENABLE_COLOR_SHADE_MODE |
+ COLOR_SHADE_MODE(SHADE_MODE_LINEAR)
+ | ENABLE_CULL_MODE | CULLMODE_NONE);
+
+ OUT_RING(_3DSTATE_MODES_4_CMD |
+ ENABLE_LOGIC_OP_FUNC |
+ LOGIC_OP_FUNC(LOGICOP_COPY) |
+ ENABLE_STENCIL_TEST_MASK |
+ STENCIL_TEST_MASK(0xff) |
+ ENABLE_STENCIL_WRITE_MASK |
+ STENCIL_WRITE_MASK(0xff));
+
+ OUT_RING(_3DSTATE_STENCIL_TEST_CMD |
+ ENABLE_STENCIL_PARMS |
+ STENCIL_FAIL_OP(0) | /* STENCILOP_KEEP */
+ STENCIL_PASS_DEPTH_FAIL_OP(0) | /* STENCILOP_KEEP */
+ STENCIL_PASS_DEPTH_PASS_OP(0) | /* STENCILOP_KEEP */
+ ENABLE_STENCIL_TEST_FUNC |
+ STENCIL_TEST_FUNC(0) | /* COMPAREFUNC_ALWAYS */
+ ENABLE_STENCIL_REF_VALUE |
+ STENCIL_REF_VALUE(0));
+
+ OUT_RING(_3DSTATE_MODES_5_CMD |
+ FLUSH_TEXTURE_CACHE |
+ ENABLE_SPRITE_POINT_TEX |
+ SPRITE_POINT_TEX_OFF |
+ ENABLE_FIXED_LINE_WIDTH |
+ FIXED_LINE_WIDTH(0x2) | /* 1.0 */
+ ENABLE_FIXED_POINT_WIDTH |
+ FIXED_POINT_WIDTH(1));
+
+ OUT_RING(_3DSTATE_ENABLES_1_CMD |
+ DISABLE_LOGIC_OP |
+ DISABLE_STENCIL_TEST |
+ DISABLE_DEPTH_BIAS |
+ DISABLE_SPEC_ADD |
+ DISABLE_FOG |
+ DISABLE_ALPHA_TEST |
+ ENABLE_COLOR_BLEND |
+ DISABLE_DEPTH_TEST);
+ OUT_RING(_3DSTATE_ENABLES_2_CMD |
+ DISABLE_STENCIL_WRITE |
+ ENABLE_TEX_CACHE |
+ DISABLE_DITHER |
+ ENABLE_COLOR_MASK |
+ ENABLE_COLOR_WRITE |
+ DISABLE_DEPTH_WRITE);
+
+ OUT_RING(_3DSTATE_STIPPLE);
+
+ /* Set default blend state */
+ OUT_RING(_3DSTATE_MAP_BLEND_OP_CMD(0) |
+ TEXPIPE_COLOR |
+ ENABLE_TEXOUTPUT_WRT_SEL |
+ TEXOP_OUTPUT_CURRENT |
+ DISABLE_TEX_CNTRL_STAGE |
+ TEXOP_SCALE_1X |
+ TEXOP_MODIFY_PARMS |
+ TEXOP_LAST_STAGE | TEXBLENDOP_ARG1);
+ OUT_RING(_3DSTATE_MAP_BLEND_OP_CMD(0) |
+ TEXPIPE_ALPHA |
+ ENABLE_TEXOUTPUT_WRT_SEL |
+ TEXOP_OUTPUT_CURRENT |
+ TEXOP_SCALE_1X |
+ TEXOP_MODIFY_PARMS | TEXBLENDOP_ARG1);
+ OUT_RING(_3DSTATE_MAP_BLEND_ARG_CMD(0) |
+ TEXPIPE_COLOR |
+ TEXBLEND_ARG1 |
+ TEXBLENDARG_MODIFY_PARMS |
+ TEXBLENDARG_DIFFUSE);
+ OUT_RING(_3DSTATE_MAP_BLEND_ARG_CMD(0) |
+ TEXPIPE_ALPHA |
+ TEXBLEND_ARG1 |
+ TEXBLENDARG_MODIFY_PARMS |
+ TEXBLENDARG_DIFFUSE);
+
+ OUT_RING(_3DSTATE_AA_CMD |
+ AA_LINE_ECAAR_WIDTH_ENABLE |
+ AA_LINE_ECAAR_WIDTH_1_0 |
+ AA_LINE_REGION_WIDTH_ENABLE |
+ AA_LINE_REGION_WIDTH_1_0 |
+ AA_LINE_DISABLE);
+
ADVANCE_LP_RING();
}
commit e2d9fd6425584119f28768d85c4b7d106ecf8742
Author: Jesse Barnes <jbarnes at hobbes.virtuousgeek.org>
Date: Fri Dec 7 16:30:46 2007 -0800
Describe output properties in more detail
Add descriptions for LVDS and TV output properties and also mention the EDID
property a new output configuration section.
diff --git a/man/intel.man b/man/intel.man
index 6245736..d46e3f9 100644
--- a/man/intel.man
+++ b/man/intel.man
@@ -176,31 +176,77 @@ Default: "EXA".
Enable printing of additional debugging information about modesetting to
the server log.
+.SH OUTPUT CONFIGURATION
+On 830M and better chipsets, the driver supports runtime configuration of
+detected outputs. You can use the
+.B xrandr
+tool to control outputs on the command line. Each output listed below may have
+one or more properties associated with it (like a binary EDID block if one is
+found). Some outputs have unique properties which are described below.
+
+.SS "VGA"
+VGA output port (typically exposed via an HD15 connector).
+
+.SS "LVDS"
+Low Voltage Differential Signalling output (typically a laptop LCD panel). Available properties:
+
.PP
-The 830M and newer driver supports the following outputs through RandR 1.2:
+.B BACKLIGHT
+- current backlight level (adjustable)
+.TP 2
+By adjusting the BACKLIGHT property, the brightness on the LVDS output can be adjusted. In some cases, this property may be unavailable (for example if your platform uses an external microcontroller to control the backlight).
+
.PP
-.TP
-.BI "VGA"
-Analog VGA output
-.TP
-.BI "LVDS"
-Laptop panel. Properties:
- BACKLIGHT - set backlight level
- BACKLIGHT_CONTROL - set backlight level control method (i.e. use kernel interfaces, native LVDS power register, legacy register, or combination)
-.TP
-.BI "TV"
-Integrated TV output
-.TP
-.BI "TMDS-1"
+.B BACKLIGHT_CONTROL
+- method used to control backlight
+.TP 2
+The driver will attempt to automatically detect the backlight control method for your platform. If this fails however, you can select another method which may allow you to control your backlight. Available methods include:
+.PP
+.B NATIVE
+.TP 4
+Intel chipsets include backlight control registers, which on some platforms may be wired to control the backlight directly. This method uses those registers.
+.PP
+.B LEGACY
+.TP 4
+The legacy backlight control registers exist in PCI configuration space, and have fewer available backlight levels than the native registers. However, some platforms are wired this way and so need to use this method.
+.PP
+.B COMBO
+.TP 4
+This method attempts to use the native registers where possible, resorting to the legacy, configuration space registers only to enable the backlight if needed. On platforms that have both wired this can be a good choice as it allows the fine grained backlight control of the native interface.
+.PP
+.B KERNEL
+.TP 4
+On some system, the kernel may provide a backlight control driver. In that case, using the kernel interfaces is preferable, as the same driver may respond to hotkey events or external APIs.
+
+.SS "TV"
+Integrated TV output. Available properties include:
+
+.PP
+.B BOTTOM, RIGHT, TOP, LEFT
+- margins
+.TP 2
+Adjusting these properties allows you to control the placement of your TV output buffer on the screen.
+
+.PP
+.B TV_FORMAT
+- output standard
+.TP 2
+This property allows you to control the output standard used on your TV output port. You can select between NTSC-M, NTSC-443, NTSC-J, PAL-M, PAL-N, and PAL.
+
+.SS "TMDS-1"
First DVI SDVO output
-.TP
-.BI "TMDS-2"
+
+.SS "TMDS-2"
Second DVI SDVO output
+
.PP
SDVO and DVO TV outputs are not supported by the driver at this time.
+
.PP
See __xconfigfile__(__filemansuffix__) for information on associating Monitor
-sections with these outputs for configuration.
+sections with these outputs for configuration. Associating Monitor sections
+with each output can be helpful if you need to ignore a specific output, for
+example, or statically configure an extended desktop monitor layout.
.SH "SEE ALSO"
__xservername__(__appmansuffix__), __xconfigfile__(__filemansuffix__), xorgconfig(__appmansuffix__), Xserver(__appmansuffix__), X(__miscmansuffix__)
commit 6f92200db39a790c95c1fac64baf0bd41a70e481
Author: Jesse Barnes <jbarnes at hobbes.virtuousgeek.org>
Date: Wed Dec 5 08:10:17 2007 -0800
Fix backlight setting save/restore
We need to save the current backlight value at LVDS init time, as well as when
we change the DPMS setting. Also, since 0 is a valid backlight value, don't
set the backlight value to maximum at startup if the value happens to be zero.
These fixes should make the backlight user experience much more consistent and
hopefully less frustrating.
diff --git a/src/i830_lvds.c b/src/i830_lvds.c
index 602a55d..c58a7e0 100644
--- a/src/i830_lvds.c
+++ b/src/i830_lvds.c
@@ -363,6 +363,12 @@ i830SetLVDSPanelPower(xf86OutputPtr output, Bool on)
dev_priv->set_backlight(output, dev_priv->backlight_duty_cycle);
} else {
+ /*
+ * Only save the current backlight value if we're going from
+ * on to off.
+ */
+ if (INREG(PP_CONTROL) & POWER_TARGET_ON)
+ dev_priv->backlight_duty_cycle = dev_priv->get_backlight(output);
dev_priv->set_backlight(output, 0);
OUTREG(PP_CONTROL, INREG(PP_CONTROL) & ~POWER_TARGET_ON);
@@ -399,12 +405,6 @@ i830_lvds_save (xf86OutputPtr output)
pI830->savePP_CYCLE = INREG(PP_CYCLE);
pI830->saveBLC_PWM_CTL = INREG(BLC_PWM_CTL);
dev_priv->backlight_duty_cycle = dev_priv->get_backlight(output);
-
- /*
- * If the light is off at server startup, just make it full brightness
- */
- if (dev_priv->backlight_duty_cycle == 0)
- dev_priv->backlight_duty_cycle = dev_priv->backlight_max;
}
static void
@@ -1015,7 +1015,7 @@ i830_lvds_init(ScrnInfoPtr pScrn)
break;
}
- dev_priv->backlight_duty_cycle = dev_priv->backlight_max;
+ dev_priv->backlight_duty_cycle = dev_priv->get_backlight(output);
return;
commit 4c1fa5235555c9ef3de1eebd006c4e91283362bf
Author: Jesse Barnes <jbarnes at hobbes.virtuousgeek.org>
Date: Tue Dec 4 18:27:24 2007 -0800
Add BCM_ to backlight control method enums
Avoids polluting the global namespace with such generic terms.
diff --git a/src/i830.h b/src/i830.h
index 2c1ac86..fe4d6c5 100644
--- a/src/i830.h
+++ b/src/i830.h
@@ -321,29 +321,29 @@ enum last_3d {
* so they can choose an ideal one for their platform (assuming our quirk
* code picks the wrong one).
*
- * Four different methods are available:
- * NATIVE: only ever touch the native backlight control registers
+ * Four different backlight control methods are available:
+ * BCM_NATIVE: only ever touch the native backlight control registers
* This method may be susceptible to problem (2) above if the firmware
* modifies the legacy registers.
- * LEGACY: only ever touch the legacy backlight control registers
+ * BCM_LEGACY: only ever touch the legacy backlight control registers
* This method may be susceptible to problem (1) above if the firmware
* also modifies the legacy registers.
- * COMBO: try to use both sets
+ * BCM_COMBO: try to use both sets
* In this case, the driver will try to modify both sets of registers
* if needed. To avoid problem (2) above it may set the LBB register
* to a non-zero value if the brightness is to be increased. It's still
* susceptible to problem (1), but to a lesser extent than the LEGACY only
* method.
- * KERNEL: use kernel methods for controlling the backlight
+ * BCM_KERNEL: use kernel methods for controlling the backlight
* This is only available on some platforms, but where present this can
* provide the best user experience.
*/
enum backlight_control {
- NATIVE = 0,
- LEGACY,
- COMBO,
- KERNEL,
+ BCM_NATIVE = 0,
+ BCM_LEGACY,
+ BCM_COMBO,
+ BCM_KERNEL,
};
typedef struct _I830Rec {
diff --git a/src/i830_lvds.c b/src/i830_lvds.c
index da1fc46..602a55d 100644
--- a/src/i830_lvds.c
+++ b/src/i830_lvds.c
@@ -109,18 +109,18 @@ i830_set_lvds_backlight_method(xf86OutputPtr output)
ScrnInfoPtr pScrn = output->scrn;
I830Ptr pI830 = I830PTR(pScrn);
CARD32 blc_pwm_ctl, blc_pwm_ctl2;
- enum backlight_control method = NATIVE; /* Default to native */
+ enum backlight_control method = BCM_NATIVE; /* Default to native */
if (i830_kernel_backlight_available(output)) {
- method = KERNEL;
+ method = BCM_KERNEL;
} else if (IS_I965GM(pI830)) {
blc_pwm_ctl2 = INREG(BLC_PWM_CTL2);
if (blc_pwm_ctl2 & BLM_LEGACY_MODE2)
- method = LEGACY;
+ method = BCM_LEGACY;
} else {
blc_pwm_ctl = INREG(BLC_PWM_CTL);
if (blc_pwm_ctl & BLM_LEGACY_MODE)
- method = LEGACY;
+ method = BCM_LEGACY;
}
pI830->backlight_control_method = method;
@@ -646,24 +646,24 @@ i830_lvds_set_backlight_control(xf86OutputPtr output)
struct i830_lvds_priv *dev_priv = intel_output->dev_priv;
switch (pI830->backlight_control_method) {
- case NATIVE:
+ case BCM_NATIVE:
dev_priv->set_backlight = i830_lvds_set_backlight_native;
dev_priv->get_backlight = i830_lvds_get_backlight_native;
dev_priv->backlight_max =
i830_lvds_get_backlight_max_native(output);
break;
- case LEGACY:
+ case BCM_LEGACY:
dev_priv->set_backlight = i830_lvds_set_backlight_legacy;
dev_priv->get_backlight = i830_lvds_get_backlight_legacy;
dev_priv->backlight_max = 0xff;
break;
- case COMBO:
+ case BCM_COMBO:
dev_priv->set_backlight = i830_lvds_set_backlight_combo;
dev_priv->get_backlight = i830_lvds_get_backlight_combo;
dev_priv->backlight_max =
i830_lvds_get_backlight_max_native(output);
break;
- case KERNEL:
+ case BCM_KERNEL:
dev_priv->set_backlight = i830_lvds_set_backlight_kernel;
dev_priv->get_backlight = i830_lvds_get_backlight_kernel;
dev_priv->backlight_max =
@@ -990,22 +990,22 @@ i830_lvds_init(ScrnInfoPtr pScrn)
i830_set_lvds_backlight_method(output);
switch (pI830->backlight_control_method) {
- case NATIVE:
+ case BCM_NATIVE:
dev_priv->set_backlight = i830_lvds_set_backlight_native;
dev_priv->get_backlight = i830_lvds_get_backlight_native;
dev_priv->backlight_max = i830_lvds_get_backlight_max_native(output);
break;
- case LEGACY:
+ case BCM_LEGACY:
dev_priv->set_backlight = i830_lvds_set_backlight_legacy;
dev_priv->get_backlight = i830_lvds_get_backlight_legacy;
dev_priv->backlight_max = 0xff;
break;
- case COMBO:
+ case BCM_COMBO:
dev_priv->set_backlight = i830_lvds_set_backlight_combo;
dev_priv->get_backlight = i830_lvds_get_backlight_combo;
dev_priv->backlight_max = i830_lvds_get_backlight_max_native(output);
break;
- case KERNEL:
+ case BCM_KERNEL:
dev_priv->set_backlight = i830_lvds_set_backlight_kernel;
dev_priv->get_backlight = i830_lvds_get_backlight_kernel;
dev_priv->backlight_max = i830_lvds_get_backlight_max_kernel(output);
commit 30d74f1b1f30e751d2c47aa63a4a2043e71467dc
Author: Jesse Barnes <jbarnes at hobbes.virtuousgeek.org>
Date: Tue Dec 4 18:23:44 2007 -0800
Use "LEGACY" backlight method if backlight control is such
This may regress the user experience a bit (fewer backlight levels) on machines
where both the LBB and native registers work, but it's better that it work for
everyone than work extra well for some and not at all for others.
diff --git a/src/i830_lvds.c b/src/i830_lvds.c
index a3a56f7..da1fc46 100644
--- a/src/i830_lvds.c
+++ b/src/i830_lvds.c
@@ -116,11 +116,11 @@ i830_set_lvds_backlight_method(xf86OutputPtr output)
} else if (IS_I965GM(pI830)) {
blc_pwm_ctl2 = INREG(BLC_PWM_CTL2);
if (blc_pwm_ctl2 & BLM_LEGACY_MODE2)
- method = COMBO;
+ method = LEGACY;
} else {
blc_pwm_ctl = INREG(BLC_PWM_CTL);
if (blc_pwm_ctl & BLM_LEGACY_MODE)
- method = COMBO;
+ method = LEGACY;
}
pI830->backlight_control_method = method;
commit 0e554e6dd4da56be24d2f971ff4cd4d585936724
Author: Eric Anholt <eric at anholt.net>
Date: Tue Dec 4 10:32:45 2007 -0800
Remove extra have_libpciaccess=no that broke tools build with old servers.
diff --git a/configure.ac b/configure.ac
index 20aebb4..334a1f4 100644
--- a/configure.ac
+++ b/configure.ac
@@ -121,7 +121,6 @@ else
have_libpciaccess=yes,
have_libpciaccess=no)
fi
-have_libpciaccess=no
AM_CONDITIONAL(XSERVER_LIBPCIACCESS, test "x$XSERVER_LIBPCIACCESS" = xyes)
AM_CONDITIONAL(LIBPCIACCESS,
test "x$XSERVER_LIBPCIACCESS" = xyes -o "x$have_libpciaccess" = xyes)
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