xf86-video-ati: Branch 'master' - 3 commits
Dave Airlie
airlied at kemper.freedesktop.org
Mon Dec 15 18:32:30 PST 2008
src/ati_pciids_gen.h | 3
src/atombios_output.c | 386 ++++++++++++++++++++------------------
src/pcidb/ati_pciids.csv | 3
src/radeon.h | 3
src/radeon_atombios.c | 20 +
src/radeon_chipinfo_gen.h | 3
src/radeon_chipset_gen.h | 3
src/radeon_pci_chipset_gen.h | 3
src/radeon_pci_device_match_gen.h | 3
src/radeon_probe.h | 4
10 files changed, 256 insertions(+), 175 deletions(-)
New commits:
commit f72367aff2d09161d30066a00673ba291b292a36
Author: Dave Airlie <airlied at redhat.com>
Date: Tue Dec 16 12:32:24 2008 +1000
radeon: add initial rv730 pciids.
Lots more to come, this just adds a few to start.
diff --git a/src/ati_pciids_gen.h b/src/ati_pciids_gen.h
index ba7832e..7819cf6 100644
--- a/src/ati_pciids_gen.h
+++ b/src/ati_pciids_gen.h
@@ -334,6 +334,9 @@
#define PCI_CHIP_RV770_9440 0x9440
#define PCI_CHIP_RV770_9441 0x9441
#define PCI_CHIP_RV770_9442 0x9442
+#define PCI_CHIP_RV730_9490 0x9490
+#define PCI_CHIP_RV730_9498 0x9498
+#define PCI_CHIP_RV730_949F 0x949F
#define PCI_CHIP_RV610_94C0 0x94C0
#define PCI_CHIP_RV610_94C1 0x94C1
#define PCI_CHIP_RV610_94C3 0x94C3
diff --git a/src/pcidb/ati_pciids.csv b/src/pcidb/ati_pciids.csv
index a0478a4..ff9979f 100644
--- a/src/pcidb/ati_pciids.csv
+++ b/src/pcidb/ati_pciids.csv
@@ -335,6 +335,9 @@
"0x9440","RV770_9440","RV770",,,,,,"ATI Radeon 4800 Series"
"0x9441","RV770_9441","RV770",,,,,,"ATI Radeon HD 4870 x2"
"0x9442","RV770_9442","RV770",,,,,,"ATI Radeon 4800 Series"
+"0x9490","RV730_9490","RV730",,,,,,"ATI RV730XT [Radeon HD 4670]"
+"0x9498","RV730_9498","RV730",,,,,,"ATI RV730 PRO [Radeon HD 4650]"
+"0x949F","RV730_949F","RV730",,,,,,"ATI RV730 [FirePro V5700]"
"0x94C0","RV610_94C0","RV610",,,,,,"ATI RV610"
"0x94C1","RV610_94C1","RV610",,,,,,"ATI Radeon HD 2400 XT"
"0x94C3","RV610_94C3","RV610",,,,,,"ATI Radeon HD 2400 Pro"
diff --git a/src/radeon_chipinfo_gen.h b/src/radeon_chipinfo_gen.h
index 3e9cfb9..a321fa1 100644
--- a/src/radeon_chipinfo_gen.h
+++ b/src/radeon_chipinfo_gen.h
@@ -254,6 +254,9 @@ RADEONCardInfo RADEONCards[] = {
{ 0x9440, CHIP_FAMILY_RV770, 0, 0, 0, 0, 0 },
{ 0x9441, CHIP_FAMILY_RV770, 0, 0, 0, 0, 0 },
{ 0x9442, CHIP_FAMILY_RV770, 0, 0, 0, 0, 0 },
+ { 0x9490, CHIP_FAMILY_RV730, 0, 0, 0, 0, 0 },
+ { 0x9498, CHIP_FAMILY_RV730, 0, 0, 0, 0, 0 },
+ { 0x949F, CHIP_FAMILY_RV730, 0, 0, 0, 0, 0 },
{ 0x94C0, CHIP_FAMILY_RV610, 0, 0, 0, 0, 0 },
{ 0x94C1, CHIP_FAMILY_RV610, 0, 0, 0, 0, 0 },
{ 0x94C3, CHIP_FAMILY_RV610, 0, 0, 0, 0, 0 },
diff --git a/src/radeon_chipset_gen.h b/src/radeon_chipset_gen.h
index 2a3ae48..03328e5 100644
--- a/src/radeon_chipset_gen.h
+++ b/src/radeon_chipset_gen.h
@@ -254,6 +254,9 @@ static SymTabRec RADEONChipsets[] = {
{ PCI_CHIP_RV770_9440, "ATI Radeon 4800 Series" },
{ PCI_CHIP_RV770_9441, "ATI Radeon HD 4870 x2" },
{ PCI_CHIP_RV770_9442, "ATI Radeon 4800 Series" },
+ { PCI_CHIP_RV730_9490, "ATI RV730XT [Radeon HD 4670]" },
+ { PCI_CHIP_RV730_9498, "ATI RV730 PRO [Radeon HD 4650]" },
+ { PCI_CHIP_RV730_949F, "ATI RV730 [FirePro V5700]" },
{ PCI_CHIP_RV610_94C0, "ATI RV610" },
{ PCI_CHIP_RV610_94C1, "ATI Radeon HD 2400 XT" },
{ PCI_CHIP_RV610_94C3, "ATI Radeon HD 2400 Pro" },
diff --git a/src/radeon_pci_chipset_gen.h b/src/radeon_pci_chipset_gen.h
index 48dea44..1e97289 100644
--- a/src/radeon_pci_chipset_gen.h
+++ b/src/radeon_pci_chipset_gen.h
@@ -254,6 +254,9 @@ PciChipsets RADEONPciChipsets[] = {
{ PCI_CHIP_RV770_9440, PCI_CHIP_RV770_9440, RES_SHARED_VGA },
{ PCI_CHIP_RV770_9441, PCI_CHIP_RV770_9441, RES_SHARED_VGA },
{ PCI_CHIP_RV770_9442, PCI_CHIP_RV770_9442, RES_SHARED_VGA },
+ { PCI_CHIP_RV730_9490, PCI_CHIP_RV730_9490, RES_SHARED_VGA },
+ { PCI_CHIP_RV730_9498, PCI_CHIP_RV730_9498, RES_SHARED_VGA },
+ { PCI_CHIP_RV730_949F, PCI_CHIP_RV730_949F, RES_SHARED_VGA },
{ PCI_CHIP_RV610_94C0, PCI_CHIP_RV610_94C0, RES_SHARED_VGA },
{ PCI_CHIP_RV610_94C1, PCI_CHIP_RV610_94C1, RES_SHARED_VGA },
{ PCI_CHIP_RV610_94C3, PCI_CHIP_RV610_94C3, RES_SHARED_VGA },
diff --git a/src/radeon_pci_device_match_gen.h b/src/radeon_pci_device_match_gen.h
index da6e5f7..e05697b 100644
--- a/src/radeon_pci_device_match_gen.h
+++ b/src/radeon_pci_device_match_gen.h
@@ -254,6 +254,9 @@ static const struct pci_id_match radeon_device_match[] = {
ATI_DEVICE_MATCH( PCI_CHIP_RV770_9440, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_RV770_9441, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_RV770_9442, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_RV730_9490, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_RV730_9498, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_RV730_949F, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_RV610_94C0, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_RV610_94C1, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_RV610_94C3, 0 ),
commit 4d2429f3ec4d7d3e1512b268c7ff5cbff8d186b4
Author: Dave Airlie <airlied at redhat.com>
Date: Tue Dec 16 12:19:00 2008 +1000
DCE32: add support for DCE3.2 digital outputs.
This adds support for the digital outputs on the RV730.
diff --git a/src/atombios_output.c b/src/atombios_output.c
index 34796f8..396af31 100644
--- a/src/atombios_output.c
+++ b/src/atombios_output.c
@@ -398,26 +398,38 @@ atombios_output_dig_encoder_setup(xf86OutputPtr output, int device, DisplayModeP
AtomBiosArgRec data;
unsigned char *space;
int index;
+ int major, minor;
if (radeon_crtc->crtc_id)
index = GetIndexIntoMasterTable(COMMAND, DIG2EncoderControl);
else
index = GetIndexIntoMasterTable(COMMAND, DIG1EncoderControl);
+ atombios_get_command_table_version(info->atomBIOS, index, &major, &minor);
+
disp_data.ucAction = ATOM_ENABLE;
disp_data.usPixelClock = cpu_to_le16(mode->Clock / 10);
- switch (device) {
- case ATOM_DEVICE_DFP1_INDEX:
- disp_data.ucConfig = ATOM_ENCODER_CONFIG_TRANSMITTER1;
- break;
- case ATOM_DEVICE_LCD1_INDEX:
- case ATOM_DEVICE_DFP3_INDEX:
- disp_data.ucConfig = ATOM_ENCODER_CONFIG_TRANSMITTER2;
- break;
- default:
- return ATOM_NOT_IMPLEMENTED;
- break;
+ if (IS_DCE32_VARIANT) {
+ if (radeon_output->TMDSType == TMDS_UNIPHY)
+ disp_data.ucConfig = ATOM_ENCODER_CONFIG_V2_TRANSMITTER1;
+ if (radeon_output->TMDSType == TMDS_UNIPHY1)
+ disp_data.ucConfig = ATOM_ENCODER_CONFIG_V2_TRANSMITTER2;
+ if (radeon_output->TMDSType == TMDS_UNIPHY2)
+ disp_data.ucConfig = ATOM_ENCODER_CONFIG_V2_TRANSMITTER3;
+ } else {
+ switch (device) {
+ case ATOM_DEVICE_DFP1_INDEX:
+ disp_data.ucConfig = ATOM_ENCODER_CONFIG_TRANSMITTER1;
+ break;
+ case ATOM_DEVICE_LCD1_INDEX:
+ case ATOM_DEVICE_DFP3_INDEX:
+ disp_data.ucConfig = ATOM_ENCODER_CONFIG_TRANSMITTER2;
+ break;
+ default:
+ return ATOM_NOT_IMPLEMENTED;
+ break;
+ }
}
if (mode->Clock > 165000) {
@@ -442,7 +454,7 @@ atombios_output_dig_encoder_setup(xf86OutputPtr output, int device, DisplayModeP
data.exec.pspace = &disp_data;
if (RHDAtomBiosFunc(info->atomBIOS->scrnIndex, info->atomBIOS, ATOMBIOS_EXEC, &data) == ATOM_SUCCESS) {
- ErrorF("Output DIG%d setup success\n", radeon_crtc->crtc_id + 1);
+ ErrorF("Output DIG%d encoder setup success\n", radeon_crtc->crtc_id + 1);
return ATOM_SUCCESS;
}
@@ -451,86 +463,140 @@ atombios_output_dig_encoder_setup(xf86OutputPtr output, int device, DisplayModeP
}
+union dig_transmitter_control {
+ DIG_TRANSMITTER_CONTROL_PS_ALLOCATION v1;
+ DIG_TRANSMITTER_CONTROL_PARAMETERS_V2 v2;
+};
+
static int
atombios_output_dig_transmitter_setup(xf86OutputPtr output, int device, DisplayModePtr mode)
{
RADEONOutputPrivatePtr radeon_output = output->driver_private;
RADEONCrtcPrivatePtr radeon_crtc = output->crtc->driver_private;
RADEONInfoPtr info = RADEONPTR(output->scrn);
- DIG_TRANSMITTER_CONTROL_PS_ALLOCATION disp_data;
+ union dig_transmitter_control disp_data;
AtomBiosArgRec data;
unsigned char *space;
int index, num = 0;
+ int major, minor;
- switch (device) {
- case ATOM_DEVICE_DFP1_INDEX:
- index = GetIndexIntoMasterTable(COMMAND, DIG1TransmitterControl);
- num = 1;
- break;
- case ATOM_DEVICE_LCD1_INDEX:
- case ATOM_DEVICE_DFP3_INDEX:
- index = GetIndexIntoMasterTable(COMMAND, DIG2TransmitterControl);
- num = 2;
- break;
- default:
- return ATOM_NOT_IMPLEMENTED;
- break;
+ memset(&disp_data,0, sizeof(disp_data));
+ if (IS_DCE32_VARIANT)
+ index = GetIndexIntoMasterTable(COMMAND, UNIPHYTransmitterControl);
+ else {
+ switch (device) {
+ case ATOM_DEVICE_DFP1_INDEX:
+ index = GetIndexIntoMasterTable(COMMAND, DIG1TransmitterControl);
+ num = 1;
+ break;
+ case ATOM_DEVICE_LCD1_INDEX:
+ case ATOM_DEVICE_DFP3_INDEX:
+ index = GetIndexIntoMasterTable(COMMAND, DIG2TransmitterControl);
+ num = 2;
+ break;
+ default:
+ return ATOM_NOT_IMPLEMENTED;
+ break;
+ }
}
- disp_data.ucAction = ATOM_TRANSMITTER_ACTION_ENABLE;
- disp_data.usPixelClock = cpu_to_le16(mode->Clock / 10);
- disp_data.ucConfig = ATOM_TRANSMITTER_CONFIG_CLKSRC_PPLL;
+ atombios_get_command_table_version(info->atomBIOS, index, &major, &minor);
- if (radeon_crtc->crtc_id)
- disp_data.ucConfig |= ATOM_TRANSMITTER_CONFIG_DIG2_ENCODER;
- else
- disp_data.ucConfig |= ATOM_TRANSMITTER_CONFIG_DIG1_ENCODER;
-
- if (OUTPUT_IS_DVI || (radeon_output->type == OUTPUT_HDMI)) {
- if (radeon_output->coherent_mode) {
- disp_data.ucConfig |= ATOM_TRANSMITTER_CONFIG_COHERENT;
- xf86DrvMsg(output->scrn->scrnIndex, X_INFO, "DIG%d transmitter: Coherent Mode enabled\n", num);
- } else
- xf86DrvMsg(output->scrn->scrnIndex, X_INFO, "DIG%d transmitter: Coherent Mode disabled\n", num);
- }
+ disp_data.v1.ucAction = ATOM_TRANSMITTER_ACTION_ENABLE;
- if (info->IsIGP && (radeon_output->TMDSType == TMDS_UNIPHY)) {
+ if (IS_DCE32_VARIANT) {
if (mode->Clock > 165000) {
- disp_data.ucConfig |= (ATOM_TRANSMITTER_CONFIG_8LANE_LINK |
- ATOM_TRANSMITTER_CONFIG_LINKA_B);
- /* guess */
- if (radeon_output->igp_lane_info & 0x3)
- disp_data.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_0_7;
- else if (radeon_output->igp_lane_info & 0xc)
- disp_data.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_8_15;
+ disp_data.v2.usPixelClock = cpu_to_le16((mode->Clock * 10 * 2) / 100);
+ disp_data.v2.acConfig.fDualLinkConnector = 1;
} else {
- disp_data.ucConfig |= ATOM_TRANSMITTER_CONFIG_LINKA;
- if (radeon_output->igp_lane_info & 0x1)
- disp_data.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_0_3;
- else if (radeon_output->igp_lane_info & 0x2)
- disp_data.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_4_7;
- else if (radeon_output->igp_lane_info & 0x4)
- disp_data.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_8_11;
- else if (radeon_output->igp_lane_info & 0x8)
- disp_data.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_12_15;
+ disp_data.v2.usPixelClock = cpu_to_le16((mode->Clock * 10 * 4) / 100);
+ }
+ if (radeon_crtc->crtc_id)
+ disp_data.v2.acConfig.ucEncoderSel = 1;
+
+ switch (radeon_output->TMDSType) {
+ case TMDS_UNIPHY:
+ disp_data.v2.acConfig.ucTransmitterSel = 0;
+ num = 0;
+ break;
+ case TMDS_UNIPHY1:
+ disp_data.v2.acConfig.ucTransmitterSel = 1;
+ num = 1;
+ break;
+ case TMDS_UNIPHY2:
+ disp_data.v2.acConfig.ucTransmitterSel = 2;
+ num = 2;
+ break;
+ default:
+ return ATOM_NOT_IMPLEMENTED;
+ break;
+ }
+
+ if (OUTPUT_IS_DVI || (radeon_output->type == OUTPUT_HDMI)) {
+ if (radeon_output->coherent_mode) {
+ disp_data.v2.acConfig.fCoherentMode = 1;
+ xf86DrvMsg(output->scrn->scrnIndex, X_INFO, "UNIPHY%d transmitter: Coherent Mode enabled\n",disp_data.v2.acConfig.ucTransmitterSel);
+ } else
+ xf86DrvMsg(output->scrn->scrnIndex, X_INFO, "UNIPHY%d transmitter: Coherent Mode disabled\n",disp_data.v2.acConfig.ucTransmitterSel);
}
} else {
- if (mode->Clock > 165000)
- disp_data.ucConfig |= (ATOM_TRANSMITTER_CONFIG_8LANE_LINK |
- ATOM_TRANSMITTER_CONFIG_LINKA_B |
- ATOM_TRANSMITTER_CONFIG_LANE_0_7);
+ disp_data.v1.ucConfig = ATOM_TRANSMITTER_CONFIG_CLKSRC_PPLL;
+ disp_data.v1.usPixelClock = cpu_to_le16((mode->Clock) / 10);
+
+ if (radeon_crtc->crtc_id)
+ disp_data.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_DIG2_ENCODER;
else
- disp_data.ucConfig |= ATOM_TRANSMITTER_CONFIG_LINKA | ATOM_TRANSMITTER_CONFIG_LANE_0_3;
+ disp_data.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_DIG1_ENCODER;
+
+ if (OUTPUT_IS_DVI || (radeon_output->type == OUTPUT_HDMI)) {
+ if (radeon_output->coherent_mode) {
+ disp_data.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_COHERENT;
+ xf86DrvMsg(output->scrn->scrnIndex, X_INFO, "DIG%d transmitter: Coherent Mode enabled\n", num);
+ } else
+ xf86DrvMsg(output->scrn->scrnIndex, X_INFO, "DIG%d transmitter: Coherent Mode disabled\n", num);
+ }
+
+ if (info->IsIGP && (radeon_output->TMDSType == TMDS_UNIPHY)) {
+ if (mode->Clock > 165000) {
+ disp_data.v1.ucConfig |= (ATOM_TRANSMITTER_CONFIG_8LANE_LINK |
+ ATOM_TRANSMITTER_CONFIG_LINKA_B);
+ /* guess */
+ if (radeon_output->igp_lane_info & 0x3)
+ disp_data.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_0_7;
+ else if (radeon_output->igp_lane_info & 0xc)
+ disp_data.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_8_15;
+ } else {
+ disp_data.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LINKA;
+ if (radeon_output->igp_lane_info & 0x1)
+ disp_data.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_0_3;
+ else if (radeon_output->igp_lane_info & 0x2)
+ disp_data.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_4_7;
+ else if (radeon_output->igp_lane_info & 0x4)
+ disp_data.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_8_11;
+ else if (radeon_output->igp_lane_info & 0x8)
+ disp_data.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_12_15;
+ }
+ } else {
+ if (mode->Clock > 165000)
+ disp_data.v1.ucConfig |= (ATOM_TRANSMITTER_CONFIG_8LANE_LINK |
+ ATOM_TRANSMITTER_CONFIG_LINKA_B |
+ ATOM_TRANSMITTER_CONFIG_LANE_0_7);
+ else
+ disp_data.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LINKA | ATOM_TRANSMITTER_CONFIG_LANE_0_3;
+ }
}
- radeon_output->transmitter_config = disp_data.ucConfig;
-
+ radeon_output->transmitter_config = disp_data.v1.ucConfig;
+
data.exec.index = index;
data.exec.dataSpace = (void *)&space;
data.exec.pspace = &disp_data;
if (RHDAtomBiosFunc(info->atomBIOS->scrnIndex, info->atomBIOS, ATOMBIOS_EXEC, &data) == ATOM_SUCCESS) {
- ErrorF("Output DIG%d transmitter setup success\n", num);
+ if (IS_DCE32_VARIANT)
+ ErrorF("Output UNIPHY%d transmitter setup success\n", num);
+ else
+ ErrorF("Output DIG%d transmitter setup success\n", num);
return ATOM_SUCCESS;
}
@@ -625,10 +691,16 @@ atombios_device_dpms(xf86OutputPtr output, int device, int mode)
index = GetIndexIntoMasterTable(COMMAND, LCD1OutputControl);
break;
case ATOM_DEVICE_TV1_SUPPORT:
- index = GetIndexIntoMasterTable(COMMAND, TV1OutputControl);
+ if (IS_DCE3_VARIANT)
+ index = GetIndexIntoMasterTable(COMMAND, DAC2OutputControl);
+ else
+ index = GetIndexIntoMasterTable(COMMAND, TV1OutputControl);
break;
case ATOM_DEVICE_CV_SUPPORT:
- index = GetIndexIntoMasterTable(COMMAND, CV1OutputControl);
+ if (IS_DCE3_VARIANT)
+ index = GetIndexIntoMasterTable(COMMAND, DAC2OutputControl);
+ else
+ index = GetIndexIntoMasterTable(COMMAND, CV1OutputControl);
break;
default:
return;
@@ -655,6 +727,7 @@ atombios_output_dig_dpms(xf86OutputPtr output, int mode, int block)
AtomBiosArgRec data;
unsigned char *space;
+ memset(&disp_data, 0, sizeof(disp_data));
switch (mode) {
case DPMSModeOn:
disp_data.ucAction = ATOM_TRANSMITTER_ACTION_ENABLE_OUTPUT;
@@ -668,10 +741,15 @@ atombios_output_dig_dpms(xf86OutputPtr output, int mode, int block)
disp_data.ucConfig = radeon_output->transmitter_config;
- if (block == 1)
- data.exec.index = GetIndexIntoMasterTable(COMMAND, DIG1TransmitterControl);
- else
- data.exec.index = GetIndexIntoMasterTable(COMMAND, DIG2TransmitterControl);
+ if (IS_DCE32_VARIANT) {
+ data.exec.index = GetIndexIntoMasterTable(COMMAND, UNIPHYTransmitterControl);
+ }
+ else {
+ if (block == 1)
+ data.exec.index = GetIndexIntoMasterTable(COMMAND, DIG1TransmitterControl);
+ else
+ data.exec.index = GetIndexIntoMasterTable(COMMAND, DIG2TransmitterControl);
+ }
data.exec.dataSpace = (void *)&space;
data.exec.pspace = &disp_data;
@@ -708,15 +786,21 @@ atombios_output_dpms(xf86OutputPtr output, int mode)
else
atombios_device_dpms(output, ATOM_DEVICE_DFP1_SUPPORT, mode);
} else if (radeon_output->devices & ATOM_DEVICE_DFP2_SUPPORT) {
- if (IS_DCE3_VARIANT)
+ if (IS_DCE32_VARIANT)
+ atombios_output_dig_dpms(output, mode, 2);
+ else if (IS_DCE3_VARIANT)
return; // fixme
else
atombios_device_dpms(output, ATOM_DEVICE_DFP2_SUPPORT, mode);
} else if (radeon_output->devices & ATOM_DEVICE_DFP3_SUPPORT) {
if (IS_DCE3_VARIANT)
- atombios_output_dig_dpms(output, mode, 2);
+ atombios_output_dig_dpms(output, mode, 0);
else
atombios_device_dpms(output, ATOM_DEVICE_DFP3_SUPPORT, mode);
+ } else if (radeon_output->devices & ATOM_DEVICE_DFP4_SUPPORT) {
+ atombios_output_dig_dpms(output, mode, 1);
+ } else if (radeon_output->devices & ATOM_DEVICE_DFP5_SUPPORT) {
+ atombios_output_dig_dpms(output, mode, 2);
}
} else if (radeon_output->MonType == MT_CRT) {
/*ErrorF("AGD: dac dpms\n");*/
@@ -750,6 +834,8 @@ atombios_set_output_crtc_source(xf86OutputPtr output)
int index = GetIndexIntoMasterTable(COMMAND, SelectCRTC_Source);
int major, minor;
+ memset(&crtc_src_param, 0, sizeof(crtc_src_param));
+ memset(&crtc_src_param2, 0, sizeof(crtc_src_param2));
atombios_get_command_table_version(info->atomBIOS, index, &major, &minor);
/*ErrorF("select crtc source table is %d %d\n", major, minor);*/
@@ -774,6 +860,10 @@ atombios_set_output_crtc_source(xf86OutputPtr output)
crtc_src_param.ucDevice = ATOM_DEVICE_DFP2_INDEX;
else if (radeon_output->devices & ATOM_DEVICE_DFP3_SUPPORT)
crtc_src_param.ucDevice = ATOM_DEVICE_DFP3_INDEX;
+ else if (radeon_output->devices & ATOM_DEVICE_DFP4_SUPPORT)
+ crtc_src_param.ucDevice = ATOM_DEVICE_DFP4_INDEX;
+ else if (radeon_output->devices & ATOM_DEVICE_DFP5_SUPPORT)
+ crtc_src_param.ucDevice = ATOM_DEVICE_DFP5_INDEX;
} else if (radeon_output->MonType == MT_LCD) {
if (radeon_output->devices & ATOM_DEVICE_LCD1_SUPPORT)
crtc_src_param.ucDevice = ATOM_DEVICE_LCD1_INDEX;
@@ -790,18 +880,26 @@ atombios_set_output_crtc_source(xf86OutputPtr output)
case 2:
crtc_src_param2.ucCRTC = radeon_crtc->crtc_id;
if (radeon_output->MonType == MT_CRT) {
+ crtc_src_param2.ucEncodeMode = ATOM_ENCODER_MODE_CRT;
if (radeon_output->devices & ATOM_DEVICE_CRT1_SUPPORT)
- crtc_src_param2.ucEncoderID = ATOM_DEVICE_CRT1_INDEX;
+ crtc_src_param2.ucEncoderID = ASIC_INT_DAC1_ENCODER_ID;
else if (radeon_output->devices & ATOM_DEVICE_CRT2_SUPPORT)
- crtc_src_param2.ucEncoderID = ATOM_DEVICE_CRT2_INDEX;
- crtc_src_param2.ucEncodeMode = ATOM_ENCODER_MODE_CRT;
+ crtc_src_param2.ucEncoderID = ASIC_INT_DAC2_ENCODER_ID;
} else if (radeon_output->MonType == MT_DFP) {
- if (radeon_output->devices & ATOM_DEVICE_DFP1_SUPPORT)
- crtc_src_param2.ucEncoderID = ATOM_DEVICE_DFP1_INDEX;
- else if (radeon_output->devices & ATOM_DEVICE_DFP2_SUPPORT)
- crtc_src_param2.ucEncoderID = ATOM_DEVICE_DFP2_INDEX;
- else if (radeon_output->devices & ATOM_DEVICE_DFP3_SUPPORT)
- crtc_src_param2.ucEncoderID = ATOM_DEVICE_DFP3_INDEX;
+ if (IS_DCE3_VARIANT) {
+ /* we route digital encoders using the CRTC ids */
+ if (radeon_crtc->crtc_id)
+ crtc_src_param2.ucEncoderID = ASIC_INT_DIG2_ENCODER_ID;
+ else
+ crtc_src_param2.ucEncoderID = ASIC_INT_DIG1_ENCODER_ID;
+ } else {
+ if (radeon_output->devices & ATOM_DEVICE_DFP1_SUPPORT)
+ crtc_src_param2.ucEncoderID = ATOM_DEVICE_DFP1_INDEX;
+ else if (radeon_output->devices & ATOM_DEVICE_DFP2_SUPPORT)
+ crtc_src_param2.ucEncoderID = ATOM_DEVICE_DFP2_INDEX;
+ else if (radeon_output->devices & ATOM_DEVICE_DFP3_SUPPORT)
+ crtc_src_param2.ucEncoderID = ATOM_DEVICE_DFP3_INDEX;
+ }
if (OUTPUT_IS_DVI)
crtc_src_param2.ucEncodeMode = ATOM_ENCODER_MODE_DVI;
else if (radeon_output->type == OUTPUT_HDMI)
@@ -896,8 +994,9 @@ atombios_output_mode_set(xf86OutputPtr output,
} else
atombios_output_digital_setup(output, ATOM_DEVICE_DFP1_INDEX, adjusted_mode);
} else if (radeon_output->devices & ATOM_DEVICE_DFP2_SUPPORT) {
- if (IS_DCE3_VARIANT) {
- // fix me
+ if (IS_DCE32_VARIANT) {
+ atombios_output_dig_encoder_setup(output, ATOM_DEVICE_DFP2_INDEX, adjusted_mode);
+ atombios_output_dig_transmitter_setup(output, ATOM_DEVICE_DFP2_INDEX, adjusted_mode);
} else {
if ((info->ChipFamily == CHIP_FAMILY_RS600) ||
(info->ChipFamily == CHIP_FAMILY_RS690) ||
@@ -912,6 +1011,12 @@ atombios_output_mode_set(xf86OutputPtr output,
atombios_output_dig_transmitter_setup(output, ATOM_DEVICE_DFP3_INDEX, adjusted_mode);
} else
atombios_output_digital_setup(output, ATOM_DEVICE_DFP3_INDEX, adjusted_mode);
+ } else if (radeon_output->devices & ATOM_DEVICE_DFP4_SUPPORT) {
+ atombios_output_dig_encoder_setup(output, ATOM_DEVICE_DFP4_INDEX, adjusted_mode);
+ atombios_output_dig_transmitter_setup(output, ATOM_DEVICE_DFP4_INDEX, adjusted_mode);
+ } else if (radeon_output->devices & ATOM_DEVICE_DFP5_SUPPORT) {
+ atombios_output_dig_encoder_setup(output, ATOM_DEVICE_DFP5_INDEX, adjusted_mode);
+ atombios_output_dig_transmitter_setup(output, ATOM_DEVICE_DFP5_INDEX, adjusted_mode);
}
} else if (radeon_output->MonType == MT_LCD) {
if (radeon_output->devices & ATOM_DEVICE_LCD1_SUPPORT) {
diff --git a/src/radeon.h b/src/radeon.h
index 8dc8f23..818ec4d 100644
--- a/src/radeon.h
+++ b/src/radeon.h
@@ -324,6 +324,7 @@ typedef enum {
CHIP_FAMILY_RV635,
CHIP_FAMILY_RS780,
CHIP_FAMILY_RV770,
+ CHIP_FAMILY_RV730,
CHIP_FAMILY_LAST
} RADEONChipFamily;
@@ -349,6 +350,8 @@ typedef enum {
#define IS_DCE3_VARIANT ((info->ChipFamily >= CHIP_FAMILY_RV620))
+#define IS_DCE32_VARIANT ((info->ChipFamily >= CHIP_FAMILY_RV730))
+
#define IS_R500_3D ((info->ChipFamily == CHIP_FAMILY_RV515) || \
(info->ChipFamily == CHIP_FAMILY_R520) || \
(info->ChipFamily == CHIP_FAMILY_RV530) || \
diff --git a/src/radeon_atombios.c b/src/radeon_atombios.c
index 6e214ce..d612572 100644
--- a/src/radeon_atombios.c
+++ b/src/radeon_atombios.c
@@ -1660,6 +1660,26 @@ RADEONGetATOMConnectorInfoFromBIOSObject (ScrnInfoPtr pScrn)
info->BiosConnector[i].TMDSType = TMDS_UNIPHY;
}
break;
+ case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
+ if (info->BiosConnector[i].ConnectorType == CONNECTOR_LVDS)
+ info->BiosConnector[i].devices |= (1 << ATOM_DEVICE_LCD1_INDEX);
+ else {
+ if (num == 1)
+ info->BiosConnector[i].devices |= (1 << ATOM_DEVICE_DFP3_INDEX);
+ else
+ info->BiosConnector[i].devices |= (1 << ATOM_DEVICE_DFP4_INDEX);
+ info->BiosConnector[i].TMDSType = TMDS_UNIPHY1;
+ }
+ break;
+
+ case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
+ if (info->BiosConnector[i].ConnectorType == CONNECTOR_LVDS)
+ info->BiosConnector[i].devices |= (1 << ATOM_DEVICE_LCD1_INDEX);
+ else {
+ info->BiosConnector[i].devices |= (1 << ATOM_DEVICE_DFP5_INDEX);
+ info->BiosConnector[i].TMDSType = TMDS_UNIPHY2;
+ }
+ break;
case ENCODER_OBJECT_ID_INTERNAL_TMDS2:
case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1:
info->BiosConnector[i].devices |= (1 << ATOM_DEVICE_DFP2_INDEX);
diff --git a/src/radeon_probe.h b/src/radeon_probe.h
index 6014cd4..5cd610c 100644
--- a/src/radeon_probe.h
+++ b/src/radeon_probe.h
@@ -102,7 +102,9 @@ typedef enum
TMDS_EXT = 2,
TMDS_LVTMA = 3,
TMDS_DDIA = 4,
- TMDS_UNIPHY = 5
+ TMDS_UNIPHY = 5,
+ TMDS_UNIPHY1 = 6,
+ TMDS_UNIPHY2 = 7
} RADEONTmdsType;
typedef enum
commit 4d3792fd1b9f733107582436540f483d8993199f
Author: Dave Airlie <airlied at redhat.com>
Date: Fri Dec 12 10:34:57 2008 +1000
radeon: fixes from Alex for some output engines
(cherry picked from commit 1e8ac6ea7b35ccbc3649c96ead60f69158f66ebc)
diff --git a/src/atombios_output.c b/src/atombios_output.c
index 81187ae..34796f8 100644
--- a/src/atombios_output.c
+++ b/src/atombios_output.c
@@ -389,23 +389,35 @@ atombios_maybe_hdmi_mode(xf86OutputPtr output)
}
static int
-atombios_output_dig1_setup(xf86OutputPtr output, DisplayModePtr mode)
+atombios_output_dig_encoder_setup(xf86OutputPtr output, int device, DisplayModePtr mode)
{
RADEONOutputPrivatePtr radeon_output = output->driver_private;
+ RADEONCrtcPrivatePtr radeon_crtc = output->crtc->driver_private;
RADEONInfoPtr info = RADEONPTR(output->scrn);
DIG_ENCODER_CONTROL_PS_ALLOCATION disp_data;
AtomBiosArgRec data;
unsigned char *space;
+ int index;
- disp_data.ucAction = 1;
+ if (radeon_crtc->crtc_id)
+ index = GetIndexIntoMasterTable(COMMAND, DIG2EncoderControl);
+ else
+ index = GetIndexIntoMasterTable(COMMAND, DIG1EncoderControl);
+
+ disp_data.ucAction = ATOM_ENABLE;
disp_data.usPixelClock = cpu_to_le16(mode->Clock / 10);
- disp_data.ucConfig = ATOM_ENCODER_CONFIG_TRANSMITTER1;
- if (OUTPUT_IS_DVI || (radeon_output->type == OUTPUT_HDMI)) {
- if (radeon_output->coherent_mode) {
- disp_data.ucConfig |= ATOM_TRANSMITTER_CONFIG_COHERENT;
- xf86DrvMsg(output->scrn->scrnIndex, X_INFO, "DIG1: Coherent Mode enabled\n");
- } else
- xf86DrvMsg(output->scrn->scrnIndex, X_INFO, "DIG1: Coherent Mode disabled\n");
+
+ switch (device) {
+ case ATOM_DEVICE_DFP1_INDEX:
+ disp_data.ucConfig = ATOM_ENCODER_CONFIG_TRANSMITTER1;
+ break;
+ case ATOM_DEVICE_LCD1_INDEX:
+ case ATOM_DEVICE_DFP3_INDEX:
+ disp_data.ucConfig = ATOM_ENCODER_CONFIG_TRANSMITTER2;
+ break;
+ default:
+ return ATOM_NOT_IMPLEMENTED;
+ break;
}
if (mode->Clock > 165000) {
@@ -425,142 +437,63 @@ atombios_output_dig1_setup(xf86OutputPtr output, DisplayModePtr mode)
else if (radeon_output->type == OUTPUT_LVDS)
disp_data.ucEncoderMode = ATOM_ENCODER_MODE_LVDS;
- data.exec.index = GetIndexIntoMasterTable(COMMAND, DIG1EncoderControl);
+ data.exec.index = index;
data.exec.dataSpace = (void *)&space;
data.exec.pspace = &disp_data;
if (RHDAtomBiosFunc(info->atomBIOS->scrnIndex, info->atomBIOS, ATOMBIOS_EXEC, &data) == ATOM_SUCCESS) {
- ErrorF("Output DIG1 setup success\n");
+ ErrorF("Output DIG%d setup success\n", radeon_crtc->crtc_id + 1);
return ATOM_SUCCESS;
}
- ErrorF("Output DIG1 setup failed\n");
+ ErrorF("Output DIG%d setup failed\n", radeon_crtc->crtc_id + 1);
return ATOM_NOT_IMPLEMENTED;
}
static int
-atombios_output_dig1_transmitter_setup(xf86OutputPtr output, DisplayModePtr mode)
+atombios_output_dig_transmitter_setup(xf86OutputPtr output, int device, DisplayModePtr mode)
{
RADEONOutputPrivatePtr radeon_output = output->driver_private;
+ RADEONCrtcPrivatePtr radeon_crtc = output->crtc->driver_private;
RADEONInfoPtr info = RADEONPTR(output->scrn);
DIG_TRANSMITTER_CONTROL_PS_ALLOCATION disp_data;
AtomBiosArgRec data;
unsigned char *space;
+ int index, num = 0;
- disp_data.ucAction = ATOM_TRANSMITTER_ACTION_ENABLE;
- disp_data.usPixelClock = cpu_to_le16(mode->Clock / 10);
- disp_data.ucConfig = ATOM_TRANSMITTER_CONFIG_DIG1_ENCODER | ATOM_TRANSMITTER_CONFIG_CLKSRC_PPLL;
-
- if (info->IsIGP && (radeon_output->TMDSType == TMDS_UNIPHY)) {
- if (mode->Clock > 165000) {
- disp_data.ucConfig |= (ATOM_TRANSMITTER_CONFIG_8LANE_LINK |
- ATOM_TRANSMITTER_CONFIG_LINKA_B);
- /* guess */
- if (radeon_output->igp_lane_info & 0x3)
- disp_data.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_0_7;
- else if (radeon_output->igp_lane_info & 0xc)
- disp_data.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_8_15;
- } else {
- disp_data.ucConfig |= ATOM_TRANSMITTER_CONFIG_LINKA;
- if (radeon_output->igp_lane_info & 0x1)
- disp_data.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_0_3;
- else if (radeon_output->igp_lane_info & 0x2)
- disp_data.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_4_7;
- else if (radeon_output->igp_lane_info & 0x4)
- disp_data.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_8_11;
- else if (radeon_output->igp_lane_info & 0x8)
- disp_data.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_12_15;
- }
- } else {
- if (mode->Clock > 165000)
- disp_data.ucConfig |= (ATOM_TRANSMITTER_CONFIG_8LANE_LINK |
- ATOM_TRANSMITTER_CONFIG_LINKA_B |
- ATOM_TRANSMITTER_CONFIG_LANE_0_7);
- else
- disp_data.ucConfig |= ATOM_TRANSMITTER_CONFIG_LINKA | ATOM_TRANSMITTER_CONFIG_LANE_0_3;
- }
-
- radeon_output->transmitter_config = disp_data.ucConfig;
-
- data.exec.index = GetIndexIntoMasterTable(COMMAND, DIG1TransmitterControl);
- data.exec.dataSpace = (void *)&space;
- data.exec.pspace = &disp_data;
-
- if (RHDAtomBiosFunc(info->atomBIOS->scrnIndex, info->atomBIOS, ATOMBIOS_EXEC, &data) == ATOM_SUCCESS) {
- ErrorF("Output DIG1 transmitter setup success\n");
- return ATOM_SUCCESS;
+ switch (device) {
+ case ATOM_DEVICE_DFP1_INDEX:
+ index = GetIndexIntoMasterTable(COMMAND, DIG1TransmitterControl);
+ num = 1;
+ break;
+ case ATOM_DEVICE_LCD1_INDEX:
+ case ATOM_DEVICE_DFP3_INDEX:
+ index = GetIndexIntoMasterTable(COMMAND, DIG2TransmitterControl);
+ num = 2;
+ break;
+ default:
+ return ATOM_NOT_IMPLEMENTED;
+ break;
}
- ErrorF("Output DIG1 transmitter setup failed\n");
- return ATOM_NOT_IMPLEMENTED;
-
-}
+ disp_data.ucAction = ATOM_TRANSMITTER_ACTION_ENABLE;
+ disp_data.usPixelClock = cpu_to_le16(mode->Clock / 10);
+ disp_data.ucConfig = ATOM_TRANSMITTER_CONFIG_CLKSRC_PPLL;
-static int
-atombios_output_dig2_setup(xf86OutputPtr output, DisplayModePtr mode)
-{
- RADEONOutputPrivatePtr radeon_output = output->driver_private;
- RADEONInfoPtr info = RADEONPTR(output->scrn);
- DIG_ENCODER_CONTROL_PS_ALLOCATION disp_data;
- AtomBiosArgRec data;
- unsigned char *space;
+ if (radeon_crtc->crtc_id)
+ disp_data.ucConfig |= ATOM_TRANSMITTER_CONFIG_DIG2_ENCODER;
+ else
+ disp_data.ucConfig |= ATOM_TRANSMITTER_CONFIG_DIG1_ENCODER;
- disp_data.ucAction = 1;
- disp_data.usPixelClock = cpu_to_le16(mode->Clock / 10);
- disp_data.ucConfig = ATOM_ENCODER_CONFIG_TRANSMITTER2;
if (OUTPUT_IS_DVI || (radeon_output->type == OUTPUT_HDMI)) {
if (radeon_output->coherent_mode) {
disp_data.ucConfig |= ATOM_TRANSMITTER_CONFIG_COHERENT;
- xf86DrvMsg(output->scrn->scrnIndex, X_INFO, "DIG2: Coherent Mode enabled\n");
+ xf86DrvMsg(output->scrn->scrnIndex, X_INFO, "DIG%d transmitter: Coherent Mode enabled\n", num);
} else
- xf86DrvMsg(output->scrn->scrnIndex, X_INFO, "DIG2: Coherent Mode disabled\n");
- }
-
- if (mode->Clock > 165000) {
- disp_data.ucConfig |= ATOM_ENCODER_CONFIG_LINKA_B;
- disp_data.ucLaneNum = 8;
- } else {
- disp_data.ucConfig |= ATOM_ENCODER_CONFIG_LINKA;
- disp_data.ucLaneNum = 4;
- }
-
- if (OUTPUT_IS_DVI)
- disp_data.ucEncoderMode = ATOM_ENCODER_MODE_DVI;
- else if (radeon_output->type == OUTPUT_HDMI)
- disp_data.ucEncoderMode = atombios_maybe_hdmi_mode(output);
- else if (radeon_output->type == OUTPUT_DP)
- disp_data.ucEncoderMode = ATOM_ENCODER_MODE_DP;
- else if (radeon_output->type == OUTPUT_LVDS)
- disp_data.ucEncoderMode = ATOM_ENCODER_MODE_LVDS;
-
- data.exec.index = GetIndexIntoMasterTable(COMMAND, DIG2EncoderControl);
- data.exec.dataSpace = (void *)&space;
- data.exec.pspace = &disp_data;
-
- if (RHDAtomBiosFunc(info->atomBIOS->scrnIndex, info->atomBIOS, ATOMBIOS_EXEC, &data) == ATOM_SUCCESS) {
- ErrorF("Output DIG2 setup success\n");
- return ATOM_SUCCESS;
+ xf86DrvMsg(output->scrn->scrnIndex, X_INFO, "DIG%d transmitter: Coherent Mode disabled\n", num);
}
- ErrorF("Output DIG2 setup failed\n");
- return ATOM_NOT_IMPLEMENTED;
-
-}
-
-static int
-atombios_output_dig2_transmitter_setup(xf86OutputPtr output, DisplayModePtr mode)
-{
- RADEONOutputPrivatePtr radeon_output = output->driver_private;
- RADEONInfoPtr info = RADEONPTR(output->scrn);
- DIG_TRANSMITTER_CONTROL_PS_ALLOCATION disp_data;
- AtomBiosArgRec data;
- unsigned char *space;
-
- disp_data.ucAction = ATOM_TRANSMITTER_ACTION_ENABLE;
- disp_data.usPixelClock = cpu_to_le16(mode->Clock / 10);
- disp_data.ucConfig = ATOM_TRANSMITTER_CONFIG_DIG2_ENCODER | ATOM_TRANSMITTER_CONFIG_CLKSRC_PPLL;
-
if (info->IsIGP && (radeon_output->TMDSType == TMDS_UNIPHY)) {
if (mode->Clock > 165000) {
disp_data.ucConfig |= (ATOM_TRANSMITTER_CONFIG_8LANE_LINK |
@@ -592,16 +525,16 @@ atombios_output_dig2_transmitter_setup(xf86OutputPtr output, DisplayModePtr mode
radeon_output->transmitter_config = disp_data.ucConfig;
- data.exec.index = GetIndexIntoMasterTable(COMMAND, DIG2TransmitterControl);
+ data.exec.index = index;
data.exec.dataSpace = (void *)&space;
data.exec.pspace = &disp_data;
if (RHDAtomBiosFunc(info->atomBIOS->scrnIndex, info->atomBIOS, ATOMBIOS_EXEC, &data) == ATOM_SUCCESS) {
- ErrorF("Output DIG2 transmitter setup success\n");
+ ErrorF("Output DIG%d transmitter setup success\n", num);
return ATOM_SUCCESS;
}
- ErrorF("Output DIG2 transmitter setup failed\n");
+ ErrorF("Output DIG%d transmitter setup failed\n", num);
return ATOM_NOT_IMPLEMENTED;
}
@@ -958,8 +891,8 @@ atombios_output_mode_set(xf86OutputPtr output,
} else if (radeon_output->MonType == MT_DFP) {
if (radeon_output->devices & ATOM_DEVICE_DFP1_SUPPORT) {
if (IS_DCE3_VARIANT) {
- atombios_output_dig1_setup(output, adjusted_mode);
- atombios_output_dig1_transmitter_setup(output, adjusted_mode);
+ atombios_output_dig_encoder_setup(output, ATOM_DEVICE_DFP1_INDEX, adjusted_mode);
+ atombios_output_dig_transmitter_setup(output, ATOM_DEVICE_DFP1_INDEX, adjusted_mode);
} else
atombios_output_digital_setup(output, ATOM_DEVICE_DFP1_INDEX, adjusted_mode);
} else if (radeon_output->devices & ATOM_DEVICE_DFP2_SUPPORT) {
@@ -975,16 +908,16 @@ atombios_output_mode_set(xf86OutputPtr output,
}
} else if (radeon_output->devices & ATOM_DEVICE_DFP3_SUPPORT) {
if (IS_DCE3_VARIANT) {
- atombios_output_dig2_setup(output, adjusted_mode);
- atombios_output_dig2_transmitter_setup(output, adjusted_mode);
+ atombios_output_dig_encoder_setup(output, ATOM_DEVICE_DFP3_INDEX, adjusted_mode);
+ atombios_output_dig_transmitter_setup(output, ATOM_DEVICE_DFP3_INDEX, adjusted_mode);
} else
atombios_output_digital_setup(output, ATOM_DEVICE_DFP3_INDEX, adjusted_mode);
}
} else if (radeon_output->MonType == MT_LCD) {
if (radeon_output->devices & ATOM_DEVICE_LCD1_SUPPORT) {
if (IS_DCE3_VARIANT) {
- atombios_output_dig2_setup(output, adjusted_mode);
- atombios_output_dig2_transmitter_setup(output, adjusted_mode);
+ atombios_output_dig_encoder_setup(output, ATOM_DEVICE_LCD1_INDEX, adjusted_mode);
+ atombios_output_dig_transmitter_setup(output, ATOM_DEVICE_LCD1_INDEX, adjusted_mode);
} else
atombios_output_digital_setup(output, ATOM_DEVICE_LCD1_INDEX, adjusted_mode);
}
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