xf86-video-ati: Branch 'master' - 2 commits
Alex Deucher
agd5f at kemper.freedesktop.org
Sun Apr 27 17:34:41 PDT 2008
src/atombios_crtc.c | 2 -
src/atombios_output.c | 94 +++++++++++++++++++++++------------------------
src/legacy_output.c | 4 +-
src/radeon_accel.c | 2 -
src/radeon_atombios.c | 24 ++++++------
src/radeon_commonfuncs.c | 6 +--
src/radeon_reg.h | 19 ++++++++-
7 files changed, 82 insertions(+), 69 deletions(-)
New commits:
commit 656b06bdde129ca4fc370f5a2cf7311c9179b0ff
Author: Alex Deucher <alex at botch2.com>
Date: Sun Apr 27 20:20:49 2008 -0400
RADEON: remove duplicate register define
Also add more bit defs to wait_until register
diff --git a/src/radeon_accel.c b/src/radeon_accel.c
index 9fecce6..9e7ea7a 100644
--- a/src/radeon_accel.c
+++ b/src/radeon_accel.c
@@ -409,7 +409,7 @@ void RADEONEngineInit(ScrnInfoPtr pScrn)
}
OUTREG(R300_GB_TILE_CONFIG, gb_tile_config);
- OUTREG(R300_WAIT_UNTIL, R300_WAIT_2D_IDLECLEAN | R300_WAIT_3D_IDLECLEAN);
+ OUTREG(RADEON_WAIT_UNTIL, RADEON_WAIT_2D_IDLECLEAN | RADEON_WAIT_3D_IDLECLEAN);
OUTREG(R300_DST_PIPE_CONFIG, INREG(R300_DST_PIPE_CONFIG) | R300_PIPE_AUTO_CONFIG);
OUTREG(R300_RB2D_DSTCACHE_MODE, (INREG(R300_RB2D_DSTCACHE_MODE) |
R300_DC_AUTOFLUSH_ENABLE |
diff --git a/src/radeon_commonfuncs.c b/src/radeon_commonfuncs.c
index c249c43..e8ddff8 100644
--- a/src/radeon_commonfuncs.c
+++ b/src/radeon_commonfuncs.c
@@ -65,7 +65,7 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn)
BEGIN_ACCEL(3);
OUT_ACCEL_REG(R300_RB3D_DSTCACHE_CTLSTAT, R300_DC_FLUSH_3D | R300_DC_FREE_3D);
OUT_ACCEL_REG(R300_RB3D_ZCACHE_CTLSTAT, R300_ZC_FLUSH | R300_ZC_FREE);
- OUT_ACCEL_REG(R300_WAIT_UNTIL, R300_WAIT_2D_IDLECLEAN | R300_WAIT_3D_IDLECLEAN);
+ OUT_ACCEL_REG(RADEON_WAIT_UNTIL, RADEON_WAIT_2D_IDLECLEAN | RADEON_WAIT_3D_IDLECLEAN);
FINISH_ACCEL();
gb_tile_config = (R300_ENABLE_TILING | R300_TILE_SIZE_16 | R300_SUBPIXEL_1_16);
@@ -80,7 +80,7 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn)
BEGIN_ACCEL(5);
OUT_ACCEL_REG(R300_GB_TILE_CONFIG, gb_tile_config);
- OUT_ACCEL_REG(R300_WAIT_UNTIL, R300_WAIT_2D_IDLECLEAN | R300_WAIT_3D_IDLECLEAN);
+ OUT_ACCEL_REG(RADEON_WAIT_UNTIL, RADEON_WAIT_2D_IDLECLEAN | RADEON_WAIT_3D_IDLECLEAN);
OUT_ACCEL_REG(R300_DST_PIPE_CONFIG, R300_PIPE_AUTO_CONFIG);
OUT_ACCEL_REG(R300_GB_SELECT, 0);
OUT_ACCEL_REG(R300_GB_ENABLE, 0);
@@ -97,7 +97,7 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn)
BEGIN_ACCEL(3);
OUT_ACCEL_REG(R300_RB3D_DSTCACHE_CTLSTAT, R300_DC_FLUSH_3D | R300_DC_FREE_3D);
OUT_ACCEL_REG(R300_RB3D_ZCACHE_CTLSTAT, R300_ZC_FLUSH | R300_ZC_FREE);
- OUT_ACCEL_REG(R300_WAIT_UNTIL, R300_WAIT_2D_IDLECLEAN | R300_WAIT_3D_IDLECLEAN);
+ OUT_ACCEL_REG(RADEON_WAIT_UNTIL, RADEON_WAIT_2D_IDLECLEAN | RADEON_WAIT_3D_IDLECLEAN);
FINISH_ACCEL();
BEGIN_ACCEL(5);
diff --git a/src/radeon_reg.h b/src/radeon_reg.h
index 5112872..0d684a5 100644
--- a/src/radeon_reg.h
+++ b/src/radeon_reg.h
@@ -1661,9 +1661,25 @@
#define RADEON_WAIT_UNTIL 0x1720
# define RADEON_WAIT_CRTC_PFLIP (1 << 0)
+# define RADEON_WAIT_RE_CRTC_VLINE (1 << 1)
+# define RADEON_WAIT_FE_CRTC_VLINE (1 << 2)
+# define RADEON_WAIT_CRTC_VLINE (1 << 3)
+# define RADEON_WAIT_DMA_VID_IDLE (1 << 8)
+# define RADEON_WAIT_DMA_GUI_IDLE (1 << 9)
+# define RADEON_WAIT_CMDFIFO (1 << 10) /* wait for CMDFIFO_ENTRIES */
+# define RADEON_WAIT_OV0_FLIP (1 << 11)
+# define RADEON_WAIT_AGP_FLUSH (1 << 13)
+# define RADEON_WAIT_2D_IDLE (1 << 14)
+# define RADEON_WAIT_3D_IDLE (1 << 15)
# define RADEON_WAIT_2D_IDLECLEAN (1 << 16)
# define RADEON_WAIT_3D_IDLECLEAN (1 << 17)
# define RADEON_WAIT_HOST_IDLECLEAN (1 << 18)
+# define RADEON_CMDFIFO_ENTRIES_SHIFT 10
+# define RADEON_CMDFIFO_ENTRIES_MASK 0x7f
+# define RADEON_WAIT_VAP_IDLE (1 << 28)
+# define RADEON_WAIT_BOTH_CRTC_PFLIP (1 << 30)
+# define RADEON_ENG_DISPLAY_SELECT_CRTC0 (0 << 31)
+# define RADEON_ENG_DISPLAY_SELECT_CRTC1 (1 << 31)
#define RADEON_X_MPLL_REF_FB_DIV 0x000a /* PLL */
#define RADEON_XCLK_CNTL 0x000d /* PLL */
@@ -4634,9 +4650,6 @@
# define R300_ZC_FLUSH (1 << 0)
# define R300_ZC_FREE (1 << 1)
# define R300_ZC_FLUSH_ALL 0x3
-#define R300_WAIT_UNTIL 0x1720
-# define R300_WAIT_2D_IDLECLEAN (1 << 16)
-# define R300_WAIT_3D_IDLECLEAN (1 << 17)
#define R300_RB3D_ZSTENCILCNTL 0x4f04
#define R300_RB3D_ZCACHE_CTLSTAT 0x4f18
#define R300_RB3D_BW_CNTL 0x4f1c
commit 8a9820a3aa49bc667f90ac291a27e4d7b4ae38b3
Author: Alex Deucher <alex at botch2.com>
Date: Sun Apr 27 19:02:22 2008 -0400
RADEON: decrease crtc/output verbosity
diff --git a/src/atombios_crtc.c b/src/atombios_crtc.c
index 51981a7..bab56b2 100644
--- a/src/atombios_crtc.c
+++ b/src/atombios_crtc.c
@@ -231,7 +231,7 @@ atombios_crtc_set_pll(xf86CrtcPtr crtc, DisplayModePtr mode)
atombios_get_command_table_version(info->atomBIOS, index, &major, &minor);
- ErrorF("table is %d %d\n", major, minor);
+ /*ErrorF("table is %d %d\n", major, minor);*/
switch(major) {
case 1:
switch(minor) {
diff --git a/src/atombios_output.c b/src/atombios_output.c
index a00d87f..d8e88ca 100644
--- a/src/atombios_output.c
+++ b/src/atombios_output.c
@@ -742,49 +742,49 @@ atombios_output_dpms(xf86OutputPtr output, int mode)
RADEONOutputPrivatePtr radeon_output = output->driver_private;
RADEONInfoPtr info = RADEONPTR(output->scrn);
- ErrorF("AGD: output dpms %d\n", mode);
-
- if (radeon_output->MonType == MT_LCD) {
- if (radeon_output->devices & ATOM_DEVICE_LCD1_SUPPORT) {
- if (IS_DCE3_VARIANT)
- atombios_output_dig_dpms(output, mode, 2);
- else
- atombios_device_dpms(output, ATOM_DEVICE_LCD1_SUPPORT, mode);
- }
- } else if (radeon_output->MonType == MT_DFP) {
- ErrorF("AGD: tmds dpms\n");
- if (radeon_output->devices & ATOM_DEVICE_DFP1_SUPPORT) {
- if (IS_DCE3_VARIANT)
- atombios_output_dig_dpms(output, mode, 1);
- else
- atombios_device_dpms(output, ATOM_DEVICE_DFP1_SUPPORT, mode);
- } else if (radeon_output->devices & ATOM_DEVICE_DFP2_SUPPORT) {
- if (IS_DCE3_VARIANT)
- return; // fixme
- else
- atombios_device_dpms(output, ATOM_DEVICE_DFP2_SUPPORT, mode);
- } else if (radeon_output->devices & ATOM_DEVICE_DFP3_SUPPORT) {
- if (IS_DCE3_VARIANT)
- atombios_output_dig_dpms(output, mode, 2);
- else
- atombios_device_dpms(output, ATOM_DEVICE_DFP3_SUPPORT, mode);
- }
- } else if (radeon_output->MonType == MT_CRT) {
- ErrorF("AGD: dac dpms\n");
- if (radeon_output->devices & ATOM_DEVICE_CRT1_SUPPORT)
- atombios_device_dpms(output, ATOM_DEVICE_CRT1_SUPPORT, mode);
- else if (radeon_output->devices & ATOM_DEVICE_CRT2_SUPPORT)
- atombios_device_dpms(output, ATOM_DEVICE_CRT2_SUPPORT, mode);
- } else if (radeon_output->MonType == MT_CV) {
- ErrorF("AGD: cv dpms\n");
- if (radeon_output->devices & ATOM_DEVICE_CV_SUPPORT)
- atombios_device_dpms(output, ATOM_DEVICE_CV_SUPPORT, mode);
- } else if (0 /*radeon_output->MonType == MT_STV ||
- radeon_output->MonType == MT_CTV*/) {
- ErrorF("AGD: tv dpms\n");
- if (radeon_output->devices & ATOM_DEVICE_TV1_SUPPORT)
- atombios_device_dpms(output, ATOM_DEVICE_TV1_SUPPORT, mode);
- }
+ /*ErrorF("output dpms %d\n", mode);*/
+
+ if (radeon_output->MonType == MT_LCD) {
+ if (radeon_output->devices & ATOM_DEVICE_LCD1_SUPPORT) {
+ if (IS_DCE3_VARIANT)
+ atombios_output_dig_dpms(output, mode, 2);
+ else
+ atombios_device_dpms(output, ATOM_DEVICE_LCD1_SUPPORT, mode);
+ }
+ } else if (radeon_output->MonType == MT_DFP) {
+ /*ErrorF("tmds dpms\n");*/
+ if (radeon_output->devices & ATOM_DEVICE_DFP1_SUPPORT) {
+ if (IS_DCE3_VARIANT)
+ atombios_output_dig_dpms(output, mode, 1);
+ else
+ atombios_device_dpms(output, ATOM_DEVICE_DFP1_SUPPORT, mode);
+ } else if (radeon_output->devices & ATOM_DEVICE_DFP2_SUPPORT) {
+ if (IS_DCE3_VARIANT)
+ return; // fixme
+ else
+ atombios_device_dpms(output, ATOM_DEVICE_DFP2_SUPPORT, mode);
+ } else if (radeon_output->devices & ATOM_DEVICE_DFP3_SUPPORT) {
+ if (IS_DCE3_VARIANT)
+ atombios_output_dig_dpms(output, mode, 2);
+ else
+ atombios_device_dpms(output, ATOM_DEVICE_DFP3_SUPPORT, mode);
+ }
+ } else if (radeon_output->MonType == MT_CRT) {
+ /*ErrorF("AGD: dac dpms\n");*/
+ if (radeon_output->devices & ATOM_DEVICE_CRT1_SUPPORT)
+ atombios_device_dpms(output, ATOM_DEVICE_CRT1_SUPPORT, mode);
+ else if (radeon_output->devices & ATOM_DEVICE_CRT2_SUPPORT)
+ atombios_device_dpms(output, ATOM_DEVICE_CRT2_SUPPORT, mode);
+ } else if (radeon_output->MonType == MT_CV) {
+ /*ErrorF("AGD: cv dpms\n");*/
+ if (radeon_output->devices & ATOM_DEVICE_CV_SUPPORT)
+ atombios_device_dpms(output, ATOM_DEVICE_CV_SUPPORT, mode);
+ } else if (0 /*radeon_output->MonType == MT_STV ||
+ radeon_output->MonType == MT_CTV*/) {
+ /*ErrorF("AGD: tv dpms\n");*/
+ if (radeon_output->devices & ATOM_DEVICE_TV1_SUPPORT)
+ atombios_device_dpms(output, ATOM_DEVICE_TV1_SUPPORT, mode);
+ }
}
@@ -803,7 +803,7 @@ atombios_set_output_crtc_source(xf86OutputPtr output)
atombios_get_command_table_version(info->atomBIOS, index, &major, &minor);
- ErrorF("select crtc source table is %d %d\n", major, minor);
+ /*ErrorF("select crtc source table is %d %d\n", major, minor);*/
switch(major) {
case 1: {
@@ -836,7 +836,7 @@ atombios_set_output_crtc_source(xf86OutputPtr output)
crtc_src_param.ucDevice = ATOM_DEVICE_CV_INDEX;
}
data.exec.pspace = &crtc_src_param;
- ErrorF("device sourced: 0x%x\n", crtc_src_param.ucDevice);
+ /*ErrorF("device sourced: 0x%x\n", crtc_src_param.ucDevice);*/
break;
case 2:
crtc_src_param2.ucCRTC = radeon_crtc->crtc_id;
@@ -874,7 +874,7 @@ atombios_set_output_crtc_source(xf86OutputPtr output)
}
data.exec.pspace = &crtc_src_param2;
- ErrorF("device sourced: 0x%x\n", crtc_src_param2.ucEncoderID);
+ /*ErrorF("device sourced: 0x%x\n", crtc_src_param2.ucEncoderID);*/
break;
}
break;
@@ -1049,7 +1049,7 @@ atombios_dac_detect(ScrnInfoPtr pScrn, xf86OutputPtr output)
bios_0_scratch = INREG(R600_BIOS_0_SCRATCH);
else
bios_0_scratch = INREG(RADEON_BIOS_0_SCRATCH);
- ErrorF("DAC connect %08X\n", (unsigned int)bios_0_scratch);
+ /*ErrorF("DAC connect %08X\n", (unsigned int)bios_0_scratch);*/
if (radeon_output->devices & ATOM_DEVICE_CRT1_SUPPORT) {
if (bios_0_scratch & ATOM_S0_CRT1_MASK)
diff --git a/src/legacy_output.c b/src/legacy_output.c
index 0d6e4f1..a65a41e 100644
--- a/src/legacy_output.c
+++ b/src/legacy_output.c
@@ -701,7 +701,7 @@ RADEONEnableDisplay(xf86OutputPtr output, BOOL bEnable)
}
if (bEnable) {
- ErrorF("enable montype: %d\n", radeon_output->MonType);
+ /*ErrorF("enable montype: %d\n", radeon_output->MonType);*/
if (radeon_output->MonType == MT_CRT) {
if (radeon_output->DACType == DAC_PRIMARY) {
info->output_crt1 |= (1 << o);
@@ -775,7 +775,7 @@ RADEONEnableDisplay(xf86OutputPtr output, BOOL bEnable)
radeon_output->tv_on = TRUE;
}
} else {
- ErrorF("disable montype: %d\n", radeon_output->MonType);
+ /*ErrorF("disable montype: %d\n", radeon_output->MonType);*/
if (radeon_output->MonType == MT_CRT) {
if (radeon_output->DACType == DAC_PRIMARY) {
info->output_crt1 &= ~(1 << o);
diff --git a/src/radeon_atombios.c b/src/radeon_atombios.c
index 224aae3..b17b53c 100644
--- a/src/radeon_atombios.c
+++ b/src/radeon_atombios.c
@@ -2071,7 +2071,7 @@ CailDelayMicroSeconds(VOID *CAIL, UINT32 delay)
usleep(delay);
- DEBUGP(xf86DrvMsg(((atomBiosHandlePtr)CAIL)->scrnIndex,X_INFO,"Delay %i usec\n",delay));
+ /*DEBUGP(xf86DrvMsg(((atomBiosHandlePtr)CAIL)->scrnIndex,X_INFO,"Delay %i usec\n",delay));*/
}
UINT32
@@ -2084,7 +2084,7 @@ CailReadATIRegister(VOID* CAIL, UINT32 idx)
CAILFUNC(CAIL);
ret = INREG(idx << 2);
- DEBUGP(ErrorF("%s(%x) = %x\n",__func__,idx << 2,ret));
+ /*DEBUGP(ErrorF("%s(%x) = %x\n",__func__,idx << 2,ret));*/
return ret;
}
@@ -2097,7 +2097,7 @@ CailWriteATIRegister(VOID *CAIL, UINT32 idx, UINT32 data)
CAILFUNC(CAIL);
OUTREG(idx << 2,data);
- DEBUGP(ErrorF("%s(%x,%x)\n",__func__,idx << 2,data));
+ /*DEBUGP(ErrorF("%s(%x,%x)\n",__func__,idx << 2,data));*/
}
UINT32
@@ -2112,10 +2112,10 @@ CailReadFBData(VOID* CAIL, UINT32 idx)
if (((atomBiosHandlePtr)CAIL)->fbBase) {
CARD8 *FBBase = (CARD8*)info->FB;
ret = *((CARD32*)(FBBase + (((atomBiosHandlePtr)CAIL)->fbBase) + idx));
- DEBUGP(ErrorF("%s(%x) = %x\n",__func__,idx,ret));
+ /*DEBUGP(ErrorF("%s(%x) = %x\n",__func__,idx,ret));*/
} else if (((atomBiosHandlePtr)CAIL)->scratchBase) {
ret = *(CARD32*)((CARD8*)(((atomBiosHandlePtr)CAIL)->scratchBase) + idx);
- DEBUGP(ErrorF("%s(%x) = %x\n",__func__,idx,ret));
+ /*DEBUGP(ErrorF("%s(%x) = %x\n",__func__,idx,ret));*/
} else {
xf86DrvMsg(((atomBiosHandlePtr)CAIL)->scrnIndex,X_ERROR,
"%s: no fbbase set\n",__func__);
@@ -2129,7 +2129,7 @@ CailWriteFBData(VOID *CAIL, UINT32 idx, UINT32 data)
{
CAILFUNC(CAIL);
- DEBUGP(ErrorF("%s(%x,%x)\n",__func__,idx,data));
+ /*DEBUGP(ErrorF("%s(%x,%x)\n",__func__,idx,data));*/
if (((atomBiosHandlePtr)CAIL)->fbBase) {
CARD8 *FBBase = (CARD8*)
RADEONPTR(xf86Screens[((atomBiosHandlePtr)CAIL)->scrnIndex])->FB;
@@ -2150,7 +2150,7 @@ CailReadMC(VOID *CAIL, ULONG Address)
CAILFUNC(CAIL);
ret = INMC(pScrn, Address);
- DEBUGP(ErrorF("%s(%x) = %x\n",__func__,Address,ret));
+ /*DEBUGP(ErrorF("%s(%x) = %x\n",__func__,Address,ret));*/
return ret;
}
@@ -2160,7 +2160,7 @@ CailWriteMC(VOID *CAIL, ULONG Address, ULONG data)
ScrnInfoPtr pScrn = xf86Screens[((atomBiosHandlePtr)CAIL)->scrnIndex];
CAILFUNC(CAIL);
- DEBUGP(ErrorF("%s(%x,%x)\n",__func__,Address,data));
+ /*DEBUGP(ErrorF("%s(%x,%x)\n",__func__,Address,data));*/
OUTMC(pScrn, Address, data);
}
@@ -2206,7 +2206,7 @@ CailReadPCIConfigData(VOID*CAIL, VOID* ret, UINT32 idx,UINT16 size)
return;
break;
}
- DEBUGP(ErrorF("%s(%x) = %x\n",__func__,idx,*(unsigned int*)ret));
+ /*DEBUGP(ErrorF("%s(%x) = %x\n",__func__,idx,*(unsigned int*)ret));*/
}
@@ -2216,7 +2216,7 @@ CailWritePCIConfigData(VOID*CAIL,VOID*src,UINT32 idx,UINT16 size)
PCITAG tag = ((atomBiosHandlePtr)CAIL)->PciTag;
CAILFUNC(CAIL);
- DEBUGP(ErrorF("%s(%x,%x)\n",__func__,idx,(*(unsigned int*)src)));
+ /*DEBUGP(ErrorF("%s(%x,%x)\n",__func__,idx,(*(unsigned int*)src)));*/
switch (size) {
case 8:
pciWriteByte(tag,idx << 2,*(CARD8*)src);
@@ -2244,7 +2244,7 @@ CailReadPLL(VOID *CAIL, ULONG Address)
CAILFUNC(CAIL);
ret = RADEONINPLL(pScrn, Address);
- DEBUGP(ErrorF("%s(%x) = %x\n",__func__,Address,ret));
+ /*DEBUGP(ErrorF("%s(%x) = %x\n",__func__,Address,ret));*/
return ret;
}
@@ -2254,7 +2254,7 @@ CailWritePLL(VOID *CAIL, ULONG Address,ULONG Data)
ScrnInfoPtr pScrn = xf86Screens[((atomBiosHandlePtr)CAIL)->scrnIndex];
CAILFUNC(CAIL);
- DEBUGP(ErrorF("%s(%x,%x)\n",__func__,Address,Data));
+ /*DEBUGP(ErrorF("%s(%x,%x)\n",__func__,Address,Data));*/
RADEONOUTPLL(pScrn, Address, Data);
}
More information about the xorg-commit
mailing list