xf86-video-intel: 3 commits - src/i965_render.c

Eric Anholt anholt at kemper.freedesktop.org
Tue Apr 15 00:06:37 PDT 2008


 src/i965_render.c |   70 +++++++++++++++++++++---------------------------------
 1 file changed, 28 insertions(+), 42 deletions(-)

New commits:
commit e27ce4238f748d024635835824c120eb298b84b2
Author: Eric Anholt <eric at anholt.net>
Date:   Mon Apr 14 23:30:21 2008 -0700

    Move the vertex buffer to the state structure as well.

diff --git a/src/i965_render.c b/src/i965_render.c
index fef30ba..ef10a88 100644
--- a/src/i965_render.c
+++ b/src/i965_render.c
@@ -277,9 +277,6 @@ i965_check_composite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture,
 #define URB_SF_ENTRY_SIZE     2
 #define URB_SF_ENTRIES	      1
 
-static float *vb;
-static int vb_size = (2 + 3 + 3) * 3 * 4;   /* (dst, src, mask) 3 vertices, 4 bytes */
-
 static const uint32_t sip_kernel_static[][4] = {
 /*    wait (1) a0<1>UW a145<0,1,0>UW { align1 +  } */
     { 0x00000030, 0x20000108, 0x00001220, 0x00000000 },
@@ -497,6 +494,8 @@ typedef struct _gen4_state {
     PAD64 (brw_cc_viewport, 0);
 
     uint8_t other_state[65536];
+
+    float vb[(2 + 3 + 3) * 3];   /* (dst, src, mask) 3 vertices, 4 bytes */
 } gen4_state_t;
 
 /** Private data for gen4 render accel implementation. */
@@ -852,7 +851,6 @@ i965_prepare_composite(int op, PicturePtr pSrcPicture,
     struct brw_surface_state *src_surf_state, src_surf_state_local;
     struct brw_surface_state *mask_surf_state, mask_surf_state_local;
     int dest_surf_offset, src_surf_offset, mask_surf_offset = 0;
-    int vb_offset;
     int next_offset, total_state_size;
     char *state_base;
     int state_base_offset;
@@ -907,10 +905,6 @@ i965_prepare_composite(int op, PicturePtr pSrcPicture,
     /* Set up our layout of state in framebuffer.  First the general state: */
     next_offset = offsetof(gen4_state_t, other_state);
 
-    /* Align VB to native size of elements, for safety */
-    vb_offset = ALIGN(next_offset, 32);
-    next_offset = vb_offset + vb_size;
-
     /* And then the general state: */
     dest_surf_offset = ALIGN(next_offset, 32);
     next_offset = dest_surf_offset + sizeof(*dest_surf_state);
@@ -930,8 +924,6 @@ i965_prepare_composite(int op, PicturePtr pSrcPicture,
     assert((state_base_offset & 63) == 0);
     state_base = (char *)(pI830->FbBase + state_base_offset);
 
-    vb = (void *)(state_base + vb_offset);
-
     urb_vs_start = 0;
     urb_vs_size = URB_VS_ENTRIES * URB_VS_ENTRY_SIZE;
     urb_gs_start = urb_vs_start + urb_vs_size;
@@ -1257,7 +1249,7 @@ i965_prepare_composite(int op, PicturePtr pSrcPicture,
 	OUT_BATCH((0 << VB0_BUFFER_INDEX_SHIFT) |
 		  VB0_VERTEXDATA |
 		  ((4 * (2 + nelem * selem)) << VB0_BUFFER_PITCH_SHIFT));
-	OUT_BATCH(state_base_offset + vb_offset);
+	OUT_BATCH(state_base_offset + offsetof(gen4_state_t, vb));
         OUT_BATCH(3);
 	OUT_BATCH(0); // ignore for VERTEXDATA, but still there
 
@@ -1315,9 +1307,11 @@ i965_composite(PixmapPtr pDst, int srcX, int srcY, int maskX, int maskY,
 {
     ScrnInfoPtr pScrn = xf86Screens[pDst->drawable.pScreen->myNum];
     I830Ptr pI830 = I830PTR(pScrn);
+    gen4_state_t *card_state = pI830->gen4_render_state->card_state;
     Bool has_mask;
     Bool is_affine_src, is_affine_mask, is_affine;
     float src_x[3], src_y[3], src_w[3], mask_x[3], mask_y[3], mask_w[3];
+    float *vb = card_state->vb;
     int i;
 
     is_affine_src = i830_transform_is_affine (pI830->transform[0]);
@@ -1441,7 +1435,7 @@ i965_composite(PixmapPtr pDst, int srcX, int srcY, int maskX, int maskY,
 	if (!is_affine)
 	    vb[i++] = mask_w[0];
     }
-    assert (i * 4 <= vb_size);
+    assert (i * 4 <= sizeof(card_state->vb));
 
     {
       BEGIN_BATCH(6);
commit 69709fe36cfdb59c140f5cba233dcb606f8dbc85
Author: Eric Anholt <eric at anholt.net>
Date:   Mon Apr 14 18:34:13 2008 -0700

    Move the binding table for 965 to the state structure.

diff --git a/src/i965_render.c b/src/i965_render.c
index 11ef803..fef30ba 100644
--- a/src/i965_render.c
+++ b/src/i965_render.c
@@ -477,7 +477,11 @@ typedef struct _gen4_state {
     WM_STATE_DECL (masknoca_affine);
     WM_STATE_DECL (masknoca_projective);
 
-    /* Index by [src_filter][src_extend][mask_filter][mask_extend] */
+    uint32_t binding_table[16]; /* Only use 3, but pad to 64 bytes */
+
+    /* Index by [src_filter][src_extend][mask_filter][mask_extend].  Two of
+     * the structs happen to add to 32 bytes.
+     */
     struct brw_sampler_state sampler_state[SAMPLER_STATE_FILTER_COUNT]
 					  [SAMPLER_STATE_EXTEND_COUNT]
 					  [SAMPLER_STATE_FILTER_COUNT]
@@ -829,6 +833,7 @@ i965_prepare_composite(int op, PicturePtr pSrcPicture,
 {
     ScrnInfoPtr pScrn = xf86Screens[pSrcPicture->pDrawable->pScreen->myNum];
     I830Ptr pI830 = I830PTR(pScrn);
+    gen4_state_t *card_state = pI830->gen4_render_state->card_state;
     uint32_t src_offset, src_pitch, src_tile_format = 0, src_tiled = 0;
     uint32_t mask_offset = 0, mask_pitch = 0, mask_tile_format = 0,
 	mask_tiled = 0;
@@ -846,15 +851,13 @@ i965_prepare_composite(int op, PicturePtr pSrcPicture,
     struct brw_surface_state *dest_surf_state, dest_surf_state_local;
     struct brw_surface_state *src_surf_state, src_surf_state_local;
     struct brw_surface_state *mask_surf_state, mask_surf_state_local;
-    uint32_t *binding_table;
-    int binding_table_entries;
     int dest_surf_offset, src_surf_offset, mask_surf_offset = 0;
     int vb_offset;
-    int binding_table_offset;
     int next_offset, total_state_size;
     char *state_base;
     int state_base_offset;
     uint32_t src_blend, dst_blend;
+    uint32_t *binding_table;
 
     IntelEmitInvarientState(pScrn);
     *pI830->last_3d = LAST_3D_RENDER;
@@ -901,8 +904,6 @@ i965_prepare_composite(int op, PicturePtr pSrcPicture,
 
     /* setup 3d pipeline state */
 
-    binding_table_entries = 2; /* default no mask */
-
     /* Set up our layout of state in framebuffer.  First the general state: */
     next_offset = offsetof(gen4_state_t, other_state);
 
@@ -920,12 +921,8 @@ i965_prepare_composite(int op, PicturePtr pSrcPicture,
     if (pMask) {
    	mask_surf_offset = ALIGN(next_offset, 32);
    	next_offset = mask_surf_offset + sizeof(*mask_surf_state);
-	binding_table_entries = 3;
     }
 
-    binding_table_offset = ALIGN(next_offset, 32);
-    next_offset = binding_table_offset + (binding_table_entries * 4);
-
     total_state_size = next_offset;
     assert(total_state_size < sizeof(gen4_state_t));
 
@@ -933,8 +930,6 @@ i965_prepare_composite(int op, PicturePtr pSrcPicture,
     assert((state_base_offset & 63) == 0);
     state_base = (char *)(pI830->FbBase + state_base_offset);
 
-    binding_table = (void *)(state_base + binding_table_offset);
-
     vb = (void *)(state_base + vb_offset);
 
     urb_vs_start = 0;
@@ -1047,6 +1042,7 @@ i965_prepare_composite(int op, PicturePtr pSrcPicture,
     }
 
     /* Set up a binding table for our surfaces.  Only the PS will use it */
+    binding_table = &card_state->binding_table[0];
     binding_table[0] = state_base_offset + dest_surf_offset;
     binding_table[1] = state_base_offset + src_surf_offset;
     if (pMask)
@@ -1132,7 +1128,7 @@ i965_prepare_composite(int op, PicturePtr pSrcPicture,
 	OUT_BATCH(0); /* clip */
 	OUT_BATCH(0); /* sf */
 	/* Only the PS uses the binding table */
-	OUT_BATCH(state_base_offset + binding_table_offset); /* ps */
+	OUT_BATCH(state_base_offset + offsetof(gen4_state_t, binding_table));
 
 	/* The drawing rectangle clipping is always on.  Set it to values that
 	 * shouldn't do any clipping.
commit 049d057dfd73b6c191a8ba5d73eddb77cf7748e7
Author: Eric Anholt <eric at anholt.net>
Date:   Mon Apr 14 17:09:22 2008 -0700

    Move the 965 static variables local to the function they're used in.

diff --git a/src/i965_render.c b/src/i965_render.c
index cb2debb..11ef803 100644
--- a/src/i965_render.c
+++ b/src/i965_render.c
@@ -277,30 +277,9 @@ i965_check_composite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture,
 #define URB_SF_ENTRY_SIZE     2
 #define URB_SF_ENTRIES	      1
 
-static int urb_vs_start, urb_vs_size;
-static int urb_gs_start, urb_gs_size;
-static int urb_clip_start, urb_clip_size;
-static int urb_sf_start, urb_sf_size;
-static int urb_cs_start, urb_cs_size;
-
-static struct brw_surface_state *dest_surf_state, dest_surf_state_local;
-static struct brw_surface_state *src_surf_state, src_surf_state_local;
-static struct brw_surface_state *mask_surf_state, mask_surf_state_local;
-
-static uint32_t *binding_table;
-static int binding_table_entries;
-
-static int dest_surf_offset, src_surf_offset, mask_surf_offset;
-static int vb_offset;
-static int binding_table_offset;
-static int next_offset, total_state_size;
-static char *state_base;
-static int state_base_offset;
 static float *vb;
 static int vb_size = (2 + 3 + 3) * 3 * 4;   /* (dst, src, mask) 3 vertices, 4 bytes */
 
-static uint32_t src_blend, dst_blend;
-
 static const uint32_t sip_kernel_static[][4] = {
 /*    wait (1) a0<1>UW a145<0,1,0>UW { align1 +  } */
     { 0x00000030, 0x20000108, 0x00001220, 0x00000000 },
@@ -859,6 +838,23 @@ i965_prepare_composite(int op, PicturePtr pSrcPicture,
     sampler_state_filter_t src_filter, mask_filter;
     sampler_state_extend_t src_extend, mask_extend;
     Bool is_affine_src, is_affine_mask, is_affine;
+    int urb_vs_start, urb_vs_size;
+    int urb_gs_start, urb_gs_size;
+    int urb_clip_start, urb_clip_size;
+    int urb_sf_start, urb_sf_size;
+    int urb_cs_start, urb_cs_size;
+    struct brw_surface_state *dest_surf_state, dest_surf_state_local;
+    struct brw_surface_state *src_surf_state, src_surf_state_local;
+    struct brw_surface_state *mask_surf_state, mask_surf_state_local;
+    uint32_t *binding_table;
+    int binding_table_entries;
+    int dest_surf_offset, src_surf_offset, mask_surf_offset = 0;
+    int vb_offset;
+    int binding_table_offset;
+    int next_offset, total_state_size;
+    char *state_base;
+    int state_base_offset;
+    uint32_t src_blend, dst_blend;
 
     IntelEmitInvarientState(pScrn);
     *pI830->last_3d = LAST_3D_RENDER;


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