xf86-video-intel: 5 commits - src/exa_wm.g4i src/exa_wm_projective.g4i src/exa_wm_src_sample_planar.g4a src/exa_wm_src_sample_planar.g4b src/exa_wm_write.g4a src/exa_wm_write.g4b src/exa_wm_yuv_rgb.g4a src/exa_wm_yuv_rgb.g4b src/i830_video.c src/i965_render.c src/i965_video.c
Keith Packard
keithp at kemper.freedesktop.org
Sun Apr 13 12:47:02 PDT 2008
src/exa_wm.g4i | 16 ++++++++++++++
src/exa_wm_projective.g4i | 2 -
src/exa_wm_src_sample_planar.g4a | 11 ++++-----
src/exa_wm_src_sample_planar.g4b | 4 +--
src/exa_wm_write.g4a | 10 ++++----
src/exa_wm_write.g4b | 10 ++++----
src/exa_wm_yuv_rgb.g4a | 44 ++++++++++++---------------------------
src/exa_wm_yuv_rgb.g4b | 24 +++++++--------------
src/i830_video.c | 14 +++++++++---
src/i965_render.c | 4 +--
src/i965_video.c | 35 ++++++++++++++++---------------
11 files changed, 88 insertions(+), 86 deletions(-)
New commits:
commit 269809030ee9d08b56ad0178a7a9c0194e25785e
Author: Keith Packard <keithp at keithp.com>
Date: Sun Apr 13 12:47:02 2008 -0700
Move wm_scratch first to meet alignment requirements
diff --git a/src/i965_render.c b/src/i965_render.c
index efbfc49..5a112d1 100644
--- a/src/i965_render.c
+++ b/src/i965_render.c
@@ -459,6 +459,8 @@ typedef struct _brw_cc_unit_state_padded {
* the rest.
*/
typedef struct _gen4_state {
+ uint8_t wm_scratch[128 * PS_MAX_THREADS];
+
KERNEL_DECL (sip_kernel);
KERNEL_DECL (sf_kernel);
KERNEL_DECL (sf_kernel_mask);
@@ -471,8 +473,6 @@ typedef struct _gen4_state {
KERNEL_DECL (ps_kernel_masknoca_affine);
KERNEL_DECL (ps_kernel_masknoca_projective);
- uint8_t wm_scratch[128 * PS_MAX_THREADS];
-
WM_STATE_DECL (nomask_affine);
WM_STATE_DECL (nomask_projective);
WM_STATE_DECL (maskca_affine);
commit 08d3206f3b891e611e3e16c9eb79cfca21ab8a51
Author: Keith Packard <keithp at keithp.com>
Date: Sun Apr 13 12:35:14 2008 -0700
Kludge to make planar video work - duplicate sampler state
This patch duplicates all of the surface sampler state needed to read from
the separate YUV surfaces and then has the planar sampler read from samplers
0, 2, 4 instead of 0, 1, 2. This appears to make things work, instead of
having the samplers break at random. I do not understand why this works.
diff --git a/src/exa_wm_src_sample_planar.g4a b/src/exa_wm_src_sample_planar.g4a
index 10b15eb..ca77b48 100644
--- a/src/exa_wm_src_sample_planar.g4a
+++ b/src/exa_wm_src_sample_planar.g4a
@@ -42,7 +42,7 @@ mov (1) g0.8<1>UD 0x0000e000UD { align1 mask_disable };
/* sample Y */
send (16) src_msg_ind /* msg reg index */
- src_sample_g_01<1>UW /* readback */
+ src_sample_g<1>UW /* readback */
g0<8,8,1>UW /* copy to msg start reg*/
sampler (1,0,F) /* sampler message description, (binding_table,sampler_index,datatype)
/* here(src->dst) we should use src_sampler and src_surface */
@@ -50,17 +50,16 @@ send (16) src_msg_ind /* msg reg index */
/* sample U (Cr) */
send (16) src_msg_ind /* msg reg index */
- src_sample_r_01<1>UW /* readback */
+ src_sample_r<1>UW /* readback */
g0<8,8,1>UW /* copy to msg start reg*/
- sampler (2,1,F) /* sampler message description, (binding_table,sampler_index,datatype)
+ sampler (3,2,F) /* sampler message description, (binding_table,sampler_index,datatype)
/* here(src->dst) we should use src_sampler and src_surface */
mlen 5 rlen 2 { align1 }; /* required message len 5, readback len 8 */
/* sample V (Cb) */
send (16) src_msg_ind /* msg reg index */
- src_sample_b_01<1>UW /* readback */
+ src_sample_b<1>UW /* readback */
g0<8,8,1>UW /* copy to msg start reg*/
- sampler (3,2,F) /* sampler message description, (binding_table,sampler_index,datatype)
+ sampler (5,4,F) /* sampler message description, (binding_table,sampler_index,datatype)
/* here(src->dst) we should use src_sampler and src_surface */
mlen 5 rlen 2 { align1 }; /* required message len 5, readback len 8 */
-
diff --git a/src/exa_wm_src_sample_planar.g4b b/src/exa_wm_src_sample_planar.g4b
index d2b9cfe..77a5c23 100644
--- a/src/exa_wm_src_sample_planar.g4b
+++ b/src/exa_wm_src_sample_planar.g4b
@@ -1,4 +1,4 @@
{ 0x00000201, 0x20080061, 0x00000000, 0x0000e000 },
{ 0x01800031, 0x22001d29, 0x008d0000, 0x02520001 },
- { 0x01800031, 0x21c01d29, 0x008d0000, 0x02520102 },
- { 0x01800031, 0x22401d29, 0x008d0000, 0x02520203 },
+ { 0x01800031, 0x21c01d29, 0x008d0000, 0x02520203 },
+ { 0x01800031, 0x22401d29, 0x008d0000, 0x02520405 },
diff --git a/src/i965_video.c b/src/i965_video.c
index 464f2e3..485c89a 100644
--- a/src/i965_video.c
+++ b/src/i965_video.c
@@ -171,8 +171,8 @@ I965DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id,
int urb_sf_start, urb_sf_size;
int urb_cs_start, urb_cs_size;
struct brw_surface_state *dest_surf_state;
- struct brw_surface_state *src_surf_state[3];
- struct brw_sampler_state *src_sampler_state[3];
+ struct brw_surface_state *src_surf_state[6];
+ struct brw_sampler_state *src_sampler_state[6];
struct brw_vs_unit_state *vs_state;
struct brw_sf_unit_state *sf_state;
struct brw_wm_unit_state *wm_state;
@@ -185,7 +185,7 @@ I965DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id,
float src_scale_x, src_scale_y;
uint32_t *binding_table;
Bool first_output = TRUE;
- int dest_surf_offset, src_surf_offset[3], src_sampler_offset[3], vs_offset;
+ int dest_surf_offset, src_surf_offset[6], src_sampler_offset[6], vs_offset;
int sf_offset, wm_offset, cc_offset, vb_offset, cc_viewport_offset;
int wm_scratch_offset;
int sf_kernel_offset, ps_kernel_offset, sip_kernel_offset;
@@ -197,10 +197,10 @@ I965DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id,
int src_surf;
int n_src_surf;
uint32_t src_surf_format;
- uint32_t src_surf_base[3];
- int src_width[3];
- int src_height[3];
- int src_pitch[3];
+ uint32_t src_surf_base[6];
+ int src_width[6];
+ int src_height[6];
+ int src_pitch[6];
int wm_binding_table_entries;
const uint32_t *ps_kernel_static;
int ps_kernel_static_size;
@@ -219,8 +219,11 @@ I965DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id,
#endif
src_surf_base[0] = pPriv->YBuf0offset;
- src_surf_base[1] = pPriv->VBuf0offset;
- src_surf_base[2] = pPriv->UBuf0offset;
+ src_surf_base[1] = pPriv->YBuf0offset;
+ src_surf_base[2] = pPriv->VBuf0offset;
+ src_surf_base[3] = pPriv->VBuf0offset;
+ src_surf_base[4] = pPriv->UBuf0offset;
+ src_surf_base[5] = pPriv->UBuf0offset;
#if 0
ErrorF ("base 0 0x%x base 1 0x%x base 2 0x%x\n",
src_surf_base[0], src_surf_base[1], src_surf_base[2]);
@@ -250,13 +253,13 @@ I965DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id,
src_surf_format = BRW_SURFACEFORMAT_R8_UNORM;
ps_kernel_static = &ps_kernel_planar_static[0][0];
ps_kernel_static_size = sizeof (ps_kernel_planar_static);
- src_width[0] = width;
- src_height[0] = height;
- src_pitch[0] = video_pitch * 2;
- src_width[1] = src_width[2] = width / 2;
- src_height[1] = src_height[2] = height / 2;
- src_pitch[1] = src_pitch[2] = video_pitch;
- n_src_surf = 3;
+ src_width[1] = src_width[0] = width;
+ src_width[1] = src_height[0] = height;
+ src_pitch[1] = src_pitch[0] = video_pitch * 2;
+ src_width[4] = src_width[5] = src_width[2] = src_width[3] = width / 2;
+ src_height[4] = src_height[5] = src_height[2] = src_height[3] = height / 2;
+ src_pitch[4] = src_pitch[5] = src_pitch[2] = src_pitch[3] = video_pitch;
+ n_src_surf = 6;
break;
default:
return;
commit 6366e4de540c4713cbc8402c89516464bbdc35b9
Author: Keith Packard <keithp at keithp.com>
Date: Sat Apr 12 16:39:00 2008 -0700
Skip copying on FOURCC_XVMC surfaces
diff --git a/src/i830_video.c b/src/i830_video.c
index 2437288..7309949 100644
--- a/src/i830_video.c
+++ b/src/i830_video.c
@@ -2060,6 +2060,7 @@ i830_display_video(ScrnInfoPtr pScrn, xf86CrtcPtr crtc,
switch (id) {
case FOURCC_YV12:
case FOURCC_I420:
+ case FOURCC_XVMC:
OVERLAY_DEBUG("YUV420\n");
#if 0
/* set UV vertical phase to -0.25 */
@@ -2074,7 +2075,6 @@ i830_display_video(ScrnInfoPtr pScrn, xf86CrtcPtr crtc,
break;
case FOURCC_UYVY:
case FOURCC_YUY2:
- default:
OVERLAY_DEBUG("YUV422\n");
overlay->OSTRIDE = dstPitch;
OCMD &= ~SOURCE_FORMAT;
@@ -2315,6 +2315,7 @@ I830PutImage(ScrnInfoPtr pScrn,
switch (destId) {
case FOURCC_YV12:
case FOURCC_I420:
+ case FOURCC_XVMC:
if (pPriv->rotation & (RR_Rotate_90 | RR_Rotate_270)) {
dstPitch = ((height / 2) + pitchAlignMask) & ~pitchAlignMask;
size = dstPitch * width * 3;
@@ -2325,7 +2326,7 @@ I830PutImage(ScrnInfoPtr pScrn,
break;
case FOURCC_UYVY:
case FOURCC_YUY2:
- default:
+
if (pPriv->rotation & (RR_Rotate_90 | RR_Rotate_270)) {
dstPitch = ((height << 1) + pitchAlignMask) & ~pitchAlignMask;
size = dstPitch * width;
@@ -2334,6 +2335,10 @@ I830PutImage(ScrnInfoPtr pScrn,
size = dstPitch * height;
}
break;
+ default:
+ dstPitch = 0;
+ size = 0;
+ break;
}
#if 0
ErrorF("srcPitch: %d, dstPitch: %d, size: %d\n", srcPitch, dstPitch, size);
@@ -2413,11 +2418,14 @@ I830PutImage(ScrnInfoPtr pScrn,
break;
case FOURCC_UYVY:
case FOURCC_YUY2:
- default:
nlines = ((y2 + 0xffff) >> 16) - top;
I830CopyPackedData(pScrn, pPriv, buf, srcPitch, dstPitch, top, left,
nlines, npixels);
break;
+ case FOURCC_XVMC:
+ break;
+ default:
+ break;
}
if (pDraw->type == DRAWABLE_WINDOW) {
commit 0fec42b64ee529eb7ec15febdaa5e4986ec1ab17
Author: Keith Packard <keithp at keithp.com>
Date: Sat Apr 12 11:01:14 2008 -0700
Set some mask bits to try and get yuv conversion working
diff --git a/src/exa_wm.g4i b/src/exa_wm.g4i
index ee8e3ad..5d3d45b 100644
--- a/src/exa_wm.g4i
+++ b/src/exa_wm.g4i
@@ -103,23 +103,39 @@ define(`mask_w_1', `src_w_1')
/* sample src to these registers */
define(`src_sample_base', `g14')
+
+define(`src_sample_r', `g14')
define(`src_sample_r_01', `g14')
define(`src_sample_r_23', `g15')
+
+define(`src_sample_g', `g16')
define(`src_sample_g_01', `g16')
define(`src_sample_g_23', `g17')
+
+define(`src_sample_b', `g18')
define(`src_sample_b_01', `g18')
define(`src_sample_b_23', `g19')
+
+define(`src_sample_a', `g20')
define(`src_sample_a_01', `g20')
define(`src_sample_a_23', `g21')
/* sample mask to these registers */
define(`mask_sample_base', `g22')
+
+define(`mask_sample_r', `g22')
define(`mask_sample_r_01', `g22')
define(`mask_sample_r_23', `g23')
+
+define(`mask_sample_g', `g24')
define(`mask_sample_g_01', `g24')
define(`mask_sample_g_23', `g25')
+
+define(`mask_sample_b', `g26')
define(`mask_sample_b_01', `g26')
define(`mask_sample_b_23', `g27')
+
+define(`mask_sample_a', `g28')
define(`mask_sample_a_01', `g28')
define(`mask_sample_a_23', `g29')
diff --git a/src/exa_wm_projective.g4i b/src/exa_wm_projective.g4i
index 3c3bbf0..7e2e0a8 100644
--- a/src/exa_wm_projective.g4i
+++ b/src/exa_wm_projective.g4i
@@ -32,7 +32,7 @@ mul (16) temp_y<1>F dst_y<8,8,1>F dw_dy { compr align1 };
add (16) temp_x<1>F temp_x<8,8,1>F temp_y<8,8,1>F { compr align1 };
add (16) temp_x<1>F temp_x<8,8,1>F wo { compr align1 };
send (8) 0 w_0<1>F temp_x_0<8,8,1>F math inv mlen 1 rlen 1 { align1 };
-send (8) 0 w_1<1>F temp_x_1<8,8,1>F math inv mlen 1 rlen 1 { align1 };
+send (8) 0 w_1<1>F temp_x_1<8,8,1>F math inv mlen 1 rlen 1 { sechalf align1 };
/********** Compute u *************/
diff --git a/src/exa_wm_write.g4a b/src/exa_wm_write.g4a
index b16e649..faee80b 100644
--- a/src/exa_wm_write.g4a
+++ b/src/exa_wm_write.g4a
@@ -40,13 +40,13 @@ mov (8) data_port_g_01<1>F src_sample_g_01<8,8,1>F { align1 };
mov (8) data_port_b_01<1>F src_sample_b_01<8,8,1>F { align1 };
mov (8) data_port_a_01<1>F src_sample_a_01<8,8,1>F { align1 };
-mov (8) data_port_r_23<1>F src_sample_r_23<8,8,1>F { align1 };
-mov (8) data_port_g_23<1>F src_sample_g_23<8,8,1>F { align1 };
-mov (8) data_port_b_23<1>F src_sample_b_23<8,8,1>F { align1 };
-mov (8) data_port_a_23<1>F src_sample_a_23<8,8,1>F { align1 };
+mov (8) data_port_r_23<1>F src_sample_r_23<8,8,1>F { sechalf align1 };
+mov (8) data_port_g_23<1>F src_sample_g_23<8,8,1>F { sechalf align1 };
+mov (8) data_port_b_23<1>F src_sample_b_23<8,8,1>F { sechalf align1 };
+mov (8) data_port_a_23<1>F src_sample_a_23<8,8,1>F { sechalf align1 };
/* m0, m1 are all direct passed by PS thread payload */
-mov (8) data_port_msg_1<1>UD g1<8,8,1>UD { align1 };
+mov (8) data_port_msg_1<1>UD g1<8,8,1>UD { mask_disable align1 };
/* write */
send (16)
diff --git a/src/exa_wm_write.g4b b/src/exa_wm_write.g4b
index 785fe32..92e7b24 100644
--- a/src/exa_wm_write.g4b
+++ b/src/exa_wm_write.g4b
@@ -2,11 +2,11 @@
{ 0x00600001, 0x206003be, 0x008d0200, 0x00000000 },
{ 0x00600001, 0x208003be, 0x008d0240, 0x00000000 },
{ 0x00600001, 0x20a003be, 0x008d0280, 0x00000000 },
- { 0x00600001, 0x20c003be, 0x008d01e0, 0x00000000 },
- { 0x00600001, 0x20e003be, 0x008d0220, 0x00000000 },
- { 0x00600001, 0x210003be, 0x008d0260, 0x00000000 },
- { 0x00600001, 0x212003be, 0x008d02a0, 0x00000000 },
- { 0x00600001, 0x20200022, 0x008d0020, 0x00000000 },
+ { 0x00601001, 0x20c003be, 0x008d01e0, 0x00000000 },
+ { 0x00601001, 0x20e003be, 0x008d0220, 0x00000000 },
+ { 0x00601001, 0x210003be, 0x008d0260, 0x00000000 },
+ { 0x00601001, 0x212003be, 0x008d02a0, 0x00000000 },
+ { 0x00600201, 0x20200022, 0x008d0020, 0x00000000 },
{ 0x00800031, 0x24001d28, 0x008d0000, 0x85a04800 },
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
commit 91d3e19786e22061f4b617cf39a3cd713139a2d9
Author: Keith Packard <keithp at keithp.com>
Date: Sat Apr 12 11:00:51 2008 -0700
Use compressed instructions for yuv conversion
diff --git a/src/exa_wm_yuv_rgb.g4a b/src/exa_wm_yuv_rgb.g4a
index 327a808..4fb2576 100644
--- a/src/exa_wm_yuv_rgb.g4a
+++ b/src/exa_wm_yuv_rgb.g4a
@@ -30,27 +30,27 @@ include(`exa_wm.g4i')
define(`YCbCr_base', `src_sample_base')
-define(`Cr', `src_sample_r_01')
+define(`Cr', `src_sample_r')
define(`Cr_01', `src_sample_r_01')
define(`Cr_23', `src_sample_r_23')
-define(`Y', `src_sample_g_01')
+define(`Y', `src_sample_g')
define(`Y_01', `src_sample_g_01')
define(`Y_23', `src_sample_g_23')
-define(`Cb', `src_sample_b_01')
+define(`Cb', `src_sample_b')
define(`Cb_01', `src_sample_b_01')
define(`Cb_23', `src_sample_b_23')
-define(`Crn', `mask_sample_r_01')
+define(`Crn', `mask_sample_r')
define(`Crn_01', `mask_sample_r_01')
define(`Crn_23', `mask_sample_r_23')
-define(`Yn', `mask_sample_g_01')
+define(`Yn', `mask_sample_g')
define(`Yn_01', `mask_sample_g_01')
define(`Yn_23', `mask_sample_g_23')
-define(`Cbn', `mask_sample_b_01')
+define(`Cbn', `mask_sample_b')
define(`Cbn_01', `mask_sample_b_01')
define(`Cbn_23', `mask_sample_b_23')
@@ -58,14 +58,6 @@ define(`Cbn_23', `mask_sample_b_23')
* R = Clamp ( 1.164(Y-16/255) + 1.596(Cr-128/255), 0, 1)
* G = Clamp ( 1.164(Y-16/255) - 0.813(Cr-128/255) - 0.392(Cb-128/255), 0, 1)
* B = Clamp ( 1.164(Y-16/255) + 2.017(Cb-128/255), 0, 1)
- *
- * Y is g14, g15.
- * Cr is g12, g13.
- * Cb is g16, g17.
- *
- * R is g2, g6.
- * G is g3, g7.
- * B is g4, g8.
*/
/* Normalize Y, Cb and Cr:
@@ -84,31 +76,23 @@ add (16) Cbn<1>F Cb<8,8,1>F -0.501961F { compr align1 };
/*
* R = Y + Cr * 1.596
*/
-mul (8) null Crn_01<8,8,1>F 1.596F { align1 };
-mac.sat (8) src_sample_r_01<1>F Yn_01<8,8,1>F 1F { align1 };
-mul (8) null Crn_23<8,8,1>F 1.596F { align1 };
-mac.sat (8) src_sample_r_23<1>F Yn_23<8,8,1>F 1F { align1 };
+mov (16) acc0<1>F Yn<8,8,1>F { compr align1 };
+mac.sat(16) src_sample_r<1>F Crn<8,8,1>F 1.596F { compr align1 };
/*
* G = Crn * -0.813 + Cbn * -0.392 + Y
*/
-mul (8) null Crn_01<8,8,1>F -0.813F { align1 };
-mac (8) null Cbn_01<8,8,1>F -0.392F { align1 };
-mac.sat (8) src_sample_g_01<1>F Yn_01<8,8,1>F 1F { align1 };
-mul (8) null Crn_23<8,8,1>F -0.813F { align1 };
-mac (8) null Cbn_23<8,8,1>F -0.392F { align1 };
-mac.sat (8) src_sample_g_23<1>F Yn_23<8,8,1>F 1F { align1 };
+mov (16) acc0<1>F Yn<8,8,1>F { compr align1 };
+mac (16) acc0<1>F Crn<8,8,1>F -0.813F { compr align1 };
+mac.sat(16) src_sample_g<1>F Cbn<8,8,1>F -0.392F { compr align1 };
/*
* B = Cbn * 2.017 + Y
*/
-mul (8) null Cbn_01<8,8,1>F 2.017F { align1 };
-mac.sat (8) src_sample_b_01<1>F Yn_01<8,8,1>F 1F { align1 };
-mul (8) null Cbn_23<8,8,1>F 2.017F { align1 };
-mac.sat (8) src_sample_b_23<1>F Yn_23<8,8,1>F 1F { align1 };
+mov (16) acc0<1>F Yn<8,8,1>F { compr align1 };
+mac.sat(16) src_sample_b<1>F Cbn<8,8,1>F 2.017F { compr align1 };
/*
* A = 1.0
*/
-mov (8) src_sample_a_01<1>F 1.0F { align1 };
-mov (8) src_sample_a_23<1>F 1.0F { align1 };
+mov (16) src_sample_a<1>F 1.0F { compr align1 };
diff --git a/src/exa_wm_yuv_rgb.g4b b/src/exa_wm_yuv_rgb.g4b
index be72e54..01f6e2b 100644
--- a/src/exa_wm_yuv_rgb.g4b
+++ b/src/exa_wm_yuv_rgb.g4b
@@ -2,19 +2,11 @@
{ 0x00802041, 0x23007fbd, 0x008d0300, 0x3f94fdf4 },
{ 0x00802040, 0x22c07fbd, 0x008d01c0, 0xbf008084 },
{ 0x00802040, 0x23407fbd, 0x008d0240, 0xbf008084 },
- { 0x00600041, 0x20007fbc, 0x008d02c0, 0x3fcc49ba },
- { 0x80600048, 0x21c07fbd, 0x008d0300, 0x3f800000 },
- { 0x00600041, 0x20007fbc, 0x008d02e0, 0x3fcc49ba },
- { 0x80600048, 0x21e07fbd, 0x008d0320, 0x3f800000 },
- { 0x00600041, 0x20007fbc, 0x008d02c0, 0xbf5020c5 },
- { 0x00600048, 0x20007fbc, 0x008d0340, 0xbec8b439 },
- { 0x80600048, 0x22007fbd, 0x008d0300, 0x3f800000 },
- { 0x00600041, 0x20007fbc, 0x008d02e0, 0xbf5020c5 },
- { 0x00600048, 0x20007fbc, 0x008d0360, 0xbec8b439 },
- { 0x80600048, 0x22207fbd, 0x008d0320, 0x3f800000 },
- { 0x00600041, 0x20007fbc, 0x008d0340, 0x40011687 },
- { 0x80600048, 0x22407fbd, 0x008d0300, 0x3f800000 },
- { 0x00600041, 0x20007fbc, 0x008d0360, 0x40011687 },
- { 0x80600048, 0x22607fbd, 0x008d0320, 0x3f800000 },
- { 0x00600001, 0x228003fd, 0x00000000, 0x3f800000 },
- { 0x00600001, 0x22a003fd, 0x00000000, 0x3f800000 },
+ { 0x00802001, 0x240003bc, 0x008d0300, 0x00000000 },
+ { 0x80802048, 0x21c07fbd, 0x008d02c0, 0x3fcc49ba },
+ { 0x00802001, 0x240003bc, 0x008d0300, 0x00000000 },
+ { 0x00802048, 0x24007fbc, 0x008d02c0, 0xbf5020c5 },
+ { 0x80802048, 0x22007fbd, 0x008d0340, 0xbec8b439 },
+ { 0x00802001, 0x240003bc, 0x008d0300, 0x00000000 },
+ { 0x80802048, 0x22407fbd, 0x008d0340, 0x40011687 },
+ { 0x00802001, 0x228003fd, 0x00000000, 0x3f800000 },
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