xf86-video-ati: Branch 'master' - 2 commits
Alex Deucher
agd5f at kemper.freedesktop.org
Thu Apr 3 19:24:14 PDT 2008
src/atombios_crtc.c | 3 +
src/legacy_crtc.c | 6 +-
src/radeon.h | 3 +
src/radeon_driver.c | 144 ++++++++++++++++++++++++----------------------------
4 files changed, 80 insertions(+), 76 deletions(-)
New commits:
commit 950e9860643c20acde0eca4e4ff26baacc1f2b69
Author: Alex Deucher <alex at botch2.com>
Date: Thu Apr 3 22:11:48 2008 -0400
Revert "RADEON: memmap rework 1"
This reverts commit dd8ee1b444f4b973a1e0fadca5f943f2162b5e94.
Conflicts:
src/radeon.h
src/radeon_driver.c
This rework seems to have caused more trouble than it was worth.
diff --git a/src/atombios_crtc.c b/src/atombios_crtc.c
index 08f8386..51981a7 100644
--- a/src/atombios_crtc.c
+++ b/src/atombios_crtc.c
@@ -403,6 +403,9 @@ atombios_crtc_mode_set(xf86CrtcPtr crtc,
ErrorF("Mode %dx%d - %d %d %d\n", adjusted_mode->CrtcHDisplay, adjusted_mode->CrtcVDisplay,
adjusted_mode->CrtcHTotal, adjusted_mode->CrtcVTotal, adjusted_mode->Flags);
+ RADEONInitMemMapRegisters(pScrn, info->ModeReg, info);
+ RADEONRestoreMemMapRegisters(pScrn, info->ModeReg);
+
if (IS_AVIVO_VARIANT) {
CARD32 fb_format;
diff --git a/src/legacy_crtc.c b/src/legacy_crtc.c
index 12d1b9b..5ef86ce 100644
--- a/src/legacy_crtc.c
+++ b/src/legacy_crtc.c
@@ -1724,6 +1724,8 @@ legacy_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode,
}
+ ErrorF("init memmap\n");
+ RADEONInitMemMapRegisters(pScrn, info->ModeReg, info);
ErrorF("init common\n");
RADEONInitCommonRegisters(info->ModeReg, info);
@@ -1777,6 +1779,8 @@ legacy_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode,
}
}
+ ErrorF("restore memmap\n");
+ RADEONRestoreMemMapRegisters(pScrn, info->ModeReg);
ErrorF("restore common\n");
RADEONRestoreCommonRegisters(pScrn, info->ModeReg);
@@ -1800,7 +1804,7 @@ legacy_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode,
radeon_update_tv_routing(pScrn, info->ModeReg);
if (info->DispPriority)
- RADEONInitDispBandwidth(pScrn);
+ RADEONInitDispBandwidth(pScrn);
if (tilingChanged) {
/* need to redraw front buffer, I guess this can be considered a hack ? */
diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index 1528757..8bb29a6 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -125,8 +125,6 @@ static void RADEONSaveMemMapRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save);
#ifdef XF86DRI
static void RADEONAdjustMemMapRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save);
#endif
-static void
-RADEONRestoreMemMapRegisters(ScrnInfoPtr pScrn, RADEONSavePtr restore);
static const OptionInfoRec RADEONOptions[] = {
{ OPTION_NOACCEL, "NoAccel", OPTV_BOOLEAN, {0}, FALSE },
@@ -1185,8 +1183,7 @@ static Bool RADEONPreInitWeight(ScrnInfoPtr pScrn)
return TRUE;
}
-static void
-RADEONInitMemMapRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save,
+void RADEONInitMemMapRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save,
RADEONInfoPtr info)
{
save->mc_fb_location = info->mc_fb_location;
@@ -1287,7 +1284,7 @@ static void RADEONInitMemoryMap(ScrnInfoPtr pScrn)
if (info->ChipFamily >= CHIP_FAMILY_R600) {
info->fbLocation = (info->mc_fb_location & 0xffff) << 24;
} else {
- info->fbLocation = (info->mc_fb_location & 0xffff) << 16;
+ info->fbLocation = (info->mc_fb_location & 0xffff) << 16;
}
/* Just disable the damn AGP apertures for now, it may be
* re-enabled later by the DRM
@@ -1299,9 +1296,9 @@ static void RADEONInitMemoryMap(ScrnInfoPtr pScrn)
} else {
OUTREG(AVIVO_HDP_FB_LOCATION, info->mc_fb_location);
}
- info->mc_agp_location = 0x003f0000;
+ info->mc_agp_location = 0x003f0000;
} else
- info->mc_agp_location = 0xffffffc0;
+ info->mc_agp_location = 0xffffffc0;
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"RADEONInitMemoryMap() : \n");
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
@@ -3128,12 +3125,6 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
*/
RADEONInitMemoryMap(pScrn);
- /* copy saved memmap regs to saved mode regs */
- RADEONInitMemMapRegisters(pScrn, info->ModeReg, info);
-
- /* write any changes we made */
- RADEONRestoreMemMapRegisters(pScrn, info->ModeReg);
-
/* empty the surfaces */
{
unsigned char *RADEONMMIO = info->MMIO;
@@ -3270,7 +3261,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
"[drm] failed to enable new memory map\n");
RADEONDRICloseScreen(pScreen);
- info->directRenderingEnabled = FALSE;
+ info->directRenderingEnabled = FALSE;
}
}
#endif
@@ -3330,7 +3321,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
else if (strcmp(s, "BGR") == 0) subPixelOrder = SubPixelHorizontalBGR;
else if (strcmp(s, "NONE") == 0) subPixelOrder = SubPixelNone;
PictureSetSubpixelOrder (pScreen, subPixelOrder);
- }
+ }
#endif
pScrn->vtSema = TRUE;
@@ -3377,7 +3368,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
RADEONAdjustMemMapRegisters(pScrn, info->ModeReg);
if ((info->DispPriority == 1) && (info->cardType==CARD_AGP)) {
- /* we need to re-calculate bandwidth because of AGPMode difference. */
+ /* we need to re-calculate bandwidth because of AGPMode difference. */
RADEONInitDispBandwidth(pScrn);
}
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Direct rendering enabled\n");
@@ -3515,9 +3506,8 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
}
/* Write memory mapping registers */
-static void
-RADEONRestoreMemMapRegisters(ScrnInfoPtr pScrn,
- RADEONSavePtr restore)
+void RADEONRestoreMemMapRegisters(ScrnInfoPtr pScrn,
+ RADEONSavePtr restore)
{
RADEONInfoPtr info = RADEONPTR(pScrn);
RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
@@ -3587,7 +3577,7 @@ RADEONRestoreMemMapRegisters(ScrnInfoPtr pScrn,
} else {
OUTREG(R600_HDP_NONSURFACE_BASE, (restore->mc_fb_location << 16) & 0xff0000);
}
-
+
/* Reset the engine and HDP */
RADEONEngineReset(pScrn);
}
@@ -3637,7 +3627,7 @@ RADEONRestoreMemMapRegisters(ScrnInfoPtr pScrn,
| RADEON_CRTC2_DISP_REQ_EN_B);
}
- /* Make sure the chip settles down (paranoid !) */
+ /* Make sure the chip settles down (paranoid !) */
usleep(100000);
/* Wait for MC idle */
@@ -4839,7 +4829,7 @@ static void RADEONRestore(ScrnInfoPtr pScrn)
#endif
/* to restore console mode, DAC registers should be set after every other registers are set,
- * otherwise,we may get blank screen
+ * otherwise,we may get blank screen
*/
if (IS_AVIVO_VARIANT)
avivo_restore_vga_regs(pScrn, restore);
@@ -4902,7 +4892,7 @@ Bool RADEONSwitchMode(int scrnIndex, DisplayModePtr mode, int flags)
if (info->allowColorTiling) {
info->tilingEnabled = (mode->Flags & (V_DBLSCAN | V_INTERLACE)) ? FALSE : TRUE;
-#ifdef XF86DRI
+#ifdef XF86DRI
if (info->directRenderingEnabled && (info->tilingEnabled != tilingOld)) {
RADEONSAREAPrivPtr pSAREAPriv;
if (RADEONDRISetParam(pScrn, RADEON_SETPARAM_SWITCH_TILING, (info->tilingEnabled ? 1 : 0)) < 0)
@@ -5183,11 +5173,11 @@ Bool RADEONEnterVT(int scrnIndex, int flags)
RADEONWaitForIdleMMIO(pScrn);
if (info->IsMobility && !IS_AVIVO_VARIANT) {
- if (xf86ReturnOptValBool(info->Options, OPTION_DYNAMIC_CLOCKS, FALSE)) {
+ if (xf86ReturnOptValBool(info->Options, OPTION_DYNAMIC_CLOCKS, FALSE)) {
RADEONSetDynamicClock(pScrn, 1);
- } else {
+ } else {
RADEONSetDynamicClock(pScrn, 0);
- }
+ }
}
if (IS_R300_VARIANT || IS_RV100_VARIANT)
@@ -5195,20 +5185,18 @@ Bool RADEONEnterVT(int scrnIndex, int flags)
pScrn->vtSema = TRUE;
- RADEONRestoreMemMapRegisters(pScrn, info->ModeReg);
- RADEONRestoreSurfaces(pScrn, info->ModeReg);
-
if (!xf86SetDesiredModes(pScrn))
return FALSE;
+ RADEONRestoreSurfaces(pScrn, info->ModeReg);
#ifdef XF86DRI
if (info->directRenderingEnabled) {
- if (info->cardType == CARD_PCIE &&
- info->pKernelDRMVersion->version_minor >= 19 &&
- info->FbSecureSize) {
- /* we need to backup the PCIE GART TABLE from fb memory */
- memcpy(info->FB + info->pciGartOffset, info->pciGartBackup, info->pciGartSize);
- }
+ if (info->cardType == CARD_PCIE && info->pKernelDRMVersion->version_minor >= 19 &&
+ info->FbSecureSize)
+ {
+ /* we need to backup the PCIE GART TABLE from fb memory */
+ memcpy(info->FB + info->pciGartOffset, info->pciGartBackup, info->pciGartSize);
+ }
/* get the DRI back into shape after resume */
RADEONDRISetVBlankInterrupt (pScrn, TRUE);
@@ -5217,7 +5205,6 @@ Bool RADEONEnterVT(int scrnIndex, int flags)
}
#endif
-
/* this will get XVideo going again, but only if XVideo was initialised
during server startup (hence the info->adaptor if). */
if (info->adaptor)
@@ -5233,6 +5220,7 @@ Bool RADEONEnterVT(int scrnIndex, int flags)
}
#endif
+ // pScrn->AdjustFrame(scrnIndex, pScrn->frameX0, pScrn->frameY0, 0);
return TRUE;
}
@@ -5254,12 +5242,11 @@ void RADEONLeaveVT(int scrnIndex, int flags)
DRILock(pScrn->pScreen, 0);
RADEONCP_STOP(pScrn, info);
- if (info->cardType == CARD_PCIE &&
- info->pKernelDRMVersion->version_minor >= 19 &&
- info->FbSecureSize) {
- /* we need to backup the PCIE GART TABLE from fb memory */
- memcpy(info->pciGartBackup, (info->FB + info->pciGartOffset), info->pciGartSize);
- }
+ if (info->cardType == CARD_PCIE && info->pKernelDRMVersion->version_minor >= 19 && info->FbSecureSize)
+ {
+ /* we need to backup the PCIE GART TABLE from fb memory */
+ memcpy(info->pciGartBackup, (info->FB + info->pciGartOffset), info->pciGartSize);
+ }
/* Make sure 3D clients will re-upload textures to video RAM */
if (info->textureSize) {
commit 88a1fe4a94c5d11aff22734b21c89890e4428cd5
Author: Alex Deucher <alex at botch2.com>
Date: Thu Apr 3 22:04:43 2008 -0400
Revert "RADEON: remove driver rec copies of mc info, use save rec directly"
This reverts commit be0858a84fbdf74c0b844f462933a221d48c707d.
Conflicts:
src/radeon_driver.c
diff --git a/src/radeon.h b/src/radeon.h
index f3db451..15e494e 100644
--- a/src/radeon.h
+++ b/src/radeon.h
@@ -379,6 +379,9 @@ typedef struct {
unsigned long BIOSAddr; /* BIOS physical address */
CARD32 fbLocation;
CARD32 gartLocation;
+ CARD32 mc_fb_location;
+ CARD32 mc_agp_location;
+ CARD32 mc_agp_location_hi;
void *MMIO; /* Map of MMIO region */
void *FB; /* Map of frame buffer */
diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index 0183aa3..1528757 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -1185,15 +1185,31 @@ static Bool RADEONPreInitWeight(ScrnInfoPtr pScrn)
return TRUE;
}
-static void RADEONInitMemoryMap(ScrnInfoPtr pScrn, RADEONSavePtr save)
+static void
+RADEONInitMemMapRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save,
+ RADEONInfoPtr info)
+{
+ save->mc_fb_location = info->mc_fb_location;
+ save->mc_agp_location = info->mc_agp_location;
+
+ if (IS_AVIVO_VARIANT) {
+ save->mc_agp_location_hi = info->mc_agp_location_hi;
+ } else {
+ save->display_base_addr = info->fbLocation;
+ save->display2_base_addr = info->fbLocation;
+ save->ov0_base_addr = info->fbLocation;
+ }
+}
+
+static void RADEONInitMemoryMap(ScrnInfoPtr pScrn)
{
RADEONInfoPtr info = RADEONPTR(pScrn);
unsigned char *RADEONMMIO = info->MMIO;
CARD32 mem_size;
CARD32 aper_size;
- radeon_read_mc_fb_agp_location(pScrn, LOC_FB | LOC_AGP, &save->mc_fb_location,
- &save->mc_agp_location, &save->mc_agp_location_hi);
+ radeon_read_mc_fb_agp_location(pScrn, LOC_FB | LOC_AGP, &info->mc_fb_location,
+ &info->mc_agp_location, &info->mc_agp_location_hi);
/* We shouldn't use info->videoRam here which might have been clipped
* but the real video RAM instead
@@ -1225,13 +1241,13 @@ static void RADEONInitMemoryMap(ScrnInfoPtr pScrn, RADEONSavePtr save)
if ((info->ChipFamily != CHIP_FAMILY_RS690) &&
(info->ChipFamily != CHIP_FAMILY_RS740)) {
if (info->IsIGP)
- save->mc_fb_location = INREG(RADEON_NB_TOM);
+ info->mc_fb_location = INREG(RADEON_NB_TOM);
else
#ifdef XF86DRI
/* Old DRI has restrictions on the memory map */
if ( info->directRenderingEnabled &&
info->pKernelDRMVersion->version_minor < 10 )
- save->mc_fb_location = (mem_size - 1) & 0xffff0000U;
+ info->mc_fb_location = (mem_size - 1) & 0xffff0000U;
else
#endif
{
@@ -1259,19 +1275,19 @@ static void RADEONInitMemoryMap(ScrnInfoPtr pScrn, RADEONSavePtr save)
aper0_base &= ~(mem_size - 1);
if (info->ChipFamily >= CHIP_FAMILY_R600) {
- save->mc_fb_location = (aper0_base >> 24) |
+ info->mc_fb_location = (aper0_base >> 24) |
(((aper0_base + mem_size - 1) & 0xff000000U) >> 8);
- ErrorF("mc fb loc is %08x\n", (unsigned int)save->mc_fb_location);
+ ErrorF("mc fb loc is %08x\n", (unsigned int)info->mc_fb_location);
} else {
- save->mc_fb_location = (aper0_base >> 16) |
+ info->mc_fb_location = (aper0_base >> 16) |
((aper0_base + mem_size - 1) & 0xffff0000U);
}
}
}
if (info->ChipFamily >= CHIP_FAMILY_R600) {
- info->fbLocation = (save->mc_fb_location & 0xffff) << 24;
+ info->fbLocation = (info->mc_fb_location & 0xffff) << 24;
} else {
- info->fbLocation = (save->mc_fb_location & 0xffff) << 16;
+ info->fbLocation = (info->mc_fb_location & 0xffff) << 16;
}
/* Just disable the damn AGP apertures for now, it may be
* re-enabled later by the DRM
@@ -1279,27 +1295,22 @@ static void RADEONInitMemoryMap(ScrnInfoPtr pScrn, RADEONSavePtr save)
if (IS_AVIVO_VARIANT) {
if (info->ChipFamily >= CHIP_FAMILY_R600) {
- OUTREG(R600_HDP_NONSURFACE_BASE, (save->mc_fb_location << 16) & 0xff0000);
+ OUTREG(R600_HDP_NONSURFACE_BASE, (info->mc_fb_location << 16) & 0xff0000);
} else {
- OUTREG(AVIVO_HDP_FB_LOCATION, save->mc_fb_location);
+ OUTREG(AVIVO_HDP_FB_LOCATION, info->mc_fb_location);
}
- save->mc_agp_location = 0x003f0000;
- } else {
- save->mc_agp_location = 0xffffffc0;
- save->display_base_addr = info->fbLocation;
- save->display2_base_addr = info->fbLocation;
- save->ov0_base_addr = info->fbLocation;
- }
-
+ info->mc_agp_location = 0x003f0000;
+ } else
+ info->mc_agp_location = 0xffffffc0;
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"RADEONInitMemoryMap() : \n");
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
" mem_size : 0x%08x\n", (unsigned)mem_size);
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- " MC_FB_LOCATION : 0x%08x\n", (unsigned)save->mc_fb_location);
+ " MC_FB_LOCATION : 0x%08x\n", (unsigned)info->mc_fb_location);
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
" MC_AGP_LOCATION : 0x%08x\n",
- (unsigned)save->mc_agp_location);
+ (unsigned)info->mc_agp_location);
}
static void RADEONGetVRamType(ScrnInfoPtr pScrn)
@@ -1308,7 +1319,7 @@ static void RADEONGetVRamType(ScrnInfoPtr pScrn)
RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
unsigned char *RADEONMMIO = info->MMIO;
CARD32 tmp;
-
+
if (info->IsIGP || (info->ChipFamily >= CHIP_FAMILY_R300) ||
(INREG(RADEON_MEM_SDRAM_MODE_REG) & (1<<30)))
info->IsDDR = TRUE;
@@ -3115,7 +3126,10 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
/* Initialize the memory map, this basically calculates the values
* we'll use later on for MC_FB_LOCATION & MC_AGP_LOCATION
*/
- RADEONInitMemoryMap(pScrn, info->ModeReg);
+ RADEONInitMemoryMap(pScrn);
+
+ /* copy saved memmap regs to saved mode regs */
+ RADEONInitMemMapRegisters(pScrn, info->ModeReg, info);
/* write any changes we made */
RADEONRestoreMemMapRegisters(pScrn, info->ModeReg);
@@ -3741,28 +3755,21 @@ static void RADEONAdjustMemMapRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save)
"DRI init changed memory map, adjusting ...\n");
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
" MC_FB_LOCATION was: 0x%08lx is: 0x%08lx\n",
- (long unsigned int)save->mc_fb_location, (long unsigned int)fb);
+ (long unsigned int)info->mc_fb_location, (long unsigned int)fb);
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
" MC_AGP_LOCATION was: 0x%08lx is: 0x%08lx\n",
- (long unsigned int)save->mc_agp_location, (long unsigned int)agp);
- save->mc_fb_location = fb;
- save->mc_agp_location = agp;
- save->mc_agp_location_hi = agp_hi;
+ (long unsigned int)info->mc_agp_location, (long unsigned int)agp);
+ info->mc_fb_location = fb;
+ info->mc_agp_location = agp;
if (info->ChipFamily >= CHIP_FAMILY_R600)
- info->fbLocation = (save->mc_fb_location & 0xffff) << 24;
+ info->fbLocation = (info->mc_fb_location & 0xffff) << 24;
else
- info->fbLocation = (save->mc_fb_location & 0xffff) << 16;
-
- if (!IS_AVIVO_VARIANT) {
- save->display_base_addr = info->fbLocation;
- save->display2_base_addr = info->fbLocation;
- save->ov0_base_addr = info->fbLocation;
- }
+ info->fbLocation = (info->mc_fb_location & 0xffff) << 16;
info->dst_pitch_offset =
(((pScrn->displayWidth * info->CurrentLayout.pixel_bytes / 64)
<< 22) | ((info->fbLocation + pScrn->fbOffset) >> 10));
-
+ RADEONInitMemMapRegisters(pScrn, save, info);
RADEONRestoreMemMapRegisters(pScrn, save);
}
@@ -3796,7 +3803,7 @@ static void RADEONRestoreSurfaces(ScrnInfoPtr pScrn, RADEONSavePtr restore)
RADEONInfoPtr info = RADEONPTR(pScrn);
unsigned char *RADEONMMIO = info->MMIO;
unsigned int surfnr;
-
+
for ( surfnr = 0; surfnr < 8; surfnr++ ) {
OUTREG(RADEON_SURFACE0_INFO + 16 * surfnr, restore->surfaces[surfnr][0]);
OUTREG(RADEON_SURFACE0_LOWER_BOUND + 16 * surfnr, restore->surfaces[surfnr][1]);
@@ -3857,7 +3864,7 @@ void RADEONChangeSurfaces(ScrnInfoPtr pScrn)
color_pattern = R300_SURF_TILE_COLOR_MACRO;
} else {
color_pattern = R200_SURF_TILE_COLOR_MACRO;
- }
+ }
#ifdef XF86DRI
if (info->directRenderingInited) {
drmRadeonSurfaceFree drmsurffree;
@@ -3902,7 +3909,7 @@ void RADEONChangeSurfaces(ScrnInfoPtr pScrn)
if (retvalue < 0)
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"drm: could not allocate surface for front buffer!\n");
-
+
if ((info->have3DWindows) && (!info->noBackBuffer)) {
drmsurfalloc.address = info->backOffset;
retvalue = drmCommandWrite(info->drmFD, DRM_RADEON_SURF_ALLOC,
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