xf86-video-intel: 2 commits - src/i810_reg.h src/i830_debug.c src/i830_display.c src/i830_driver.c src/i830_exa.c src/i830_memory.c src/i830_reg.h

[Zhenyu Wang]

 src/i810_reg.h     |   33 +++++++++++++++++++++++++++++++++
 src/i830_debug.c   |    1 -
 src/i830_display.c |    1 -
 src/i830_driver.c  |    1 -
 src/i830_exa.c     |    1 -
 src/i830_memory.c  |    1 -
 src/i830_reg.h     |   33 ---------------------------------
 7 files changed, 33 insertions(+), 38 deletions(-)

New commits:
commit e56c166ceb8c1ceddd5020e8de2d0b9d51f535a4
Author: Zhenyu Wang <zhenyu.z.wang at intel.com>
Date:   Thu Nov 15 18:34:18 2007 +0800

    remove unnecessary i830_reg.h includes
    
    i830_reg.h only contains 3d engine cmds for 8XX chips.

diff --git a/src/i830_display.c b/src/i830_display.c
index 223a6aa..0e42624 100644
--- a/src/i830_display.c
+++ b/src/i830_display.c
@@ -38,7 +38,6 @@
 
 #include "xf86.h"
 #include "i830.h"
-#include "i830_reg.h"
 #include "i830_bios.h"
 #include "i830_display.h"
 #include "i830_debug.h"
diff --git a/src/i830_driver.c b/src/i830_driver.c
index 5d56104..7818ee4 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -194,7 +194,6 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "vbe.h"
 #include "shadow.h"
 #include "i830.h"
-#include "i830_reg.h"
 #include "i830_display.h"
 #include "i830_debug.h"
 #include "i830_bios.h"
diff --git a/src/i830_exa.c b/src/i830_exa.c
index 56bc15e..32c55dd 100644
--- a/src/i830_exa.c
+++ b/src/i830_exa.c
@@ -35,7 +35,6 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "xaarop.h"
 #include "i830.h"
 #include "i810_reg.h"
-#include "i830_reg.h"
 #include <string.h>
 
 #ifdef I830DEBUG
diff --git a/src/i830_memory.c b/src/i830_memory.c
index 1ad4438..85b6528 100644
--- a/src/i830_memory.c
+++ b/src/i830_memory.c
@@ -106,7 +106,6 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 #include "i830.h"
 #include "i810_reg.h"
-#include "i830_reg.h"
 
 #define ALIGN(i,m)    (((i) + (m) - 1) & ~((m) - 1))
 
commit 6f3de19159cd7a2d73ed212add909edb3aedce9c
Author: Zhenyu Wang <zhenyu.z.wang at intel.com>
Date:   Thu Nov 15 18:33:27 2007 +0800

    Move fb compression reg definition into i810_reg.h
    
    where we put MMIO control reg in, and shared with intel_reg_dump
    program.

diff --git a/src/i810_reg.h b/src/i810_reg.h
index 598fc8c..a6663a4 100644
--- a/src/i810_reg.h
+++ b/src/i810_reg.h
@@ -2596,4 +2596,37 @@ typedef enum {
 #define PALETTE_A		0x0a000
 #define PALETTE_B		0x0a800
 
+/* Framebuffer compression */
+#define FBC_CFB_BASE		0x03200 /* 4k page aligned */
+#define FBC_LL_BASE		0x03204 /* 4k page aligned */
+#define FBC_CONTROL		0x03208
+#define   FBC_CTL_EN		(1<<31)
+#define   FBC_CTL_PERIODIC	(1<<30)
+#define   FBC_CTL_INTERVAL_SHIFT (16)
+#define   FBC_CTL_UNCOMPRESSIBLE (1<<14)
+#define   FBC_CTL_STRIDE_SHIFT	(5)
+#define   FBC_CTL_FENCENO	(1<<0)
+#define FBC_COMMAND		0x0320c
+#define   FBC_CMD_COMPRESS	(1<<0)
+#define FBC_STATUS		0x03210
+#define   FBC_STAT_COMPRESSING	(1<<31)
+#define   FBC_STAT_COMPRESSED	(1<<30)
+#define   FBC_STAT_MODIFIED	(1<<29)
+#define   FBC_STAT_CURRENT_LINE	(1<<0)
+#define FBC_CONTROL2		0x03214
+#define   FBC_CTL_FENCE_DBL	(0<<4)
+#define   FBC_CTL_IDLE_IMM	(0<<2)
+#define   FBC_CTL_IDLE_FULL	(1<<2)
+#define   FBC_CTL_IDLE_LINE	(2<<2)
+#define   FBC_CTL_IDLE_DEBUG	(3<<2)
+#define   FBC_CTL_CPU_FENCE	(1<<1)
+#define   FBC_CTL_PLANEA	(0<<0)
+#define   FBC_CTL_PLANEB	(1<<0)
+#define FBC_FENCE_OFF		0x0321b
+#define FBC_MOD_NUM		0x03220
+#define FBC_TAG_DEBUG		0x03300
+
+#define FBC_LL_SIZE		(1536)
+#define FBC_LL_PAD		(32)
+
 #endif /* _I810_REG_H */
diff --git a/src/i830_debug.c b/src/i830_debug.c
index 6963c89..8f8ef9b 100644
--- a/src/i830_debug.c
+++ b/src/i830_debug.c
@@ -36,7 +36,6 @@
 
 #include "xf86.h"
 #include "i830.h"
-#include "i830_reg.h"
 #include "i830_debug.h"
 #include <strings.h>
 
diff --git a/src/i830_reg.h b/src/i830_reg.h
index 4d7736a..7a8df9f 100644
--- a/src/i830_reg.h
+++ b/src/i830_reg.h
@@ -29,39 +29,6 @@
 #ifndef _I830_REG_H_
 #define _I830_REG_H_
 
-/* Framebuffer compression */
-#define FBC_CFB_BASE		0x03200 /* 4k page aligned */
-#define FBC_LL_BASE		0x03204 /* 4k page aligned */
-#define FBC_CONTROL		0x03208
-#define   FBC_CTL_EN		(1<<31)
-#define   FBC_CTL_PERIODIC	(1<<30)
-#define   FBC_CTL_INTERVAL_SHIFT (16)
-#define   FBC_CTL_UNCOMPRESSIBLE (1<<14)
-#define   FBC_CTL_STRIDE_SHIFT	(5)
-#define   FBC_CTL_FENCENO	(1<<0)
-#define FBC_COMMAND		0x0320c
-#define   FBC_CMD_COMPRESS	(1<<0)
-#define FBC_STATUS		0x03210
-#define   FBC_STAT_COMPRESSING	(1<<31)
-#define   FBC_STAT_COMPRESSED	(1<<30)
-#define   FBC_STAT_MODIFIED	(1<<29)
-#define   FBC_STAT_CURRENT_LINE	(1<<0)
-#define FBC_CONTROL2		0x03214
-#define   FBC_CTL_FENCE_DBL	(0<<4)
-#define   FBC_CTL_IDLE_IMM	(0<<2)
-#define   FBC_CTL_IDLE_FULL	(1<<2)
-#define   FBC_CTL_IDLE_LINE	(2<<2)
-#define   FBC_CTL_IDLE_DEBUG	(3<<2)
-#define   FBC_CTL_CPU_FENCE	(1<<1)
-#define   FBC_CTL_PLANEA	(0<<0)
-#define   FBC_CTL_PLANEB	(1<<0)
-#define FBC_FENCE_OFF		0x0321b
-#define FBC_MOD_NUM		0x03220
-#define FBC_TAG_DEBUG		0x03300
-
-#define FBC_LL_SIZE		(1536)
-#define FBC_LL_PAD		(32)
-
 #define I830_SET_FIELD( var, mask, value ) (var &= ~(mask), var |= value)
 
 #define CMD_3D (0x3<<29)