xf86-video-ati: Branch 'randr-1.2'

[Alex Deucher]

 src/radeon_crtc.c |   78 ++++++++++++++++++++++++++++--------------------------
 1 files changed, 41 insertions(+), 37 deletions(-)

New commits:
diff-tree aed193a47a939451d9a6d05b02653b1d73e1d523 (from 870c8043068a0f44b53d1148371b2cc1e3970a7b)
Author: Alex Deucher <alex at t41p.hsd1.va.comcast.net>
Date:   Sun May 20 21:13:59 2007 -0400

    RADEON: fix crtc1 (un)blanking code after last commit
    
    - crtc1 MC control is on CRTC_GEN_CNTL
    - fix indenting

diff --git a/src/radeon_crtc.c b/src/radeon_crtc.c
index 5d7237c..c24be8f 100644
--- a/src/radeon_crtc.c
+++ b/src/radeon_crtc.c
@@ -52,48 +52,52 @@ void radeon_crtc_load_lut(xf86CrtcPtr cr
 static void
 radeon_crtc_dpms(xf86CrtcPtr crtc, int mode)
 {
-  int mask;
-  ScrnInfoPtr pScrn = crtc->scrn;
-  RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private;
-  RADEONInfoPtr info = RADEONPTR(pScrn);
-  unsigned char *RADEONMMIO = info->MMIO;
+    int mask;
+    ScrnInfoPtr pScrn = crtc->scrn;
+    RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private;
+    RADEONInfoPtr info = RADEONPTR(pScrn);
+    unsigned char *RADEONMMIO = info->MMIO;
     
-  mask = radeon_crtc->crtc_id ? (RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_VSYNC_DIS | RADEON_CRTC2_HSYNC_DIS | RADEON_CRTC2_DISP_REQ_EN_B) : (RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_HSYNC_DIS | RADEON_CRTC_VSYNC_DIS | RADEON_CRTC_DISP_REQ_EN_B);
+    mask = radeon_crtc->crtc_id ? (RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_VSYNC_DIS | RADEON_CRTC2_HSYNC_DIS | RADEON_CRTC2_DISP_REQ_EN_B) : (RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_HSYNC_DIS | RADEON_CRTC_VSYNC_DIS);
 
 
-  switch(mode) {
-  case DPMSModeOn:
-    if (radeon_crtc->crtc_id) {
-      OUTREGP(RADEON_CRTC2_GEN_CNTL, 0, ~mask);
-    } else {
-      OUTREGP(RADEON_CRTC_EXT_CNTL, 0, ~mask);
-    }
-    break;
-  case DPMSModeStandby:
-    if (radeon_crtc->crtc_id) {
-      OUTREGP(RADEON_CRTC2_GEN_CNTL, (RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_HSYNC_DIS), ~mask);
-    } else {
-      OUTREGP(RADEON_CRTC_EXT_CNTL, (RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_HSYNC_DIS), ~mask);
-    }
-    break;
-  case DPMSModeSuspend:
-    if (radeon_crtc->crtc_id) {
-      OUTREGP(RADEON_CRTC2_GEN_CNTL, (RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_VSYNC_DIS), ~mask);
-    } else {
-      OUTREGP(RADEON_CRTC_EXT_CNTL, (RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_VSYNC_DIS), ~mask);
-    }
-    break;
-  case DPMSModeOff:
-    if (radeon_crtc->crtc_id) {
-      OUTREGP(RADEON_CRTC2_GEN_CNTL, mask, ~mask);
-    } else {
-      OUTREGP(RADEON_CRTC_EXT_CNTL, mask, ~mask);
+    switch(mode) {
+    case DPMSModeOn:
+	if (radeon_crtc->crtc_id) {
+	    OUTREGP(RADEON_CRTC2_GEN_CNTL, 0, ~mask);
+	} else {
+	    OUTREGP(RADEON_CRTC_GEN_CNTL, 0, ~RADEON_CRTC_DISP_REQ_EN_B);
+	    OUTREGP(RADEON_CRTC_EXT_CNTL, 0, ~mask);
+	}
+	break;
+    case DPMSModeStandby:
+	if (radeon_crtc->crtc_id) {
+	    OUTREGP(RADEON_CRTC2_GEN_CNTL, (RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_HSYNC_DIS), ~mask);
+	} else {
+	    OUTREGP(RADEON_CRTC_GEN_CNTL, 0, ~RADEON_CRTC_DISP_REQ_EN_B);
+	    OUTREGP(RADEON_CRTC_EXT_CNTL, (RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_HSYNC_DIS), ~mask);
+	}
+	break;
+    case DPMSModeSuspend:
+	if (radeon_crtc->crtc_id) {
+	    OUTREGP(RADEON_CRTC2_GEN_CNTL, (RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_VSYNC_DIS), ~mask);
+	} else {
+	    OUTREGP(RADEON_CRTC_GEN_CNTL, 0, ~RADEON_CRTC_DISP_REQ_EN_B);
+	    OUTREGP(RADEON_CRTC_EXT_CNTL, (RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_VSYNC_DIS), ~mask);
+	}
+	break;
+    case DPMSModeOff:
+	if (radeon_crtc->crtc_id) {
+	    OUTREGP(RADEON_CRTC2_GEN_CNTL, mask, ~mask);
+	} else {
+	    OUTREGP(RADEON_CRTC_GEN_CNTL, RADEON_CRTC_DISP_REQ_EN_B, ~RADEON_CRTC_DISP_REQ_EN_B);
+	    OUTREGP(RADEON_CRTC_EXT_CNTL, mask, ~mask);
+	}
+	break;
     }
-    break;
-  }
   
-  if (mode != DPMSModeOff)
-    radeon_crtc_load_lut(crtc);  
+    if (mode != DPMSModeOff)
+	radeon_crtc_load_lut(crtc);  
 }
 
 static Bool