xf86-video-intel: 3 commits - man/intel.man src/common.h src/i810_reg.h src/i830_driver.c src/i830.h src/i830_memory.c
Eric Anholt
anholt at kemper.freedesktop.org
Tue May 1 05:19:17 EEST 2007
man/intel.man | 13 +-----
src/common.h | 1
src/i810_reg.h | 115 ++++++++++++++++++++++++++++++++++++++++++++++++------
src/i830.h | 1
src/i830_driver.c | 103 ++++++++++++++++++++++++++++++++++++++----------
src/i830_memory.c | 111 ++++++++++++++++++++++++++++++++++++++++++++++------
6 files changed, 290 insertions(+), 54 deletions(-)
New commits:
diff-tree 6748d620fbf39dd98982856c09256bdec0fc82a1 (from a4f1a7872f6f959bb4bc6568face710bee3589de)
Author: Eric Anholt <eric at anholt.net>
Date: Mon Apr 30 17:27:23 2007 -0700
Ignore VideoRam now that its original purpose is obsolete.
It had been necessary to allow more than a small amount of memory to be
allocated, but now those old small allocations people had configured are
getting in the way.
diff --git a/man/intel.man b/man/intel.man
index 178ff0a..daf9030 100644
--- a/man/intel.man
+++ b/man/intel.man
@@ -43,17 +43,10 @@ NetBSD, and Solaris have such kernel dri
By default, the i810 will use 8 megabytes
of system memory for graphics. For the 830M and later, the driver will
automatically size its memory allocation according to the features it will
-support. The amount of memory used may be limited by using the
+support. The
.B VideoRam
-entry in the config file
-.B "Device"
-section. Limiting the amount of memory used may result in features being
-disabled, so if you choose to configure it, it is advisable to check the
-__xservername__
-log file to see if any features have been disabled because of insufficient
-video memory. In particular, DRI support or tiling mode may be disabled
-with insufficient video memory. Either of these being disabled will
-reduce performance for 3D applications.
+option, which in the past had been necessary to allow more than some small
+amount of memory to be allocated, is now ignored.
.PP
The following driver
.B Options
diff --git a/src/i830_driver.c b/src/i830_driver.c
index e38b77b..4990b8f 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -2162,8 +2162,30 @@ I830ScreenInit(int scrnIndex, ScreenPtr
from = X_DEFAULT;
pScrn->videoRam = pI830->FbMapSize / KB(1);
} else {
+#if 0
from = X_CONFIG;
pScrn->videoRam = pI830->pEnt->device->videoRam;
+#else
+ /* Disable VideoRam configuration, at least for now. Previously,
+ * VideoRam was necessary to avoid overly low limits on allocated
+ * memory, so users created larger, yet still small, fixed allocation
+ * limits in their config files. Now, the driver wants to allocate more,
+ * and the old intention of the VideoRam lines that had been entered is
+ * obsolete.
+ */
+ from = X_DEFAULT;
+ pScrn->videoRam = pI830->FbMapSize / KB(1);
+
+ if (pScrn->videoRam != pI830->pEnt->device->videoRam) {
+ xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+ "VideoRam configuration found, which is no longer "
+ "recommended.\n");
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Continuing with default %dkB VideoRam instead of %d "
+ "kB.\n",
+ pScrn->videoRam, pI830->pEnt->device->videoRam);
+ }
+#endif
}
/* Limit videoRam to how much we might be able to allocate from AGP */
diff-tree a4f1a7872f6f959bb4bc6568face710bee3589de (from 7d0d34cfdcc67d07e7667e13a9413743853134f8)
Author: Eric Anholt <eric at anholt.net>
Date: Mon Apr 30 17:13:09 2007 -0700
Allow physical-memory allocations within stolen memory.
Because stolen memory happens to be a contiguous block of high system memory,
we can just read the GTT entries for it to get physical addresses for our
allocations there if needed. This reduces fragmentation of the aperture space,
and will often reclaim up to 7 MB of memory that had been left unused since the
simplified aperture manager was put in place, but without reintroducing the
complexities of the old aperture manager.
diff --git a/src/common.h b/src/common.h
index f299e5d..f45fc8e 100644
--- a/src/common.h
+++ b/src/common.h
@@ -233,6 +233,7 @@ union intfloat {
#define INREG8(addr) *(volatile CARD8 *)(RecPtr->MMIOBase + (addr))
#define INREG16(addr) *(volatile CARD16 *)(RecPtr->MMIOBase + (addr))
#define INREG(addr) *(volatile CARD32 *)(RecPtr->MMIOBase + (addr))
+#define INGTT(addr) *(volatile CARD32 *)(RecPtr->GTTBase + (addr))
#define POSTING_READ(addr) (void)INREG(addr)
#define OUTREG8(addr, val) do { \
diff --git a/src/i810_reg.h b/src/i810_reg.h
index bc944fe..491c389 100644
--- a/src/i810_reg.h
+++ b/src/i810_reg.h
@@ -526,6 +526,15 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN
#define PGETBL_SIZE_256KB (1 << 1)
#define PGETBL_SIZE_128KB (2 << 1)
+#define I830_PTE_BASE 0x10000
+#define PTE_ADDRESS_MASK 0xfffff000
+#define PTE_ADDRESS_MASK_HIGH 0x000000f0 /* i915+ */
+#define PTE_MAPPING_TYPE_UNCACHED (0 << 1)
+#define PTE_MAPPING_TYPE_DCACHE (1 << 1) /* i830 only */
+#define PTE_MAPPING_TYPE_CACHED (3 << 1)
+#define PTE_MAPPING_TYPE_MASK (3 << 1)
+#define PTE_VALID (1 << 0)
+
/** @defgroup PGE_ERR
* @{
*/
@@ -577,18 +586,6 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN
# define PGTBL_ERR_HOST_GTT_PTE (1 << 0)
/** @} */
-/* Page table entries loaded via mmio region, p323
- */
-#define PTE_BASE 0x10000
-#define PTE_ADDR_MASK 0x3FFFF000
-#define PTE_TYPE_MASK 0x00000006
-#define PTE_LOCAL 0x00000002
-#define PTE_MAIN_UNCACHED 0x00000000
-#define PTE_MAIN_CACHED 0x00000006
-#define PTE_VALID_MASK 0x00000001
-#define PTE_VALID 0x00000001
-
-
/* Ring buffer registers, p277, overview p19
*/
#define LP_RING 0x2030
diff --git a/src/i830.h b/src/i830.h
index d81857b..f69ad73 100644
--- a/src/i830.h
+++ b/src/i830.h
@@ -261,6 +261,7 @@ enum last_3d {
typedef struct _I830Rec {
unsigned char *MMIOBase;
+ unsigned char *GTTBase;
unsigned char *FbBase;
int cpp;
diff --git a/src/i830_driver.c b/src/i830_driver.c
index 235ee2a..e38b77b 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -521,6 +521,32 @@ I830MapMMIO(ScrnInfoPtr pScrn)
pI830->MMIOAddr, I810_REG_SIZE);
if (!pI830->MMIOBase)
return FALSE;
+
+ /* Set up the GTT mapping for the various places it has been moved over
+ * time.
+ */
+ if (IS_I9XX(pI830)) {
+ if (IS_I965G(pI830)) {
+ pI830->GTTBase = xf86MapPciMem(pScrn->scrnIndex, mmioFlags,
+ pI830->PciTag,
+ pI830->MMIOAddr + (512 * 1024),
+ 512 * 1024);
+ if (pI830->GTTBase == NULL)
+ return FALSE;
+ } else {
+ CARD32 gttaddr = pI830->PciInfo->memBase[3] & 0xFFFFFF00;
+
+ pI830->GTTBase = xf86MapPciMem(pScrn->scrnIndex, mmioFlags,
+ pI830->PciTag,
+ gttaddr,
+ pI830->FbMapSize / 1024);
+ if (pI830->GTTBase == NULL)
+ return FALSE;
+ }
+ } else {
+ pI830->GTTBase = pI830->MMIOBase + I830_PTE_BASE;
+ }
+
return TRUE;
}
@@ -1136,6 +1162,27 @@ I830PreInit(ScrnInfoPtr pScrn, int flags
}
xf86CrtcSetSizeRange (pScrn, 320, 200, max_width, max_height);
+ if (IS_I830(pI830) || IS_845G(pI830)) {
+ PCITAG bridge;
+ CARD16 gmch_ctrl;
+
+ bridge = pciTag(0, 0, 0); /* This is always the host bridge */
+ gmch_ctrl = pciReadWord(bridge, I830_GMCH_CTRL);
+ if ((gmch_ctrl & I830_GMCH_MEM_MASK) == I830_GMCH_MEM_128M) {
+ pI830->FbMapSize = 0x8000000;
+ } else {
+ pI830->FbMapSize = 0x4000000; /* 64MB - has this been tested ?? */
+ }
+ } else {
+ if (IS_I9XX(pI830)) {
+ pI830->FbMapSize = 1UL << pciGetBaseSize(pI830->PciTag, 2, TRUE,
+ NULL);
+ } else {
+ /* 128MB aperture for later i8xx series. */
+ pI830->FbMapSize = 0x8000000;
+ }
+ }
+
/* Some of the probing needs MMIO access, so map it here. */
I830MapMMIO(pScrn);
@@ -1159,27 +1206,6 @@ I830PreInit(ScrnInfoPtr pScrn, int flags
(1 << 23) | (2 << 16));
#endif
- if (IS_I830(pI830) || IS_845G(pI830)) {
- PCITAG bridge;
- CARD16 gmch_ctrl;
-
- bridge = pciTag(0, 0, 0); /* This is always the host bridge */
- gmch_ctrl = pciReadWord(bridge, I830_GMCH_CTRL);
- if ((gmch_ctrl & I830_GMCH_MEM_MASK) == I830_GMCH_MEM_128M) {
- pI830->FbMapSize = 0x8000000;
- } else {
- pI830->FbMapSize = 0x4000000; /* 64MB - has this been tested ?? */
- }
- } else {
- if (IS_I9XX(pI830)) {
- pI830->FbMapSize = 1UL << pciGetBaseSize(pI830->PciTag, 2, TRUE,
- NULL);
- } else {
- /* 128MB aperture for later i8xx series. */
- pI830->FbMapSize = 0x8000000;
- }
- }
-
if (pI830->PciInfo->chipType == PCI_CHIP_E7221_G)
num_pipe = 1;
else
diff --git a/src/i830_memory.c b/src/i830_memory.c
index 268d6c5..2cc9327 100644
--- a/src/i830_memory.c
+++ b/src/i830_memory.c
@@ -309,6 +309,86 @@ i830_allocator_init(ScrnInfoPtr pScrn, u
return TRUE;
}
+/**
+ * Reads a GTT entry for the memory at the given offset and returns the
+ * physical address.
+ *
+ * \return physical address if successful.
+ * \return (unsigned long)-1 if unsuccessful.
+ */
+static unsigned long
+i830_get_gtt_physical(ScrnInfoPtr pScrn, unsigned long offset)
+{
+ I830Ptr pI830 = I830PTR(pScrn);
+ CARD32 gttentry = INGTT(offset / 1024);
+
+ /* Mask out these reserved bits on this hardware. */
+ if (!IS_I965G(pI830))
+ gttentry &= ~PTE_ADDRESS_MASK_HIGH;
+
+ /* If it's not a mapping type we know, then bail. */
+ if ((gttentry & PTE_MAPPING_TYPE_MASK) != PTE_MAPPING_TYPE_UNCACHED &&
+ (gttentry & PTE_MAPPING_TYPE_MASK) != PTE_MAPPING_TYPE_CACHED)
+ {
+ xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+ "Unusable physical mapping type 0x%08x\n",
+ (unsigned int)(gttentry & PTE_MAPPING_TYPE_MASK));
+ return -1;
+ }
+ /* If we can't represent the address with an unsigned long, bail. */
+ if (sizeof(unsigned long) == 4 &&
+ (gttentry & PTE_ADDRESS_MASK_HIGH) != 0)
+ {
+ xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+ "High memory PTE (0x%08x) on 32-bit system\n",
+ (unsigned int)gttentry);
+ return -1;
+ }
+ assert((gttentry & PTE_VALID) != 0);
+
+ return (gttentry & PTE_ADDRESS_MASK) |
+ (gttentry & PTE_ADDRESS_MASK_HIGH << (32 - 4));
+}
+
+/**
+ * Reads the GTT entries for stolen memory at the given offset, returning the
+ * physical address.
+ *
+ * \return physical address if successful.
+ * \return (unsigned long)-1 if unsuccessful.
+ */
+static unsigned long
+i830_get_stolen_physical(ScrnInfoPtr pScrn, unsigned long offset,
+ unsigned long size)
+{
+ I830Ptr pI830 = I830PTR(pScrn);
+ unsigned long physical, scan;
+
+ /* Check that the requested region is within stolen memory. */
+ if (offset + size >= pI830->stolen_size)
+ return -1;
+
+ physical = i830_get_gtt_physical(pScrn, offset);
+ if (physical == -1)
+ return -1;
+
+ /* Check that the following pages in our allocation follow the first page
+ * contiguously.
+ */
+ for (scan = offset + 4096; scan < offset + size; scan += 4096) {
+ unsigned long scan_physical = i830_get_gtt_physical(pScrn, scan);
+
+ if ((scan - offset) != (scan_physical - physical)) {
+ xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+ "Non-contiguous GTT entries: (%ld,%ld) vs (%ld,%ld)\n",
+ scan, scan_physical, offset, physical);
+ return -1;
+ }
+ }
+
+ return physical;
+}
+
/* Allocate aperture space for the given size and alignment, and returns the
* memory allocation.
*
@@ -341,13 +421,25 @@ i830_allocate_aperture(ScrnInfoPtr pScrn
alignment = GTT_PAGE_SIZE;
for (scan = pI830->memory_list; scan->next != NULL; scan = scan->next) {
- mem->offset = scan->end;
- /* For allocations requiring physical addresses, we have to use AGP
- * memory, so move the allocation up out of stolen memory.
- */
- if ((flags & NEED_PHYSICAL_ADDR) && mem->offset < pI830->stolen_size)
- mem->offset = pI830->stolen_size;
- mem->offset = ROUND_TO(mem->offset, alignment);
+ mem->offset = ROUND_TO(scan->end, alignment);
+ if ((flags & NEED_PHYSICAL_ADDR) && mem->offset < pI830->stolen_size) {
+ /* If the allocation is entirely within stolen memory, and we're
+ * able to get the physical addresses out of the GTT and check that
+ * it's contiguous (it ought to be), then we can do our physical
+ * allocations there and not bother the kernel about it. This
+ * helps avoid aperture fragmentation from our physical
+ * allocations.
+ */
+ mem->bus_addr = i830_get_stolen_physical(pScrn, mem->offset,
+ mem->size);
+
+ if (mem->bus_addr == ((unsigned long)-1)) {
+ /* Move the start of the allocation to just past the end of
+ * stolen memory.
+ */
+ mem->offset = ROUND_TO(pI830->stolen_size, alignment);
+ }
+ }
mem->end = mem->offset + size;
if (flags & ALIGN_BOTH_ENDS)
@@ -385,11 +477,8 @@ i830_allocate_agp_memory(ScrnInfoPtr pSc
if (mem->key != -1)
return TRUE;
- if (mem->offset + mem->size <= pI830->stolen_size &&
- !(flags & NEED_PHYSICAL_ADDR))
- {
+ if (mem->offset + mem->size <= pI830->stolen_size)
return TRUE;
- }
if (mem->offset < pI830->stolen_size)
mem->agp_offset = pI830->stolen_size;
diff-tree 7d0d34cfdcc67d07e7667e13a9413743853134f8 (from 138ac8f36cb4e4b3776f313955372522646acbb2)
Author: Eric Anholt <eric at anholt.net>
Date: Mon Apr 30 10:39:54 2007 -0700
Disable some clock gating functions documented to work incorrectly.
diff --git a/src/i810_reg.h b/src/i810_reg.h
index eaa8bb5..bc944fe 100644
--- a/src/i810_reg.h
+++ b/src/i810_reg.h
@@ -958,7 +958,101 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN
#define D_STATE 0x6104
#define DSPCLK_GATE_D 0x6200
+# define TVRUNIT_CLOCK_GATE_DISABLE (1 << 23) /* 915-945 */
+# define TVCUNIT_CLOCK_GATE_DISABLE (1 << 22) /* 915-945 */
+# define TVFUNIT_CLOCK_GATE_DISABLE (1 << 21) /* 915-945 */
+# define TVEUNIT_CLOCK_GATE_DISABLE (1 << 20) /* 915-945 */
+# define DVSUNIT_CLOCK_GATE_DISABLE (1 << 19) /* 915-945 */
+# define DSSUNIT_CLOCK_GATE_DISABLE (1 << 18) /* 915-945 */
+# define DDBUNIT_CLOCK_GATE_DISABLE (1 << 17) /* 915-945 */
+# define DPRUNIT_CLOCK_GATE_DISABLE (1 << 16) /* 915-945 */
+# define DPFUNIT_CLOCK_GATE_DISABLE (1 << 15) /* 915-945 */
+# define DPBMUNIT_CLOCK_GATE_DISABLE (1 << 14) /* 915-945 */
+# define DPLSUNIT_CLOCK_GATE_DISABLE (1 << 13) /* 915-945 */
+# define DPLUNIT_CLOCK_GATE_DISABLE (1 << 12) /* 915-945 */
+# define DPOUNIT_CLOCK_GATE_DISABLE (1 << 11)
+# define DPBUNIT_CLOCK_GATE_DISABLE (1 << 10)
+# define DPCUNIT_CLOCK_GATE_DISABLE (1 << 9)
+# define DPUNIT_CLOCK_GATE_DISABLE (1 << 8)
+# define VRUNIT_CLOCK_GATE_DISABLE (1 << 7) /* 915+: reserved */
+# define OVHUNIT_CLOCK_GATE_DISABLE (1 << 6) /* 830-865 */
+# define DPIOUNIT_CLOCK_GATE_DISABLE (1 << 6) /* 915-945 */
+# define OVFUNIT_CLOCK_GATE_DISABLE (1 << 5)
+# define OVBUNIT_CLOCK_GATE_DISABLE (1 << 4)
+/**
+ * This bit must be set on the 830 to prevent hangs when turning off the
+ * overlay scaler.
+ */
+# define OVRUNIT_CLOCK_GATE_DISABLE (1 << 3)
+# define OVCUNIT_CLOCK_GATE_DISABLE (1 << 2)
+# define OVUUNIT_CLOCK_GATE_DISABLE (1 << 1)
+# define ZVUNIT_CLOCK_GATE_DISABLE (1 << 0) /* 830 */
+# define OVLUNIT_CLOCK_GATE_DISABLE (1 << 0) /* 845,865 */
+
#define RENCLK_GATE_D1 0x6204
+# define BLITTER_CLOCK_GATE_DISABLE (1 << 13) /* 945GM only */
+# define MPEG_CLOCK_GATE_DISABLE (1 << 12) /* 945GM only */
+# define PC_FE_CLOCK_GATE_DISABLE (1 << 11)
+# define PC_BE_CLOCK_GATE_DISABLE (1 << 10)
+# define WINDOWER_CLOCK_GATE_DISABLE (1 << 9)
+# define INTERPOLATOR_CLOCK_GATE_DISABLE (1 << 8)
+# define COLOR_CALCULATOR_CLOCK_GATE_DISABLE (1 << 7)
+# define MOTION_COMP_CLOCK_GATE_DISABLE (1 << 6)
+# define MAG_CLOCK_GATE_DISABLE (1 << 5)
+/** This bit must be unset on 855,865 */
+# define MECI_CLOCK_GATE_DISABLE (1 << 4)
+# define DCMP_CLOCK_GATE_DISABLE (1 << 3)
+# define MEC_CLOCK_GATE_DISABLE (1 << 2)
+# define MECO_CLOCK_GATE_DISABLE (1 << 1)
+/** This bit must be set on 855,865. */
+# define SV_CLOCK_GATE_DISABLE (1 << 0)
+# define I915_MPEG_CLOCK_GATE_DISABLE (1 << 16)
+# define I915_VLD_IP_PR_CLOCK_GATE_DISABLE (1 << 15)
+# define I915_MOTION_COMP_CLOCK_GATE_DISABLE (1 << 14)
+# define I915_BD_BF_CLOCK_GATE_DISABLE (1 << 13)
+# define I915_SF_SE_CLOCK_GATE_DISABLE (1 << 12)
+# define I915_WM_CLOCK_GATE_DISABLE (1 << 11)
+# define I915_IZ_CLOCK_GATE_DISABLE (1 << 10)
+# define I915_PI_CLOCK_GATE_DISABLE (1 << 9)
+# define I915_DI_CLOCK_GATE_DISABLE (1 << 8)
+# define I915_SH_SV_CLOCK_GATE_DISABLE (1 << 7)
+# define I915_PL_DG_QC_FT_CLOCK_GATE_DISABLE (1 << 6)
+# define I915_SC_CLOCK_GATE_DISABLE (1 << 5)
+# define I915_FL_CLOCK_GATE_DISABLE (1 << 4)
+# define I915_DM_CLOCK_GATE_DISABLE (1 << 3)
+# define I915_PS_CLOCK_GATE_DISABLE (1 << 2)
+# define I915_CC_CLOCK_GATE_DISABLE (1 << 1)
+# define I915_BY_CLOCK_GATE_DISABLE (1 << 0)
+
+# define I965_RCZ_CLOCK_GATE_DISABLE (1 << 30)
+/** This bit must always be set on 965G/965GM */
+# define I965_RCC_CLOCK_GATE_DISABLE (1 << 29)
+# define I965_RCPB_CLOCK_GATE_DISABLE (1 << 28)
+# define I965_DAP_CLOCK_GATE_DISABLE (1 << 27)
+# define I965_ROC_CLOCK_GATE_DISABLE (1 << 26)
+# define I965_GW_CLOCK_GATE_DISABLE (1 << 25)
+# define I965_TD_CLOCK_GATE_DISABLE (1 << 24)
+/** This bit must always be set on 965G */
+# define I965_ISC_CLOCK_GATE_DISABLE (1 << 23)
+# define I965_IC_CLOCK_GATE_DISABLE (1 << 22)
+# define I965_EU_CLOCK_GATE_DISABLE (1 << 21)
+# define I965_IF_CLOCK_GATE_DISABLE (1 << 20)
+# define I965_TC_CLOCK_GATE_DISABLE (1 << 19)
+# define I965_SO_CLOCK_GATE_DISABLE (1 << 17)
+# define I965_FBC_CLOCK_GATE_DISABLE (1 << 16)
+# define I965_MARI_CLOCK_GATE_DISABLE (1 << 15)
+# define I965_MASF_CLOCK_GATE_DISABLE (1 << 14)
+# define I965_MAWB_CLOCK_GATE_DISABLE (1 << 13)
+# define I965_EM_CLOCK_GATE_DISABLE (1 << 12)
+# define I965_UC_CLOCK_GATE_DISABLE (1 << 11)
+# define I965_SI_CLOCK_GATE_DISABLE (1 << 6)
+# define I965_MT_CLOCK_GATE_DISABLE (1 << 5)
+# define I965_PL_CLOCK_GATE_DISABLE (1 << 4)
+# define I965_DG_CLOCK_GATE_DISABLE (1 << 3)
+# define I965_QC_CLOCK_GATE_DISABLE (1 << 2)
+# define I965_FT_CLOCK_GATE_DISABLE (1 << 1)
+# define I965_DM_CLOCK_GATE_DISABLE (1 << 0)
+
#define RENCLK_GATE_D2 0x6208
#define RAMCLK_GATE_D 0x6210 /* CRL only */
diff --git a/src/i830_driver.c b/src/i830_driver.c
index 2c1e514..235ee2a 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -1653,6 +1653,19 @@ SetHWOperatingState(ScrnInfoPtr pScrn)
DPRINTF(PFX, "SetHWOperatingState\n");
+ /* Disable clock gating reported to work incorrectly according to the specs.
+ */
+ if (IS_I965GM(pI830)) {
+ OUTREG(RENCLK_GATE_D1, I965_RCC_CLOCK_GATE_DISABLE);
+ } else if (IS_I965G(pI830)) {
+ OUTREG(RENCLK_GATE_D1,
+ I965_RCC_CLOCK_GATE_DISABLE | I965_ISC_CLOCK_GATE_DISABLE);
+ } else if (IS_I855(pI830) || IS_I865G(pI830)) {
+ OUTREG(RENCLK_GATE_D1, SV_CLOCK_GATE_DISABLE);
+ } else if (IS_I830(pI830)) {
+ OUTREG(DSPCLK_GATE_D, OVRUNIT_CLOCK_GATE_DISABLE);
+ }
+
if (!pI830->noAccel)
SetRingRegs(pScrn);
SetFenceRegs(pScrn);
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