xf86-video-intel: src/common.h src/i830_memory.c src/i830_video.c

[Zhenyu Wang]

 src/common.h      |    2 ++
 src/i830_memory.c |    6 +++++-
 src/i830_video.c  |   17 +++++++++++++----
 3 files changed, 20 insertions(+), 5 deletions(-)

New commits:
diff-tree 404fd47573f855b0442d49a383542fc093825ad0 (from f4c05973d391bdb0a9b0eadb155548310baa98fd)
Author: Wang Zhenyu <zhenyu.z.wang at intel.com>
Date:   Wed Jun 6 11:01:48 2007 +0800

    Enable overlay on G33 class chipsets
    
    Which have to use gfx vm offset fot setup overlay regs.

diff --git a/src/common.h b/src/common.h
index 2369a75..cc07e49 100644
--- a/src/common.h
+++ b/src/common.h
@@ -399,6 +399,8 @@ extern int I810_DEBUG;
 #define IS_I9XX(pI810) (IS_I915G(pI810) || IS_I915GM(pI810) || IS_I945G(pI810) || IS_I945GM(pI810) || IS_I965G(pI810) || IS_G33CLASS(pI810))
 
 #define IS_MOBILE(pI810) (IS_I830(pI810) || IS_I85X(pI810) || IS_I915GM(pI810) || IS_I945GM(pI810) || IS_I965GM(pI810))
+/* mark chipsets for using gfx VM offset for overlay */
+#define OVERLAY_NOPHYSICAL(pI810) (IS_G33CLASS(pI810))
 
 #define GTT_PAGE_SIZE			KB(4)
 #define ROUND_TO(x, y)			(((x) + (y) - 1) / (y) * (y))
diff --git a/src/i830_memory.c b/src/i830_memory.c
index 747cfcc..17d4c4e 100644
--- a/src/i830_memory.c
+++ b/src/i830_memory.c
@@ -747,15 +747,19 @@ static Bool
 i830_allocate_overlay(ScrnInfoPtr pScrn)
 {
     I830Ptr pI830 = I830PTR(pScrn);
+    int flags = NEED_PHYSICAL_ADDR;
 
     /* Only allocate if overlay is going to be enabled. */
     if (!pI830->XvEnabled)
 	return TRUE;
 
+    if (OVERLAY_NOPHYSICAL(pI830))
+	flags = 0;
+
     if (!IS_I965G(pI830)) {
 	pI830->overlay_regs = i830_allocate_memory(pScrn, "overlay registers",
 						   OVERLAY_SIZE, GTT_PAGE_SIZE,
-						   NEED_PHYSICAL_ADDR);
+						   flags);
 	if (pI830->overlay_regs == NULL) {
 	    xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
 		       "Failed to allocate Overlay register space.\n");
diff --git a/src/i830_video.c b/src/i830_video.c
index e5efcaa..c1ddc98 100644
--- a/src/i830_video.c
+++ b/src/i830_video.c
@@ -428,7 +428,10 @@ i830_overlay_on(ScrnInfoPtr pScrn)
     OUT_RING(MI_FLUSH | MI_WRITE_DIRTY_STATE);
     OUT_RING(MI_NOOP);
     OUT_RING(MI_OVERLAY_FLIP | MI_OVERLAY_FLIP_ON);
-    OUT_RING(pI830->overlay_regs->bus_addr | OFC_UPDATE);
+    if (OVERLAY_NOPHYSICAL(pI830))
+	OUT_RING(pI830->overlay_regs->offset | OFC_UPDATE);
+    else
+	OUT_RING(pI830->overlay_regs->bus_addr | OFC_UPDATE);
     /* Wait for the overlay to light up before attempting to use it */
     OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP);
     OUT_RING(MI_NOOP);
@@ -458,7 +461,10 @@ i830_overlay_continue(ScrnInfoPtr pScrn,
     if (!*pI830->overlayOn)
 	return;
 
-    flip_addr = pI830->overlay_regs->bus_addr;
+    if (OVERLAY_NOPHYSICAL(pI830))
+	flip_addr = pI830->overlay_regs->offset;
+    else
+	flip_addr = pI830->overlay_regs->bus_addr;
     if (update_filter)
 	flip_addr |= OFC_UPDATE;
     OVERLAY_DEBUG ("overlay_continue cmd 0x%08lx -> 0x%08lx sta 0x%08lx\n",
@@ -507,7 +513,10 @@ i830_overlay_off(ScrnInfoPtr pScrn)
 	OUT_RING(MI_FLUSH | MI_WRITE_DIRTY_STATE);
 	OUT_RING(MI_NOOP);
 	OUT_RING(MI_OVERLAY_FLIP | MI_OVERLAY_FLIP_CONTINUE);
-	OUT_RING(pI830->overlay_regs->bus_addr);
+	if (OVERLAY_NOPHYSICAL(pI830))
+	    OUT_RING(pI830->overlay_regs->offset);
+	else
+	    OUT_RING(pI830->overlay_regs->bus_addr);
 	OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP);
 	OUT_RING(MI_NOOP);
 	ADVANCE_LP_RING();
@@ -572,7 +581,7 @@ I830InitVideo(ScreenPtr pScreen)
     }
 
     /* Set up overlay video if we can do it at this depth. */
-    if (!IS_I965G(pI830) && !IS_G33CLASS(pI830) && pScrn->bitsPerPixel != 8 &&
+    if (!IS_I965G(pI830) && pScrn->bitsPerPixel != 8 &&
 	pI830->overlay_regs != NULL)
     {
 	overlayAdaptor = I830SetupImageVideoOverlay(pScreen);