xserver: Branch 'pci-rework' - 19 commits
Ian Romanick
idr at kemper.freedesktop.org
Mon Jan 22 19:44:16 EET 2007
GL/glx/glxdri.c | 9
cfb/cfbmskbits.h | 3
configure.ac | 21
damageext/damageext.c | 16
doc/Xserver.man.pre | 19
fb/fbpict.h | 3
hw/xfree86/fbdevhw/fbdevhw.c | 66
hw/xfree86/os-support/bus/Pci.c | 5
hw/xfree86/os-support/bus/Pci.h | 15
hw/xfree86/os-support/bus/ix86Pci.c | 5
hw/xfree86/os-support/linux/Makefile.am | 11
hw/xfree86/os-support/linux/lnx_ev56.c | 2
hw/xfree86/scanpci/pci.ids | 320 ++-
hw/xfree86/scanpci/xf86PciStdIds.h | 3250 +++++++++++++++++++++++++++++++-
hw/xfree86/xf1bpp/Makefile.am | 90
include/dix-config.h.in | 12
os/utils.c | 18
randr/randrstr.h | 7
randr/rrcrtc.c | 10
randr/rrpointer.c | 50
randr/rrproperty.c | 14
21 files changed, 3737 insertions(+), 209 deletions(-)
New commits:
diff-tree 844560a02fa6c4ce18ea2af3ec27beaa60b7af11 (from 7dfb3cea913b02a6b36c308d1330bd40abe6b41f)
Author: Ian Romanick <idr at us.ibm.com>
Date: Mon Jan 22 09:13:59 2007 -0800
Elminiate ARCH_PCI_OS_INIT.
Never, ever use the ix86Pci stuff on Linux. This renders the whole
ARCH_PCI_OS_INIT mechanism useless. Remove it.
diff --git a/hw/xfree86/os-support/bus/Pci.c b/hw/xfree86/os-support/bus/Pci.c
index 8929ef2..a53f344 100644
--- a/hw/xfree86/os-support/bus/Pci.c
+++ b/hw/xfree86/os-support/bus/Pci.c
@@ -238,11 +238,6 @@ pciInit(void)
#endif
ARCH_PCI_INIT();
-#if defined(ARCH_PCI_OS_INIT)
- if (pciNumBuses <= 0) {
- ARCH_PCI_OS_INIT();
- }
-#endif
}
}
diff --git a/hw/xfree86/os-support/bus/Pci.h b/hw/xfree86/os-support/bus/Pci.h
index bc322ac..59ad6a1 100644
--- a/hw/xfree86/os-support/bus/Pci.h
+++ b/hw/xfree86/os-support/bus/Pci.h
@@ -216,11 +216,12 @@
# endif
# define XF86SCANPCI_WRAPPER ia64ScanPCIWrapper
#elif defined(__i386__) || defined(i386)
-# define ARCH_PCI_INIT ix86PciInit
-# define INCLUDE_XF86_NO_DOMAIN
# if defined(linux)
-# define ARCH_PCI_OS_INIT linuxPciInit
+# define ARCH_PCI_INIT linuxPciInit
+# else
+# define ARCH_PCI_INIT ix86PciInit
# endif
+# define INCLUDE_XF86_NO_DOMAIN
#elif defined(__mc68000__)
# if defined(linux)
# define ARCH_PCI_INIT linuxPciInit
@@ -270,13 +271,12 @@
#elif defined(__amd64__) || defined(__amd64)
# if defined(__FreeBSD__) || defined(__FreeBSD_kernel__)
# define ARCH_PCI_INIT freebsdPciInit
+# elif defined(linux)
+# define ARCH_PCI_INIT linuxPciInit
# else
# define ARCH_PCI_INIT ix86PciInit
# endif
# define INCLUDE_XF86_NO_DOMAIN
-# if defined(linux)
-# define ARCH_PCI_OS_INIT linuxPciInit
-# endif
#endif
#ifndef ARCH_PCI_INIT
@@ -286,9 +286,6 @@
#undef INCLUDE_XF86_NO_DOMAIN
extern void ARCH_PCI_INIT(void);
-#if defined(ARCH_PCI_OS_INIT)
-extern void ARCH_PCI_OS_INIT(void);
-#endif
#if defined(XF86SCANPCI_WRAPPER)
typedef enum {
diff --git a/hw/xfree86/os-support/bus/ix86Pci.c b/hw/xfree86/os-support/bus/ix86Pci.c
index 8b528ed..3ed4f14 100644
--- a/hw/xfree86/os-support/bus/ix86Pci.c
+++ b/hw/xfree86/os-support/bus/ix86Pci.c
@@ -281,12 +281,7 @@ void ix86PciSelectCfgmech(void)
* We rely on xf86Info.pciFlags to tell which mechanisms to try....
*/
switch (xf86Info.pciFlags) {
-
case PCIOsConfig:
-#ifdef ARCH_PCI_OS_INIT
- return;
-#endif
-
case PCIProbe1:
if (!xf86EnableIO())
return;
diff-tree 7dfb3cea913b02a6b36c308d1330bd40abe6b41f (from parents)
Merge: c279d5fdc53612a90f33fafe9e9c59ced008dd51 2dc866252c84ed0e7b3afa25e8a5312f448d405b
Author: Ian Romanick <idr at us.ibm.com>
Date: Mon Jan 22 08:44:36 2007 -0800
Merge branch 'master' of ssh+git://idr@git.freedesktop.org/git/xorg/xserver into pci-rework
diff-tree 2dc866252c84ed0e7b3afa25e8a5312f448d405b (from 0d6d373af95d0004d33b987d14ad7e04dd5d2003)
Author: Eric Anholt <eric at anholt.net>
Date: Mon Jan 22 08:41:50 2007 +0800
Really fix optimized render cases being hit when they shouldn't.
I don't know how this define slipped in there. Fixes
6fdfd9dad91d7b7aa292f8c4d268dd27c34de8d3.
diff --git a/fb/fbpict.h b/fb/fbpict.h
index 5cdde9e..434526e 100644
--- a/fb/fbpict.h
+++ b/fb/fbpict.h
@@ -105,9 +105,6 @@ fbCanGetSolid(PicturePtr pict)
}
}
-#define fbCanGetSolid(pict) \
-(pict->pDrawable != NULL && pict->pDrawable->width == 1 && pict->pDrawable->height == 1)
-
#define fbComposeGetSolid(pict, bits, fmt) { \
FbBits *__bits__; \
FbStride __stride__; \
diff-tree 0d6d373af95d0004d33b987d14ad7e04dd5d2003 (from 14d6a9b327381a6bb2dac59c62728e5fd0f0bcfb)
Author: Alan Coopersmith <alan.coopersmith at sun.com>
Date: Fri Jan 19 14:52:23 2007 -0800
Update Xserver man page to match commit ed33c7c98ad0c542e9e2dd6caa3f84879c21dd61
Remove unused -xkbdb and -noloadxkb options. Rename -ar1 and -ar2 to
-ardelay and -arinterval, respectively.
diff --git a/doc/Xserver.man.pre b/doc/Xserver.man.pre
index 7cf3c26..aa931a8 100644
--- a/doc/Xserver.man.pre
+++ b/doc/Xserver.man.pre
@@ -397,20 +397,14 @@ base directory for keyboard layout files
for setuid X servers (i.e., when the X server's real and effective uids
are different).
.TP 8
-.B \-ar1 \fImilliseconds\fP
+.B \-ardelay \fImilliseconds\fP
sets the autorepeat delay (length of time in milliseconds that a key must
be depressed before autorepeat starts).
.TP 8
-.B \-ar2 \fImilliseconds\fP
+.B \-arinterval \fImilliseconds\fP
sets the autorepeat interval (length of time in milliseconds that should
elapse between autorepeat-generated keystrokes).
.TP 8
-.B \-noloadxkb
-disables loading of an XKB keymap description on server startup.
-.TP 8
-.B \-xkbdb \fIfilename\fP
-uses \fIfilename\fP for default keyboard keymaps.
-.TP 8
.B \-xkbmap \fIfilename\fP
loads keyboard description in \fIfilename\fP on server startup.
.SH SECURITY EXTENSION OPTIONS
diff-tree c279d5fdc53612a90f33fafe9e9c59ced008dd51 (from parents)
Merge: 88f248e67143175532cbafd6faf8fc6df97c7894 14d6a9b327381a6bb2dac59c62728e5fd0f0bcfb
Author: Ian Romanick <idr at us.ibm.com>
Date: Fri Jan 19 12:59:54 2007 -0800
Merge branch 'master' of ssh+git://idr@git.freedesktop.org/git/xorg/xserver into pci-rework
diff-tree 14d6a9b327381a6bb2dac59c62728e5fd0f0bcfb (from 27a01e100bff21ac0b70c6d72071d7226fc91264)
Author: Michel Dänzer <michel at tungstengraphics.com>
Date: Fri Jan 19 18:30:21 2007 +0100
fbdevhw: Only deal with RGB weight if default visual is True- or DirectColor.
diff --git a/hw/xfree86/fbdevhw/fbdevhw.c b/hw/xfree86/fbdevhw/fbdevhw.c
index 8b163be..a573b8f 100644
--- a/hw/xfree86/fbdevhw/fbdevhw.c
+++ b/hw/xfree86/fbdevhw/fbdevhw.c
@@ -187,9 +187,16 @@ xfree2fbdev_fblayout(ScrnInfoPtr pScrn,
pScrn->virtualX;
var->yres_virtual = pScrn->virtualY;
var->bits_per_pixel = pScrn->bitsPerPixel;
- var->red.length = pScrn->weight.red;
- var->green.length = pScrn->weight.green;
- var->blue.length = pScrn->weight.blue;
+ if (pScrn->defaultVisual == TrueColor ||
+ pScrn->defaultVisual == DirectColor) {
+ var->red.length = pScrn->weight.red;
+ var->green.length = pScrn->weight.green;
+ var->blue.length = pScrn->weight.blue;
+ } else {
+ var->red.length = 8;
+ var->green.length = 8;
+ var->blue.length = 8;
+ }
}
static void
@@ -746,15 +753,18 @@ fbdevHWModeInit(ScrnInfoPtr pScrn, Displ
return FALSE;
}
- /* XXX: This is a hack, but it should be a NOP for all the setups that
- * worked before and actually seems to fix some others...
- */
- pScrn->offset.red = fPtr->var.red.offset;
- pScrn->offset.green = fPtr->var.green.offset;
- pScrn->offset.blue = fPtr->var.blue.offset;
- pScrn->mask.red = ((1 << fPtr->var.red.length) - 1) << fPtr->var.red.offset;
- pScrn->mask.green = ((1 << fPtr->var.green.length) - 1) << fPtr->var.green.offset;
- pScrn->mask.blue = ((1 << fPtr->var.blue.length) - 1) << fPtr->var.blue.offset;
+ if (pScrn->defaultVisual == TrueColor ||
+ pScrn->defaultVisual == DirectColor) {
+ /* XXX: This is a hack, but it should be a NOP for all the setups that
+ * worked before and actually seems to fix some others...
+ */
+ pScrn->offset.red = fPtr->var.red.offset;
+ pScrn->offset.green = fPtr->var.green.offset;
+ pScrn->offset.blue = fPtr->var.blue.offset;
+ pScrn->mask.red = ((1 << fPtr->var.red.length) - 1) << fPtr->var.red.offset;
+ pScrn->mask.green = ((1 << fPtr->var.green.length) - 1) << fPtr->var.green.offset;
+ pScrn->mask.blue = ((1 << fPtr->var.blue.length) - 1) << fPtr->var.blue.offset;
+ }
return TRUE;
}
diff-tree 27a01e100bff21ac0b70c6d72071d7226fc91264 (from 65f4690ecb4576f60396fcccff8e5bd5d4b6645f)
Author: Michel Dänzer <michel at tungstengraphics.com>
Date: Fri Jan 19 18:28:05 2007 +0100
fbdevhw: Consider mode set equal to mode requested if virtual width is larger.
diff --git a/hw/xfree86/fbdevhw/fbdevhw.c b/hw/xfree86/fbdevhw/fbdevhw.c
index 8f78b85..8b163be 100644
--- a/hw/xfree86/fbdevhw/fbdevhw.c
+++ b/hw/xfree86/fbdevhw/fbdevhw.c
@@ -229,23 +229,23 @@ xfree2fbdev_timing(DisplayModePtr mode,
}
static Bool
-fbdev_modes_equal(struct fb_var_screeninfo *one, struct fb_var_screeninfo *two)
+fbdev_modes_equal(struct fb_var_screeninfo *set, struct fb_var_screeninfo *req)
{
- return (one->xres_virtual == two->xres_virtual &&
- one->yres_virtual == two->yres_virtual &&
- one->bits_per_pixel == two->bits_per_pixel &&
- one->red.length == two->red.length &&
- one->green.length == two->green.length &&
- one->blue.length == two->blue.length &&
- one->xres == two->xres && one->yres == two->yres &&
- one->pixclock == two->pixclock &&
- one->right_margin == two->right_margin &&
- one->hsync_len == two->hsync_len &&
- one->left_margin == two->left_margin &&
- one->lower_margin == two->lower_margin &&
- one->vsync_len == two->vsync_len &&
- one->upper_margin == two->upper_margin &&
- one->sync == two->sync && one->vmode == two->vmode);
+ return (set->xres_virtual >= req->xres_virtual &&
+ set->yres_virtual == req->yres_virtual &&
+ set->bits_per_pixel == req->bits_per_pixel &&
+ set->red.length == req->red.length &&
+ set->green.length == req->green.length &&
+ set->blue.length == req->blue.length &&
+ set->xres == req->xres && set->yres == req->yres &&
+ set->pixclock == req->pixclock &&
+ set->right_margin == req->right_margin &&
+ set->hsync_len == req->hsync_len &&
+ set->left_margin == req->left_margin &&
+ set->lower_margin == req->lower_margin &&
+ set->vsync_len == req->vsync_len &&
+ set->upper_margin == req->upper_margin &&
+ set->sync == req->sync && set->vmode == req->vmode);
}
static void
diff-tree 65f4690ecb4576f60396fcccff8e5bd5d4b6645f (from 8b3a591cd39f2d51209dc71b641cac79663e1b16)
Author: Michel Dänzer <michel at tungstengraphics.com>
Date: Fri Jan 19 17:54:03 2007 +0100
__glXDRIscreenProbe: Use drmOpen/CloseOnce.
Fixes https://bugs.freedesktop.org/show_bug.cgi?id=9275 . Based on patch from
Alan Swanson.
diff --git a/GL/glx/glxdri.c b/GL/glx/glxdri.c
index 170662c..e035704 100644
--- a/GL/glx/glxdri.c
+++ b/GL/glx/glxdri.c
@@ -864,6 +864,7 @@ __glXDRIscreenProbe(ScreenPtr pScreen)
int api_ver = COPY_SUB_BUFFER_INTERNAL_VERSION;
drm_magic_t magic;
drmVersionPtr version;
+ int newlyopened;
char *driverName;
drm_handle_t hFB;
int junk;
@@ -914,10 +915,10 @@ __glXDRIscreenProbe(ScreenPtr pScreen)
goto handle_error;
}
- fd = drmOpen(NULL, BusID);
+ fd = drmOpenOnce(NULL, BusID, &newlyopened);
if (fd < 0) {
- LogMessage(X_ERROR, "AIGLX error: drmOpen failed (%s)\n",
+ LogMessage(X_ERROR, "AIGLX error: drmOpenOnce failed (%s)\n",
strerror(-fd));
goto handle_error;
}
@@ -940,7 +941,7 @@ __glXDRIscreenProbe(ScreenPtr pScreen)
drm_version.patch = -1;
}
- if (!DRIAuthConnection(pScreen, magic)) {
+ if (newlyopened && !DRIAuthConnection(pScreen, magic)) {
LogMessage(X_ERROR, "AIGLX error: DRIAuthConnection failed\n");
goto handle_error;
}
@@ -1082,7 +1083,7 @@ __glXDRIscreenProbe(ScreenPtr pScreen)
xfree(dev_priv);
if (fd >= 0)
- drmClose(fd);
+ drmCloseOnce(fd);
DRICloseConnection(pScreen);
diff-tree 8b3a591cd39f2d51209dc71b641cac79663e1b16 (from 0f0c321adf2850b3d7aafe281362bfe424cb0ca1)
Author: Alan Coopersmith <alan.coopersmith at sun.com>
Date: Thu Jan 18 16:03:30 2007 -0800
Update pci.ids to 2007-01-18 snapshot
(includes a whole bunch of ATI device id updates)
diff --git a/hw/xfree86/scanpci/pci.ids b/hw/xfree86/scanpci/pci.ids
index d48e25c..64713d0 100644
--- a/hw/xfree86/scanpci/pci.ids
+++ b/hw/xfree86/scanpci/pci.ids
@@ -11,7 +11,7 @@
# This file can be distributed under either the GNU General Public License
# (version 2 or higher) or the 3-clause BSD License.
#
-# Daily snapshot on Wed 2006-12-06 02:05:02
+# Daily snapshot on Thu 2007-01-18 02:05:01
#
# Vendors, devices and subsystems. Please keep sorted.
@@ -23,11 +23,28 @@
0000 Gammagraphx, Inc.
001a Ascend Communications, Inc.
+001c PEAK-System Technik GmbH
+ 0001 PCAN-PCI CAN-Bus controller
0033 Paradyne corp.
003d Lockheed Martin-Marietta Corp
# Real TJN ID is e159, but they got it wrong several times --mj
0059 Tiger Jet Network Inc. (Wrong ID)
0070 Hauppauge computer works Inc.
+ 0003 WinTV PVR-250
+ 0009 WinTV PVR-150
+ 0801 WinTV PVR-150
+ 0807 WinTV PVR-150
+ 4000 WinTV PVR-350
+ 4001 WinTV PVR-250 (v1)
+ 4009 WinTV PVR-250
+ 4800 WinTV PVR-350
+ 4801 WinTV PVR-250 MCE
+ 4803 WinTV PVR-250
+ 8003 WinTV PVR-150
+ 8801 WinTV PVR-150
+ c801 WinTV PVR-150
+ e807 WinTV PVR-500 MCE (1st tuner)
+ e817 WinTV PVR-500 MCE (2nd tuner)
0071 Nebula Electronics Ltd.
0095 Silicon Image, Inc. (Wrong ID)
0680 Ultra ATA/133 IDE RAID CONTROLLER CARD
@@ -51,6 +68,7 @@
0315 SK-Electronics Co., Ltd.
0357 TTTech AG
000a TTP-Monitoring Card V2.0
+0403 Future Technology Devices International Ltd
0432 SCM Microsystems, Inc.
0001 Pluto2 DVB-T Receiver for PCMCIA [EasyWatch MobilSet]
045e Microsoft
@@ -63,6 +81,7 @@
001a FSD7000 802.11g PCI Wireless card
0109 F5U409-CU USB/Serial Portable Adapter
7050 F5D7050 802.11g Wireless USB Adapter
+ 705c F5D7050 v4
05a9 OmniVision
8519 OV519 series
05e3 CyberDoor
@@ -78,23 +97,42 @@
067b Prolific Technology, Inc.
2303 PL-2303 USB-to-Serial Converter
3507 PL-3507 Hi-Speed USB & IEEE 1394 Combo to IDE Bridge Controller
+069d Hughes Network Systems (HNS)
0721 Sapphire, Inc.
+07ca AVerMedia Technologies Inc.
+ b808 AVerTV DVB-T Volar (USB 2.0)
07e2 ELMEG Communication Systems GmbH
+0842 NPG, Personal Grand Technology
+08ff AuthenTec
+ afe4 [Anchor] AF-S2 FingerLoc Sensor Module
# Wrong ID used in subsystem ID of VIA USB controllers.
0925 VIA Technologies, Inc. (Wrong ID)
093a PixArt Imaging Inc.
+ 010e Innovage Mini Digital Camera
+ 010f SDC-300 Webcam
+ 2468 CIF Single Chip
+ 2603 Philips Webcam SPC500NC
+ 2608 Maxell MaxCam RotaWeb
09c1 Arris
0704 CM 200E Cable Modem
0a89 BREA Technologies Inc
+0ace ZyDAS
+ 1211 ZD1211 IEEE 802.11b+g USB Adapter
0b0b Rhino Equiment Corp.
0105 Rhino R1T1
0205 Rhino R4FXO
+ 0206 RCB4FXO 4-channel FXO analog telphony card
0305 Rhino R4T1
0405 Rhino R8FXX
+ 0406 RCB8FXX 8-channel modular analog telphony card
0505 Rhino R24FXX
- 0506 Rhino R2T1
+ 0506 RCB24FXS 24-Channel FXS analog telphony card
0605 Rhino R2T1
0705 Rhino R24FXS
+ 0706 RCB24FXO 24-Channel FXO analog telphony card
+ 0905 R1T3 Single T3 Digital Telephony Card
+ 0906 RCB24FXX 24-channel modular analog telphony card
+ 0a06 RCB672FXX 672-channel modular analog telphony card
0b49 ASCII Corporation
064f Trance Vibrator
0ccd TerraTec Electronic GmbH
@@ -288,16 +326,33 @@
0041 53C1035ZC PCI-X Fusion-MPT Dual Ultra320 SCSI
0050 SAS1064 PCI-X Fusion-MPT SAS
0054 SAS1068 PCI-X Fusion-MPT SAS
+ 0055 SAS1068 PCI-X Fusion-MPT SAS
+ 1033 8336 SAS1068
0056 SAS1064E PCI-Express Fusion-MPT SAS
0058 SAS1068E PCI-Express Fusion-MPT SAS
005a SAS1066E PCI-Express Fusion-MPT SAS
005c SAS1064A PCI-X Fusion-MPT SAS
005e SAS1066 PCI-X Fusion-MPT SAS
0060 MegaRAID SAS 1078
+ 1000 1006 MegaRAID SAS 8888ELP
+ 1000 100a MegaRAID SAS 8708ELP
+ 1000 100e MegaRAID SAS 8884E
+ 1000 100f MegaRAID SAS 8708E
+ 1000 1010 MegaRAID SATA 350-8ELP
+ 1000 1011 MegaRAID SATA 350-4ELP
+ 1000 1012 MegaRAID SAS 8704ELP
+ 1014 0363 MegaRAID SAS PCI Express ROMB
+ 1014 0364 SystemX MegaRAID SAS 8808E
+ 1014 0365 SystemX MegaRAID SAS 8884E
1028 1f0a PERC 6/E Adapter RAID Controller
1028 1f0b PERC 6/i Adapter RAID Controller
1028 1f0c PERC 6/i Integrated RAID Controller
- 1028 1f0d PERC 6/i Enhanced RAID Controller
+ 1028 1f0d CERC 6/i Adapter RAID Controller
+ 1028 1f11 CERC 6/i Adapter RAID Controller
+ 1043 824d MegaRAID SAS PCI Express ROMB
+ 1170 002f MegaRAID SAS PCI Express ROMB
+ 8086 34cc Integrated RAID Controller SROMBSAS28E
+ 8086 34cd Integrated RAID Controller SROMBSAS28E
0062 SAS1078 PCI-Express Fusion-MPT SAS
1000 0062 SAS1078 PCI-Express Fusion-MPT SAS
008f 53c875J
@@ -317,6 +372,9 @@
1025 004d MegaRAID ACER ROMB-2E RAID Controller
1028 0001 PowerEdge RAID Controller PERC4e/SC
1028 0002 PowerEdge RAID Controller PERC4e/DC
+ 1028 0012 PowerEdge RAID Controller RAC4
+ 1028 0015 PowerEdge RAID Controller PERC5
+ 1028 1f03 PowerEdge RAID Controller PERC5
1734 1065 FSC MegaRAID PCI Express ROMB
8086 0002 MegaRAID Intel RAID Controller SRCU42E
0409 MegaRAID
@@ -330,6 +388,7 @@
1000 1002 MegaRAID SAS 8480E
1000 1003 MegaRAID SAS 8344ELP
1000 1004 MegaRAID SAS 8308ELP
+ 1000 1008 MegaRAID SAS 84016E
1000 100c MegaRAID SATA 300-12E
1000 100d MegaRAID SATA 300-16E
1000 2004 MegaRAID SATA 300-8ELP
@@ -338,8 +397,8 @@
1054 3016 MegaRAID SAS RoMB Server
1734 1081 MegaRAID SAS PCI Express ROMB
1734 10a3 MegaRAID SAS PCI Express ROMB
- 8086 1001 SRCSAS18E RAID Controller
- 8086 1003 SRCSAS144E RAID Controller
+ 8086 1001 RAID Controller SRCSAS18E
+ 8086 1003 RAID Controller SRCSAS144E
8086 3500 SROMBSAS18E RAID Controller
8086 3501 SROMBSAS18E RAID Controller
8086 3504 SROMBSAS18E RAID Controller
@@ -509,7 +568,11 @@
103c 308b MX6125
4379 ATI 4379 Serial ATA Controller
437a ATI 437A Serial ATA Controller
+ 1002 4379 ATI 4379 Serial ATA Controller
+ 1002 437a ATI 437A Serial ATA Controller
+ 14f1 8800 Leadtek WinFast TV2000XP Expert
437b SB450 HDA Audio
+ 1734 10b8 Realtek High Definition Audio
4380 SB600 Non-Raid-5 SATA
4381 SB600 Raid-5 SATA
4382 SB600 AC97 Audio
@@ -584,6 +647,7 @@
1734 007a Primergy RX300
8086 3411 SDS2 Mainboard
8086 3427 S875WP1-E mainboard
+ 8086 5744 S845WD1-E mainboard
4753 Rage XC
1002 4753 Rage XC
4754 3D Rage I/II 215GT [Mach64 GT]
@@ -711,10 +775,12 @@
1025 005a TravelMate 290
103c 088c NC8000 laptop
103c 0890 NC6000 laptop
+ 144d c00c P35 notebook
1462 0311 MSI M510A
1734 1055 Amilo M1420W
4e51 M10 NQ [Radeon Mobility 9600]
4e52 RV350 [Mobility Radeon 9600 M10]
+ 144d c00c P35 notebook
4e53 M10 NS [Radeon Mobility 9600]
4e54 M10 NT [FireGL Mobility T2]
4e56 M11 NV [FireGL Mobility T2e]
@@ -900,7 +966,7 @@
554d R430 [Radeon X800 XL] (PCIe)
554f R430 [Radeon X800 (PCIE)]
5550 R423 [Fire GL V7100]
- 5551 R423 UQ [FireGL V7200 (PCIE)]
+ 5551 R423 [FireGL V5100 (PCIE)]
5552 R423 UR [FireGL V5100 (PCIE)]
5554 R423 UT [FireGL V7100 (PCIE)]
5569 R423 UI [Radeon X800PRO (PCIE)] Secondary
@@ -936,6 +1002,7 @@
1025 0080 Aspire 5024WLMMi
103c 308b MX6125
5951 ATI Radeon Xpress 200 (RS480/RS482/RX480/RX482) Chipset - Host bridge
+ 5952 RD580 [CrossFire Xpress 3200] Chipset Host Bridge
5954 RS480 [Radeon Xpress 200G Series]
1002 5954 RV370 [Radeon Xpress 200G Series]
5955 ATI Radeon XPRESS 200M 5955 (PCIE)
@@ -954,6 +1021,7 @@
18bc 0053 Radeon 9200 Game Buster VIVO
5962 RV280 [Radeon 9200]
5964 RV280 [Radeon 9200 SE]
+ 1002 5964 ATI Radeon 9200 SE, 64-bit 128MB DDR, 200/166MHz
1043 c006 ASUS Radeon 9200 SE / TD / 128M
1458 4018 Radeon 9200 SE
1458 4032 Radeon 9200 SE 128MB
@@ -966,11 +1034,12 @@
18bc 0173 GC-R9200L(SE)-C3H [Radeon 9200 Game Buster]
5969 ES1000
5974 RS482 [Radeon Xpress 200]
- 5975 RS482 [Radeon Xpress 200M]
+ 5975 RS485 [Radeon Xpress 1100 IGP]
5a33 Radeon Xpress 200 Host Bridge
5a34 RS480 PCI-X Root Port
# Comes in pair with 5a3f
5a36 RS480 PCI Bridge
+ 5a37 RS480 PCI Bridge
5a38 RS480 PCI Bridge
# Comes in pair with 5a38
5a39 RS480 PCI Bridge
@@ -998,6 +1067,7 @@
5c61 M9+ 5C61 [Radeon Mobility 9200 (AGP)]
5c63 M9+ 5C63 [Radeon Mobility 9200 (AGP)]
1002 5c63 Apple iBook G4 2004
+ 144d c00c P30 notebook
5d44 RV280 [Radeon 9200 SE] (Secondary)
1458 4019 Radeon 9200 SE (Secondary)
1458 4032 Radeon 9200 SE 128MB
@@ -1052,11 +1122,13 @@
1002 0323 All-in-Wonder X1800XL (Secondary)
1002 0d03 Radeon X1800 CrossFire Edition (Secondary)
7140 RV515 [Radeon X1600]
- 7142 RV515 [Radeon X1300]
+ 7142 RV515 PRO [ATI Radeon X1300/X1550 Series]
1002 0322 All-in-Wonder 2006 PCI-E Edition
+ 7143 RV505 [Radeon X1550 Series]
7145 Radeon Mobility X1400
7146 RV515 [Radeon X1300]
1002 0322 All-in-Wonder 2006 PCI-E Edition
+ 7147 RV505 [Radeon X1550 64-bit]
7149 M52 [ATI Mobility Radeon X1300]
714a M52 [ATI Mobility Radeon X1300]
714b M52 [ATI Mobility Radeon X1300]
@@ -1064,28 +1136,47 @@
714d RV515 [Radeon X1300]
714e RV515 [Radeon X1300]
7152 RV515 GL ATI FireGL V3300 Primary
+ 7153 RV515GL [FireGL V3350]
715e RV515 [Radeon X1300]
- 7162 RV515 [Radeon X1300] (Secondary)
+ 715f RV505 CE [Radeon X1550 64-bit]
+ 7162 RV515 PRO [ATI Radeon X1300/X1550 Series Secondary]
1002 0323 All-in-Wonder 2006 PCI-E Edition (Secondary)
7166 RV515 [Radeon X1300] (Secondary)
1002 0323 All-in-Wonder 2006 PCI-E Edition (Secondary)
7172 RV515 GL ATI FireGL V3300 Secondary
- 7180 RV516 Radeon X1300 Series Primary
+ 7173 RV515GL [FireGL V3350 Secondary]
+ 7180 RV516 [ATI Radeon X1300/X1550 Series]
7181 RV516 XT Radeon X1600 Series Primary
- 71a0 RV516 Radeon X1300 Series Secondary
+ 7183 RV516 [ATI Radeon X1300/X1550 Series]
+ 7187 RV516 [ATI Radeon X1300/X1550 Series]
+ 7188 M64-S [ATI Mobility Radeon X2300]
+ 718a ATI Mobility Radeon X2300
+ 718c M62CSP64 [ATI Mobility Radeon X1350]
+ 718d M64CSP128 [ATI Mobility Radeon X1450]
+ 7193 RV516 [Radeon X1550 Series]
+ 719b FireMV 2250
+ 719f RV516LE [Radeon X1550 64-bit]
+ 71a0 RV516 [ATI Radeon X1300/X1550 Series Secondary]
71a1 RV516 XT Radeon X1600 Series Secondary
+ 71a3 RV516 [ATI Radeon X1300 Pro Secondary]
+ 71a7 RV516 [ATI Radeon X1300/X1550 Series Secondary]
+ 71bb FireMV 2250 Secondary
71c0 RV530 [Radeon X1600]
71c2 RV530 [Radeon X1600]
71c4 M56GL [ATI Mobility FireGL V5200]
17aa 2007 ThinkPad T60p
71c5 M56P [Radeon Mobility X1600]
71c6 RV530LE [Radeon X1600]
+ 71c7 RV535 [Radeon X1650 Series]
71ce RV530LE [Radeon X1600]
71d5 M66-P ATI Mobility Radeon X1700
71d6 M66-XT ATI Mobility Radeon X1700
71de RV530LE [Radeon X1600]
71e0 RV530 [Radeon X1600] (Secondary)
71e2 RV530 [Radeon X1600] (Secondary)
+ 71e7 RV535 [Radeon X1650 Series]
+ 7210 M71 [ATI Mobility Radeon X2100]
+ 7211 M71 [ATI Mobility Radeon X2100 Secondary]
7240 R580 [Radeon X1900]
7241 R580 [Radeon X1900]
7242 R580 [Radeon X1900]
@@ -1098,15 +1189,29 @@
7249 R580 [Radeon X1900 XT] Primary
724a R580 [Radeon X1900]
724b R580 [Radeon X1900]
+ 1002 0b12 Radeon X1900 Primary Display Device
+ 1002 0b13 Radeon X1900 Secondary Display Device
724c R580 [Radeon X1900]
724d R580 [Radeon X1900]
- 724e R580 [FireGL V7300/V7350] Primary (PCIE)
+ 724e R580 [AMD Stream Processor]
7269 R580 [Radeon X1900 XT] Secondary
- 726e R580 [FireGL V7300/V7350] Secondary (PCIE)
+ 726b R580 [Radeon X1900]
+ 726e R580 [AMD Stream Processor Secondary]
+ 7280 ATI Radeon X1950 Pro Primary (PCIE)
+ 7288 ATI Radeon X1950 GT
+ 7291 ATI Radeon X1650 XT Primary (PCIE)
+ 7293 Radeon X1650 Series
+ 72a0 ATI Radeon X1950 Pro Secondary (PCIE)
+ 72a8 ATI Radeon X1950 GT Secondary
+ 72b1 ATI Radeon X1650 XT Secondary (PCIE)
+ 72b3 ATI Radeon X1650 Series Secondary
7833 Radeon 9100 IGP Host Bridge
7834 Radeon 9100 PRO IGP
7835 Radeon Mobility 9200 IGP
7838 Radeon 9100 IGP PCI/AGP Bridge
+ 791e ATI Radeon Xpress 1200 Series
+ 791f ATI Radeon Xpress 1200 Series
+ 793f ATI Radeon Xpress 1200 Series Secondary
7c37 RV350 AQ [Radeon 9600 SE]
cab0 AGP Bridge [IGP 320M]
cab2 RS200/RS200M AGP Bridge [IGP 340M]
@@ -1556,6 +1661,8 @@
2003 Am 1771 MBW [Alchemy]
2020 53c974 [PCscsi]
2040 79c974
+# CS5536 [Geode companion] Host Bridge
+ 2080 Conrad Kostecki
2081 Geode LX Video
2082 Geode LX AES Security Block
208f CS5536 GeodeLink PCI South Bridge
@@ -1742,13 +1849,21 @@
1028 0001 PowerEdge 2400
0002 PowerEdge Expandable RAID Controller 3/Di
1028 0002 PowerEdge 4400
+ 1028 00d1 PERC 3/DiV [Viper]
+ 1028 00d9 PERC 3/DiL [Lexus]
0003 PowerEdge Expandable RAID Controller 3/Si
1028 0003 PowerEdge 2450
+# PowerEdge Codename Iguana
+ 0004 PowerEdge Expandable RAID Controller 3/Di [Iguana]
+ 1028 0004 PERC 3/DiF [Iguana]
0006 PowerEdge Expandable RAID Controller 3/Di
0007 Remote Access Card III
0008 Remote Access Card III
0009 Remote Access Card III: BMC/SMIC device not present
000a PowerEdge Expandable RAID Controller 3/Di
+ 1028 0106 PERC 3/DiJ [Jaguar]
+ 1028 011b PERC 3/DiD [Dagger]
+ 1028 0121 PERC 3/DiB [Boxster]
000c Embedded Remote Access or ERA/O
000d Embedded Remote Access: BMC/SMIC device
000e PowerEdge Expandable RAID controller 4/Di
@@ -1764,6 +1879,9 @@
1028 0170 PowerEdge Expandable RAID Controller 4e/Di
0014 Remote Access Card 4 Daughter Card SMIC interface
0015 PowerEdge Expandable RAID controller 5i
+ 1028 1f01 PERC 5/E Adapter RAID Controller
+ 1028 1f02 PERC 5/i Adapter RAID Controller
+ 1f03 PERC 5/i
1029 Siemens Nixdorf IS
102a LSI Logic
0000 HYDRA
@@ -1964,6 +2082,7 @@
102f 00f8 ATM Meteor 155
0030 TC35815CF PCI 10/100 Mbit Ethernet Controller
0031 TC35815CF PCI 10/100 Mbit Ethernet Controller with WOL
+ 0032 TC35815CF PCI 10/100 Mbit Ethernet Controller on TX4939
0105 TC86C001 [goku-s] IDE
0106 TC86C001 [goku-s] USB 1.1 Host
0107 TC86C001 [goku-s] USB Device Controller
@@ -2107,6 +2226,7 @@
1019 0a14 K7S5A motherboard
1039 0900 SiS900 10/100 Ethernet Adapter
1043 8035 CUSI-FX motherboard
+ 1462 0900 MS-6701 motherboard
0961 SiS961 [MuTIOL Media IO]
0962 SiS962 [MuTIOL Media IO]
0963 SiS963 [MuTIOL Media IO]
@@ -2129,6 +2249,7 @@
1019 0970 P6STP-FL motherboard
1039 5513 SiS5513 EIDE Controller (A,B step)
1043 8035 CUSI-FX motherboard
+ 1462 7010 MS-6701 motherboard
5517 5517
5571 5571
5581 5581 Pentium Chipset
@@ -2161,10 +2282,14 @@
1019 0a14 K7S5A motherboard
1039 7000 Onboard USB Controller
1462 5470 K7SOM+ 5.2C Motherboard
+ 1462 7010 MS-6701 motherboard
7002 USB 2.0 Controller
+ 1462 7010 MS-6701 motherboard
1509 7002 Onboard USB Controller
7007 FireWire Controller
+ 1462 701d MS-6701
7012 AC'97 Sound Controller
+ 1462 7010 MS-6701 motherboard
15bd 1001 DFI 661FX motherboard
# There are may be different modem codecs here (Intel537 compatible and incompatible)
7013 AC'97 Modem Controller
@@ -2252,10 +2377,13 @@
12ee PCI-X 2.0 Local Bus Adapter
12f8 Broadcom BCM4306 802.11b/g Wireless LAN
12fa BCM4306 802.11b/g Wireless LAN Controller
+ 1302 RMP-3 Shared Memory Driver
+ 1303 RMP-3 (Remote Management Processor)
2910 E2910A PCIBus Exerciser
2925 E2925A 32 Bit, 33 MHzPCI Exerciser & Analyzer
3080 Pavilion ze2028ea
3085 Realtek RTL8139/8139C/8139C+
+ 30b5 Compaq Presario V3000Z
3220 Smart Array P600
103c 3225 3 Gb/s SAS RAID
3230 Smart Array Controller
@@ -2292,8 +2420,10 @@
80c5 nForce3 chipset motherboard [SK8N]
80df v9520 Magic/T
815a A8N-SLI Motherboard nForce4 SATA
+ 8168 Realtek PCI-E Gigabit Ethernet Controller (RTL8111B)
8187 802.11a/b/g Wireless LAN Card
8188 Tiger Hybrid TV Capture Device
+ 81f4 EN7300TC512/TD/128M/A(C262G) [Graphics Card EN7300TC512]
1044 Adaptec (formerly DPT)
1012 Domino RAID Engine
a400 SmartCache/Raid I-IV Controller
@@ -2444,6 +2574,7 @@
8023 TSB43AB22/A IEEE-1394a-2000 Controller (PHY/Link)
103c 088c NC8000 laptop
1043 808b K8N4-E Mainboard
+ 1043 815b P5W DH Deluxe Motherboard
8024 TSB43AB23 IEEE-1394a-2000 Controller (PHY/Link)
8025 TSB82AA2 IEEE-1394b Link Layer Controller
1458 1000 GA-K8N Ultra-9 Mainboard
@@ -2483,14 +2614,17 @@
8038 PCI6515 SmartCard Controller
8039 PCIxx12 Cardbus Controller
103c 309f nx9420
+ 103c 30a1 NC2400
803a PCIxx12 OHCI Compliant IEEE 1394 Host Controller
103c 309f nx9420
+ 103c 30a1 NC2400
803b 5-in-1 Multimedia Card Reader (SD/MMC/MS/MS PRO/xD)
103c 309f nx9420
803c PCIxx12 SDA Standard Compliant SD Host Controller
103c 309f nx9420
803d PCIxx12 GemCore based SmartCard controller
103c 309f nx9420
+ 103c 30a1 NC2400
8201 PCI1620 Firmware Loading Function
8204 PCI7410,7510,7610 PCI Firmware Loading Function
1028 0139 Latitude D400
@@ -2548,6 +2682,7 @@
ac42 PCI4451 PC card Cardbus Controller
1028 00e6 PCI4451 PC card CardBus Controller (Inspiron 8100)
ac44 PCI4510 PC card Cardbus Controller
+ 1028 0149 Inspiron 5100
1028 0163 Latitude D505
1028 0196 Inspiron 5160
1071 8160 MIM2000
@@ -2560,7 +2695,7 @@
1028 0139 Latitude D400
1028 014e Latitude D800
ac50 PCI1410 PC card Cardbus Controller
- ac51 PCI1420
+ ac51 PCI1420 PC card Cardbus Controller
0e11 004e Evo N600c
1014 0148 ThinkPad A20m
1014 023b ThinkPad T23 (2647-4MG)
@@ -2588,6 +2723,7 @@
ac8d PCI 7620
ac8e PCI7420 CardBus Controller
ac8f PCI7420/7620 Combo CardBus, 1394a-2000 OHCI and SD/MS-Pro Controller
+ 1028 018d Inspiron 700m
fe00 FireWire Host Controller
fe03 12C01A FireWire Host Controller
104d Sony Corporation
@@ -2673,6 +2809,7 @@
ecc0 0072 Mona rev.2
18c0 MPC8265A/8266/8272
18c1 MPC8271/MPC8272
+ 3052 SM56 Data Fax Modem
3055 SM56 Data Fax Modem
3410 DSP56361 Digital Signal Processor
ecc0 0050 Gina24 rev.0
@@ -2721,6 +2858,7 @@
1059 Teknor Industrial Computers Inc
105a Promise Technology, Inc.
0d30 PDC20265 (FastTrak100 Lite/Ultra100)
+ 1043 8042 ASUS AV7266-E South Bridge Promise RAID
105a 4d33 Ultra100
0d38 20263
105a 4d39 Fasttrak66
@@ -2749,6 +2887,7 @@
4d30 PDC20267 (FastTrak100/Ultra100)
105a 4d33 Ultra100
105a 4d39 FastTrak100
+ 8086 5744 S845WD1-E mainboard
4d33 20246
105a 4d33 20246 IDE Controller
4d38 PDC20262 (FastTrak66/Ultra66)
@@ -2777,7 +2916,12 @@
7275 PDC20277 (SBFastTrak133 Lite)
8002 SATAII150 SX8
8350 80333 [SuperTrak EX8350/EX16350], 80331 [SuperTrak EX8300/EX16300]
+ 8650 IOP1348 [SuperTrak EX4650/EX8650/EX8654]
+ 105a 4600 SuperTrak EX4650
+ 105a 8601 SuperTrak EX8650
+ 105a 8602 SuperTrak EX8654
c350 80333 [SuperTrak EX12350]
+ e350 80333 [SuperTrak EX24350]
105b Foxconn International, Inc.
105c Wipro Infotech Limited
105d Number 9 Computer Company
@@ -2990,6 +3134,7 @@
0012 YMF-754 [DS-1E Audio Controller]
1073 0012 DS-XG PCI Audio Codec
0020 DS-1 Audio
+ 1000 SW1000XG [XG Factory]
2000 DS2416 Digital Mixing Card
1073 2000 DS2416 Digital Mixing Card
1074 NexGen Microsystems
@@ -3021,7 +3166,7 @@
103c 12dd 4Gb Fibre Channel [AB429A]
2432 ISP2432-based 4Gb Fibre Channel to PCI Express HBA
3022 ISP4022-based Ethernet NIC
- 3032 ISP4032-based Ethernet NIC
+ 3032 ISP4032-based Ethernet IPv6 NIC
4010 ISP4010-based iSCSI TOE HBA
4022 ISP4022-based iSCSI TOE HBA
4032 ISP4032-based iSCSI TOE IPv6 HBA
@@ -3329,6 +3474,7 @@
13e9 0070 Win/TV (Audio Section)
144f 3000 MagicTView CPH060 - Audio
1461 0002 Avermedia PCTV98 Audio Capture
+ 1461 0003 UltraTV PCI 350
1461 0004 AVerTV WDM Audio Capture
1461 0761 AVerTV DVB-T
1461 0771 AverMedia AVerTV DVB-T 771
@@ -3417,6 +3563,8 @@
4002 TIO-CE PCI Express Port
8001 O2 1394
8002 G-net NT
+ 8010 Broadcom e-net [SGI IO9/IO10 BaseIO]
+ 8018 Broadcom e-net [SGI A330 Server BaseIO]
10aa ACC Microelectronics
0000 ACCM 2188
10ab Digicom
@@ -3468,6 +3616,7 @@
10b5 2978 SH ARC-PCIu SOHARD ARCNET card
10b5 3025 Alpermann+Velte PCL PCI L (3V/5V): Timecode Reader Board
10b5 3068 Alpermann+Velte PCL PCI HD (3V/5V): Timecode Reader Board
+ 12fe 0111 CPCI-ASIO4 (ESD 4-port Serial Interface Board)
1397 3136 4xS0-ISDN PCI Adapter
1397 3137 S2M-E1-ISDN PCI Adapter
1518 0200 Kontron ThinkIO-C
@@ -3522,6 +3671,7 @@
10b5 2844 Innes Corp TVS Encoder card
12c7 4001 Intel Dialogic DM/V960-4T1 PCI
12d9 0002 PCI Prosody Card rev 1.5
+ 14b4 d100 Dektec DTA-100
16df 0011 PIKA PrimeNet MM PCI
16df 0012 PIKA PrimeNet MM cPCI 8
16df 0013 PIKA PrimeNet MM cPCI 8 (without CAS Signaling)
@@ -6060,6 +6210,7 @@
0140 HT2100 PCI-Express Bridge
0141 HT2100 PCI-Express Bridge
0142 HT2100 PCI-Express Bridge
+ 0144 HT2100 PCI-Express Bridge
0200 OSB4 South Bridge
0201 CSB5 South Bridge
4c53 1080 CT8 mainboard
@@ -10413,9 +10564,9 @@
0962 80960RM [i960RM Bridge]
0964 80960RP [i960 RP Microprocessor/Bridge]
1000 82542 Gigabit Ethernet Controller
- 0e11 b0df NC1632 Gigabit Ethernet Adapter (1000-SX)
- 0e11 b0e0 NC1633 Gigabit Ethernet Adapter (1000-LX)
- 0e11 b123 NC1634 Gigabit Ethernet Adapter (1000-SX)
+ 0e11 b0df NC6132 Gigabit Ethernet Adapter (1000-SX)
+ 0e11 b0e0 NC6133 Gigabit Ethernet Adapter (1000-LX)
+ 0e11 b123 NC6134 Gigabit Ethernet Adapter (1000-LX)
1014 0119 Netfinity Gigabit Ethernet SX Adapter
8086 1000 PRO/1000 Gigabit Server Adapter
1001 82543GC Gigabit Ethernet Controller (Fiber)
@@ -10834,6 +10985,8 @@
8086 0006 82557 10/100 with Wake on LAN
8086 0007 82558 10/100 Adapter
8086 0008 82558 10/100 with Wake on LAN
+# 8086:0009 revision 5, 82558B based
+ 8086 0009 PRO/100+ PCI (TP)
8086 000a EtherExpress PRO/100+ Management Adapter
8086 000b EtherExpress PRO/100+
8086 000c EtherExpress PRO/100+ Management Adapter
@@ -10909,6 +11062,7 @@
8086 3010 EtherExpress PRO/100 S Network Connection
8086 3011 EtherExpress PRO/100 S Network Connection
8086 3012 EtherExpress PRO/100 Network Connection
+ 8086 301a S845WD1-E mainboard
8086 3411 SDS2 Mainboard
122d 430FX - 82437FX TSC [Triton I]
122e 82371FB PIIX ISA [Triton I]
@@ -10996,6 +11150,7 @@
2426 82801AB AC'97 Modem
2428 82801AB PCI Bridge
2440 82801BA ISA Bridge (LPC)
+ 8086 5744 S845WD1-E
2442 82801BA/BAM USB (Hub #1)
1014 01c6 Netvista A40/A40p
1025 1016 Travelmate 612 TX
@@ -11006,6 +11161,7 @@
147b 0507 TH7II-RAID
8086 4532 D815EEA2 mainboard
8086 4557 D815EGEW Mainboard
+ 8086 5744 S845WD1-E mainboard
2443 82801BA/BAM SMBus
1014 01c6 Netvista A40/A40p
1025 1016 Travelmate 612 TX
@@ -11016,6 +11172,7 @@
147b 0507 TH7II-RAID
8086 4532 D815EEA2 mainboard
8086 4557 D815EGEW Mainboard
+ 8086 5744 S845WD1-E mainboard
2444 82801BA/BAM USB (Hub #2)
1025 1016 Travelmate 612 TX
1028 00c7 Dimension 8100
@@ -11024,6 +11181,7 @@
104d 80df Vaio PCG-FX403
147b 0507 TH7II-RAID
8086 4532 D815EEA2 mainboard
+ 8086 5744 S845WD1-E mainboard
2445 82801BA/BAM AC'97 Audio
0e11 000b Compaq Deskpro EN Audio
0e11 0088 Evo D500
@@ -11082,6 +11240,7 @@
147b 0507 TH7II-RAID
8086 4532 D815EEA2 mainboard
8086 4557 D815EGEW Mainboard
+ 8086 5744 S845WD1-E mainboard
244c 82801BAM ISA Bridge (LPC)
244e 82801 PCI Bridge
1014 0267 NetVista A30p
@@ -11174,6 +11333,7 @@
103c 0890 NC6000 laptop
103c 08b0 tc1100 tablet
1071 8160 MIM2000
+ 144d c00c P30/P35 notebook
1458 24c2 GA-8PE667 Ultra
1462 5800 845PE Max (MS-6580)
1734 1004 D1451 Mainboard (SCENIC N300, i845GV)
@@ -11742,17 +11902,21 @@
103c 099c NX6110/NC6120
1043 1881 GMA 900 915GM Integrated Graphics
27a0 Mobile 945GM/PM/GMS/940GML and 945GT Express Memory Controller Hub
+ 103c 30a1 NC2400
17aa 2017 Thinkpad R60e model 0657
27a1 Mobile 945GM/PM/GMS/940GML and 945GT Express PCI Express Root Port
27a2 Mobile 945GM/GMS/940GML Express Integrated Graphics Controller
+ 103c 30a1 NC2400
17aa 201a Thinkpad R60e model 0657
27a6 Mobile 945GM/GMS/940GML Express Integrated Graphics Controller
+ 103c 30a1 NC2400
17aa 201a Thinkpad R60e model 0657
27b0 82801GH (ICH7DH) LPC Interface Bridge
27b8 82801GB/GR (ICH7 Family) LPC Interface Bridge
107b 5048 E4500
8086 544e DeskTop Board D945GTP
27b9 82801GBM (ICH7-M) LPC Interface Bridge
+ 103c 30a1 NC2400
10f7 8338 Panasonic CF-Y5 laptop
17aa 2009 ThinkPad T60/R60 series
27bd 82801GHM (ICH7-M DH) LPC Interface Bridge
@@ -11766,22 +11930,27 @@
17aa 200d Thinkpad R60e model 0657
27c6 82801GHM (ICH7-M DH) Serial ATA Storage Controller RAID
27c8 82801G (ICH7 Family) USB UHCI #1
+ 103c 30a1 NC2400
107b 5048 E4500
17aa 200a ThinkPad T60/R60 series
8086 544e DeskTop Board D945GTP
27c9 82801G (ICH7 Family) USB UHCI #2
+ 103c 30a1 NC2400
107b 5048 E4500
17aa 200a ThinkPad T60/R60 series
8086 544e DeskTop Board D945GTP
27ca 82801G (ICH7 Family) USB UHCI #3
+ 103c 30a1 NC2400
107b 5048 E4500
17aa 200a ThinkPad T60/R60 series
8086 544e DeskTop Board D945GTP
27cb 82801G (ICH7 Family) USB UHCI #4
+ 103c 30a1 NC2400
107b 5048 E4500
17aa 200a ThinkPad T60/R60 series
8086 544e DeskTop Board D945GTP
27cc 82801G (ICH7 Family) USB2 EHCI Controller
+ 103c 30a1 NC2400
17aa 200b ThinkPad T60/R60 series
8086 544e DeskTop Board D945GTP
27d0 82801G (ICH7 Family) PCI Express Port 1
@@ -11789,10 +11958,12 @@
27d4 82801G (ICH7 Family) PCI Express Port 3
27d6 82801G (ICH7 Family) PCI Express Port 4
27d8 82801G (ICH7 Family) High Definition Audio Controller
+ 103c 30a1 NC2400
107b 5048 E4500
10f7 8338 Panasonic CF-Y5 laptop
1179 ff31 Toshiba America Information Systems:AC97 Data Fax SoftModem with SmartCP
152d 0753 Softmodem
+ 1734 10ad Conexant softmodem SmartCP
17aa 2010 ThinkPad T60/R60 series
27da 82801G (ICH7 Family) SMBus Controller
10f7 8338 Panasonic CF-Y5 laptop
@@ -11803,6 +11974,7 @@
27dd 82801G (ICH7 Family) AC'97 Modem Controller
27de 82801G (ICH7 Family) AC'97 Audio Controller
27df 82801G (ICH7 Family) IDE Controller
+ 103c 30a1 NC2400
107b 5048 E4500
10f7 8338 Panasonic CF-Y5 laptop
17aa 200c Thinkpad R60e model 0657
@@ -11846,6 +12018,34 @@
284b 82801H (ICH8 Family) HD Audio Controller
284f 82801H (ICH8 Family) Thermal Reporting Device
2850 Mobile IDE Controller
+ 2910 LPC Interface Controller
+ 2920 4 port SATA IDE Controller
+ 2921 2 port SATA IDE Controller
+ 2922 6 port SATA AHCI Controller
+ 2923 4 port SATA AHCI Controller
+ 2925 SATA RAID Controller
+ 2926 2 port SATA IDE Controller
+ 2928 Mobile 2 port SATA IDE Controller
+ 292d Mobile 2 port SATA IDE Controller
+ 292e Mobile 1 port SATA IDE Controller
+ 2930 SMBus Controller
+ 2932 Thermal Subsystem
+ 2934 USB UHCI Controller #1
+ 2935 USB UHCI Controller #2
+ 2936 USB UHCI Controller #3
+ 2937 USB UHCI Controller #4
+ 2938 USB UHCI Controller #5
+ 2939 USB UHCI Controller #6
+ 293a USB2 EHCI Controller #1
+ 293c USB2 EHCI Controller #2
+ 293e HD Audio Controller
+ 2940 PCI Express Port 1
+ 2942 PCI Express Port 2
+ 2944 PCI Express Port 3
+ 2946 PCI Express Port 4
+ 2948 PCI Express Port 5
+ 294a PCI Express Port 6
+ 294c Gigabit Ethernet Controller
2970 82946GZ/PL/GL Memory Controller Hub
2971 82946GZ/PL/GL PCI Express Root Port
2972 82946GZ/GL Integrated Graphics Controller
@@ -11873,6 +12073,37 @@
29a5 82P965/G965 HECI Controller
29a6 82P965/G965 PT IDER Controller
29a7 82P965/G965 KT Controller
+ 29b0 DRAM Controller
+ 29b1 PCI Express Root Port
+ 29b2 Integrated Graphics Controller
+ 29b3 Integrated Graphics Controller
+ 29b4 HECI Controller
+ 29b5 HECI Controller
+ 29b6 PT IDER Controller
+ 29b7 Serial KT Controller
+ 29c0 DRAM Controller
+ 29c1 PCI Express Root Port
+ 29c2 Integrated Graphics Controller
+ 29c3 Integrated Graphics Controller
+ 29c4 HECI Controller
+ 29c5 HECI Controller
+ 29c6 PT IDER Controller
+ 29c7 Serial KT Controller
+ 29cf Virtual HECI Controller
+ 29e0 DRAM Controller
+ 29e1 Host-Primary PCI Express Bridge
+ 29e4 HECI Controller
+ 29e5 HECI Controller
+ 29e6 PT IDER Controller
+ 29e7 Serial KT Controller
+ 29e9 Host-Secondary PCI Express Bridge
+ 29f0 Server DRAM Controller
+ 29f1 Server Host-Primary PCI Express Bridge
+ 29f4 Server HECI Controller
+ 29f5 Server HECI Controller
+ 29f6 Server PT IDER Controller
+ 29f7 Server Serial KT Controller
+ 29f9 Server Host-Secondary PCI Express Bridge
2a00 Mobile Memory Controller Hub
2a01 Mobile PCI Express Root Port
2a02 Mobile Integrated Graphics Controller
@@ -11978,7 +12209,42 @@
35b6 3100 Chipset PCI Express Port A
35b7 3100 Chipset PCI Express Port A1
35c8 3100 Extended Configuration Test Overflow Registers
+ 3600 Server Memory Controller Hub
+ 3604 Server PCI Express Port 1
+ 3605 Server PCI Express Port 2
+ 3606 Server PCI Express Port 3
+ 3607 Server PCI Express Port 4
+ 3608 Server PCI Express Port 5
+ 3609 Server PCI Express Port 6
+ 360a Server PCI Express Port 7
+ 360b Server IOAT DMA Controller
+ 360c Server FSB Registers
+ 360d Server Snoop Filter Registers
+ 360e Server Reserved Registers
+ 360f Server FBD Branch 0 Registers
+ 3610 Server FBD Branch 1 Registers
+ 4000 Memory Controller Hub
+ 4008 Memory Controller Hub
+ 4010 Memory Controller Hub
+ 4021 PCI Express Port 1
+ 4022 PCI Express Port 2
+ 4023 PCI Express Port 3
+ 4024 PCI Express Port 4
+ 4025 PCI Express Port 5
+ 4026 PCI Express Port 6
+ 4027 PCI Express Port 7
+ 4028 PCI Express Port 8
+ 4029 PCI Express Port 9
+ 402d IBIST Registers
+ 402e IBIST Registers
+ 402f DMA/DCA Engine
+ 4030 FSB Registers
+ 4032 I/OxAPIC
+ 4035 FBD Registers
+ 4036 FBD Registers
4220 PRO/Wireless 2200BG Network Connection
+ 2731 8086 WLAN-Adapter
+ 8086 2731 Samsung P35 integrated WLAN
4222 PRO/Wireless 3945ABG Network Connection
8086 1005 PRO/Wireless 3945BG Network Connection
8086 1034 PRO/Wireless 3945BG Network Connection
@@ -11994,6 +12260,23 @@
5201 EtherExpress PRO/100 Intelligent Server
8086 0001 EtherExpress PRO/100 Server Ethernet Adapter
530d 80310 IOP [IO Processor]
+ 65c0 Memory Controller Hub
+ 65e2 PCI Express x4 Port 2
+ 65e3 PCI Express x4 Port 3
+ 65e4 PCI Express x4 Port 4
+ 65e5 PCI Express x4 Port 5
+ 65e6 PCI Express x4 Port 6
+ 65e7 PCI Express x4 Port 7
+ 65f0 FSB Registers
+ 65f1 Reserved Registers
+ 65f3 Reserved Registers
+ 65f5 DDR Channel 0 Registers
+ 65f6 DDR Channel 1 Registers
+ 65f7 PCI Express x8 Port 2-3
+ 65f8 PCI Express x8 Port 4-5
+ 65f9 PCI Express x8 Port 6-7
+ 65fa PCI Express x16 Port 4-7
+ 65ff DMA Engine
7000 82371SB PIIX3 ISA [Natoma/Triton II]
7010 82371SB PIIX3 IDE [Natoma/Triton II]
7020 82371SB PIIX3 USB [Natoma/Triton II]
@@ -12092,6 +12375,7 @@
9622 Integrated RAID
9641 Integrated RAID
96a1 Integrated RAID
+ a620 6400/6402 Advanced Memory Buffer (AMB)
b152 21152 PCI-to-PCI Bridge
# observed, and documented in Intel revision note; new mask of 1011:0026
b154 21154 PCI-to-PCI Bridge
diff --git a/hw/xfree86/scanpci/xf86PciStdIds.h b/hw/xfree86/scanpci/xf86PciStdIds.h
index 0cf8d4e..d2784f5 100644
--- a/hw/xfree86/scanpci/xf86PciStdIds.h
+++ b/hw/xfree86/scanpci/xf86PciStdIds.h
@@ -30,6 +30,10 @@ static const char pci_vendor_0000[] = "G
static const char pci_vendor_001a[] = "Ascend Communications, Inc.";
#endif
#ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_001c[] = "PEAK-System Technik GmbH";
+static const char pci_device_001c_0001[] = "PCAN-PCI CAN-Bus controller";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
static const char pci_vendor_0033[] = "Paradyne corp.";
#endif
static const char pci_vendor_003d[] = "Lockheed Martin-Marietta Corp";
@@ -38,6 +42,21 @@ static const char pci_vendor_0059[] = "T
#endif
#ifdef VENDOR_INCLUDE_NONVIDEO
static const char pci_vendor_0070[] = "Hauppauge computer works Inc.";
+static const char pci_device_0070_0003[] = "WinTV PVR-250";
+static const char pci_device_0070_0009[] = "WinTV PVR-150";
+static const char pci_device_0070_0801[] = "WinTV PVR-150";
+static const char pci_device_0070_0807[] = "WinTV PVR-150";
+static const char pci_device_0070_4000[] = "WinTV PVR-350";
+static const char pci_device_0070_4001[] = "WinTV PVR-250 (v1)";
+static const char pci_device_0070_4009[] = "WinTV PVR-250";
+static const char pci_device_0070_4800[] = "WinTV PVR-350";
+static const char pci_device_0070_4801[] = "WinTV PVR-250 MCE";
+static const char pci_device_0070_4803[] = "WinTV PVR-250";
+static const char pci_device_0070_8003[] = "WinTV PVR-150";
+static const char pci_device_0070_8801[] = "WinTV PVR-150";
+static const char pci_device_0070_c801[] = "WinTV PVR-150";
+static const char pci_device_0070_e807[] = "WinTV PVR-500 MCE (1st tuner)";
+static const char pci_device_0070_e817[] = "WinTV PVR-500 MCE (2nd tuner)";
#endif
#ifdef VENDOR_INCLUDE_NONVIDEO
static const char pci_vendor_0071[] = "Nebula Electronics Ltd.";
@@ -85,6 +104,9 @@ static const char pci_vendor_0357[] = "T
static const char pci_device_0357_000a[] = "TTP-Monitoring Card V2.0";
#endif
#ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_0403[] = "Future Technology Devices International Ltd";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
static const char pci_vendor_0432[] = "SCM Microsystems, Inc.";
static const char pci_device_0432_0001[] = "Pluto2 DVB-T Receiver for PCMCIA [EasyWatch MobilSet]";
#endif
@@ -105,6 +127,7 @@ static const char pci_vendor_050d[] = "B
static const char pci_device_050d_001a[] = "FSD7000 802.11g PCI Wireless card";
static const char pci_device_050d_0109[] = "F5U409-CU USB/Serial Portable Adapter";
static const char pci_device_050d_7050[] = "F5D7050 802.11g Wireless USB Adapter";
+static const char pci_device_050d_705c[] = "F5D7050 v4";
#endif
#ifdef VENDOR_INCLUDE_NONVIDEO
static const char pci_vendor_05a9[] = "OmniVision";
@@ -132,16 +155,35 @@ static const char pci_device_067b_2303[]
static const char pci_device_067b_3507[] = "PL-3507 Hi-Speed USB & IEEE 1394 Combo to IDE Bridge Controller";
#endif
#ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_069d[] = "Hughes Network Systems (HNS)";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
static const char pci_vendor_0721[] = "Sapphire, Inc.";
#endif
#ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_07ca[] = "AVerMedia Technologies Inc.";
+static const char pci_device_07ca_b808[] = "AVerTV DVB-T Volar (USB 2.0)";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
static const char pci_vendor_07e2[] = "ELMEG Communication Systems GmbH";
#endif
#ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_0842[] = "NPG, Personal Grand Technology";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_08ff[] = "AuthenTec";
+static const char pci_device_08ff_afe4[] = "[Anchor] AF-S2 FingerLoc Sensor Module";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
static const char pci_vendor_0925[] = "VIA Technologies, Inc. (Wrong ID)";
#endif
#ifdef VENDOR_INCLUDE_NONVIDEO
static const char pci_vendor_093a[] = "PixArt Imaging Inc.";
+static const char pci_device_093a_010e[] = "Innovage Mini Digital Camera";
+static const char pci_device_093a_010f[] = "SDC-300 Webcam";
+static const char pci_device_093a_2468[] = "CIF Single Chip";
+static const char pci_device_093a_2603[] = "Philips Webcam SPC500NC";
+static const char pci_device_093a_2608[] = "Maxell MaxCam RotaWeb";
#endif
#ifdef VENDOR_INCLUDE_NONVIDEO
static const char pci_vendor_09c1[] = "Arris";
@@ -151,15 +193,25 @@ static const char pci_device_09c1_0704[]
static const char pci_vendor_0a89[] = "BREA Technologies Inc";
#endif
#ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_0ace[] = "ZyDAS";
+static const char pci_device_0ace_1211[] = "ZD1211 IEEE 802.11b+g USB Adapter";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
static const char pci_vendor_0b0b[] = "Rhino Equiment Corp.";
static const char pci_device_0b0b_0105[] = "Rhino R1T1";
static const char pci_device_0b0b_0205[] = "Rhino R4FXO";
+static const char pci_device_0b0b_0206[] = "RCB4FXO 4-channel FXO analog telphony card";
static const char pci_device_0b0b_0305[] = "Rhino R4T1";
static const char pci_device_0b0b_0405[] = "Rhino R8FXX";
+static const char pci_device_0b0b_0406[] = "RCB8FXX 8-channel modular analog telphony card";
static const char pci_device_0b0b_0505[] = "Rhino R24FXX";
-static const char pci_device_0b0b_0506[] = "Rhino R2T1";
+static const char pci_device_0b0b_0506[] = "RCB24FXS 24-Channel FXS analog telphony card";
static const char pci_device_0b0b_0605[] = "Rhino R2T1";
static const char pci_device_0b0b_0705[] = "Rhino R24FXS";
+static const char pci_device_0b0b_0706[] = "RCB24FXO 24-Channel FXO analog telphony card";
+static const char pci_device_0b0b_0905[] = "R1T3 Single T3 Digital Telephony Card";
+static const char pci_device_0b0b_0906[] = "RCB24FXX 24-channel modular analog telphony card";
+static const char pci_device_0b0b_0a06[] = "RCB672FXX 672-channel modular analog telphony card";
#endif
#ifdef VENDOR_INCLUDE_NONVIDEO
static const char pci_vendor_0b49[] = "ASCII Corporation";
@@ -524,12 +576,48 @@ static const char pci_subsys_1000_0040_1
static const char pci_device_1000_0041[] = "53C1035ZC PCI-X Fusion-MPT Dual Ultra320 SCSI";
static const char pci_device_1000_0050[] = "SAS1064 PCI-X Fusion-MPT SAS";
static const char pci_device_1000_0054[] = "SAS1068 PCI-X Fusion-MPT SAS";
+static const char pci_device_1000_0055[] = "SAS1068 PCI-X Fusion-MPT SAS";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0055_1033_8336[] = "SAS1068";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
static const char pci_device_1000_0056[] = "SAS1064E PCI-Express Fusion-MPT SAS";
static const char pci_device_1000_0058[] = "SAS1068E PCI-Express Fusion-MPT SAS";
static const char pci_device_1000_005a[] = "SAS1066E PCI-Express Fusion-MPT SAS";
static const char pci_device_1000_005c[] = "SAS1064A PCI-X Fusion-MPT SAS";
static const char pci_device_1000_005e[] = "SAS1066 PCI-X Fusion-MPT SAS";
static const char pci_device_1000_0060[] = "MegaRAID SAS 1078";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0060_1000_1006[] = "MegaRAID SAS 8888ELP";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0060_1000_100a[] = "MegaRAID SAS 8708ELP";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0060_1000_100e[] = "MegaRAID SAS 8884E";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0060_1000_100f[] = "MegaRAID SAS 8708E";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0060_1000_1010[] = "MegaRAID SATA 350-8ELP";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0060_1000_1011[] = "MegaRAID SATA 350-4ELP";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0060_1000_1012[] = "MegaRAID SAS 8704ELP";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0060_1014_0363[] = "MegaRAID SAS PCI Express ROMB";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0060_1014_0364[] = "SystemX MegaRAID SAS 8808E";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0060_1014_0365[] = "SystemX MegaRAID SAS 8884E";
+#endif
#endif
#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_1000_0060_1028_1f0a[] = "PERC 6/E Adapter RAID Controller";
@@ -547,7 +635,28 @@ static const char pci_subsys_1000_0060_1
#ifdef VENDOR_INCLUDE_NONVIDEO
#endif
#ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1000_0060_1028_1f0d[] = "PERC 6/i Enhanced RAID Controller";
+static const char pci_subsys_1000_0060_1028_1f0d[] = "CERC 6/i Adapter RAID Controller";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0060_1028_1f11[] = "CERC 6/i Adapter RAID Controller";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0060_1043_824d[] = "MegaRAID SAS PCI Express ROMB";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0060_1170_002f[] = "MegaRAID SAS PCI Express ROMB";
+#endif
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0060_8086_34cc[] = "Integrated RAID Controller SROMBSAS28E";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0060_8086_34cd[] = "Integrated RAID Controller SROMBSAS28E";
#endif
#ifdef VENDOR_INCLUDE_NONVIDEO
static const char pci_device_1000_0062[] = "SAS1078 PCI-Express Fusion-MPT SAS";
@@ -617,6 +726,21 @@ static const char pci_subsys_1000_0408_1
static const char pci_subsys_1000_0408_1028_0002[] = "PowerEdge RAID Controller PERC4e/DC";
#endif
#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0408_1028_0012[] = "PowerEdge RAID Controller RAC4";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0408_1028_0015[] = "PowerEdge RAID Controller PERC5";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0408_1028_1f03[] = "PowerEdge RAID Controller PERC5";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_1000_0408_1734_1065[] = "FSC MegaRAID PCI Express ROMB";
#endif
@@ -661,6 +785,9 @@ static const char pci_subsys_1000_0411_1
static const char pci_subsys_1000_0411_1000_1004[] = "MegaRAID SAS 8308ELP";
#endif
#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0411_1000_1008[] = "MegaRAID SAS 84016E";
+#endif
+#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_1000_0411_1000_100c[] = "MegaRAID SATA 300-12E";
#endif
#ifdef INIT_SUBSYS_INFO
@@ -688,12 +815,12 @@ static const char pci_subsys_1000_0411_1
#endif
#endif
#ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1000_0411_8086_1001[] = "SRCSAS18E RAID Controller";
+static const char pci_subsys_1000_0411_8086_1001[] = "RAID Controller SRCSAS18E";
#endif
#ifdef VENDOR_INCLUDE_NONVIDEO
#endif
#ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1000_0411_8086_1003[] = "SRCSAS144E RAID Controller";
+static const char pci_subsys_1000_0411_8086_1003[] = "RAID Controller SRCSAS144E";
#endif
#ifdef VENDOR_INCLUDE_NONVIDEO
#endif
@@ -1038,7 +1165,19 @@ static const char pci_subsys_1002_4378_1
#endif
static const char pci_device_1002_4379[] = "ATI 4379 Serial ATA Controller";
static const char pci_device_1002_437a[] = "ATI 437A Serial ATA Controller";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_437a_1002_4379[] = "ATI 4379 Serial ATA Controller";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_437a_1002_437a[] = "ATI 437A Serial ATA Controller";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_437a_14f1_8800[] = "Leadtek WinFast TV2000XP Expert";
+#endif
static const char pci_device_1002_437b[] = "SB450 HDA Audio";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_437b_1734_10b8[] = "Realtek High Definition Audio";
+#endif
static const char pci_device_1002_4380[] = "SB600 Non-Raid-5 SATA";
static const char pci_device_1002_4381[] = "SB600 Raid-5 SATA";
static const char pci_device_1002_4382[] = "SB600 AC97 Audio";
@@ -1203,6 +1342,9 @@ static const char pci_subsys_1002_4752_8
#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_1002_4752_8086_3427[] = "S875WP1-E mainboard";
#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_4752_8086_5744[] = "S845WD1-E mainboard";
+#endif
static const char pci_device_1002_4753[] = "Rage XC";
#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_1002_4753_1002_4753[] = "Rage XC";
@@ -1450,6 +1592,9 @@ static const char pci_subsys_1002_4e50_1
static const char pci_subsys_1002_4e50_103c_0890[] = "NC6000 laptop";
#endif
#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_4e50_144d_c00c[] = "P35 notebook";
+#endif
+#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_1002_4e50_1462_0311[] = "MSI M510A";
#endif
#ifdef INIT_SUBSYS_INFO
@@ -1457,6 +1602,9 @@ static const char pci_subsys_1002_4e50_1
#endif
static const char pci_device_1002_4e51[] = "M10 NQ [Radeon Mobility 9600]";
static const char pci_device_1002_4e52[] = "RV350 [Mobility Radeon 9600 M10]";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_4e52_144d_c00c[] = "P35 notebook";
+#endif
static const char pci_device_1002_4e53[] = "M10 NS [Radeon Mobility 9600]";
static const char pci_device_1002_4e54[] = "M10 NT [FireGL Mobility T2]";
static const char pci_device_1002_4e56[] = "M11 NV [FireGL Mobility T2e]";
@@ -1822,7 +1970,7 @@ static const char pci_device_1002_554b[]
static const char pci_device_1002_554d[] = "R430 [Radeon X800 XL] (PCIe)";
static const char pci_device_1002_554f[] = "R430 [Radeon X800 (PCIE)]";
static const char pci_device_1002_5550[] = "R423 [Fire GL V7100]";
-static const char pci_device_1002_5551[] = "R423 UQ [FireGL V7200 (PCIE)]";
+static const char pci_device_1002_5551[] = "R423 [FireGL V5100 (PCIE)]";
static const char pci_device_1002_5552[] = "R423 UR [FireGL V5100 (PCIE)]";
static const char pci_device_1002_5554[] = "R423 UT [FireGL V7100 (PCIE)]";
static const char pci_device_1002_5569[] = "R423 UI [Radeon X800PRO (PCIE)] Secondary";
@@ -1874,6 +2022,7 @@ static const char pci_subsys_1002_5950_1
static const char pci_subsys_1002_5950_103c_308b[] = "MX6125";
#endif
static const char pci_device_1002_5951[] = "ATI Radeon Xpress 200 (RS480/RS482/RX480/RX482) Chipset - Host bridge";
+static const char pci_device_1002_5952[] = "RD580 [CrossFire Xpress 3200] Chipset Host Bridge";
static const char pci_device_1002_5954[] = "RS480 [Radeon Xpress 200G Series]";
#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_1002_5954_1002_5954[] = "RV370 [Radeon Xpress 200G Series]";
@@ -1917,6 +2066,9 @@ static const char pci_subsys_1002_5961_1
static const char pci_device_1002_5962[] = "RV280 [Radeon 9200]";
static const char pci_device_1002_5964[] = "RV280 [Radeon 9200 SE]";
#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_5964_1002_5964[] = "ATI Radeon 9200 SE, 64-bit 128MB DDR, 200/166MHz";
+#endif
+#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_1002_5964_1043_c006[] = "ASUS Radeon 9200 SE / TD / 128M";
#endif
#ifdef INIT_SUBSYS_INFO
@@ -1948,10 +2100,11 @@ static const char pci_subsys_1002_5964_1
#endif
static const char pci_device_1002_5969[] = "ES1000";
static const char pci_device_1002_5974[] = "RS482 [Radeon Xpress 200]";
-static const char pci_device_1002_5975[] = "RS482 [Radeon Xpress 200M]";
+static const char pci_device_1002_5975[] = "RS485 [Radeon Xpress 1100 IGP]";
static const char pci_device_1002_5a33[] = "Radeon Xpress 200 Host Bridge";
static const char pci_device_1002_5a34[] = "RS480 PCI-X Root Port";
static const char pci_device_1002_5a36[] = "RS480 PCI Bridge";
+static const char pci_device_1002_5a37[] = "RS480 PCI Bridge";
static const char pci_device_1002_5a38[] = "RS480 PCI Bridge";
static const char pci_device_1002_5a39[] = "RS480 PCI Bridge";
static const char pci_device_1002_5a3f[] = "RS480 PCI Bridge";
@@ -1994,6 +2147,9 @@ static const char pci_device_1002_5c63[]
#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_1002_5c63_1002_5c63[] = "Apple iBook G4 2004";
#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_5c63_144d_c00c[] = "P30 notebook";
+#endif
static const char pci_device_1002_5d44[] = "RV280 [Radeon 9200 SE] (Secondary)";
#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_1002_5d44_1458_4019[] = "Radeon 9200 SE (Secondary)";
@@ -2078,15 +2234,17 @@ static const char pci_subsys_1002_7129_1
static const char pci_subsys_1002_7129_1002_0d03[] = "Radeon X1800 CrossFire Edition (Secondary)";
#endif
static const char pci_device_1002_7140[] = "RV515 [Radeon X1600]";
-static const char pci_device_1002_7142[] = "RV515 [Radeon X1300]";
+static const char pci_device_1002_7142[] = "RV515 PRO [ATI Radeon X1300/X1550 Series]";
#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_1002_7142_1002_0322[] = "All-in-Wonder 2006 PCI-E Edition";
#endif
+static const char pci_device_1002_7143[] = "RV505 [Radeon X1550 Series]";
static const char pci_device_1002_7145[] = "Radeon Mobility X1400";
static const char pci_device_1002_7146[] = "RV515 [Radeon X1300]";
#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_1002_7146_1002_0322[] = "All-in-Wonder 2006 PCI-E Edition";
#endif
+static const char pci_device_1002_7147[] = "RV505 [Radeon X1550 64-bit]";
static const char pci_device_1002_7149[] = "M52 [ATI Mobility Radeon X1300]";
static const char pci_device_1002_714a[] = "M52 [ATI Mobility Radeon X1300]";
static const char pci_device_1002_714b[] = "M52 [ATI Mobility Radeon X1300]";
@@ -2094,8 +2252,10 @@ static const char pci_device_1002_714c[]
static const char pci_device_1002_714d[] = "RV515 [Radeon X1300]";
static const char pci_device_1002_714e[] = "RV515 [Radeon X1300]";
static const char pci_device_1002_7152[] = "RV515 GL ATI FireGL V3300 Primary";
+static const char pci_device_1002_7153[] = "RV515GL [FireGL V3350]";
static const char pci_device_1002_715e[] = "RV515 [Radeon X1300]";
-static const char pci_device_1002_7162[] = "RV515 [Radeon X1300] (Secondary)";
+static const char pci_device_1002_715f[] = "RV505 CE [Radeon X1550 64-bit]";
+static const char pci_device_1002_7162[] = "RV515 PRO [ATI Radeon X1300/X1550 Series Secondary]";
#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_1002_7162_1002_0323[] = "All-in-Wonder 2006 PCI-E Edition (Secondary)";
#endif
@@ -2104,10 +2264,23 @@ static const char pci_device_1002_7166[]
static const char pci_subsys_1002_7166_1002_0323[] = "All-in-Wonder 2006 PCI-E Edition (Secondary)";
#endif
static const char pci_device_1002_7172[] = "RV515 GL ATI FireGL V3300 Secondary";
-static const char pci_device_1002_7180[] = "RV516 Radeon X1300 Series Primary";
+static const char pci_device_1002_7173[] = "RV515GL [FireGL V3350 Secondary]";
+static const char pci_device_1002_7180[] = "RV516 [ATI Radeon X1300/X1550 Series]";
static const char pci_device_1002_7181[] = "RV516 XT Radeon X1600 Series Primary";
-static const char pci_device_1002_71a0[] = "RV516 Radeon X1300 Series Secondary";
+static const char pci_device_1002_7183[] = "RV516 [ATI Radeon X1300/X1550 Series]";
+static const char pci_device_1002_7187[] = "RV516 [ATI Radeon X1300/X1550 Series]";
+static const char pci_device_1002_7188[] = "M64-S [ATI Mobility Radeon X2300]";
+static const char pci_device_1002_718a[] = "ATI Mobility Radeon X2300";
+static const char pci_device_1002_718c[] = "M62CSP64 [ATI Mobility Radeon X1350]";
+static const char pci_device_1002_718d[] = "M64CSP128 [ATI Mobility Radeon X1450]";
+static const char pci_device_1002_7193[] = "RV516 [Radeon X1550 Series]";
+static const char pci_device_1002_719b[] = "FireMV 2250";
+static const char pci_device_1002_719f[] = "RV516LE [Radeon X1550 64-bit]";
+static const char pci_device_1002_71a0[] = "RV516 [ATI Radeon X1300/X1550 Series Secondary]";
static const char pci_device_1002_71a1[] = "RV516 XT Radeon X1600 Series Secondary";
+static const char pci_device_1002_71a3[] = "RV516 [ATI Radeon X1300 Pro Secondary]";
+static const char pci_device_1002_71a7[] = "RV516 [ATI Radeon X1300/X1550 Series Secondary]";
+static const char pci_device_1002_71bb[] = "FireMV 2250 Secondary";
static const char pci_device_1002_71c0[] = "RV530 [Radeon X1600]";
static const char pci_device_1002_71c2[] = "RV530 [Radeon X1600]";
static const char pci_device_1002_71c4[] = "M56GL [ATI Mobility FireGL V5200]";
@@ -2116,12 +2289,16 @@ static const char pci_subsys_1002_71c4_1
#endif
static const char pci_device_1002_71c5[] = "M56P [Radeon Mobility X1600]";
static const char pci_device_1002_71c6[] = "RV530LE [Radeon X1600]";
+static const char pci_device_1002_71c7[] = "RV535 [Radeon X1650 Series]";
static const char pci_device_1002_71ce[] = "RV530LE [Radeon X1600]";
static const char pci_device_1002_71d5[] = "M66-P ATI Mobility Radeon X1700";
static const char pci_device_1002_71d6[] = "M66-XT ATI Mobility Radeon X1700";
static const char pci_device_1002_71de[] = "RV530LE [Radeon X1600]";
static const char pci_device_1002_71e0[] = "RV530 [Radeon X1600] (Secondary)";
static const char pci_device_1002_71e2[] = "RV530 [Radeon X1600] (Secondary)";
+static const char pci_device_1002_71e7[] = "RV535 [Radeon X1650 Series]";
+static const char pci_device_1002_7210[] = "M71 [ATI Mobility Radeon X2100]";
+static const char pci_device_1002_7211[] = "M71 [ATI Mobility Radeon X2100 Secondary]";
static const char pci_device_1002_7240[] = "R580 [Radeon X1900]";
static const char pci_device_1002_7241[] = "R580 [Radeon X1900]";
static const char pci_device_1002_7242[] = "R580 [Radeon X1900]";
@@ -2134,15 +2311,33 @@ static const char pci_device_1002_7248[]
static const char pci_device_1002_7249[] = "R580 [Radeon X1900 XT] Primary";
static const char pci_device_1002_724a[] = "R580 [Radeon X1900]";
static const char pci_device_1002_724b[] = "R580 [Radeon X1900]";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_724b_1002_0b12[] = "Radeon X1900 Primary Display Device";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_724b_1002_0b13[] = "Radeon X1900 Secondary Display Device";
+#endif
static const char pci_device_1002_724c[] = "R580 [Radeon X1900]";
static const char pci_device_1002_724d[] = "R580 [Radeon X1900]";
-static const char pci_device_1002_724e[] = "R580 [FireGL V7300/V7350] Primary (PCIE)";
+static const char pci_device_1002_724e[] = "R580 [AMD Stream Processor]";
static const char pci_device_1002_7269[] = "R580 [Radeon X1900 XT] Secondary";
-static const char pci_device_1002_726e[] = "R580 [FireGL V7300/V7350] Secondary (PCIE)";
+static const char pci_device_1002_726b[] = "R580 [Radeon X1900]";
+static const char pci_device_1002_726e[] = "R580 [AMD Stream Processor Secondary]";
+static const char pci_device_1002_7280[] = "ATI Radeon X1950 Pro Primary (PCIE)";
+static const char pci_device_1002_7288[] = "ATI Radeon X1950 GT";
+static const char pci_device_1002_7291[] = "ATI Radeon X1650 XT Primary (PCIE)";
+static const char pci_device_1002_7293[] = "Radeon X1650 Series";
+static const char pci_device_1002_72a0[] = "ATI Radeon X1950 Pro Secondary (PCIE)";
+static const char pci_device_1002_72a8[] = "ATI Radeon X1950 GT Secondary";
+static const char pci_device_1002_72b1[] = "ATI Radeon X1650 XT Secondary (PCIE)";
+static const char pci_device_1002_72b3[] = "ATI Radeon X1650 Series Secondary";
static const char pci_device_1002_7833[] = "Radeon 9100 IGP Host Bridge";
static const char pci_device_1002_7834[] = "Radeon 9100 PRO IGP";
static const char pci_device_1002_7835[] = "Radeon Mobility 9200 IGP";
static const char pci_device_1002_7838[] = "Radeon 9100 IGP PCI/AGP Bridge";
+static const char pci_device_1002_791e[] = "ATI Radeon Xpress 1200 Series";
+static const char pci_device_1002_791f[] = "ATI Radeon Xpress 1200 Series";
+static const char pci_device_1002_793f[] = "ATI Radeon Xpress 1200 Series Secondary";
static const char pci_device_1002_7c37[] = "RV350 AQ [Radeon 9600 SE]";
static const char pci_device_1002_cab0[] = "AGP Bridge [IGP 320M]";
static const char pci_device_1002_cab2[] = "RS200/RS200M AGP Bridge [IGP 340M]";
@@ -3003,6 +3198,7 @@ static const char pci_subsys_1022_2001_1
static const char pci_device_1022_2003[] = "Am 1771 MBW [Alchemy]";
static const char pci_device_1022_2020[] = "53c974 [PCscsi]";
static const char pci_device_1022_2040[] = "79c974";
+static const char pci_device_1022_2080[] = "Conrad Kostecki";
static const char pci_device_1022_2081[] = "Geode LX Video";
static const char pci_device_1022_2082[] = "Geode LX AES Security Block";
static const char pci_device_1022_208f[] = "CS5536 GeodeLink PCI South Bridge";
@@ -3245,15 +3441,34 @@ static const char pci_device_1028_0002[]
#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_1028_0002_1028_0002[] = "PowerEdge 4400";
#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1028_0002_1028_00d1[] = "PERC 3/DiV [Viper]";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1028_0002_1028_00d9[] = "PERC 3/DiL [Lexus]";
+#endif
static const char pci_device_1028_0003[] = "PowerEdge Expandable RAID Controller 3/Si";
#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_1028_0003_1028_0003[] = "PowerEdge 2450";
#endif
+static const char pci_device_1028_0004[] = "PowerEdge Expandable RAID Controller 3/Di [Iguana]";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1028_0004_1028_0004[] = "PERC 3/DiF [Iguana]";
+#endif
static const char pci_device_1028_0006[] = "PowerEdge Expandable RAID Controller 3/Di";
static const char pci_device_1028_0007[] = "Remote Access Card III";
static const char pci_device_1028_0008[] = "Remote Access Card III";
static const char pci_device_1028_0009[] = "Remote Access Card III: BMC/SMIC device not present";
static const char pci_device_1028_000a[] = "PowerEdge Expandable RAID Controller 3/Di";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1028_000a_1028_0106[] = "PERC 3/DiJ [Jaguar]";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1028_000a_1028_011b[] = "PERC 3/DiD [Dagger]";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1028_000a_1028_0121[] = "PERC 3/DiB [Boxster]";
+#endif
static const char pci_device_1028_000c[] = "Embedded Remote Access or ERA/O";
static const char pci_device_1028_000d[] = "Embedded Remote Access: BMC/SMIC device";
static const char pci_device_1028_000e[] = "PowerEdge Expandable RAID controller 4/Di";
@@ -3279,6 +3494,13 @@ static const char pci_subsys_1028_0013_1
#endif
static const char pci_device_1028_0014[] = "Remote Access Card 4 Daughter Card SMIC interface";
static const char pci_device_1028_0015[] = "PowerEdge Expandable RAID controller 5i";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1028_0015_1028_1f01[] = "PERC 5/E Adapter RAID Controller";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1028_0015_1028_1f02[] = "PERC 5/i Adapter RAID Controller";
+#endif
+static const char pci_device_1028_1f03[] = "PERC 5/i";
#ifdef VENDOR_INCLUDE_NONVIDEO
static const char pci_vendor_1029[] = "Siemens Nixdorf IS";
#endif
@@ -3779,6 +4001,7 @@ static const char pci_subsys_102f_0020_1
#endif
static const char pci_device_102f_0030[] = "TC35815CF PCI 10/100 Mbit Ethernet Controller";
static const char pci_device_102f_0031[] = "TC35815CF PCI 10/100 Mbit Ethernet Controller with WOL";
+static const char pci_device_102f_0032[] = "TC35815CF PCI 10/100 Mbit Ethernet Controller on TX4939";
static const char pci_device_102f_0105[] = "TC86C001 [goku-s] IDE";
static const char pci_device_102f_0106[] = "TC86C001 [goku-s] USB 1.1 Host";
static const char pci_device_102f_0107[] = "TC86C001 [goku-s] USB Device Controller";
@@ -3991,6 +4214,9 @@ static const char pci_subsys_1039_0900_1
#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_1039_0900_1043_8035[] = "CUSI-FX motherboard";
#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1039_0900_1462_0900[] = "MS-6701 motherboard";
+#endif
static const char pci_device_1039_0961[] = "SiS961 [MuTIOL Media IO]";
static const char pci_device_1039_0962[] = "SiS962 [MuTIOL Media IO]";
static const char pci_device_1039_0963[] = "SiS963 [MuTIOL Media IO]";
@@ -4019,6 +4245,9 @@ static const char pci_subsys_1039_5513_1
#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_1039_5513_1043_8035[] = "CUSI-FX motherboard";
#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1039_5513_1462_7010[] = "MS-6701 motherboard";
+#endif
static const char pci_device_1039_5517[] = "5517";
static const char pci_device_1039_5571[] = "5571";
static const char pci_device_1039_5581[] = "5581 Pentium Chipset";
@@ -4077,13 +4306,25 @@ static const char pci_subsys_1039_7001_1
#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_1039_7001_1462_5470[] = "K7SOM+ 5.2C Motherboard";
#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1039_7001_1462_7010[] = "MS-6701 motherboard";
+#endif
static const char pci_device_1039_7002[] = "USB 2.0 Controller";
#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1039_7002_1462_7010[] = "MS-6701 motherboard";
+#endif
+#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_1039_7002_1509_7002[] = "Onboard USB Controller";
#endif
static const char pci_device_1039_7007[] = "FireWire Controller";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1039_7007_1462_701d[] = "MS-6701";
+#endif
static const char pci_device_1039_7012[] = "AC'97 Sound Controller";
#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1039_7012_1462_7010[] = "MS-6701 motherboard";
+#endif
+#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_1039_7012_15bd_1001[] = "DFI 661FX motherboard";
#endif
static const char pci_device_1039_7013[] = "AC'97 Modem Controller";
@@ -4255,10 +4496,13 @@ static const char pci_device_103c_12ec[]
static const char pci_device_103c_12ee[] = "PCI-X 2.0 Local Bus Adapter";
static const char pci_device_103c_12f8[] = "Broadcom BCM4306 802.11b/g Wireless LAN";
static const char pci_device_103c_12fa[] = "BCM4306 802.11b/g Wireless LAN Controller";
+static const char pci_device_103c_1302[] = "RMP-3 Shared Memory Driver";
+static const char pci_device_103c_1303[] = "RMP-3 (Remote Management Processor)";
static const char pci_device_103c_2910[] = "E2910A PCIBus Exerciser";
static const char pci_device_103c_2925[] = "E2925A 32 Bit, 33 MHzPCI Exerciser & Analyzer";
static const char pci_device_103c_3080[] = "Pavilion ze2028ea";
static const char pci_device_103c_3085[] = "Realtek RTL8139/8139C/8139C+";
+static const char pci_device_103c_30b5[] = "Compaq Presario V3000Z";
static const char pci_device_103c_3220[] = "Smart Array P600";
#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_103c_3220_103c_3225[] = "3 Gb/s SAS RAID";
@@ -4314,8 +4558,10 @@ static const char pci_device_1043_80bb[]
static const char pci_device_1043_80c5[] = "nForce3 chipset motherboard [SK8N]";
static const char pci_device_1043_80df[] = "v9520 Magic/T";
static const char pci_device_1043_815a[] = "A8N-SLI Motherboard nForce4 SATA";
+static const char pci_device_1043_8168[] = "Realtek PCI-E Gigabit Ethernet Controller (RTL8111B)";
static const char pci_device_1043_8187[] = "802.11a/b/g Wireless LAN Card";
static const char pci_device_1043_8188[] = "Tiger Hybrid TV Capture Device";
+static const char pci_device_1043_81f4[] = "EN7300TC512/TD/128M/A(C262G) [Graphics Card EN7300TC512]";
#endif
#ifdef VENDOR_INCLUDE_NONVIDEO
static const char pci_vendor_1044[] = "Adaptec (formerly DPT)";
@@ -4632,6 +4878,9 @@ static const char pci_subsys_104c_8023_1
#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_104c_8023_1043_808b[] = "K8N4-E Mainboard";
#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_104c_8023_1043_815b[] = "P5W DH Deluxe Motherboard";
+#endif
static const char pci_device_104c_8024[] = "TSB43AB23 IEEE-1394a-2000 Controller (PHY/Link)";
static const char pci_device_104c_8025[] = "TSB82AA2 IEEE-1394b Link Layer Controller";
#ifdef INIT_SUBSYS_INFO
@@ -4719,10 +4968,16 @@ static const char pci_device_104c_8039[]
#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_104c_8039_103c_309f[] = "nx9420";
#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_104c_8039_103c_30a1[] = "NC2400";
+#endif
static const char pci_device_104c_803a[] = "PCIxx12 OHCI Compliant IEEE 1394 Host Controller";
#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_104c_803a_103c_309f[] = "nx9420";
#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_104c_803a_103c_30a1[] = "NC2400";
+#endif
static const char pci_device_104c_803b[] = "5-in-1 Multimedia Card Reader (SD/MMC/MS/MS PRO/xD)";
#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_104c_803b_103c_309f[] = "nx9420";
@@ -4735,6 +4990,9 @@ static const char pci_device_104c_803d[]
#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_104c_803d_103c_309f[] = "nx9420";
#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_104c_803d_103c_30a1[] = "NC2400";
+#endif
static const char pci_device_104c_8201[] = "PCI1620 Firmware Loading Function";
static const char pci_device_104c_8204[] = "PCI7410,7510,7610 PCI Firmware Loading Function";
#ifdef INIT_SUBSYS_INFO
@@ -4831,6 +5089,9 @@ static const char pci_subsys_104c_ac42_1
#endif
static const char pci_device_104c_ac44[] = "PCI4510 PC card Cardbus Controller";
#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_104c_ac44_1028_0149[] = "Inspiron 5100";
+#endif
+#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_104c_ac44_1028_0163[] = "Latitude D505";
#endif
#ifdef INIT_SUBSYS_INFO
@@ -4858,7 +5119,7 @@ static const char pci_subsys_104c_ac4a_1
static const char pci_subsys_104c_ac4a_1028_014e[] = "Latitude D800";
#endif
static const char pci_device_104c_ac50[] = "PCI1410 PC card Cardbus Controller";
-static const char pci_device_104c_ac51[] = "PCI1420";
+static const char pci_device_104c_ac51[] = "PCI1420 PC card Cardbus Controller";
#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_104c_ac51_0e11_004e[] = "Evo N600c";
#endif
@@ -4922,6 +5183,9 @@ static const char pci_subsys_104c_ac60_1
static const char pci_device_104c_ac8d[] = "PCI 7620";
static const char pci_device_104c_ac8e[] = "PCI7420 CardBus Controller";
static const char pci_device_104c_ac8f[] = "PCI7420/7620 Combo CardBus, 1394a-2000 OHCI and SD/MS-Pro Controller";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_104c_ac8f_1028_018d[] = "Inspiron 700m";
+#endif
static const char pci_device_104c_fe00[] = "FireWire Host Controller";
static const char pci_device_104c_fe03[] = "12C01A FireWire Host Controller";
static const char pci_vendor_104d[] = "Sony Corporation";
@@ -5086,6 +5350,7 @@ static const char pci_subsys_1057_1801_e
#endif
static const char pci_device_1057_18c0[] = "MPC8265A/8266/8272";
static const char pci_device_1057_18c1[] = "MPC8271/MPC8272";
+static const char pci_device_1057_3052[] = "SM56 Data Fax Modem";
static const char pci_device_1057_3055[] = "SM56 Data Fax Modem";
static const char pci_device_1057_3410[] = "DSP56361 Digital Signal Processor";
#ifdef INIT_SUBSYS_INFO
@@ -5198,6 +5463,9 @@ static const char pci_vendor_1059[] = "T
static const char pci_vendor_105a[] = "Promise Technology, Inc.";
static const char pci_device_105a_0d30[] = "PDC20265 (FastTrak100 Lite/Ultra100)";
#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_105a_0d30_1043_8042[] = "ASUS AV7266-E South Bridge Promise RAID";
+#endif
+#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_105a_0d30_105a_4d33[] = "Ultra100";
#endif
static const char pci_device_105a_0d38[] = "20263";
@@ -5243,6 +5511,11 @@ static const char pci_subsys_105a_4d30_1
#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_105a_4d30_105a_4d39[] = "FastTrak100";
#endif
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_105a_4d30_8086_5744[] = "S845WD1-E mainboard";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
static const char pci_device_105a_4d33[] = "20246";
#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_105a_4d33_105a_4d33[] = "20246 IDE Controller";
@@ -5295,7 +5568,18 @@ static const char pci_device_105a_6629[]
static const char pci_device_105a_7275[] = "PDC20277 (SBFastTrak133 Lite)";
static const char pci_device_105a_8002[] = "SATAII150 SX8";
static const char pci_device_105a_8350[] = "80333 [SuperTrak EX8350/EX16350], 80331 [SuperTrak EX8300/EX16300]";
+static const char pci_device_105a_8650[] = "IOP1348 [SuperTrak EX4650/EX8650/EX8654]";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_105a_8650_105a_4600[] = "SuperTrak EX4650";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_105a_8650_105a_8601[] = "SuperTrak EX8650";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_105a_8650_105a_8602[] = "SuperTrak EX8654";
+#endif
static const char pci_device_105a_c350[] = "80333 [SuperTrak EX12350]";
+static const char pci_device_105a_e350[] = "80333 [SuperTrak EX24350]";
#endif
#ifdef VENDOR_INCLUDE_NONVIDEO
static const char pci_vendor_105b[] = "Foxconn International, Inc.";
@@ -5672,6 +5956,7 @@ static const char pci_device_1073_0012[]
static const char pci_subsys_1073_0012_1073_0012[] = "DS-XG PCI Audio Codec";
#endif
static const char pci_device_1073_0020[] = "DS-1 Audio";
+static const char pci_device_1073_1000[] = "SW1000XG [XG Factory]";
static const char pci_device_1073_2000[] = "DS2416 Digital Mixing Card";
#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_1073_2000_1073_2000[] = "DS2416 Digital Mixing Card";
@@ -5737,7 +6022,7 @@ static const char pci_subsys_1077_2422_1
#ifdef VENDOR_INCLUDE_NONVIDEO
static const char pci_device_1077_2432[] = "ISP2432-based 4Gb Fibre Channel to PCI Express HBA";
static const char pci_device_1077_3022[] = "ISP4022-based Ethernet NIC";
-static const char pci_device_1077_3032[] = "ISP4032-based Ethernet NIC";
+static const char pci_device_1077_3032[] = "ISP4032-based Ethernet IPv6 NIC";
static const char pci_device_1077_4010[] = "ISP4010-based iSCSI TOE HBA";
static const char pci_device_1077_4022[] = "ISP4022-based iSCSI TOE HBA";
static const char pci_device_1077_4032[] = "ISP4032-based iSCSI TOE IPv6 HBA";
@@ -6307,6 +6592,9 @@ static const char pci_subsys_109e_0878_1
static const char pci_subsys_109e_0878_1461_0002[] = "Avermedia PCTV98 Audio Capture";
#endif
#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_109e_0878_1461_0003[] = "UltraTV PCI 350";
+#endif
+#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_109e_0878_1461_0004[] = "AVerTV WDM Audio Capture";
#endif
#ifdef INIT_SUBSYS_INFO
@@ -6491,6 +6779,8 @@ static const char pci_device_10a9_4001[]
static const char pci_device_10a9_4002[] = "TIO-CE PCI Express Port";
static const char pci_device_10a9_8001[] = "O2 1394";
static const char pci_device_10a9_8002[] = "G-net NT";
+static const char pci_device_10a9_8010[] = "Broadcom e-net [SGI IO9/IO10 BaseIO]";
+static const char pci_device_10a9_8018[] = "Broadcom e-net [SGI A330 Server BaseIO]";
#endif
#ifdef VENDOR_INCLUDE_NONVIDEO
static const char pci_vendor_10aa[] = "ACC Microelectronics";
@@ -6589,6 +6879,9 @@ static const char pci_subsys_10b5_9030_1
static const char pci_subsys_10b5_9030_10b5_3068[] = "Alpermann+Velte PCL PCI HD (3V/5V): Timecode Reader Board";
#endif
#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10b5_9030_12fe_0111[] = "CPCI-ASIO4 (ESD 4-port Serial Interface Board)";
+#endif
+#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_10b5_9030_1397_3136[] = "4xS0-ISDN PCI Adapter";
#endif
#ifdef INIT_SUBSYS_INFO
@@ -6745,6 +7038,9 @@ static const char pci_subsys_10b5_9054_1
static const char pci_subsys_10b5_9054_12d9_0002[] = "PCI Prosody Card rev 1.5";
#endif
#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10b5_9054_14b4_d100[] = "Dektec DTA-100";
+#endif
+#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_10b5_9054_16df_0011[] = "PIKA PrimeNet MM PCI";
#endif
#ifdef INIT_SUBSYS_INFO
@@ -11547,6 +11843,7 @@ static const char pci_subsys_1166_0132_1
static const char pci_device_1166_0140[] = "HT2100 PCI-Express Bridge";
static const char pci_device_1166_0141[] = "HT2100 PCI-Express Bridge";
static const char pci_device_1166_0142[] = "HT2100 PCI-Express Bridge";
+static const char pci_device_1166_0144[] = "HT2100 PCI-Express Bridge";
static const char pci_device_1166_0200[] = "OSB4 South Bridge";
static const char pci_device_1166_0201[] = "CSB5 South Bridge";
#ifdef INIT_SUBSYS_INFO
@@ -21296,13 +21593,13 @@ static const char pci_device_8086_0962[]
static const char pci_device_8086_0964[] = "80960RP [i960 RP Microprocessor/Bridge]";
static const char pci_device_8086_1000[] = "82542 Gigabit Ethernet Controller";
#ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_1000_0e11_b0df[] = "NC1632 Gigabit Ethernet Adapter (1000-SX)";
+static const char pci_subsys_8086_1000_0e11_b0df[] = "NC6132 Gigabit Ethernet Adapter (1000-SX)";
#endif
#ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_1000_0e11_b0e0[] = "NC1633 Gigabit Ethernet Adapter (1000-LX)";
+static const char pci_subsys_8086_1000_0e11_b0e0[] = "NC6133 Gigabit Ethernet Adapter (1000-LX)";
#endif
#ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_1000_0e11_b123[] = "NC1634 Gigabit Ethernet Adapter (1000-SX)";
+static const char pci_subsys_8086_1000_0e11_b123[] = "NC6134 Gigabit Ethernet Adapter (1000-LX)";
#endif
#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_8086_1000_1014_0119[] = "Netfinity Gigabit Ethernet SX Adapter";
@@ -22280,6 +22577,9 @@ static const char pci_subsys_8086_1229_8
static const char pci_subsys_8086_1229_8086_0008[] = "82558 10/100 with Wake on LAN";
#endif
#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_1229_8086_0009[] = "PRO/100+ PCI (TP)";
+#endif
+#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_8086_1229_8086_000a[] = "EtherExpress PRO/100+ Management Adapter";
#endif
#ifdef INIT_SUBSYS_INFO
@@ -22505,6 +22805,9 @@ static const char pci_subsys_8086_1229_8
static const char pci_subsys_8086_1229_8086_3012[] = "EtherExpress PRO/100 Network Connection";
#endif
#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_1229_8086_301a[] = "S845WD1-E mainboard";
+#endif
+#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_8086_1229_8086_3411[] = "SDS2 Mainboard";
#endif
static const char pci_device_8086_122d[] = "430FX - 82437FX TSC [Triton I]";
@@ -22673,6 +22976,9 @@ static const char pci_subsys_8086_2425_1
static const char pci_device_8086_2426[] = "82801AB AC'97 Modem";
static const char pci_device_8086_2428[] = "82801AB PCI Bridge";
static const char pci_device_8086_2440[] = "82801BA ISA Bridge (LPC)";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2440_8086_5744[] = "S845WD1-E";
+#endif
static const char pci_device_8086_2442[] = "82801BA/BAM USB (Hub #1)";
#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_8086_2442_1014_01c6[] = "Netvista A40/A40p";
@@ -22701,6 +23007,9 @@ static const char pci_subsys_8086_2442_8
#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_8086_2442_8086_4557[] = "D815EGEW Mainboard";
#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2442_8086_5744[] = "S845WD1-E mainboard";
+#endif
static const char pci_device_8086_2443[] = "82801BA/BAM SMBus";
#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_8086_2443_1014_01c6[] = "Netvista A40/A40p";
@@ -22729,6 +23038,9 @@ static const char pci_subsys_8086_2443_8
#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_8086_2443_8086_4557[] = "D815EGEW Mainboard";
#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2443_8086_5744[] = "S845WD1-E mainboard";
+#endif
static const char pci_device_8086_2444[] = "82801BA/BAM USB (Hub #2)";
#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_8086_2444_1025_1016[] = "Travelmate 612 TX";
@@ -22751,6 +23063,9 @@ static const char pci_subsys_8086_2444_1
#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_8086_2444_8086_4532[] = "D815EEA2 mainboard";
#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2444_8086_5744[] = "S845WD1-E mainboard";
+#endif
static const char pci_device_8086_2445[] = "82801BA/BAM AC'97 Audio";
#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_8086_2445_0e11_000b[] = "Compaq Deskpro EN Audio";
@@ -22913,6 +23228,9 @@ static const char pci_subsys_8086_244b_8
#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_8086_244b_8086_4557[] = "D815EGEW Mainboard";
#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_244b_8086_5744[] = "S845WD1-E mainboard";
+#endif
static const char pci_device_8086_244c[] = "82801BAM ISA Bridge (LPC)";
static const char pci_device_8086_244e[] = "82801 PCI Bridge";
#ifdef INIT_SUBSYS_INFO
@@ -23144,6 +23462,9 @@ static const char pci_subsys_8086_24c3_1
static const char pci_subsys_8086_24c3_1071_8160[] = "MIM2000";
#endif
#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24c3_144d_c00c[] = "P30/P35 notebook";
+#endif
+#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_8086_24c3_1458_24c2[] = "GA-8PE667 Ultra";
#endif
#ifdef INIT_SUBSYS_INFO
@@ -24465,15 +24786,24 @@ static const char pci_subsys_8086_2792_1
#endif
static const char pci_device_8086_27a0[] = "Mobile 945GM/PM/GMS/940GML and 945GT Express Memory Controller Hub";
#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27a0_103c_30a1[] = "NC2400";
+#endif
+#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_8086_27a0_17aa_2017[] = "Thinkpad R60e model 0657";
#endif
static const char pci_device_8086_27a1[] = "Mobile 945GM/PM/GMS/940GML and 945GT Express PCI Express Root Port";
static const char pci_device_8086_27a2[] = "Mobile 945GM/GMS/940GML Express Integrated Graphics Controller";
#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27a2_103c_30a1[] = "NC2400";
+#endif
+#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_8086_27a2_17aa_201a[] = "Thinkpad R60e model 0657";
#endif
static const char pci_device_8086_27a6[] = "Mobile 945GM/GMS/940GML Express Integrated Graphics Controller";
#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27a6_103c_30a1[] = "NC2400";
+#endif
+#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_8086_27a6_17aa_201a[] = "Thinkpad R60e model 0657";
#endif
static const char pci_device_8086_27b0[] = "82801GH (ICH7DH) LPC Interface Bridge";
@@ -24486,6 +24816,9 @@ static const char pci_subsys_8086_27b8_8
#endif
static const char pci_device_8086_27b9[] = "82801GBM (ICH7-M) LPC Interface Bridge";
#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27b9_103c_30a1[] = "NC2400";
+#endif
+#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_8086_27b9_10f7_8338[] = "Panasonic CF-Y5 laptop";
#endif
#ifdef INIT_SUBSYS_INFO
@@ -24509,6 +24842,9 @@ static const char pci_subsys_8086_27c5_1
static const char pci_device_8086_27c6[] = "82801GHM (ICH7-M DH) Serial ATA Storage Controller RAID";
static const char pci_device_8086_27c8[] = "82801G (ICH7 Family) USB UHCI #1";
#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27c8_103c_30a1[] = "NC2400";
+#endif
+#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_8086_27c8_107b_5048[] = "E4500";
#endif
#ifdef INIT_SUBSYS_INFO
@@ -24519,6 +24855,9 @@ static const char pci_subsys_8086_27c8_8
#endif
static const char pci_device_8086_27c9[] = "82801G (ICH7 Family) USB UHCI #2";
#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27c9_103c_30a1[] = "NC2400";
+#endif
+#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_8086_27c9_107b_5048[] = "E4500";
#endif
#ifdef INIT_SUBSYS_INFO
@@ -24529,6 +24868,9 @@ static const char pci_subsys_8086_27c9_8
#endif
static const char pci_device_8086_27ca[] = "82801G (ICH7 Family) USB UHCI #3";
#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27ca_103c_30a1[] = "NC2400";
+#endif
+#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_8086_27ca_107b_5048[] = "E4500";
#endif
#ifdef INIT_SUBSYS_INFO
@@ -24539,6 +24881,9 @@ static const char pci_subsys_8086_27ca_8
#endif
static const char pci_device_8086_27cb[] = "82801G (ICH7 Family) USB UHCI #4";
#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27cb_103c_30a1[] = "NC2400";
+#endif
+#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_8086_27cb_107b_5048[] = "E4500";
#endif
#ifdef INIT_SUBSYS_INFO
@@ -24549,6 +24894,9 @@ static const char pci_subsys_8086_27cb_8
#endif
static const char pci_device_8086_27cc[] = "82801G (ICH7 Family) USB2 EHCI Controller";
#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27cc_103c_30a1[] = "NC2400";
+#endif
+#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_8086_27cc_17aa_200b[] = "ThinkPad T60/R60 series";
#endif
#ifdef INIT_SUBSYS_INFO
@@ -24560,6 +24908,9 @@ static const char pci_device_8086_27d4[]
static const char pci_device_8086_27d6[] = "82801G (ICH7 Family) PCI Express Port 4";
static const char pci_device_8086_27d8[] = "82801G (ICH7 Family) High Definition Audio Controller";
#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27d8_103c_30a1[] = "NC2400";
+#endif
+#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_8086_27d8_107b_5048[] = "E4500";
#endif
#ifdef INIT_SUBSYS_INFO
@@ -24572,6 +24923,9 @@ static const char pci_subsys_8086_27d8_1
static const char pci_subsys_8086_27d8_152d_0753[] = "Softmodem";
#endif
#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27d8_1734_10ad[] = "Conexant softmodem SmartCP";
+#endif
+#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_8086_27d8_17aa_2010[] = "ThinkPad T60/R60 series";
#endif
static const char pci_device_8086_27da[] = "82801G (ICH7 Family) SMBus Controller";
@@ -24592,6 +24946,9 @@ static const char pci_device_8086_27dd[]
static const char pci_device_8086_27de[] = "82801G (ICH7 Family) AC'97 Audio Controller";
static const char pci_device_8086_27df[] = "82801G (ICH7 Family) IDE Controller";
#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27df_103c_30a1[] = "NC2400";
+#endif
+#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_8086_27df_107b_5048[] = "E4500";
#endif
#ifdef INIT_SUBSYS_INFO
@@ -24656,6 +25013,34 @@ static const char pci_device_8086_2849[]
static const char pci_device_8086_284b[] = "82801H (ICH8 Family) HD Audio Controller";
static const char pci_device_8086_284f[] = "82801H (ICH8 Family) Thermal Reporting Device";
static const char pci_device_8086_2850[] = "Mobile IDE Controller";
+static const char pci_device_8086_2910[] = "LPC Interface Controller";
+static const char pci_device_8086_2920[] = "4 port SATA IDE Controller";
+static const char pci_device_8086_2921[] = "2 port SATA IDE Controller";
+static const char pci_device_8086_2922[] = "6 port SATA AHCI Controller";
+static const char pci_device_8086_2923[] = "4 port SATA AHCI Controller";
+static const char pci_device_8086_2925[] = "SATA RAID Controller";
+static const char pci_device_8086_2926[] = "2 port SATA IDE Controller";
+static const char pci_device_8086_2928[] = "Mobile 2 port SATA IDE Controller";
+static const char pci_device_8086_292d[] = "Mobile 2 port SATA IDE Controller";
+static const char pci_device_8086_292e[] = "Mobile 1 port SATA IDE Controller";
+static const char pci_device_8086_2930[] = "SMBus Controller";
+static const char pci_device_8086_2932[] = "Thermal Subsystem";
+static const char pci_device_8086_2934[] = "USB UHCI Controller #1";
+static const char pci_device_8086_2935[] = "USB UHCI Controller #2";
+static const char pci_device_8086_2936[] = "USB UHCI Controller #3";
+static const char pci_device_8086_2937[] = "USB UHCI Controller #4";
+static const char pci_device_8086_2938[] = "USB UHCI Controller #5";
+static const char pci_device_8086_2939[] = "USB UHCI Controller #6";
+static const char pci_device_8086_293a[] = "USB2 EHCI Controller #1";
+static const char pci_device_8086_293c[] = "USB2 EHCI Controller #2";
+static const char pci_device_8086_293e[] = "HD Audio Controller";
+static const char pci_device_8086_2940[] = "PCI Express Port 1";
+static const char pci_device_8086_2942[] = "PCI Express Port 2";
+static const char pci_device_8086_2944[] = "PCI Express Port 3";
+static const char pci_device_8086_2946[] = "PCI Express Port 4";
+static const char pci_device_8086_2948[] = "PCI Express Port 5";
+static const char pci_device_8086_294a[] = "PCI Express Port 6";
+static const char pci_device_8086_294c[] = "Gigabit Ethernet Controller";
static const char pci_device_8086_2970[] = "82946GZ/PL/GL Memory Controller Hub";
static const char pci_device_8086_2971[] = "82946GZ/PL/GL PCI Express Root Port";
static const char pci_device_8086_2972[] = "82946GZ/GL Integrated Graphics Controller";
@@ -24683,6 +25068,37 @@ static const char pci_device_8086_29a4[]
static const char pci_device_8086_29a5[] = "82P965/G965 HECI Controller";
static const char pci_device_8086_29a6[] = "82P965/G965 PT IDER Controller";
static const char pci_device_8086_29a7[] = "82P965/G965 KT Controller";
+static const char pci_device_8086_29b0[] = "DRAM Controller";
+static const char pci_device_8086_29b1[] = "PCI Express Root Port";
+static const char pci_device_8086_29b2[] = "Integrated Graphics Controller";
+static const char pci_device_8086_29b3[] = "Integrated Graphics Controller";
+static const char pci_device_8086_29b4[] = "HECI Controller";
+static const char pci_device_8086_29b5[] = "HECI Controller";
+static const char pci_device_8086_29b6[] = "PT IDER Controller";
+static const char pci_device_8086_29b7[] = "Serial KT Controller";
+static const char pci_device_8086_29c0[] = "DRAM Controller";
+static const char pci_device_8086_29c1[] = "PCI Express Root Port";
+static const char pci_device_8086_29c2[] = "Integrated Graphics Controller";
+static const char pci_device_8086_29c3[] = "Integrated Graphics Controller";
+static const char pci_device_8086_29c4[] = "HECI Controller";
+static const char pci_device_8086_29c5[] = "HECI Controller";
+static const char pci_device_8086_29c6[] = "PT IDER Controller";
+static const char pci_device_8086_29c7[] = "Serial KT Controller";
+static const char pci_device_8086_29cf[] = "Virtual HECI Controller";
+static const char pci_device_8086_29e0[] = "DRAM Controller";
+static const char pci_device_8086_29e1[] = "Host-Primary PCI Express Bridge";
+static const char pci_device_8086_29e4[] = "HECI Controller";
+static const char pci_device_8086_29e5[] = "HECI Controller";
+static const char pci_device_8086_29e6[] = "PT IDER Controller";
+static const char pci_device_8086_29e7[] = "Serial KT Controller";
+static const char pci_device_8086_29e9[] = "Host-Secondary PCI Express Bridge";
+static const char pci_device_8086_29f0[] = "Server DRAM Controller";
+static const char pci_device_8086_29f1[] = "Server Host-Primary PCI Express Bridge";
+static const char pci_device_8086_29f4[] = "Server HECI Controller";
+static const char pci_device_8086_29f5[] = "Server HECI Controller";
+static const char pci_device_8086_29f6[] = "Server PT IDER Controller";
+static const char pci_device_8086_29f7[] = "Server Serial KT Controller";
+static const char pci_device_8086_29f9[] = "Server Host-Secondary PCI Express Bridge";
static const char pci_device_8086_2a00[] = "Mobile Memory Controller Hub";
static const char pci_device_8086_2a01[] = "Mobile PCI Express Root Port";
static const char pci_device_8086_2a02[] = "Mobile Integrated Graphics Controller";
@@ -24894,7 +25310,46 @@ static const char pci_device_8086_35b5[]
static const char pci_device_8086_35b6[] = "3100 Chipset PCI Express Port A";
static const char pci_device_8086_35b7[] = "3100 Chipset PCI Express Port A1";
static const char pci_device_8086_35c8[] = "3100 Extended Configuration Test Overflow Registers";
+static const char pci_device_8086_3600[] = "Server Memory Controller Hub";
+static const char pci_device_8086_3604[] = "Server PCI Express Port 1";
+static const char pci_device_8086_3605[] = "Server PCI Express Port 2";
+static const char pci_device_8086_3606[] = "Server PCI Express Port 3";
+static const char pci_device_8086_3607[] = "Server PCI Express Port 4";
+static const char pci_device_8086_3608[] = "Server PCI Express Port 5";
+static const char pci_device_8086_3609[] = "Server PCI Express Port 6";
+static const char pci_device_8086_360a[] = "Server PCI Express Port 7";
+static const char pci_device_8086_360b[] = "Server IOAT DMA Controller";
+static const char pci_device_8086_360c[] = "Server FSB Registers";
+static const char pci_device_8086_360d[] = "Server Snoop Filter Registers";
+static const char pci_device_8086_360e[] = "Server Reserved Registers";
+static const char pci_device_8086_360f[] = "Server FBD Branch 0 Registers";
+static const char pci_device_8086_3610[] = "Server FBD Branch 1 Registers";
+static const char pci_device_8086_4000[] = "Memory Controller Hub";
+static const char pci_device_8086_4008[] = "Memory Controller Hub";
+static const char pci_device_8086_4010[] = "Memory Controller Hub";
+static const char pci_device_8086_4021[] = "PCI Express Port 1";
+static const char pci_device_8086_4022[] = "PCI Express Port 2";
+static const char pci_device_8086_4023[] = "PCI Express Port 3";
+static const char pci_device_8086_4024[] = "PCI Express Port 4";
+static const char pci_device_8086_4025[] = "PCI Express Port 5";
+static const char pci_device_8086_4026[] = "PCI Express Port 6";
+static const char pci_device_8086_4027[] = "PCI Express Port 7";
+static const char pci_device_8086_4028[] = "PCI Express Port 8";
+static const char pci_device_8086_4029[] = "PCI Express Port 9";
+static const char pci_device_8086_402d[] = "IBIST Registers";
+static const char pci_device_8086_402e[] = "IBIST Registers";
+static const char pci_device_8086_402f[] = "DMA/DCA Engine";
+static const char pci_device_8086_4030[] = "FSB Registers";
+static const char pci_device_8086_4032[] = "I/OxAPIC";
+static const char pci_device_8086_4035[] = "FBD Registers";
+static const char pci_device_8086_4036[] = "FBD Registers";
static const char pci_device_8086_4220[] = "PRO/Wireless 2200BG Network Connection";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_4220_2731_8086[] = "WLAN-Adapter";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_4220_8086_2731[] = "Samsung P35 integrated WLAN";
+#endif
static const char pci_device_8086_4222[] = "PRO/Wireless 3945ABG Network Connection";
#ifdef INIT_SUBSYS_INFO
static const char pci_subsys_8086_4222_8086_1005[] = "PRO/Wireless 3945BG Network Connection";
@@ -24924,6 +25379,23 @@ static const char pci_device_8086_5201[]
static const char pci_subsys_8086_5201_8086_0001[] = "EtherExpress PRO/100 Server Ethernet Adapter";
#endif
static const char pci_device_8086_530d[] = "80310 IOP [IO Processor]";
+static const char pci_device_8086_65c0[] = "Memory Controller Hub";
+static const char pci_device_8086_65e2[] = "PCI Express x4 Port 2";
+static const char pci_device_8086_65e3[] = "PCI Express x4 Port 3";
+static const char pci_device_8086_65e4[] = "PCI Express x4 Port 4";
+static const char pci_device_8086_65e5[] = "PCI Express x4 Port 5";
+static const char pci_device_8086_65e6[] = "PCI Express x4 Port 6";
+static const char pci_device_8086_65e7[] = "PCI Express x4 Port 7";
+static const char pci_device_8086_65f0[] = "FSB Registers";
+static const char pci_device_8086_65f1[] = "Reserved Registers";
+static const char pci_device_8086_65f3[] = "Reserved Registers";
+static const char pci_device_8086_65f5[] = "DDR Channel 0 Registers";
+static const char pci_device_8086_65f6[] = "DDR Channel 1 Registers";
+static const char pci_device_8086_65f7[] = "PCI Express x8 Port 2-3";
+static const char pci_device_8086_65f8[] = "PCI Express x8 Port 4-5";
+static const char pci_device_8086_65f9[] = "PCI Express x8 Port 6-7";
+static const char pci_device_8086_65fa[] = "PCI Express x16 Port 4-7";
+static const char pci_device_8086_65ff[] = "DMA Engine";
static const char pci_device_8086_7000[] = "82371SB PIIX3 ISA [Natoma/Triton II]";
static const char pci_device_8086_7010[] = "82371SB PIIX3 IDE [Natoma/Triton II]";
static const char pci_device_8086_7020[] = "82371SB PIIX3 USB [Natoma/Triton II]";
@@ -25098,6 +25570,7 @@ static const char pci_device_8086_9621[]
static const char pci_device_8086_9622[] = "Integrated RAID";
static const char pci_device_8086_9641[] = "Integrated RAID";
static const char pci_device_8086_96a1[] = "Integrated RAID";
+static const char pci_device_8086_a620[] = "6400/6402 Advanced Memory Buffer (AMB)";
static const char pci_device_8086_b152[] = "21152 PCI-to-PCI Bridge";
static const char pci_device_8086_b154[] = "21154 PCI-to-PCI Bridge";
static const char pci_device_8086_b555[] = "21555 Non transparent PCI-to-PCI Bridge";
@@ -26290,6 +26763,52 @@ static const pciSubsystemInfo pci_ss_inf
#undef pci_ss_info_1000_0066
#define pci_ss_info_1000_0066 pci_ss_info_1000_0040_1000_0066
#endif
+static const pciSubsystemInfo pci_ss_info_1000_0055_1033_8336 =
+ {0x1033, 0x8336, pci_subsys_1000_0055_1033_8336, 0};
+#undef pci_ss_info_1033_8336
+#define pci_ss_info_1033_8336 pci_ss_info_1000_0055_1033_8336
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo pci_ss_info_1000_0060_1000_1006 =
+ {0x1000, 0x1006, pci_subsys_1000_0060_1000_1006, 0};
+#undef pci_ss_info_1000_1006
+#define pci_ss_info_1000_1006 pci_ss_info_1000_0060_1000_1006
+static const pciSubsystemInfo pci_ss_info_1000_0060_1000_100a =
+ {0x1000, 0x100a, pci_subsys_1000_0060_1000_100a, 0};
+#undef pci_ss_info_1000_100a
+#define pci_ss_info_1000_100a pci_ss_info_1000_0060_1000_100a
+static const pciSubsystemInfo pci_ss_info_1000_0060_1000_100e =
+ {0x1000, 0x100e, pci_subsys_1000_0060_1000_100e, 0};
+#undef pci_ss_info_1000_100e
+#define pci_ss_info_1000_100e pci_ss_info_1000_0060_1000_100e
+static const pciSubsystemInfo pci_ss_info_1000_0060_1000_100f =
+ {0x1000, 0x100f, pci_subsys_1000_0060_1000_100f, 0};
+#undef pci_ss_info_1000_100f
+#define pci_ss_info_1000_100f pci_ss_info_1000_0060_1000_100f
+static const pciSubsystemInfo pci_ss_info_1000_0060_1000_1010 =
+ {0x1000, 0x1010, pci_subsys_1000_0060_1000_1010, 0};
+#undef pci_ss_info_1000_1010
+#define pci_ss_info_1000_1010 pci_ss_info_1000_0060_1000_1010
+static const pciSubsystemInfo pci_ss_info_1000_0060_1000_1011 =
+ {0x1000, 0x1011, pci_subsys_1000_0060_1000_1011, 0};
+#undef pci_ss_info_1000_1011
+#define pci_ss_info_1000_1011 pci_ss_info_1000_0060_1000_1011
+static const pciSubsystemInfo pci_ss_info_1000_0060_1000_1012 =
+ {0x1000, 0x1012, pci_subsys_1000_0060_1000_1012, 0};
+#undef pci_ss_info_1000_1012
+#define pci_ss_info_1000_1012 pci_ss_info_1000_0060_1000_1012
+static const pciSubsystemInfo pci_ss_info_1000_0060_1014_0363 =
+ {0x1014, 0x0363, pci_subsys_1000_0060_1014_0363, 0};
+#undef pci_ss_info_1014_0363
+#define pci_ss_info_1014_0363 pci_ss_info_1000_0060_1014_0363
+static const pciSubsystemInfo pci_ss_info_1000_0060_1014_0364 =
+ {0x1014, 0x0364, pci_subsys_1000_0060_1014_0364, 0};
+#undef pci_ss_info_1014_0364
+#define pci_ss_info_1014_0364 pci_ss_info_1000_0060_1014_0364
+static const pciSubsystemInfo pci_ss_info_1000_0060_1014_0365 =
+ {0x1014, 0x0365, pci_subsys_1000_0060_1014_0365, 0};
+#undef pci_ss_info_1014_0365
+#define pci_ss_info_1014_0365 pci_ss_info_1000_0060_1014_0365
+#endif
static const pciSubsystemInfo pci_ss_info_1000_0060_1028_1f0a =
{0x1028, 0x1f0a, pci_subsys_1000_0060_1028_1f0a, 0};
#undef pci_ss_info_1028_1f0a
@@ -26313,6 +26832,32 @@ static const pciSubsystemInfo pci_ss_inf
#undef pci_ss_info_1028_1f0d
#define pci_ss_info_1028_1f0d pci_ss_info_1000_0060_1028_1f0d
#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+static const pciSubsystemInfo pci_ss_info_1000_0060_1028_1f11 =
+ {0x1028, 0x1f11, pci_subsys_1000_0060_1028_1f11, 0};
+#undef pci_ss_info_1028_1f11
+#define pci_ss_info_1028_1f11 pci_ss_info_1000_0060_1028_1f11
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo pci_ss_info_1000_0060_1043_824d =
+ {0x1043, 0x824d, pci_subsys_1000_0060_1043_824d, 0};
+#undef pci_ss_info_1043_824d
+#define pci_ss_info_1043_824d pci_ss_info_1000_0060_1043_824d
+static const pciSubsystemInfo pci_ss_info_1000_0060_1170_002f =
+ {0x1170, 0x002f, pci_subsys_1000_0060_1170_002f, 0};
+#undef pci_ss_info_1170_002f
+#define pci_ss_info_1170_002f pci_ss_info_1000_0060_1170_002f
+#endif
+static const pciSubsystemInfo pci_ss_info_1000_0060_8086_34cc =
+ {0x8086, 0x34cc, pci_subsys_1000_0060_8086_34cc, 0};
+#undef pci_ss_info_8086_34cc
+#define pci_ss_info_8086_34cc pci_ss_info_1000_0060_8086_34cc
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+static const pciSubsystemInfo pci_ss_info_1000_0060_8086_34cd =
+ {0x8086, 0x34cd, pci_subsys_1000_0060_8086_34cd, 0};
+#undef pci_ss_info_8086_34cd
+#define pci_ss_info_8086_34cd pci_ss_info_1000_0060_8086_34cd
+#ifdef VENDOR_INCLUDE_NONVIDEO
static const pciSubsystemInfo pci_ss_info_1000_0062_1000_0062 =
{0x1000, 0x0062, pci_subsys_1000_0062_1000_0062, 0};
#undef pci_ss_info_1000_0062
@@ -26391,6 +26936,24 @@ static const pciSubsystemInfo pci_ss_inf
#undef pci_ss_info_1028_0002
#define pci_ss_info_1028_0002 pci_ss_info_1000_0408_1028_0002
#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+static const pciSubsystemInfo pci_ss_info_1000_0408_1028_0012 =
+ {0x1028, 0x0012, pci_subsys_1000_0408_1028_0012, 0};
+#undef pci_ss_info_1028_0012
+#define pci_ss_info_1028_0012 pci_ss_info_1000_0408_1028_0012
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+static const pciSubsystemInfo pci_ss_info_1000_0408_1028_0015 =
+ {0x1028, 0x0015, pci_subsys_1000_0408_1028_0015, 0};
+#undef pci_ss_info_1028_0015
+#define pci_ss_info_1028_0015 pci_ss_info_1000_0408_1028_0015
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+static const pciSubsystemInfo pci_ss_info_1000_0408_1028_1f03 =
+ {0x1028, 0x1f03, pci_subsys_1000_0408_1028_1f03, 0};
+#undef pci_ss_info_1028_1f03
+#define pci_ss_info_1028_1f03 pci_ss_info_1000_0408_1028_1f03
+#ifdef VENDOR_INCLUDE_NONVIDEO
static const pciSubsystemInfo pci_ss_info_1000_0408_1734_1065 =
{0x1734, 0x1065, pci_subsys_1000_0408_1734_1065, 0};
#undef pci_ss_info_1734_1065
@@ -26443,6 +27006,10 @@ static const pciSubsystemInfo pci_ss_inf
{0x1000, 0x1004, pci_subsys_1000_0411_1000_1004, 0};
#undef pci_ss_info_1000_1004
#define pci_ss_info_1000_1004 pci_ss_info_1000_0411_1000_1004
+static const pciSubsystemInfo pci_ss_info_1000_0411_1000_1008 =
+ {0x1000, 0x1008, pci_subsys_1000_0411_1000_1008, 0};
+#undef pci_ss_info_1000_1008
+#define pci_ss_info_1000_1008 pci_ss_info_1000_0411_1000_1008
static const pciSubsystemInfo pci_ss_info_1000_0411_1000_100c =
{0x1000, 0x100c, pci_subsys_1000_0411_1000_100c, 0};
#undef pci_ss_info_1000_100c
@@ -26812,6 +27379,22 @@ static const pciSubsystemInfo pci_ss_inf
{0x103c, 0x308b, pci_subsys_1002_4378_103c_308b, 0};
#undef pci_ss_info_103c_308b
#define pci_ss_info_103c_308b pci_ss_info_1002_4378_103c_308b
+static const pciSubsystemInfo pci_ss_info_1002_437a_1002_4379 =
+ {0x1002, 0x4379, pci_subsys_1002_437a_1002_4379, 0};
+#undef pci_ss_info_1002_4379
+#define pci_ss_info_1002_4379 pci_ss_info_1002_437a_1002_4379
+static const pciSubsystemInfo pci_ss_info_1002_437a_1002_437a =
+ {0x1002, 0x437a, pci_subsys_1002_437a_1002_437a, 0};
+#undef pci_ss_info_1002_437a
+#define pci_ss_info_1002_437a pci_ss_info_1002_437a_1002_437a
+static const pciSubsystemInfo pci_ss_info_1002_437a_14f1_8800 =
+ {0x14f1, 0x8800, pci_subsys_1002_437a_14f1_8800, 0};
+#undef pci_ss_info_14f1_8800
+#define pci_ss_info_14f1_8800 pci_ss_info_1002_437a_14f1_8800
+static const pciSubsystemInfo pci_ss_info_1002_437b_1734_10b8 =
+ {0x1734, 0x10b8, pci_subsys_1002_437b_1734_10b8, 0};
+#undef pci_ss_info_1734_10b8
+#define pci_ss_info_1734_10b8 pci_ss_info_1002_437b_1734_10b8
static const pciSubsystemInfo pci_ss_info_1002_4742_1002_0040 =
{0x1002, 0x0040, pci_subsys_1002_4742_1002_0040, 0};
#undef pci_ss_info_1002_0040
@@ -26992,6 +27575,10 @@ static const pciSubsystemInfo pci_ss_inf
{0x8086, 0x3427, pci_subsys_1002_4752_8086_3427, 0};
#undef pci_ss_info_8086_3427
#define pci_ss_info_8086_3427 pci_ss_info_1002_4752_8086_3427
+static const pciSubsystemInfo pci_ss_info_1002_4752_8086_5744 =
+ {0x8086, 0x5744, pci_subsys_1002_4752_8086_5744, 0};
+#undef pci_ss_info_8086_5744
+#define pci_ss_info_8086_5744 pci_ss_info_1002_4752_8086_5744
static const pciSubsystemInfo pci_ss_info_1002_4753_1002_4753 =
{0x1002, 0x4753, pci_subsys_1002_4753_1002_4753, 0};
#undef pci_ss_info_1002_4753
@@ -27232,6 +27819,10 @@ static const pciSubsystemInfo pci_ss_inf
{0x103c, 0x0890, pci_subsys_1002_4e50_103c_0890, 0};
#undef pci_ss_info_103c_0890
#define pci_ss_info_103c_0890 pci_ss_info_1002_4e50_103c_0890
+static const pciSubsystemInfo pci_ss_info_1002_4e50_144d_c00c =
+ {0x144d, 0xc00c, pci_subsys_1002_4e50_144d_c00c, 0};
+#undef pci_ss_info_144d_c00c
+#define pci_ss_info_144d_c00c pci_ss_info_1002_4e50_144d_c00c
static const pciSubsystemInfo pci_ss_info_1002_4e50_1462_0311 =
{0x1462, 0x0311, pci_subsys_1002_4e50_1462_0311, 0};
#undef pci_ss_info_1462_0311
@@ -27240,6 +27831,10 @@ static const pciSubsystemInfo pci_ss_inf
{0x1734, 0x1055, pci_subsys_1002_4e50_1734_1055, 0};
#undef pci_ss_info_1734_1055
#define pci_ss_info_1734_1055 pci_ss_info_1002_4e50_1734_1055
+static const pciSubsystemInfo pci_ss_info_1002_4e52_144d_c00c =
+ {0x144d, 0xc00c, pci_subsys_1002_4e52_144d_c00c, 0};
+#undef pci_ss_info_144d_c00c
+#define pci_ss_info_144d_c00c pci_ss_info_1002_4e52_144d_c00c
static const pciSubsystemInfo pci_ss_info_1002_4e65_1002_0003 =
{0x1002, 0x0003, pci_subsys_1002_4e65_1002_0003, 0};
#undef pci_ss_info_1002_0003
@@ -27684,6 +28279,10 @@ static const pciSubsystemInfo pci_ss_inf
{0x18bc, 0x0053, pci_subsys_1002_5961_18bc_0053, 0};
#undef pci_ss_info_18bc_0053
#define pci_ss_info_18bc_0053 pci_ss_info_1002_5961_18bc_0053
+static const pciSubsystemInfo pci_ss_info_1002_5964_1002_5964 =
+ {0x1002, 0x5964, pci_subsys_1002_5964_1002_5964, 0};
+#undef pci_ss_info_1002_5964
+#define pci_ss_info_1002_5964 pci_ss_info_1002_5964_1002_5964
static const pciSubsystemInfo pci_ss_info_1002_5964_1043_c006 =
{0x1043, 0xc006, pci_subsys_1002_5964_1043_c006, 0};
#undef pci_ss_info_1043_c006
@@ -27756,6 +28355,10 @@ static const pciSubsystemInfo pci_ss_inf
{0x1002, 0x5c63, pci_subsys_1002_5c63_1002_5c63, 0};
#undef pci_ss_info_1002_5c63
#define pci_ss_info_1002_5c63 pci_ss_info_1002_5c63_1002_5c63
+static const pciSubsystemInfo pci_ss_info_1002_5c63_144d_c00c =
+ {0x144d, 0xc00c, pci_subsys_1002_5c63_144d_c00c, 0};
+#undef pci_ss_info_144d_c00c
+#define pci_ss_info_144d_c00c pci_ss_info_1002_5c63_144d_c00c
static const pciSubsystemInfo pci_ss_info_1002_5d44_1458_4019 =
{0x1458, 0x4019, pci_subsys_1002_5d44_1458_4019, 0};
#undef pci_ss_info_1458_4019
@@ -27836,6 +28439,14 @@ static const pciSubsystemInfo pci_ss_inf
{0x17aa, 0x2007, pci_subsys_1002_71c4_17aa_2007, 0};
#undef pci_ss_info_17aa_2007
#define pci_ss_info_17aa_2007 pci_ss_info_1002_71c4_17aa_2007
+static const pciSubsystemInfo pci_ss_info_1002_724b_1002_0b12 =
+ {0x1002, 0x0b12, pci_subsys_1002_724b_1002_0b12, 0};
+#undef pci_ss_info_1002_0b12
+#define pci_ss_info_1002_0b12 pci_ss_info_1002_724b_1002_0b12
+static const pciSubsystemInfo pci_ss_info_1002_724b_1002_0b13 =
+ {0x1002, 0x0b13, pci_subsys_1002_724b_1002_0b13, 0};
+#undef pci_ss_info_1002_0b13
+#define pci_ss_info_1002_0b13 pci_ss_info_1002_724b_1002_0b13
#ifdef VENDOR_INCLUDE_NONVIDEO
static const pciSubsystemInfo pci_ss_info_1004_0304_1004_0304 =
{0x1004, 0x0304, pci_subsys_1004_0304_1004_0304, 0};
@@ -28678,10 +29289,34 @@ static const pciSubsystemInfo pci_ss_inf
{0x1028, 0x0002, pci_subsys_1028_0002_1028_0002, 0};
#undef pci_ss_info_1028_0002
#define pci_ss_info_1028_0002 pci_ss_info_1028_0002_1028_0002
+static const pciSubsystemInfo pci_ss_info_1028_0002_1028_00d1 =
+ {0x1028, 0x00d1, pci_subsys_1028_0002_1028_00d1, 0};
+#undef pci_ss_info_1028_00d1
+#define pci_ss_info_1028_00d1 pci_ss_info_1028_0002_1028_00d1
+static const pciSubsystemInfo pci_ss_info_1028_0002_1028_00d9 =
+ {0x1028, 0x00d9, pci_subsys_1028_0002_1028_00d9, 0};
+#undef pci_ss_info_1028_00d9
+#define pci_ss_info_1028_00d9 pci_ss_info_1028_0002_1028_00d9
static const pciSubsystemInfo pci_ss_info_1028_0003_1028_0003 =
{0x1028, 0x0003, pci_subsys_1028_0003_1028_0003, 0};
#undef pci_ss_info_1028_0003
#define pci_ss_info_1028_0003 pci_ss_info_1028_0003_1028_0003
+static const pciSubsystemInfo pci_ss_info_1028_0004_1028_0004 =
+ {0x1028, 0x0004, pci_subsys_1028_0004_1028_0004, 0};
+#undef pci_ss_info_1028_0004
+#define pci_ss_info_1028_0004 pci_ss_info_1028_0004_1028_0004
+static const pciSubsystemInfo pci_ss_info_1028_000a_1028_0106 =
+ {0x1028, 0x0106, pci_subsys_1028_000a_1028_0106, 0};
+#undef pci_ss_info_1028_0106
+#define pci_ss_info_1028_0106 pci_ss_info_1028_000a_1028_0106
+static const pciSubsystemInfo pci_ss_info_1028_000a_1028_011b =
+ {0x1028, 0x011b, pci_subsys_1028_000a_1028_011b, 0};
+#undef pci_ss_info_1028_011b
+#define pci_ss_info_1028_011b pci_ss_info_1028_000a_1028_011b
+static const pciSubsystemInfo pci_ss_info_1028_000a_1028_0121 =
+ {0x1028, 0x0121, pci_subsys_1028_000a_1028_0121, 0};
+#undef pci_ss_info_1028_0121
+#define pci_ss_info_1028_0121 pci_ss_info_1028_000a_1028_0121
static const pciSubsystemInfo pci_ss_info_1028_0013_1028_016c =
{0x1028, 0x016c, pci_subsys_1028_0013_1028_016c, 0};
#undef pci_ss_info_1028_016c
@@ -28702,6 +29337,14 @@ static const pciSubsystemInfo pci_ss_inf
{0x1028, 0x0170, pci_subsys_1028_0013_1028_0170, 0};
#undef pci_ss_info_1028_0170
#define pci_ss_info_1028_0170 pci_ss_info_1028_0013_1028_0170
+static const pciSubsystemInfo pci_ss_info_1028_0015_1028_1f01 =
+ {0x1028, 0x1f01, pci_subsys_1028_0015_1028_1f01, 0};
+#undef pci_ss_info_1028_1f01
+#define pci_ss_info_1028_1f01 pci_ss_info_1028_0015_1028_1f01
+static const pciSubsystemInfo pci_ss_info_1028_0015_1028_1f02 =
+ {0x1028, 0x1f02, pci_subsys_1028_0015_1028_1f02, 0};
+#undef pci_ss_info_1028_1f02
+#define pci_ss_info_1028_1f02 pci_ss_info_1028_0015_1028_1f02
#ifdef VENDOR_INCLUDE_NONVIDEO
static const pciSubsystemInfo pci_ss_info_102a_001f_9005_000f =
{0x9005, 0x000f, pci_subsys_102a_001f_9005_000f, 0};
@@ -29392,6 +30035,10 @@ static const pciSubsystemInfo pci_ss_inf
{0x1043, 0x8035, pci_subsys_1039_0900_1043_8035, 0};
#undef pci_ss_info_1043_8035
#define pci_ss_info_1043_8035 pci_ss_info_1039_0900_1043_8035
+static const pciSubsystemInfo pci_ss_info_1039_0900_1462_0900 =
+ {0x1462, 0x0900, pci_subsys_1039_0900_1462_0900, 0};
+#undef pci_ss_info_1462_0900
+#define pci_ss_info_1462_0900 pci_ss_info_1039_0900_1462_0900
static const pciSubsystemInfo pci_ss_info_1039_5513_1019_0970 =
{0x1019, 0x0970, pci_subsys_1039_5513_1019_0970, 0};
#undef pci_ss_info_1019_0970
@@ -29404,6 +30051,10 @@ static const pciSubsystemInfo pci_ss_inf
{0x1043, 0x8035, pci_subsys_1039_5513_1043_8035, 0};
#undef pci_ss_info_1043_8035
#define pci_ss_info_1043_8035 pci_ss_info_1039_5513_1043_8035
+static const pciSubsystemInfo pci_ss_info_1039_5513_1462_7010 =
+ {0x1462, 0x7010, pci_subsys_1039_5513_1462_7010, 0};
+#undef pci_ss_info_1462_7010
+#define pci_ss_info_1462_7010 pci_ss_info_1039_5513_1462_7010
static const pciSubsystemInfo pci_ss_info_1039_6300_1019_0970 =
{0x1019, 0x0970, pci_subsys_1039_6300_1019_0970, 0};
#undef pci_ss_info_1019_0970
@@ -29456,10 +30107,26 @@ static const pciSubsystemInfo pci_ss_inf
{0x1462, 0x5470, pci_subsys_1039_7001_1462_5470, 0};
#undef pci_ss_info_1462_5470
#define pci_ss_info_1462_5470 pci_ss_info_1039_7001_1462_5470
+static const pciSubsystemInfo pci_ss_info_1039_7001_1462_7010 =
+ {0x1462, 0x7010, pci_subsys_1039_7001_1462_7010, 0};
+#undef pci_ss_info_1462_7010
+#define pci_ss_info_1462_7010 pci_ss_info_1039_7001_1462_7010
+static const pciSubsystemInfo pci_ss_info_1039_7002_1462_7010 =
+ {0x1462, 0x7010, pci_subsys_1039_7002_1462_7010, 0};
+#undef pci_ss_info_1462_7010
+#define pci_ss_info_1462_7010 pci_ss_info_1039_7002_1462_7010
static const pciSubsystemInfo pci_ss_info_1039_7002_1509_7002 =
{0x1509, 0x7002, pci_subsys_1039_7002_1509_7002, 0};
#undef pci_ss_info_1509_7002
#define pci_ss_info_1509_7002 pci_ss_info_1039_7002_1509_7002
+static const pciSubsystemInfo pci_ss_info_1039_7007_1462_701d =
+ {0x1462, 0x701d, pci_subsys_1039_7007_1462_701d, 0};
+#undef pci_ss_info_1462_701d
+#define pci_ss_info_1462_701d pci_ss_info_1039_7007_1462_701d
+static const pciSubsystemInfo pci_ss_info_1039_7012_1462_7010 =
+ {0x1462, 0x7010, pci_subsys_1039_7012_1462_7010, 0};
+#undef pci_ss_info_1462_7010
+#define pci_ss_info_1462_7010 pci_ss_info_1039_7012_1462_7010
static const pciSubsystemInfo pci_ss_info_1039_7012_15bd_1001 =
{0x15bd, 0x1001, pci_subsys_1039_7012_15bd_1001, 0};
#undef pci_ss_info_15bd_1001
@@ -29950,6 +30617,10 @@ static const pciSubsystemInfo pci_ss_inf
{0x1043, 0x808b, pci_subsys_104c_8023_1043_808b, 0};
#undef pci_ss_info_1043_808b
#define pci_ss_info_1043_808b pci_ss_info_104c_8023_1043_808b
+static const pciSubsystemInfo pci_ss_info_104c_8023_1043_815b =
+ {0x1043, 0x815b, pci_subsys_104c_8023_1043_815b, 0};
+#undef pci_ss_info_1043_815b
+#define pci_ss_info_1043_815b pci_ss_info_104c_8023_1043_815b
static const pciSubsystemInfo pci_ss_info_104c_8025_1458_1000 =
{0x1458, 0x1000, pci_subsys_104c_8025_1458_1000, 0};
#undef pci_ss_info_1458_1000
@@ -30046,10 +30717,18 @@ static const pciSubsystemInfo pci_ss_inf
{0x103c, 0x309f, pci_subsys_104c_8039_103c_309f, 0};
#undef pci_ss_info_103c_309f
#define pci_ss_info_103c_309f pci_ss_info_104c_8039_103c_309f
+static const pciSubsystemInfo pci_ss_info_104c_8039_103c_30a1 =
+ {0x103c, 0x30a1, pci_subsys_104c_8039_103c_30a1, 0};
+#undef pci_ss_info_103c_30a1
+#define pci_ss_info_103c_30a1 pci_ss_info_104c_8039_103c_30a1
static const pciSubsystemInfo pci_ss_info_104c_803a_103c_309f =
{0x103c, 0x309f, pci_subsys_104c_803a_103c_309f, 0};
#undef pci_ss_info_103c_309f
#define pci_ss_info_103c_309f pci_ss_info_104c_803a_103c_309f
+static const pciSubsystemInfo pci_ss_info_104c_803a_103c_30a1 =
+ {0x103c, 0x30a1, pci_subsys_104c_803a_103c_30a1, 0};
+#undef pci_ss_info_103c_30a1
+#define pci_ss_info_103c_30a1 pci_ss_info_104c_803a_103c_30a1
static const pciSubsystemInfo pci_ss_info_104c_803b_103c_309f =
{0x103c, 0x309f, pci_subsys_104c_803b_103c_309f, 0};
#undef pci_ss_info_103c_309f
@@ -30062,6 +30741,10 @@ static const pciSubsystemInfo pci_ss_inf
{0x103c, 0x309f, pci_subsys_104c_803d_103c_309f, 0};
#undef pci_ss_info_103c_309f
#define pci_ss_info_103c_309f pci_ss_info_104c_803d_103c_309f
+static const pciSubsystemInfo pci_ss_info_104c_803d_103c_30a1 =
+ {0x103c, 0x30a1, pci_subsys_104c_803d_103c_30a1, 0};
+#undef pci_ss_info_103c_30a1
+#define pci_ss_info_103c_30a1 pci_ss_info_104c_803d_103c_30a1
static const pciSubsystemInfo pci_ss_info_104c_8204_1028_0139 =
{0x1028, 0x0139, pci_subsys_104c_8204_1028_0139, 0};
#undef pci_ss_info_1028_0139
@@ -30138,6 +30821,10 @@ static const pciSubsystemInfo pci_ss_inf
{0x1028, 0x00e6, pci_subsys_104c_ac42_1028_00e6, 0};
#undef pci_ss_info_1028_00e6
#define pci_ss_info_1028_00e6 pci_ss_info_104c_ac42_1028_00e6
+static const pciSubsystemInfo pci_ss_info_104c_ac44_1028_0149 =
+ {0x1028, 0x0149, pci_subsys_104c_ac44_1028_0149, 0};
+#undef pci_ss_info_1028_0149
+#define pci_ss_info_1028_0149 pci_ss_info_104c_ac44_1028_0149
static const pciSubsystemInfo pci_ss_info_104c_ac44_1028_0163 =
{0x1028, 0x0163, pci_subsys_104c_ac44_1028_0163, 0};
#undef pci_ss_info_1028_0163
@@ -30242,6 +30929,10 @@ static const pciSubsystemInfo pci_ss_inf
{0x175c, 0x8800, pci_subsys_104c_ac60_175c_8800, 0};
#undef pci_ss_info_175c_8800
#define pci_ss_info_175c_8800 pci_ss_info_104c_ac60_175c_8800
+static const pciSubsystemInfo pci_ss_info_104c_ac8f_1028_018d =
+ {0x1028, 0x018d, pci_subsys_104c_ac8f_1028_018d, 0};
+#undef pci_ss_info_1028_018d
+#define pci_ss_info_1028_018d pci_ss_info_104c_ac8f_1028_018d
#ifdef VENDOR_INCLUDE_NONVIDEO
static const pciSubsystemInfo pci_ss_info_1050_0840_1050_0001 =
{0x1050, 0x0001, pci_subsys_1050_0840_1050_0001, 0};
@@ -30489,6 +31180,10 @@ static const pciSubsystemInfo pci_ss_inf
#undef pci_ss_info_1668_0302
#define pci_ss_info_1668_0302 pci_ss_info_1057_5600_1668_0302
#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo pci_ss_info_105a_0d30_1043_8042 =
+ {0x1043, 0x8042, pci_subsys_105a_0d30_1043_8042, 0};
+#undef pci_ss_info_1043_8042
+#define pci_ss_info_1043_8042 pci_ss_info_105a_0d30_1043_8042
static const pciSubsystemInfo pci_ss_info_105a_0d30_105a_4d33 =
{0x105a, 0x4d33, pci_subsys_105a_0d30_105a_4d33, 0};
#undef pci_ss_info_105a_4d33
@@ -30523,6 +31218,12 @@ static const pciSubsystemInfo pci_ss_inf
{0x105a, 0x4d39, pci_subsys_105a_4d30_105a_4d39, 0};
#undef pci_ss_info_105a_4d39
#define pci_ss_info_105a_4d39 pci_ss_info_105a_4d30_105a_4d39
+#endif
+static const pciSubsystemInfo pci_ss_info_105a_4d30_8086_5744 =
+ {0x8086, 0x5744, pci_subsys_105a_4d30_8086_5744, 0};
+#undef pci_ss_info_8086_5744
+#define pci_ss_info_8086_5744 pci_ss_info_105a_4d30_8086_5744
+#ifdef VENDOR_INCLUDE_NONVIDEO
static const pciSubsystemInfo pci_ss_info_105a_4d33_105a_4d33 =
{0x105a, 0x4d33, pci_subsys_105a_4d33_105a_4d33, 0};
#undef pci_ss_info_105a_4d33
@@ -30571,6 +31272,18 @@ static const pciSubsystemInfo pci_ss_inf
{0x105a, 0x6269, pci_subsys_105a_6269_105a_6269, 0};
#undef pci_ss_info_105a_6269
#define pci_ss_info_105a_6269 pci_ss_info_105a_6269_105a_6269
+static const pciSubsystemInfo pci_ss_info_105a_8650_105a_4600 =
+ {0x105a, 0x4600, pci_subsys_105a_8650_105a_4600, 0};
+#undef pci_ss_info_105a_4600
+#define pci_ss_info_105a_4600 pci_ss_info_105a_8650_105a_4600
+static const pciSubsystemInfo pci_ss_info_105a_8650_105a_8601 =
+ {0x105a, 0x8601, pci_subsys_105a_8650_105a_8601, 0};
+#undef pci_ss_info_105a_8601
+#define pci_ss_info_105a_8601 pci_ss_info_105a_8650_105a_8601
+static const pciSubsystemInfo pci_ss_info_105a_8650_105a_8602 =
+ {0x105a, 0x8602, pci_subsys_105a_8650_105a_8602, 0};
+#undef pci_ss_info_105a_8602
+#define pci_ss_info_105a_8602 pci_ss_info_105a_8650_105a_8602
#endif
static const pciSubsystemInfo pci_ss_info_105d_2339_105d_0000 =
{0x105d, 0x0000, pci_subsys_105d_2339_105d_0000, 0};
@@ -31244,6 +31957,10 @@ static const pciSubsystemInfo pci_ss_inf
{0x1461, 0x0002, pci_subsys_109e_0878_1461_0002, 0};
#undef pci_ss_info_1461_0002
#define pci_ss_info_1461_0002 pci_ss_info_109e_0878_1461_0002
+static const pciSubsystemInfo pci_ss_info_109e_0878_1461_0003 =
+ {0x1461, 0x0003, pci_subsys_109e_0878_1461_0003, 0};
+#undef pci_ss_info_1461_0003
+#define pci_ss_info_1461_0003 pci_ss_info_109e_0878_1461_0003
static const pciSubsystemInfo pci_ss_info_109e_0878_1461_0004 =
{0x1461, 0x0004, pci_subsys_109e_0878_1461_0004, 0};
#undef pci_ss_info_1461_0004
@@ -31445,6 +32162,10 @@ static const pciSubsystemInfo pci_ss_inf
{0x10b5, 0x3068, pci_subsys_10b5_9030_10b5_3068, 0};
#undef pci_ss_info_10b5_3068
#define pci_ss_info_10b5_3068 pci_ss_info_10b5_9030_10b5_3068
+static const pciSubsystemInfo pci_ss_info_10b5_9030_12fe_0111 =
+ {0x12fe, 0x0111, pci_subsys_10b5_9030_12fe_0111, 0};
+#undef pci_ss_info_12fe_0111
+#define pci_ss_info_12fe_0111 pci_ss_info_10b5_9030_12fe_0111
static const pciSubsystemInfo pci_ss_info_10b5_9030_1397_3136 =
{0x1397, 0x3136, pci_subsys_10b5_9030_1397_3136, 0};
#undef pci_ss_info_1397_3136
@@ -31649,6 +32370,10 @@ static const pciSubsystemInfo pci_ss_inf
{0x12d9, 0x0002, pci_subsys_10b5_9054_12d9_0002, 0};
#undef pci_ss_info_12d9_0002
#define pci_ss_info_12d9_0002 pci_ss_info_10b5_9054_12d9_0002
+static const pciSubsystemInfo pci_ss_info_10b5_9054_14b4_d100 =
+ {0x14b4, 0xd100, pci_subsys_10b5_9054_14b4_d100, 0};
+#undef pci_ss_info_14b4_d100
+#define pci_ss_info_14b4_d100 pci_ss_info_10b5_9054_14b4_d100
static const pciSubsystemInfo pci_ss_info_10b5_9054_16df_0011 =
{0x16df, 0x0011, pci_subsys_10b5_9054_16df_0011, 0};
#undef pci_ss_info_16df_0011
@@ -41672,6 +42397,10 @@ static const pciSubsystemInfo pci_ss_inf
{0x8086, 0x0008, pci_subsys_8086_1229_8086_0008, 0};
#undef pci_ss_info_8086_0008
#define pci_ss_info_8086_0008 pci_ss_info_8086_1229_8086_0008
+static const pciSubsystemInfo pci_ss_info_8086_1229_8086_0009 =
+ {0x8086, 0x0009, pci_subsys_8086_1229_8086_0009, 0};
+#undef pci_ss_info_8086_0009
+#define pci_ss_info_8086_0009 pci_ss_info_8086_1229_8086_0009
static const pciSubsystemInfo pci_ss_info_8086_1229_8086_000a =
{0x8086, 0x000a, pci_subsys_8086_1229_8086_000a, 0};
#undef pci_ss_info_8086_000a
@@ -41972,6 +42701,10 @@ static const pciSubsystemInfo pci_ss_inf
{0x8086, 0x3012, pci_subsys_8086_1229_8086_3012, 0};
#undef pci_ss_info_8086_3012
#define pci_ss_info_8086_3012 pci_ss_info_8086_1229_8086_3012
+static const pciSubsystemInfo pci_ss_info_8086_1229_8086_301a =
+ {0x8086, 0x301a, pci_subsys_8086_1229_8086_301a, 0};
+#undef pci_ss_info_8086_301a
+#define pci_ss_info_8086_301a pci_ss_info_8086_1229_8086_301a
static const pciSubsystemInfo pci_ss_info_8086_1229_8086_3411 =
{0x8086, 0x3411, pci_subsys_8086_1229_8086_3411, 0};
#undef pci_ss_info_8086_3411
@@ -42136,6 +42869,10 @@ static const pciSubsystemInfo pci_ss_inf
{0x11d4, 0x0048, pci_subsys_8086_2425_11d4_0048, 0};
#undef pci_ss_info_11d4_0048
#define pci_ss_info_11d4_0048 pci_ss_info_8086_2425_11d4_0048
+static const pciSubsystemInfo pci_ss_info_8086_2440_8086_5744 =
+ {0x8086, 0x5744, pci_subsys_8086_2440_8086_5744, 0};
+#undef pci_ss_info_8086_5744
+#define pci_ss_info_8086_5744 pci_ss_info_8086_2440_8086_5744
static const pciSubsystemInfo pci_ss_info_8086_2442_1014_01c6 =
{0x1014, 0x01c6, pci_subsys_8086_2442_1014_01c6, 0};
#undef pci_ss_info_1014_01c6
@@ -42172,6 +42909,10 @@ static const pciSubsystemInfo pci_ss_inf
{0x8086, 0x4557, pci_subsys_8086_2442_8086_4557, 0};
#undef pci_ss_info_8086_4557
#define pci_ss_info_8086_4557 pci_ss_info_8086_2442_8086_4557
+static const pciSubsystemInfo pci_ss_info_8086_2442_8086_5744 =
+ {0x8086, 0x5744, pci_subsys_8086_2442_8086_5744, 0};
+#undef pci_ss_info_8086_5744
+#define pci_ss_info_8086_5744 pci_ss_info_8086_2442_8086_5744
static const pciSubsystemInfo pci_ss_info_8086_2443_1014_01c6 =
{0x1014, 0x01c6, pci_subsys_8086_2443_1014_01c6, 0};
#undef pci_ss_info_1014_01c6
@@ -42208,6 +42949,10 @@ static const pciSubsystemInfo pci_ss_inf
{0x8086, 0x4557, pci_subsys_8086_2443_8086_4557, 0};
#undef pci_ss_info_8086_4557
#define pci_ss_info_8086_4557 pci_ss_info_8086_2443_8086_4557
+static const pciSubsystemInfo pci_ss_info_8086_2443_8086_5744 =
+ {0x8086, 0x5744, pci_subsys_8086_2443_8086_5744, 0};
+#undef pci_ss_info_8086_5744
+#define pci_ss_info_8086_5744 pci_ss_info_8086_2443_8086_5744
static const pciSubsystemInfo pci_ss_info_8086_2444_1025_1016 =
{0x1025, 0x1016, pci_subsys_8086_2444_1025_1016, 0};
#undef pci_ss_info_1025_1016
@@ -42236,6 +42981,10 @@ static const pciSubsystemInfo pci_ss_inf
{0x8086, 0x4532, pci_subsys_8086_2444_8086_4532, 0};
#undef pci_ss_info_8086_4532
#define pci_ss_info_8086_4532 pci_ss_info_8086_2444_8086_4532
+static const pciSubsystemInfo pci_ss_info_8086_2444_8086_5744 =
+ {0x8086, 0x5744, pci_subsys_8086_2444_8086_5744, 0};
+#undef pci_ss_info_8086_5744
+#define pci_ss_info_8086_5744 pci_ss_info_8086_2444_8086_5744
static const pciSubsystemInfo pci_ss_info_8086_2445_0e11_000b =
{0x0e11, 0x000b, pci_subsys_8086_2445_0e11_000b, 0};
#undef pci_ss_info_0e11_000b
@@ -42444,6 +43193,10 @@ static const pciSubsystemInfo pci_ss_inf
{0x8086, 0x4557, pci_subsys_8086_244b_8086_4557, 0};
#undef pci_ss_info_8086_4557
#define pci_ss_info_8086_4557 pci_ss_info_8086_244b_8086_4557
+static const pciSubsystemInfo pci_ss_info_8086_244b_8086_5744 =
+ {0x8086, 0x5744, pci_subsys_8086_244b_8086_5744, 0};
+#undef pci_ss_info_8086_5744
+#define pci_ss_info_8086_5744 pci_ss_info_8086_244b_8086_5744
static const pciSubsystemInfo pci_ss_info_8086_244e_1014_0267 =
{0x1014, 0x0267, pci_subsys_8086_244e_1014_0267, 0};
#undef pci_ss_info_1014_0267
@@ -42720,6 +43473,10 @@ static const pciSubsystemInfo pci_ss_inf
{0x1071, 0x8160, pci_subsys_8086_24c3_1071_8160, 0};
#undef pci_ss_info_1071_8160
#define pci_ss_info_1071_8160 pci_ss_info_8086_24c3_1071_8160
+static const pciSubsystemInfo pci_ss_info_8086_24c3_144d_c00c =
+ {0x144d, 0xc00c, pci_subsys_8086_24c3_144d_c00c, 0};
+#undef pci_ss_info_144d_c00c
+#define pci_ss_info_144d_c00c pci_ss_info_8086_24c3_144d_c00c
static const pciSubsystemInfo pci_ss_info_8086_24c3_1458_24c2 =
{0x1458, 0x24c2, pci_subsys_8086_24c3_1458_24c2, 0};
#undef pci_ss_info_1458_24c2
@@ -44228,14 +44985,26 @@ static const pciSubsystemInfo pci_ss_inf
{0x1043, 0x1881, pci_subsys_8086_2792_1043_1881, 0};
#undef pci_ss_info_1043_1881
#define pci_ss_info_1043_1881 pci_ss_info_8086_2792_1043_1881
+static const pciSubsystemInfo pci_ss_info_8086_27a0_103c_30a1 =
+ {0x103c, 0x30a1, pci_subsys_8086_27a0_103c_30a1, 0};
+#undef pci_ss_info_103c_30a1
+#define pci_ss_info_103c_30a1 pci_ss_info_8086_27a0_103c_30a1
static const pciSubsystemInfo pci_ss_info_8086_27a0_17aa_2017 =
{0x17aa, 0x2017, pci_subsys_8086_27a0_17aa_2017, 0};
#undef pci_ss_info_17aa_2017
#define pci_ss_info_17aa_2017 pci_ss_info_8086_27a0_17aa_2017
+static const pciSubsystemInfo pci_ss_info_8086_27a2_103c_30a1 =
+ {0x103c, 0x30a1, pci_subsys_8086_27a2_103c_30a1, 0};
+#undef pci_ss_info_103c_30a1
+#define pci_ss_info_103c_30a1 pci_ss_info_8086_27a2_103c_30a1
static const pciSubsystemInfo pci_ss_info_8086_27a2_17aa_201a =
{0x17aa, 0x201a, pci_subsys_8086_27a2_17aa_201a, 0};
#undef pci_ss_info_17aa_201a
#define pci_ss_info_17aa_201a pci_ss_info_8086_27a2_17aa_201a
+static const pciSubsystemInfo pci_ss_info_8086_27a6_103c_30a1 =
+ {0x103c, 0x30a1, pci_subsys_8086_27a6_103c_30a1, 0};
+#undef pci_ss_info_103c_30a1
+#define pci_ss_info_103c_30a1 pci_ss_info_8086_27a6_103c_30a1
static const pciSubsystemInfo pci_ss_info_8086_27a6_17aa_201a =
{0x17aa, 0x201a, pci_subsys_8086_27a6_17aa_201a, 0};
#undef pci_ss_info_17aa_201a
@@ -44248,6 +45017,10 @@ static const pciSubsystemInfo pci_ss_inf
{0x8086, 0x544e, pci_subsys_8086_27b8_8086_544e, 0};
#undef pci_ss_info_8086_544e
#define pci_ss_info_8086_544e pci_ss_info_8086_27b8_8086_544e
+static const pciSubsystemInfo pci_ss_info_8086_27b9_103c_30a1 =
+ {0x103c, 0x30a1, pci_subsys_8086_27b9_103c_30a1, 0};
+#undef pci_ss_info_103c_30a1
+#define pci_ss_info_103c_30a1 pci_ss_info_8086_27b9_103c_30a1
static const pciSubsystemInfo pci_ss_info_8086_27b9_10f7_8338 =
{0x10f7, 0x8338, pci_subsys_8086_27b9_10f7_8338, 0};
#undef pci_ss_info_10f7_8338
@@ -44268,6 +45041,10 @@ static const pciSubsystemInfo pci_ss_inf
{0x17aa, 0x200d, pci_subsys_8086_27c5_17aa_200d, 0};
#undef pci_ss_info_17aa_200d
#define pci_ss_info_17aa_200d pci_ss_info_8086_27c5_17aa_200d
+static const pciSubsystemInfo pci_ss_info_8086_27c8_103c_30a1 =
+ {0x103c, 0x30a1, pci_subsys_8086_27c8_103c_30a1, 0};
+#undef pci_ss_info_103c_30a1
+#define pci_ss_info_103c_30a1 pci_ss_info_8086_27c8_103c_30a1
static const pciSubsystemInfo pci_ss_info_8086_27c8_107b_5048 =
{0x107b, 0x5048, pci_subsys_8086_27c8_107b_5048, 0};
#undef pci_ss_info_107b_5048
@@ -44280,6 +45057,10 @@ static const pciSubsystemInfo pci_ss_inf
{0x8086, 0x544e, pci_subsys_8086_27c8_8086_544e, 0};
#undef pci_ss_info_8086_544e
#define pci_ss_info_8086_544e pci_ss_info_8086_27c8_8086_544e
+static const pciSubsystemInfo pci_ss_info_8086_27c9_103c_30a1 =
+ {0x103c, 0x30a1, pci_subsys_8086_27c9_103c_30a1, 0};
+#undef pci_ss_info_103c_30a1
+#define pci_ss_info_103c_30a1 pci_ss_info_8086_27c9_103c_30a1
static const pciSubsystemInfo pci_ss_info_8086_27c9_107b_5048 =
{0x107b, 0x5048, pci_subsys_8086_27c9_107b_5048, 0};
#undef pci_ss_info_107b_5048
@@ -44292,6 +45073,10 @@ static const pciSubsystemInfo pci_ss_inf
{0x8086, 0x544e, pci_subsys_8086_27c9_8086_544e, 0};
#undef pci_ss_info_8086_544e
#define pci_ss_info_8086_544e pci_ss_info_8086_27c9_8086_544e
+static const pciSubsystemInfo pci_ss_info_8086_27ca_103c_30a1 =
+ {0x103c, 0x30a1, pci_subsys_8086_27ca_103c_30a1, 0};
+#undef pci_ss_info_103c_30a1
+#define pci_ss_info_103c_30a1 pci_ss_info_8086_27ca_103c_30a1
static const pciSubsystemInfo pci_ss_info_8086_27ca_107b_5048 =
{0x107b, 0x5048, pci_subsys_8086_27ca_107b_5048, 0};
#undef pci_ss_info_107b_5048
@@ -44304,6 +45089,10 @@ static const pciSubsystemInfo pci_ss_inf
{0x8086, 0x544e, pci_subsys_8086_27ca_8086_544e, 0};
#undef pci_ss_info_8086_544e
#define pci_ss_info_8086_544e pci_ss_info_8086_27ca_8086_544e
+static const pciSubsystemInfo pci_ss_info_8086_27cb_103c_30a1 =
+ {0x103c, 0x30a1, pci_subsys_8086_27cb_103c_30a1, 0};
+#undef pci_ss_info_103c_30a1
+#define pci_ss_info_103c_30a1 pci_ss_info_8086_27cb_103c_30a1
static const pciSubsystemInfo pci_ss_info_8086_27cb_107b_5048 =
{0x107b, 0x5048, pci_subsys_8086_27cb_107b_5048, 0};
#undef pci_ss_info_107b_5048
@@ -44316,6 +45105,10 @@ static const pciSubsystemInfo pci_ss_inf
{0x8086, 0x544e, pci_subsys_8086_27cb_8086_544e, 0};
#undef pci_ss_info_8086_544e
#define pci_ss_info_8086_544e pci_ss_info_8086_27cb_8086_544e
+static const pciSubsystemInfo pci_ss_info_8086_27cc_103c_30a1 =
+ {0x103c, 0x30a1, pci_subsys_8086_27cc_103c_30a1, 0};
+#undef pci_ss_info_103c_30a1
+#define pci_ss_info_103c_30a1 pci_ss_info_8086_27cc_103c_30a1
static const pciSubsystemInfo pci_ss_info_8086_27cc_17aa_200b =
{0x17aa, 0x200b, pci_subsys_8086_27cc_17aa_200b, 0};
#undef pci_ss_info_17aa_200b
@@ -44324,6 +45117,10 @@ static const pciSubsystemInfo pci_ss_inf
{0x8086, 0x544e, pci_subsys_8086_27cc_8086_544e, 0};
#undef pci_ss_info_8086_544e
#define pci_ss_info_8086_544e pci_ss_info_8086_27cc_8086_544e
+static const pciSubsystemInfo pci_ss_info_8086_27d8_103c_30a1 =
+ {0x103c, 0x30a1, pci_subsys_8086_27d8_103c_30a1, 0};
+#undef pci_ss_info_103c_30a1
+#define pci_ss_info_103c_30a1 pci_ss_info_8086_27d8_103c_30a1
static const pciSubsystemInfo pci_ss_info_8086_27d8_107b_5048 =
{0x107b, 0x5048, pci_subsys_8086_27d8_107b_5048, 0};
#undef pci_ss_info_107b_5048
@@ -44340,6 +45137,10 @@ static const pciSubsystemInfo pci_ss_inf
{0x152d, 0x0753, pci_subsys_8086_27d8_152d_0753, 0};
#undef pci_ss_info_152d_0753
#define pci_ss_info_152d_0753 pci_ss_info_8086_27d8_152d_0753
+static const pciSubsystemInfo pci_ss_info_8086_27d8_1734_10ad =
+ {0x1734, 0x10ad, pci_subsys_8086_27d8_1734_10ad, 0};
+#undef pci_ss_info_1734_10ad
+#define pci_ss_info_1734_10ad pci_ss_info_8086_27d8_1734_10ad
static const pciSubsystemInfo pci_ss_info_8086_27d8_17aa_2010 =
{0x17aa, 0x2010, pci_subsys_8086_27d8_17aa_2010, 0};
#undef pci_ss_info_17aa_2010
@@ -44360,6 +45161,10 @@ static const pciSubsystemInfo pci_ss_inf
{0x8086, 0x308d, pci_subsys_8086_27dc_8086_308d, 0};
#undef pci_ss_info_8086_308d
#define pci_ss_info_8086_308d pci_ss_info_8086_27dc_8086_308d
+static const pciSubsystemInfo pci_ss_info_8086_27df_103c_30a1 =
+ {0x103c, 0x30a1, pci_subsys_8086_27df_103c_30a1, 0};
+#undef pci_ss_info_103c_30a1
+#define pci_ss_info_103c_30a1 pci_ss_info_8086_27df_103c_30a1
static const pciSubsystemInfo pci_ss_info_8086_27df_107b_5048 =
{0x107b, 0x5048, pci_subsys_8086_27df_107b_5048, 0};
#undef pci_ss_info_107b_5048
@@ -44616,6 +45421,14 @@ static const pciSubsystemInfo pci_ss_inf
{0x1028, 0x0169, pci_subsys_8086_359e_1028_0169, 0};
#undef pci_ss_info_1028_0169
#define pci_ss_info_1028_0169 pci_ss_info_8086_359e_1028_0169
+static const pciSubsystemInfo pci_ss_info_8086_4220_2731_8086 =
+ {0x2731, 0x8086, pci_subsys_8086_4220_2731_8086, 0};
+#undef pci_ss_info_2731_8086
+#define pci_ss_info_2731_8086 pci_ss_info_8086_4220_2731_8086
+static const pciSubsystemInfo pci_ss_info_8086_4220_8086_2731 =
+ {0x8086, 0x2731, pci_subsys_8086_4220_8086_2731, 0};
+#undef pci_ss_info_8086_2731
+#define pci_ss_info_8086_2731 pci_ss_info_8086_4220_8086_2731
static const pciSubsystemInfo pci_ss_info_8086_4222_8086_1005 =
{0x8086, 0x1005, pci_subsys_8086_4222_8086_1005, 0};
#undef pci_ss_info_8086_1005
@@ -45426,6 +46239,22 @@ static const pciSubsystemInfo pci_ss_inf
#define pci_ss_info_8086_0003 pci_ss_info_e159_0001_8086_0003
#ifdef VENDOR_INCLUDE_NONVIDEO
#endif
+#define pci_ss_list_001c_0001 NULL
+#define pci_ss_list_0070_0003 NULL
+#define pci_ss_list_0070_0009 NULL
+#define pci_ss_list_0070_0801 NULL
+#define pci_ss_list_0070_0807 NULL
+#define pci_ss_list_0070_4000 NULL
+#define pci_ss_list_0070_4001 NULL
+#define pci_ss_list_0070_4009 NULL
+#define pci_ss_list_0070_4800 NULL
+#define pci_ss_list_0070_4801 NULL
+#define pci_ss_list_0070_4803 NULL
+#define pci_ss_list_0070_8003 NULL
+#define pci_ss_list_0070_8801 NULL
+#define pci_ss_list_0070_c801 NULL
+#define pci_ss_list_0070_e807 NULL
+#define pci_ss_list_0070_e817 NULL
#define pci_ss_list_0095_0680 NULL
#define pci_ss_list_018a_0106 NULL
#define pci_ss_list_021b_8139 NULL
@@ -45439,6 +46268,7 @@ static const pciSubsystemInfo pci_ss_inf
#define pci_ss_list_050d_001a NULL
#define pci_ss_list_050d_0109 NULL
#define pci_ss_list_050d_7050 NULL
+#define pci_ss_list_050d_705c NULL
#define pci_ss_list_05a9_8519 NULL
#define pci_ss_list_05e3_0701 NULL
#define pci_ss_list_066f_3410 NULL
@@ -45449,15 +46279,29 @@ static const pciSubsystemInfo pci_ss_inf
#define pci_ss_list_0675_1704 NULL
#define pci_ss_list_067b_2303 NULL
#define pci_ss_list_067b_3507 NULL
+#define pci_ss_list_07ca_b808 NULL
+#define pci_ss_list_08ff_afe4 NULL
+#define pci_ss_list_093a_010e NULL
+#define pci_ss_list_093a_010f NULL
+#define pci_ss_list_093a_2468 NULL
+#define pci_ss_list_093a_2603 NULL
+#define pci_ss_list_093a_2608 NULL
#define pci_ss_list_09c1_0704 NULL
+#define pci_ss_list_0ace_1211 NULL
#define pci_ss_list_0b0b_0105 NULL
#define pci_ss_list_0b0b_0205 NULL
+#define pci_ss_list_0b0b_0206 NULL
#define pci_ss_list_0b0b_0305 NULL
#define pci_ss_list_0b0b_0405 NULL
+#define pci_ss_list_0b0b_0406 NULL
#define pci_ss_list_0b0b_0505 NULL
#define pci_ss_list_0b0b_0506 NULL
#define pci_ss_list_0b0b_0605 NULL
#define pci_ss_list_0b0b_0705 NULL
+#define pci_ss_list_0b0b_0706 NULL
+#define pci_ss_list_0b0b_0905 NULL
+#define pci_ss_list_0b0b_0906 NULL
+#define pci_ss_list_0b0b_0a06 NULL
#define pci_ss_list_0b49_064f NULL
#define pci_ss_list_0ccd_0038 NULL
#define pci_ss_list_0e11_0001 NULL
@@ -45682,16 +46526,35 @@ static const pciSubsystemInfo *pci_ss_li
#define pci_ss_list_1000_0041 NULL
#define pci_ss_list_1000_0050 NULL
#define pci_ss_list_1000_0054 NULL
+static const pciSubsystemInfo *pci_ss_list_1000_0055[] = {
+ &pci_ss_info_1000_0055_1033_8336,
+ NULL
+};
#define pci_ss_list_1000_0056 NULL
#define pci_ss_list_1000_0058 NULL
#define pci_ss_list_1000_005a NULL
#define pci_ss_list_1000_005c NULL
#define pci_ss_list_1000_005e NULL
static const pciSubsystemInfo *pci_ss_list_1000_0060[] = {
+ &pci_ss_info_1000_0060_1000_1006,
+ &pci_ss_info_1000_0060_1000_100a,
+ &pci_ss_info_1000_0060_1000_100e,
+ &pci_ss_info_1000_0060_1000_100f,
+ &pci_ss_info_1000_0060_1000_1010,
+ &pci_ss_info_1000_0060_1000_1011,
+ &pci_ss_info_1000_0060_1000_1012,
+ &pci_ss_info_1000_0060_1014_0363,
+ &pci_ss_info_1000_0060_1014_0364,
+ &pci_ss_info_1000_0060_1014_0365,
&pci_ss_info_1000_0060_1028_1f0a,
&pci_ss_info_1000_0060_1028_1f0b,
&pci_ss_info_1000_0060_1028_1f0c,
&pci_ss_info_1000_0060_1028_1f0d,
+ &pci_ss_info_1000_0060_1028_1f11,
+ &pci_ss_info_1000_0060_1043_824d,
+ &pci_ss_info_1000_0060_1170_002f,
+ &pci_ss_info_1000_0060_8086_34cc,
+ &pci_ss_info_1000_0060_8086_34cd,
NULL
};
static const pciSubsystemInfo *pci_ss_list_1000_0062[] = {
@@ -45719,6 +46582,9 @@ static const pciSubsystemInfo *pci_ss_li
&pci_ss_info_1000_0408_1025_004d,
&pci_ss_info_1000_0408_1028_0001,
&pci_ss_info_1000_0408_1028_0002,
+ &pci_ss_info_1000_0408_1028_0012,
+ &pci_ss_info_1000_0408_1028_0015,
+ &pci_ss_info_1000_0408_1028_1f03,
&pci_ss_info_1000_0408_1734_1065,
&pci_ss_info_1000_0408_8086_0002,
NULL
@@ -45736,6 +46602,7 @@ static const pciSubsystemInfo *pci_ss_li
&pci_ss_info_1000_0411_1000_1002,
&pci_ss_info_1000_0411_1000_1003,
&pci_ss_info_1000_0411_1000_1004,
+ &pci_ss_info_1000_0411_1000_1008,
&pci_ss_info_1000_0411_1000_100c,
&pci_ss_info_1000_0411_1000_100d,
&pci_ss_info_1000_0411_1000_2004,
@@ -45965,8 +46832,16 @@ static const pciSubsystemInfo *pci_ss_li
NULL
};
#define pci_ss_list_1002_4379 NULL
-#define pci_ss_list_1002_437a NULL
-#define pci_ss_list_1002_437b NULL
+static const pciSubsystemInfo *pci_ss_list_1002_437a[] = {
+ &pci_ss_info_1002_437a_1002_4379,
+ &pci_ss_info_1002_437a_1002_437a,
+ &pci_ss_info_1002_437a_14f1_8800,
+ NULL
+};
+static const pciSubsystemInfo *pci_ss_list_1002_437b[] = {
+ &pci_ss_info_1002_437b_1734_10b8,
+ NULL
+};
#define pci_ss_list_1002_4380 NULL
#define pci_ss_list_1002_4381 NULL
#define pci_ss_list_1002_4382 NULL
@@ -46055,6 +46930,7 @@ static const pciSubsystemInfo *pci_ss_li
&pci_ss_info_1002_4752_1734_007a,
&pci_ss_info_1002_4752_8086_3411,
&pci_ss_info_1002_4752_8086_3427,
+ &pci_ss_info_1002_4752_8086_5744,
NULL
};
static const pciSubsystemInfo *pci_ss_list_1002_4753[] = {
@@ -46213,12 +47089,16 @@ static const pciSubsystemInfo *pci_ss_li
&pci_ss_info_1002_4e50_1025_005a,
&pci_ss_info_1002_4e50_103c_088c,
&pci_ss_info_1002_4e50_103c_0890,
+ &pci_ss_info_1002_4e50_144d_c00c,
&pci_ss_info_1002_4e50_1462_0311,
&pci_ss_info_1002_4e50_1734_1055,
NULL
};
#define pci_ss_list_1002_4e51 NULL
-#define pci_ss_list_1002_4e52 NULL
+static const pciSubsystemInfo *pci_ss_list_1002_4e52[] = {
+ &pci_ss_info_1002_4e52_144d_c00c,
+ NULL
+};
#define pci_ss_list_1002_4e53 NULL
#define pci_ss_list_1002_4e54 NULL
#define pci_ss_list_1002_4e56 NULL
@@ -46482,6 +47362,7 @@ static const pciSubsystemInfo *pci_ss_li
NULL
};
#define pci_ss_list_1002_5951 NULL
+#define pci_ss_list_1002_5952 NULL
static const pciSubsystemInfo *pci_ss_list_1002_5954[] = {
&pci_ss_info_1002_5954_1002_5954,
NULL
@@ -46506,6 +47387,7 @@ static const pciSubsystemInfo *pci_ss_li
};
#define pci_ss_list_1002_5962 NULL
static const pciSubsystemInfo *pci_ss_list_1002_5964[] = {
+ &pci_ss_info_1002_5964_1002_5964,
&pci_ss_info_1002_5964_1043_c006,
&pci_ss_info_1002_5964_1458_4018,
&pci_ss_info_1002_5964_1458_4032,
@@ -46524,6 +47406,7 @@ static const pciSubsystemInfo *pci_ss_li
#define pci_ss_list_1002_5a33 NULL
#define pci_ss_list_1002_5a34 NULL
#define pci_ss_list_1002_5a36 NULL
+#define pci_ss_list_1002_5a37 NULL
#define pci_ss_list_1002_5a38 NULL
#define pci_ss_list_1002_5a39 NULL
#define pci_ss_list_1002_5a3f NULL
@@ -46554,6 +47437,7 @@ static const pciSubsystemInfo *pci_ss_li
#define pci_ss_list_1002_5c61 NULL
static const pciSubsystemInfo *pci_ss_list_1002_5c63[] = {
&pci_ss_info_1002_5c63_1002_5c63,
+ &pci_ss_info_1002_5c63_144d_c00c,
NULL
};
static const pciSubsystemInfo *pci_ss_list_1002_5d44[] = {
@@ -46626,11 +47510,13 @@ static const pciSubsystemInfo *pci_ss_li
&pci_ss_info_1002_7142_1002_0322,
NULL
};
+#define pci_ss_list_1002_7143 NULL
#define pci_ss_list_1002_7145 NULL
static const pciSubsystemInfo *pci_ss_list_1002_7146[] = {
&pci_ss_info_1002_7146_1002_0322,
NULL
};
+#define pci_ss_list_1002_7147 NULL
#define pci_ss_list_1002_7149 NULL
#define pci_ss_list_1002_714a NULL
#define pci_ss_list_1002_714b NULL
@@ -46638,7 +47524,9 @@ static const pciSubsystemInfo *pci_ss_li
#define pci_ss_list_1002_714d NULL
#define pci_ss_list_1002_714e NULL
#define pci_ss_list_1002_7152 NULL
+#define pci_ss_list_1002_7153 NULL
#define pci_ss_list_1002_715e NULL
+#define pci_ss_list_1002_715f NULL
static const pciSubsystemInfo *pci_ss_list_1002_7162[] = {
&pci_ss_info_1002_7162_1002_0323,
NULL
@@ -46648,10 +47536,23 @@ static const pciSubsystemInfo *pci_ss_li
NULL
};
#define pci_ss_list_1002_7172 NULL
+#define pci_ss_list_1002_7173 NULL
#define pci_ss_list_1002_7180 NULL
#define pci_ss_list_1002_7181 NULL
+#define pci_ss_list_1002_7183 NULL
+#define pci_ss_list_1002_7187 NULL
+#define pci_ss_list_1002_7188 NULL
+#define pci_ss_list_1002_718a NULL
+#define pci_ss_list_1002_718c NULL
+#define pci_ss_list_1002_718d NULL
+#define pci_ss_list_1002_7193 NULL
+#define pci_ss_list_1002_719b NULL
+#define pci_ss_list_1002_719f NULL
#define pci_ss_list_1002_71a0 NULL
#define pci_ss_list_1002_71a1 NULL
+#define pci_ss_list_1002_71a3 NULL
+#define pci_ss_list_1002_71a7 NULL
+#define pci_ss_list_1002_71bb NULL
#define pci_ss_list_1002_71c0 NULL
#define pci_ss_list_1002_71c2 NULL
static const pciSubsystemInfo *pci_ss_list_1002_71c4[] = {
@@ -46660,12 +47561,16 @@ static const pciSubsystemInfo *pci_ss_li
};
#define pci_ss_list_1002_71c5 NULL
#define pci_ss_list_1002_71c6 NULL
+#define pci_ss_list_1002_71c7 NULL
#define pci_ss_list_1002_71ce NULL
#define pci_ss_list_1002_71d5 NULL
#define pci_ss_list_1002_71d6 NULL
#define pci_ss_list_1002_71de NULL
#define pci_ss_list_1002_71e0 NULL
#define pci_ss_list_1002_71e2 NULL
+#define pci_ss_list_1002_71e7 NULL
+#define pci_ss_list_1002_7210 NULL
+#define pci_ss_list_1002_7211 NULL
#define pci_ss_list_1002_7240 NULL
#define pci_ss_list_1002_7241 NULL
#define pci_ss_list_1002_7242 NULL
@@ -46677,16 +47582,32 @@ static const pciSubsystemInfo *pci_ss_li
#define pci_ss_list_1002_7248 NULL
#define pci_ss_list_1002_7249 NULL
#define pci_ss_list_1002_724a NULL
-#define pci_ss_list_1002_724b NULL
+static const pciSubsystemInfo *pci_ss_list_1002_724b[] = {
+ &pci_ss_info_1002_724b_1002_0b12,
+ &pci_ss_info_1002_724b_1002_0b13,
+ NULL
+};
#define pci_ss_list_1002_724c NULL
#define pci_ss_list_1002_724d NULL
#define pci_ss_list_1002_724e NULL
#define pci_ss_list_1002_7269 NULL
+#define pci_ss_list_1002_726b NULL
#define pci_ss_list_1002_726e NULL
+#define pci_ss_list_1002_7280 NULL
+#define pci_ss_list_1002_7288 NULL
+#define pci_ss_list_1002_7291 NULL
+#define pci_ss_list_1002_7293 NULL
+#define pci_ss_list_1002_72a0 NULL
+#define pci_ss_list_1002_72a8 NULL
+#define pci_ss_list_1002_72b1 NULL
+#define pci_ss_list_1002_72b3 NULL
#define pci_ss_list_1002_7833 NULL
#define pci_ss_list_1002_7834 NULL
#define pci_ss_list_1002_7835 NULL
#define pci_ss_list_1002_7838 NULL
+#define pci_ss_list_1002_791e NULL
+#define pci_ss_list_1002_791f NULL
+#define pci_ss_list_1002_793f NULL
#define pci_ss_list_1002_7c37 NULL
#define pci_ss_list_1002_cab0 NULL
#define pci_ss_list_1002_cab2 NULL
@@ -47178,6 +48099,7 @@ static const pciSubsystemInfo *pci_ss_li
#define pci_ss_list_1022_2003 NULL
#define pci_ss_list_1022_2020 NULL
#define pci_ss_list_1022_2040 NULL
+#define pci_ss_list_1022_2080 NULL
#define pci_ss_list_1022_2081 NULL
#define pci_ss_list_1022_2082 NULL
#define pci_ss_list_1022_208f NULL
@@ -47404,17 +48326,28 @@ static const pciSubsystemInfo *pci_ss_li
};
static const pciSubsystemInfo *pci_ss_list_1028_0002[] = {
&pci_ss_info_1028_0002_1028_0002,
+ &pci_ss_info_1028_0002_1028_00d1,
+ &pci_ss_info_1028_0002_1028_00d9,
NULL
};
static const pciSubsystemInfo *pci_ss_list_1028_0003[] = {
&pci_ss_info_1028_0003_1028_0003,
NULL
};
+static const pciSubsystemInfo *pci_ss_list_1028_0004[] = {
+ &pci_ss_info_1028_0004_1028_0004,
+ NULL
+};
#define pci_ss_list_1028_0006 NULL
#define pci_ss_list_1028_0007 NULL
#define pci_ss_list_1028_0008 NULL
#define pci_ss_list_1028_0009 NULL
-#define pci_ss_list_1028_000a NULL
+static const pciSubsystemInfo *pci_ss_list_1028_000a[] = {
+ &pci_ss_info_1028_000a_1028_0106,
+ &pci_ss_info_1028_000a_1028_011b,
+ &pci_ss_info_1028_000a_1028_0121,
+ NULL
+};
#define pci_ss_list_1028_000c NULL
#define pci_ss_list_1028_000d NULL
#define pci_ss_list_1028_000e NULL
@@ -47431,7 +48364,12 @@ static const pciSubsystemInfo *pci_ss_li
NULL
};
#define pci_ss_list_1028_0014 NULL
-#define pci_ss_list_1028_0015 NULL
+static const pciSubsystemInfo *pci_ss_list_1028_0015[] = {
+ &pci_ss_info_1028_0015_1028_1f01,
+ &pci_ss_info_1028_0015_1028_1f02,
+ NULL
+};
+#define pci_ss_list_1028_1f03 NULL
#define pci_ss_list_102a_0000 NULL
#define pci_ss_list_102a_0010 NULL
#ifdef VENDOR_INCLUDE_NONVIDEO
@@ -47665,6 +48603,7 @@ static const pciSubsystemInfo *pci_ss_li
};
#define pci_ss_list_102f_0030 NULL
#define pci_ss_list_102f_0031 NULL
+#define pci_ss_list_102f_0032 NULL
#define pci_ss_list_102f_0105 NULL
#define pci_ss_list_102f_0106 NULL
#define pci_ss_list_102f_0107 NULL
@@ -47813,6 +48752,7 @@ static const pciSubsystemInfo *pci_ss_li
&pci_ss_info_1039_0900_1019_0a14,
&pci_ss_info_1039_0900_1039_0900,
&pci_ss_info_1039_0900_1043_8035,
+ &pci_ss_info_1039_0900_1462_0900,
NULL
};
#define pci_ss_list_1039_0961 NULL
@@ -47837,6 +48777,7 @@ static const pciSubsystemInfo *pci_ss_li
&pci_ss_info_1039_5513_1019_0970,
&pci_ss_info_1039_5513_1039_5513,
&pci_ss_info_1039_5513_1043_8035,
+ &pci_ss_info_1039_5513_1462_7010,
NULL
};
#define pci_ss_list_1039_5517 NULL
@@ -47879,14 +48820,20 @@ static const pciSubsystemInfo *pci_ss_li
&pci_ss_info_1039_7001_1019_0a14,
&pci_ss_info_1039_7001_1039_7000,
&pci_ss_info_1039_7001_1462_5470,
+ &pci_ss_info_1039_7001_1462_7010,
NULL
};
static const pciSubsystemInfo *pci_ss_list_1039_7002[] = {
+ &pci_ss_info_1039_7002_1462_7010,
&pci_ss_info_1039_7002_1509_7002,
NULL
};
-#define pci_ss_list_1039_7007 NULL
+static const pciSubsystemInfo *pci_ss_list_1039_7007[] = {
+ &pci_ss_info_1039_7007_1462_701d,
+ NULL
+};
static const pciSubsystemInfo *pci_ss_list_1039_7012[] = {
+ &pci_ss_info_1039_7012_1462_7010,
&pci_ss_info_1039_7012_15bd_1001,
NULL
};
@@ -47984,10 +48931,13 @@ static const pciSubsystemInfo *pci_ss_li
#define pci_ss_list_103c_12ee NULL
#define pci_ss_list_103c_12f8 NULL
#define pci_ss_list_103c_12fa NULL
+#define pci_ss_list_103c_1302 NULL
+#define pci_ss_list_103c_1303 NULL
#define pci_ss_list_103c_2910 NULL
#define pci_ss_list_103c_2925 NULL
#define pci_ss_list_103c_3080 NULL
#define pci_ss_list_103c_3085 NULL
+#define pci_ss_list_103c_30b5 NULL
static const pciSubsystemInfo *pci_ss_list_103c_3220[] = {
&pci_ss_info_103c_3220_103c_3225,
NULL
@@ -48023,8 +48973,10 @@ static const pciSubsystemInfo *pci_ss_li
#define pci_ss_list_1043_80c5 NULL
#define pci_ss_list_1043_80df NULL
#define pci_ss_list_1043_815a NULL
+#define pci_ss_list_1043_8168 NULL
#define pci_ss_list_1043_8187 NULL
#define pci_ss_list_1043_8188 NULL
+#define pci_ss_list_1043_81f4 NULL
#endif
#define pci_ss_list_1044_1012 NULL
#define pci_ss_list_1044_a400 NULL
@@ -48190,6 +49142,7 @@ static const pciSubsystemInfo *pci_ss_li
static const pciSubsystemInfo *pci_ss_list_104c_8023[] = {
&pci_ss_info_104c_8023_103c_088c,
&pci_ss_info_104c_8023_1043_808b,
+ &pci_ss_info_104c_8023_1043_815b,
NULL
};
#define pci_ss_list_104c_8024 NULL
@@ -48251,10 +49204,12 @@ static const pciSubsystemInfo *pci_ss_li
#define pci_ss_list_104c_8038 NULL
static const pciSubsystemInfo *pci_ss_list_104c_8039[] = {
&pci_ss_info_104c_8039_103c_309f,
+ &pci_ss_info_104c_8039_103c_30a1,
NULL
};
static const pciSubsystemInfo *pci_ss_list_104c_803a[] = {
&pci_ss_info_104c_803a_103c_309f,
+ &pci_ss_info_104c_803a_103c_30a1,
NULL
};
static const pciSubsystemInfo *pci_ss_list_104c_803b[] = {
@@ -48267,6 +49222,7 @@ static const pciSubsystemInfo *pci_ss_li
};
static const pciSubsystemInfo *pci_ss_list_104c_803d[] = {
&pci_ss_info_104c_803d_103c_309f,
+ &pci_ss_info_104c_803d_103c_30a1,
NULL
};
#define pci_ss_list_104c_8201 NULL
@@ -48342,6 +49298,7 @@ static const pciSubsystemInfo *pci_ss_li
NULL
};
static const pciSubsystemInfo *pci_ss_list_104c_ac44[] = {
+ &pci_ss_info_104c_ac44_1028_0149,
&pci_ss_info_104c_ac44_1028_0163,
&pci_ss_info_104c_ac44_1028_0196,
&pci_ss_info_104c_ac44_1071_8160,
@@ -48397,7 +49354,10 @@ static const pciSubsystemInfo *pci_ss_li
};
#define pci_ss_list_104c_ac8d NULL
#define pci_ss_list_104c_ac8e NULL
-#define pci_ss_list_104c_ac8f NULL
+static const pciSubsystemInfo *pci_ss_list_104c_ac8f[] = {
+ &pci_ss_info_104c_ac8f_1028_018d,
+ NULL
+};
#define pci_ss_list_104c_fe00 NULL
#define pci_ss_list_104c_fe03 NULL
#define pci_ss_list_104d_8004 NULL
@@ -48479,6 +49439,7 @@ static const pciSubsystemInfo *pci_ss_li
};
#define pci_ss_list_1057_18c0 NULL
#define pci_ss_list_1057_18c1 NULL
+#define pci_ss_list_1057_3052 NULL
#define pci_ss_list_1057_3055 NULL
static const pciSubsystemInfo *pci_ss_list_1057_3410[] = {
&pci_ss_info_1057_3410_ecc0_0050,
@@ -48529,6 +49490,7 @@ static const pciSubsystemInfo *pci_ss_li
#define pci_ss_list_1057_6405 NULL
#ifdef VENDOR_INCLUDE_NONVIDEO
static const pciSubsystemInfo *pci_ss_list_105a_0d30[] = {
+ &pci_ss_info_105a_0d30_1043_8042,
&pci_ss_info_105a_0d30_105a_4d33,
NULL
};
@@ -48567,6 +49529,7 @@ static const pciSubsystemInfo *pci_ss_li
static const pciSubsystemInfo *pci_ss_list_105a_4d30[] = {
&pci_ss_info_105a_4d30_105a_4d33,
&pci_ss_info_105a_4d30_105a_4d39,
+ &pci_ss_info_105a_4d30_8086_5744,
NULL
};
static const pciSubsystemInfo *pci_ss_list_105a_4d33[] = {
@@ -48611,7 +49574,14 @@ static const pciSubsystemInfo *pci_ss_li
#define pci_ss_list_105a_7275 NULL
#define pci_ss_list_105a_8002 NULL
#define pci_ss_list_105a_8350 NULL
+static const pciSubsystemInfo *pci_ss_list_105a_8650[] = {
+ &pci_ss_info_105a_8650_105a_4600,
+ &pci_ss_info_105a_8650_105a_8601,
+ &pci_ss_info_105a_8650_105a_8602,
+ NULL
+};
#define pci_ss_list_105a_c350 NULL
+#define pci_ss_list_105a_e350 NULL
#endif
#define pci_ss_list_105d_2309 NULL
static const pciSubsystemInfo *pci_ss_list_105d_2339[] = {
@@ -48837,6 +49807,7 @@ static const pciSubsystemInfo *pci_ss_li
NULL
};
#define pci_ss_list_1073_0020 NULL
+#define pci_ss_list_1073_1000 NULL
static const pciSubsystemInfo *pci_ss_list_1073_2000[] = {
&pci_ss_info_1073_2000_1073_2000,
NULL
@@ -49185,6 +50156,7 @@ static const pciSubsystemInfo *pci_ss_li
&pci_ss_info_109e_0878_13e9_0070,
&pci_ss_info_109e_0878_144f_3000,
&pci_ss_info_109e_0878_1461_0002,
+ &pci_ss_info_109e_0878_1461_0003,
&pci_ss_info_109e_0878_1461_0004,
&pci_ss_info_109e_0878_1461_0761,
&pci_ss_info_109e_0878_1461_0771,
@@ -49269,6 +50241,8 @@ static const pciSubsystemInfo *pci_ss_li
#define pci_ss_list_10a9_4002 NULL
#define pci_ss_list_10a9_8001 NULL
#define pci_ss_list_10a9_8002 NULL
+#define pci_ss_list_10a9_8010 NULL
+#define pci_ss_list_10a9_8018 NULL
#endif
#define pci_ss_list_10aa_0000 NULL
#define pci_ss_list_10ad_0001 NULL
@@ -49320,6 +50294,7 @@ static const pciSubsystemInfo *pci_ss_li
&pci_ss_info_10b5_9030_10b5_2978,
&pci_ss_info_10b5_9030_10b5_3025,
&pci_ss_info_10b5_9030_10b5_3068,
+ &pci_ss_info_10b5_9030_12fe_0111,
&pci_ss_info_10b5_9030_1397_3136,
&pci_ss_info_10b5_9030_1397_3137,
&pci_ss_info_10b5_9030_1518_0200,
@@ -49378,6 +50353,7 @@ static const pciSubsystemInfo *pci_ss_li
&pci_ss_info_10b5_9054_10b5_2844,
&pci_ss_info_10b5_9054_12c7_4001,
&pci_ss_info_10b5_9054_12d9_0002,
+ &pci_ss_info_10b5_9054_14b4_d100,
&pci_ss_info_10b5_9054_16df_0011,
&pci_ss_info_10b5_9054_16df_0012,
&pci_ss_info_10b5_9054_16df_0013,
@@ -52258,6 +53234,7 @@ static const pciSubsystemInfo *pci_ss_li
#define pci_ss_list_1166_0140 NULL
#define pci_ss_list_1166_0141 NULL
#define pci_ss_list_1166_0142 NULL
+#define pci_ss_list_1166_0144 NULL
#define pci_ss_list_1166_0200 NULL
static const pciSubsystemInfo *pci_ss_list_1166_0201[] = {
&pci_ss_info_1166_0201_4c53_1080,
@@ -56345,6 +57322,7 @@ static const pciSubsystemInfo *pci_ss_li
&pci_ss_info_8086_1229_8086_0006,
&pci_ss_info_8086_1229_8086_0007,
&pci_ss_info_8086_1229_8086_0008,
+ &pci_ss_info_8086_1229_8086_0009,
&pci_ss_info_8086_1229_8086_000a,
&pci_ss_info_8086_1229_8086_000b,
&pci_ss_info_8086_1229_8086_000c,
@@ -56420,6 +57398,7 @@ static const pciSubsystemInfo *pci_ss_li
&pci_ss_info_8086_1229_8086_3010,
&pci_ss_info_8086_1229_8086_3011,
&pci_ss_info_8086_1229_8086_3012,
+ &pci_ss_info_8086_1229_8086_301a,
&pci_ss_info_8086_1229_8086_3411,
NULL
};
@@ -56524,7 +57503,10 @@ static const pciSubsystemInfo *pci_ss_li
};
#define pci_ss_list_8086_2426 NULL
#define pci_ss_list_8086_2428 NULL
-#define pci_ss_list_8086_2440 NULL
+static const pciSubsystemInfo *pci_ss_list_8086_2440[] = {
+ &pci_ss_info_8086_2440_8086_5744,
+ NULL
+};
static const pciSubsystemInfo *pci_ss_list_8086_2442[] = {
&pci_ss_info_8086_2442_1014_01c6,
&pci_ss_info_8086_2442_1025_1016,
@@ -56535,6 +57517,7 @@ static const pciSubsystemInfo *pci_ss_li
&pci_ss_info_8086_2442_147b_0507,
&pci_ss_info_8086_2442_8086_4532,
&pci_ss_info_8086_2442_8086_4557,
+ &pci_ss_info_8086_2442_8086_5744,
NULL
};
static const pciSubsystemInfo *pci_ss_list_8086_2443[] = {
@@ -56547,6 +57530,7 @@ static const pciSubsystemInfo *pci_ss_li
&pci_ss_info_8086_2443_147b_0507,
&pci_ss_info_8086_2443_8086_4532,
&pci_ss_info_8086_2443_8086_4557,
+ &pci_ss_info_8086_2443_8086_5744,
NULL
};
static const pciSubsystemInfo *pci_ss_list_8086_2444[] = {
@@ -56557,6 +57541,7 @@ static const pciSubsystemInfo *pci_ss_li
&pci_ss_info_8086_2444_104d_80df,
&pci_ss_info_8086_2444_147b_0507,
&pci_ss_info_8086_2444_8086_4532,
+ &pci_ss_info_8086_2444_8086_5744,
NULL
};
static const pciSubsystemInfo *pci_ss_list_8086_2445[] = {
@@ -56627,6 +57612,7 @@ static const pciSubsystemInfo *pci_ss_li
&pci_ss_info_8086_244b_147b_0507,
&pci_ss_info_8086_244b_8086_4532,
&pci_ss_info_8086_244b_8086_4557,
+ &pci_ss_info_8086_244b_8086_5744,
NULL
};
#define pci_ss_list_8086_244c NULL
@@ -56743,6 +57729,7 @@ static const pciSubsystemInfo *pci_ss_li
&pci_ss_info_8086_24c3_103c_0890,
&pci_ss_info_8086_24c3_103c_08b0,
&pci_ss_info_8086_24c3_1071_8160,
+ &pci_ss_info_8086_24c3_144d_c00c,
&pci_ss_info_8086_24c3_1458_24c2,
&pci_ss_info_8086_24c3_1462_5800,
&pci_ss_info_8086_24c3_1734_1004,
@@ -57438,15 +58425,18 @@ static const pciSubsystemInfo *pci_ss_li
NULL
};
static const pciSubsystemInfo *pci_ss_list_8086_27a0[] = {
+ &pci_ss_info_8086_27a0_103c_30a1,
&pci_ss_info_8086_27a0_17aa_2017,
NULL
};
#define pci_ss_list_8086_27a1 NULL
static const pciSubsystemInfo *pci_ss_list_8086_27a2[] = {
+ &pci_ss_info_8086_27a2_103c_30a1,
&pci_ss_info_8086_27a2_17aa_201a,
NULL
};
static const pciSubsystemInfo *pci_ss_list_8086_27a6[] = {
+ &pci_ss_info_8086_27a6_103c_30a1,
&pci_ss_info_8086_27a6_17aa_201a,
NULL
};
@@ -57457,6 +58447,7 @@ static const pciSubsystemInfo *pci_ss_li
NULL
};
static const pciSubsystemInfo *pci_ss_list_8086_27b9[] = {
+ &pci_ss_info_8086_27b9_103c_30a1,
&pci_ss_info_8086_27b9_10f7_8338,
&pci_ss_info_8086_27b9_17aa_2009,
NULL
@@ -57476,30 +58467,35 @@ static const pciSubsystemInfo *pci_ss_li
};
#define pci_ss_list_8086_27c6 NULL
static const pciSubsystemInfo *pci_ss_list_8086_27c8[] = {
+ &pci_ss_info_8086_27c8_103c_30a1,
&pci_ss_info_8086_27c8_107b_5048,
&pci_ss_info_8086_27c8_17aa_200a,
&pci_ss_info_8086_27c8_8086_544e,
NULL
};
static const pciSubsystemInfo *pci_ss_list_8086_27c9[] = {
+ &pci_ss_info_8086_27c9_103c_30a1,
&pci_ss_info_8086_27c9_107b_5048,
&pci_ss_info_8086_27c9_17aa_200a,
&pci_ss_info_8086_27c9_8086_544e,
NULL
};
static const pciSubsystemInfo *pci_ss_list_8086_27ca[] = {
+ &pci_ss_info_8086_27ca_103c_30a1,
&pci_ss_info_8086_27ca_107b_5048,
&pci_ss_info_8086_27ca_17aa_200a,
&pci_ss_info_8086_27ca_8086_544e,
NULL
};
static const pciSubsystemInfo *pci_ss_list_8086_27cb[] = {
+ &pci_ss_info_8086_27cb_103c_30a1,
&pci_ss_info_8086_27cb_107b_5048,
&pci_ss_info_8086_27cb_17aa_200a,
&pci_ss_info_8086_27cb_8086_544e,
NULL
};
static const pciSubsystemInfo *pci_ss_list_8086_27cc[] = {
+ &pci_ss_info_8086_27cc_103c_30a1,
&pci_ss_info_8086_27cc_17aa_200b,
&pci_ss_info_8086_27cc_8086_544e,
NULL
@@ -57509,10 +58505,12 @@ static const pciSubsystemInfo *pci_ss_li
#define pci_ss_list_8086_27d4 NULL
#define pci_ss_list_8086_27d6 NULL
static const pciSubsystemInfo *pci_ss_list_8086_27d8[] = {
+ &pci_ss_info_8086_27d8_103c_30a1,
&pci_ss_info_8086_27d8_107b_5048,
&pci_ss_info_8086_27d8_10f7_8338,
&pci_ss_info_8086_27d8_1179_ff31,
&pci_ss_info_8086_27d8_152d_0753,
+ &pci_ss_info_8086_27d8_1734_10ad,
&pci_ss_info_8086_27d8_17aa_2010,
NULL
};
@@ -57529,6 +58527,7 @@ static const pciSubsystemInfo *pci_ss_li
#define pci_ss_list_8086_27dd NULL
#define pci_ss_list_8086_27de NULL
static const pciSubsystemInfo *pci_ss_list_8086_27df[] = {
+ &pci_ss_info_8086_27df_103c_30a1,
&pci_ss_info_8086_27df_107b_5048,
&pci_ss_info_8086_27df_10f7_8338,
&pci_ss_info_8086_27df_17aa_200c,
@@ -57588,6 +58587,34 @@ static const pciSubsystemInfo *pci_ss_li
#define pci_ss_list_8086_284b NULL
#define pci_ss_list_8086_284f NULL
#define pci_ss_list_8086_2850 NULL
+#define pci_ss_list_8086_2910 NULL
+#define pci_ss_list_8086_2920 NULL
+#define pci_ss_list_8086_2921 NULL
+#define pci_ss_list_8086_2922 NULL
+#define pci_ss_list_8086_2923 NULL
+#define pci_ss_list_8086_2925 NULL
+#define pci_ss_list_8086_2926 NULL
+#define pci_ss_list_8086_2928 NULL
+#define pci_ss_list_8086_292d NULL
+#define pci_ss_list_8086_292e NULL
+#define pci_ss_list_8086_2930 NULL
+#define pci_ss_list_8086_2932 NULL
+#define pci_ss_list_8086_2934 NULL
+#define pci_ss_list_8086_2935 NULL
+#define pci_ss_list_8086_2936 NULL
+#define pci_ss_list_8086_2937 NULL
+#define pci_ss_list_8086_2938 NULL
+#define pci_ss_list_8086_2939 NULL
+#define pci_ss_list_8086_293a NULL
+#define pci_ss_list_8086_293c NULL
+#define pci_ss_list_8086_293e NULL
+#define pci_ss_list_8086_2940 NULL
+#define pci_ss_list_8086_2942 NULL
+#define pci_ss_list_8086_2944 NULL
+#define pci_ss_list_8086_2946 NULL
+#define pci_ss_list_8086_2948 NULL
+#define pci_ss_list_8086_294a NULL
+#define pci_ss_list_8086_294c NULL
#define pci_ss_list_8086_2970 NULL
#define pci_ss_list_8086_2971 NULL
#define pci_ss_list_8086_2972 NULL
@@ -57615,6 +58642,37 @@ static const pciSubsystemInfo *pci_ss_li
#define pci_ss_list_8086_29a5 NULL
#define pci_ss_list_8086_29a6 NULL
#define pci_ss_list_8086_29a7 NULL
+#define pci_ss_list_8086_29b0 NULL
+#define pci_ss_list_8086_29b1 NULL
+#define pci_ss_list_8086_29b2 NULL
+#define pci_ss_list_8086_29b3 NULL
+#define pci_ss_list_8086_29b4 NULL
+#define pci_ss_list_8086_29b5 NULL
+#define pci_ss_list_8086_29b6 NULL
+#define pci_ss_list_8086_29b7 NULL
+#define pci_ss_list_8086_29c0 NULL
+#define pci_ss_list_8086_29c1 NULL
+#define pci_ss_list_8086_29c2 NULL
+#define pci_ss_list_8086_29c3 NULL
+#define pci_ss_list_8086_29c4 NULL
+#define pci_ss_list_8086_29c5 NULL
+#define pci_ss_list_8086_29c6 NULL
+#define pci_ss_list_8086_29c7 NULL
+#define pci_ss_list_8086_29cf NULL
+#define pci_ss_list_8086_29e0 NULL
+#define pci_ss_list_8086_29e1 NULL
+#define pci_ss_list_8086_29e4 NULL
+#define pci_ss_list_8086_29e5 NULL
+#define pci_ss_list_8086_29e6 NULL
+#define pci_ss_list_8086_29e7 NULL
+#define pci_ss_list_8086_29e9 NULL
+#define pci_ss_list_8086_29f0 NULL
+#define pci_ss_list_8086_29f1 NULL
+#define pci_ss_list_8086_29f4 NULL
+#define pci_ss_list_8086_29f5 NULL
+#define pci_ss_list_8086_29f6 NULL
+#define pci_ss_list_8086_29f7 NULL
+#define pci_ss_list_8086_29f9 NULL
#define pci_ss_list_8086_2a00 NULL
#define pci_ss_list_8086_2a01 NULL
#define pci_ss_list_8086_2a02 NULL
@@ -57748,7 +58806,44 @@ static const pciSubsystemInfo *pci_ss_li
#define pci_ss_list_8086_35b6 NULL
#define pci_ss_list_8086_35b7 NULL
#define pci_ss_list_8086_35c8 NULL
-#define pci_ss_list_8086_4220 NULL
+#define pci_ss_list_8086_3600 NULL
+#define pci_ss_list_8086_3604 NULL
+#define pci_ss_list_8086_3605 NULL
+#define pci_ss_list_8086_3606 NULL
+#define pci_ss_list_8086_3607 NULL
+#define pci_ss_list_8086_3608 NULL
+#define pci_ss_list_8086_3609 NULL
+#define pci_ss_list_8086_360a NULL
+#define pci_ss_list_8086_360b NULL
+#define pci_ss_list_8086_360c NULL
+#define pci_ss_list_8086_360d NULL
+#define pci_ss_list_8086_360e NULL
+#define pci_ss_list_8086_360f NULL
+#define pci_ss_list_8086_3610 NULL
+#define pci_ss_list_8086_4000 NULL
+#define pci_ss_list_8086_4008 NULL
+#define pci_ss_list_8086_4010 NULL
+#define pci_ss_list_8086_4021 NULL
+#define pci_ss_list_8086_4022 NULL
+#define pci_ss_list_8086_4023 NULL
+#define pci_ss_list_8086_4024 NULL
+#define pci_ss_list_8086_4025 NULL
+#define pci_ss_list_8086_4026 NULL
+#define pci_ss_list_8086_4027 NULL
+#define pci_ss_list_8086_4028 NULL
+#define pci_ss_list_8086_4029 NULL
+#define pci_ss_list_8086_402d NULL
+#define pci_ss_list_8086_402e NULL
+#define pci_ss_list_8086_402f NULL
+#define pci_ss_list_8086_4030 NULL
+#define pci_ss_list_8086_4032 NULL
+#define pci_ss_list_8086_4035 NULL
+#define pci_ss_list_8086_4036 NULL
+static const pciSubsystemInfo *pci_ss_list_8086_4220[] = {
+ &pci_ss_info_8086_4220_2731_8086,
+ &pci_ss_info_8086_4220_8086_2731,
+ NULL
+};
static const pciSubsystemInfo *pci_ss_list_8086_4222[] = {
&pci_ss_info_8086_4222_8086_1005,
&pci_ss_info_8086_4222_8086_1034,
@@ -57772,6 +58867,23 @@ static const pciSubsystemInfo *pci_ss_li
NULL
};
#define pci_ss_list_8086_530d NULL
+#define pci_ss_list_8086_65c0 NULL
+#define pci_ss_list_8086_65e2 NULL
+#define pci_ss_list_8086_65e3 NULL
+#define pci_ss_list_8086_65e4 NULL
+#define pci_ss_list_8086_65e5 NULL
+#define pci_ss_list_8086_65e6 NULL
+#define pci_ss_list_8086_65e7 NULL
+#define pci_ss_list_8086_65f0 NULL
+#define pci_ss_list_8086_65f1 NULL
+#define pci_ss_list_8086_65f3 NULL
+#define pci_ss_list_8086_65f5 NULL
+#define pci_ss_list_8086_65f6 NULL
+#define pci_ss_list_8086_65f7 NULL
+#define pci_ss_list_8086_65f8 NULL
+#define pci_ss_list_8086_65f9 NULL
+#define pci_ss_list_8086_65fa NULL
+#define pci_ss_list_8086_65ff NULL
#define pci_ss_list_8086_7000 NULL
#define pci_ss_list_8086_7010 NULL
#define pci_ss_list_8086_7020 NULL
@@ -57900,6 +59012,7 @@ static const pciSubsystemInfo *pci_ss_li
#define pci_ss_list_8086_9622 NULL
#define pci_ss_list_8086_9641 NULL
#define pci_ss_list_8086_96a1 NULL
+#define pci_ss_list_8086_a620 NULL
#define pci_ss_list_8086_b152 NULL
#define pci_ss_list_8086_b154 NULL
static const pciSubsystemInfo *pci_ss_list_8086_b555[] = {
@@ -58379,6 +59492,7 @@ static const pciSubsystemInfo *pci_ss_li
};
#endif
#define pci_ss_list_001a NULL
+#define pci_ss_list_001c NULL
#define pci_ss_list_0033 NULL
static const pciSubsystemInfo *pci_ss_list_003d[] = {
&pci_ss_info_003d_0008,
@@ -58456,6 +59570,7 @@ static const pciSubsystemInfo *pci_ss_li
NULL
};
#endif
+#define pci_ss_list_0403 NULL
#define pci_ss_list_0432 NULL
#define pci_ss_list_045e NULL
#define pci_ss_list_0482 NULL
@@ -58473,8 +59588,12 @@ static const pciSubsystemInfo *pci_ss_li
};
#endif
#define pci_ss_list_067b NULL
+#define pci_ss_list_069d NULL
#define pci_ss_list_0721 NULL
+#define pci_ss_list_07ca NULL
#define pci_ss_list_07e2 NULL
+#define pci_ss_list_0842 NULL
+#define pci_ss_list_08ff NULL
#ifdef VENDOR_INCLUDE_NONVIDEO
static const pciSubsystemInfo *pci_ss_list_0925[] = {
&pci_ss_info_0925_1234,
@@ -58484,6 +59603,7 @@ static const pciSubsystemInfo *pci_ss_li
#define pci_ss_list_093a NULL
#define pci_ss_list_09c1 NULL
#define pci_ss_list_0a89 NULL
+#define pci_ss_list_0ace NULL
#define pci_ss_list_0b0b NULL
#define pci_ss_list_0b49 NULL
#define pci_ss_list_0ccd NULL
@@ -58635,9 +59755,16 @@ static const pciSubsystemInfo *pci_ss_li
&pci_ss_info_1000_1003,
&pci_ss_info_1000_1004,
&pci_ss_info_1000_1005,
+ &pci_ss_info_1000_1006,
+ &pci_ss_info_1000_1008,
+ &pci_ss_info_1000_100a,
&pci_ss_info_1000_100c,
&pci_ss_info_1000_100d,
+ &pci_ss_info_1000_100e,
+ &pci_ss_info_1000_100f,
&pci_ss_info_1000_1010,
+ &pci_ss_info_1000_1011,
+ &pci_ss_info_1000_1012,
&pci_ss_info_1000_1020,
&pci_ss_info_1000_2004,
&pci_ss_info_1000_2005,
@@ -58705,6 +59832,8 @@ static const pciSubsystemInfo *pci_ss_li
&pci_ss_info_1002_2001,
&pci_ss_info_1002_2f72,
&pci_ss_info_1002_4336,
+ &pci_ss_info_1002_4379,
+ &pci_ss_info_1002_437a,
&pci_ss_info_1002_4722,
&pci_ss_info_1002_4723,
&pci_ss_info_1002_4742,
@@ -58728,6 +59857,7 @@ static const pciSubsystemInfo *pci_ss_li
&pci_ss_info_1002_5654,
&pci_ss_info_1002_5954,
&pci_ss_info_1002_5955,
+ &pci_ss_info_1002_5964,
&pci_ss_info_1002_5965,
&pci_ss_info_1002_5c63,
&pci_ss_info_1002_8001,
@@ -58897,6 +60027,9 @@ static const pciSubsystemInfo *pci_ss_li
&pci_ss_info_1014_02f2,
&pci_ss_info_1014_030d,
&pci_ss_info_1014_034d,
+ &pci_ss_info_1014_0363,
+ &pci_ss_info_1014_0364,
+ &pci_ss_info_1014_0365,
&pci_ss_info_1014_0502,
&pci_ss_info_1014_0503,
&pci_ss_info_1014_0506,
@@ -59047,6 +60180,9 @@ static const pciSubsystemInfo *pci_ss_li
&pci_ss_info_1028_0001,
&pci_ss_info_1028_0002,
&pci_ss_info_1028_0003,
+ &pci_ss_info_1028_0004,
+ &pci_ss_info_1028_0012,
+ &pci_ss_info_1028_0015,
&pci_ss_info_1028_002e,
&pci_ss_info_1028_0074,
&pci_ss_info_1028_0075,
@@ -59089,6 +60225,7 @@ static const pciSubsystemInfo *pci_ss_li
&pci_ss_info_1028_0109,
&pci_ss_info_1028_010a,
&pci_ss_info_1028_010e,
+ &pci_ss_info_1028_011b,
&pci_ss_info_1028_011c,
&pci_ss_info_1028_011d,
&pci_ss_info_1028_0121,
@@ -59098,6 +60235,7 @@ static const pciSubsystemInfo *pci_ss_li
&pci_ss_info_1028_0134,
&pci_ss_info_1028_0139,
&pci_ss_info_1028_013f,
+ &pci_ss_info_1028_0149,
&pci_ss_info_1028_014a,
&pci_ss_info_1028_014e,
&pci_ss_info_1028_0151,
@@ -59115,6 +60253,7 @@ static const pciSubsystemInfo *pci_ss_li
&pci_ss_info_1028_0183,
&pci_ss_info_1028_0187,
&pci_ss_info_1028_0188,
+ &pci_ss_info_1028_018d,
&pci_ss_info_1028_0196,
&pci_ss_info_1028_019a,
&pci_ss_info_1028_019d,
@@ -59135,10 +60274,14 @@ static const pciSubsystemInfo *pci_ss_li
&pci_ss_info_1028_1010,
&pci_ss_info_1028_1079,
&pci_ss_info_1028_1111,
+ &pci_ss_info_1028_1f01,
+ &pci_ss_info_1028_1f02,
+ &pci_ss_info_1028_1f03,
&pci_ss_info_1028_1f0a,
&pci_ss_info_1028_1f0b,
&pci_ss_info_1028_1f0c,
&pci_ss_info_1028_1f0d,
+ &pci_ss_info_1028_1f11,
&pci_ss_info_1028_4082,
&pci_ss_info_1028_4134,
&pci_ss_info_1028_8082,
@@ -59309,6 +60452,7 @@ static const pciSubsystemInfo *pci_ss_li
&pci_ss_info_1033_8110,
&pci_ss_info_1033_8112,
&pci_ss_info_1033_8287,
+ &pci_ss_info_1033_8336,
NULL
};
#define pci_ss_list_1034 NULL
@@ -59412,6 +60556,7 @@ static const pciSubsystemInfo *pci_ss_li
&pci_ss_info_103c_308a,
&pci_ss_info_103c_308b,
&pci_ss_info_103c_309f,
+ &pci_ss_info_103c_30a1,
&pci_ss_info_103c_3100,
&pci_ss_info_103c_3101,
&pci_ss_info_103c_3102,
@@ -59549,8 +60694,10 @@ static const pciSubsystemInfo *pci_ss_li
&pci_ss_info_1043_814a,
&pci_ss_info_1043_814e,
&pci_ss_info_1043_815a,
+ &pci_ss_info_1043_815b,
&pci_ss_info_1043_817b,
&pci_ss_info_1043_81a6,
+ &pci_ss_info_1043_824d,
&pci_ss_info_1043_c002,
&pci_ss_info_1043_c003,
&pci_ss_info_1043_c004,
@@ -59745,12 +60892,15 @@ static const pciSubsystemInfo *pci_ss_li
&pci_ss_info_105a_0275,
&pci_ss_info_105a_1275,
&pci_ss_info_105a_2168,
+ &pci_ss_info_105a_4600,
&pci_ss_info_105a_4d30,
&pci_ss_info_105a_4d33,
&pci_ss_info_105a_4d39,
&pci_ss_info_105a_4d68,
&pci_ss_info_105a_5168,
&pci_ss_info_105a_6269,
+ &pci_ss_info_105a_8601,
+ &pci_ss_info_105a_8602,
NULL
};
#endif
@@ -60850,6 +62000,7 @@ static const pciSubsystemInfo *pci_ss_li
#define pci_ss_list_116f NULL
#ifdef VENDOR_INCLUDE_NONVIDEO
static const pciSubsystemInfo *pci_ss_list_1170[] = {
+ &pci_ss_info_1170_002f,
&pci_ss_info_1170_3209,
NULL
};
@@ -61721,7 +62872,12 @@ static const pciSubsystemInfo *pci_ss_li
#define pci_ss_list_12fb NULL
#define pci_ss_list_12fc NULL
#define pci_ss_list_12fd NULL
-#define pci_ss_list_12fe NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_12fe[] = {
+ &pci_ss_info_12fe_0111,
+ NULL
+};
+#endif
#define pci_ss_list_12ff NULL
#define pci_ss_list_1300 NULL
#define pci_ss_list_1302 NULL
@@ -62536,6 +63692,7 @@ static const pciSubsystemInfo *pci_ss_li
&pci_ss_info_1462_052c,
&pci_ss_info_1462_058c,
&pci_ss_info_1462_0622,
+ &pci_ss_info_1462_0900,
&pci_ss_info_1462_1009,
&pci_ss_info_1462_207d,
&pci_ss_info_1462_3091,
@@ -62567,6 +63724,8 @@ static const pciSubsystemInfo *pci_ss_li
&pci_ss_info_1462_6930,
&pci_ss_info_1462_6990,
&pci_ss_info_1462_6991,
+ &pci_ss_info_1462_7010,
+ &pci_ss_info_1462_701d,
&pci_ss_info_1462_7020,
&pci_ss_info_1462_7028,
&pci_ss_info_1462_702c,
@@ -62805,7 +63964,12 @@ static const pciSubsystemInfo *pci_ss_li
#define pci_ss_list_14b1 NULL
#define pci_ss_list_14b2 NULL
#define pci_ss_list_14b3 NULL
-#define pci_ss_list_14b4 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_14b4[] = {
+ &pci_ss_info_14b4_d100,
+ NULL
+};
+#endif
#define pci_ss_list_14b5 NULL
#define pci_ss_list_14b6 NULL
#ifdef VENDOR_INCLUDE_NONVIDEO
@@ -62961,6 +64125,7 @@ static const pciSubsystemInfo *pci_ss_li
&pci_ss_info_14f1_2004,
&pci_ss_info_14f1_2045,
&pci_ss_info_14f1_5421,
+ &pci_ss_info_14f1_8800,
NULL
};
#endif
@@ -63660,6 +64825,8 @@ static const pciSubsystemInfo *pci_ss_li
&pci_ss_info_1734_106c,
&pci_ss_info_1734_1081,
&pci_ss_info_1734_10a3,
+ &pci_ss_info_1734_10ad,
+ &pci_ss_info_1734_10b8,
NULL
};
#endif
@@ -64322,6 +65489,7 @@ static const pciSubsystemInfo *pci_ss_li
&pci_ss_info_8086_0006,
&pci_ss_info_8086_0007,
&pci_ss_info_8086_0008,
+ &pci_ss_info_8086_0009,
&pci_ss_info_8086_000a,
&pci_ss_info_8086_000b,
&pci_ss_info_8086_000c,
@@ -64483,6 +65651,7 @@ static const pciSubsystemInfo *pci_ss_li
&pci_ss_info_8086_2527,
&pci_ss_info_8086_2581,
&pci_ss_info_8086_265c,
+ &pci_ss_info_8086_2731,
&pci_ss_info_8086_3000,
&pci_ss_info_8086_3001,
&pci_ss_info_8086_3002,
@@ -64498,6 +65667,7 @@ static const pciSubsystemInfo *pci_ss_li
&pci_ss_info_8086_3016,
&pci_ss_info_8086_3017,
&pci_ss_info_8086_3018,
+ &pci_ss_info_8086_301a,
&pci_ss_info_8086_301f,
&pci_ss_info_8086_3020,
&pci_ss_info_8086_302c,
@@ -64511,6 +65681,8 @@ static const pciSubsystemInfo *pci_ss_li
&pci_ss_info_8086_3431,
&pci_ss_info_8086_3439,
&pci_ss_info_8086_3499,
+ &pci_ss_info_8086_34cc,
+ &pci_ss_info_8086_34cd,
&pci_ss_info_8086_3500,
&pci_ss_info_8086_3501,
&pci_ss_info_8086_3504,
@@ -64535,6 +65707,7 @@ static const pciSubsystemInfo *pci_ss_li
&pci_ss_info_8086_5352,
&pci_ss_info_8086_544e,
&pci_ss_info_8086_5643,
+ &pci_ss_info_8086_5744,
&pci_ss_info_8086_5753,
&pci_ss_info_8086_8000,
&pci_ss_info_8086_8181,
@@ -64833,6 +66006,154 @@ static const pciSubsystemInfo *pci_ss_li
#endif /* INIT_VENDOR_SUBSYS_INFO */
#endif /* INIT_SUBSYS_INFO */
#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_001c_0001 = {
+ 0x0001, pci_device_001c_0001,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_001c_0001,
+#else
+ NULL,
+#endif
+ 0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_0070_0003 = {
+ 0x0003, pci_device_0070_0003,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_0070_0003,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_0070_0009 = {
+ 0x0009, pci_device_0070_0009,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_0070_0009,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_0070_0801 = {
+ 0x0801, pci_device_0070_0801,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_0070_0801,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_0070_0807 = {
+ 0x0807, pci_device_0070_0807,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_0070_0807,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_0070_4000 = {
+ 0x4000, pci_device_0070_4000,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_0070_4000,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_0070_4001 = {
+ 0x4001, pci_device_0070_4001,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_0070_4001,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_0070_4009 = {
+ 0x4009, pci_device_0070_4009,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_0070_4009,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_0070_4800 = {
+ 0x4800, pci_device_0070_4800,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_0070_4800,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_0070_4801 = {
+ 0x4801, pci_device_0070_4801,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_0070_4801,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_0070_4803 = {
+ 0x4803, pci_device_0070_4803,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_0070_4803,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_0070_8003 = {
+ 0x8003, pci_device_0070_8003,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_0070_8003,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_0070_8801 = {
+ 0x8801, pci_device_0070_8801,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_0070_8801,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_0070_c801 = {
+ 0xc801, pci_device_0070_c801,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_0070_c801,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_0070_e807 = {
+ 0xe807, pci_device_0070_e807,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_0070_e807,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_0070_e817 = {
+ 0xe817, pci_device_0070_e817,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_0070_e817,
+#else
+ NULL,
+#endif
+ 0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
static const pciDeviceInfo pci_dev_info_0095_0680 = {
0x0680, pci_device_0095_0680,
#ifdef INIT_SUBSYS_INFO
@@ -64968,6 +66289,15 @@ static const pciDeviceInfo pci_dev_info_
#endif
0
};
+static const pciDeviceInfo pci_dev_info_050d_705c = {
+ 0x705c, pci_device_050d_705c,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_050d_705c,
+#else
+ NULL,
+#endif
+ 0
+};
#endif
#ifdef VENDOR_INCLUDE_NONVIDEO
static const pciDeviceInfo pci_dev_info_05a9_8519 = {
@@ -65070,6 +66400,75 @@ static const pciDeviceInfo pci_dev_info_
};
#endif
#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_07ca_b808 = {
+ 0xb808, pci_device_07ca_b808,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_07ca_b808,
+#else
+ NULL,
+#endif
+ 0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_08ff_afe4 = {
+ 0xafe4, pci_device_08ff_afe4,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_08ff_afe4,
+#else
+ NULL,
+#endif
+ 0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_093a_010e = {
+ 0x010e, pci_device_093a_010e,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_093a_010e,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_093a_010f = {
+ 0x010f, pci_device_093a_010f,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_093a_010f,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_093a_2468 = {
+ 0x2468, pci_device_093a_2468,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_093a_2468,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_093a_2603 = {
+ 0x2603, pci_device_093a_2603,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_093a_2603,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_093a_2608 = {
+ 0x2608, pci_device_093a_2608,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_093a_2608,
+#else
+ NULL,
+#endif
+ 0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
static const pciDeviceInfo pci_dev_info_09c1_0704 = {
0x0704, pci_device_09c1_0704,
#ifdef INIT_SUBSYS_INFO
@@ -65081,6 +66480,17 @@ static const pciDeviceInfo pci_dev_info_
};
#endif
#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_0ace_1211 = {
+ 0x1211, pci_device_0ace_1211,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_0ace_1211,
+#else
+ NULL,
+#endif
+ 0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
static const pciDeviceInfo pci_dev_info_0b0b_0105 = {
0x0105, pci_device_0b0b_0105,
#ifdef INIT_SUBSYS_INFO
@@ -65099,6 +66509,15 @@ static const pciDeviceInfo pci_dev_info_
#endif
0
};
+static const pciDeviceInfo pci_dev_info_0b0b_0206 = {
+ 0x0206, pci_device_0b0b_0206,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_0b0b_0206,
+#else
+ NULL,
+#endif
+ 0
+};
static const pciDeviceInfo pci_dev_info_0b0b_0305 = {
0x0305, pci_device_0b0b_0305,
#ifdef INIT_SUBSYS_INFO
@@ -65117,6 +66536,15 @@ static const pciDeviceInfo pci_dev_info_
#endif
0
};
+static const pciDeviceInfo pci_dev_info_0b0b_0406 = {
+ 0x0406, pci_device_0b0b_0406,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_0b0b_0406,
+#else
+ NULL,
+#endif
+ 0
+};
static const pciDeviceInfo pci_dev_info_0b0b_0505 = {
0x0505, pci_device_0b0b_0505,
#ifdef INIT_SUBSYS_INFO
@@ -65153,6 +66581,42 @@ static const pciDeviceInfo pci_dev_info_
#endif
0
};
+static const pciDeviceInfo pci_dev_info_0b0b_0706 = {
+ 0x0706, pci_device_0b0b_0706,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_0b0b_0706,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_0b0b_0905 = {
+ 0x0905, pci_device_0b0b_0905,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_0b0b_0905,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_0b0b_0906 = {
+ 0x0906, pci_device_0b0b_0906,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_0b0b_0906,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_0b0b_0a06 = {
+ 0x0a06, pci_device_0b0b_0a06,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_0b0b_0a06,
+#else
+ NULL,
+#endif
+ 0
+};
#endif
#ifdef VENDOR_INCLUDE_NONVIDEO
static const pciDeviceInfo pci_dev_info_0b49_064f = {
@@ -66239,6 +67703,15 @@ static const pciDeviceInfo pci_dev_info_
#endif
0
};
+static const pciDeviceInfo pci_dev_info_1000_0055 = {
+ 0x0055, pci_device_1000_0055,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_1000_0055,
+#else
+ NULL,
+#endif
+ 0
+};
static const pciDeviceInfo pci_dev_info_1000_0056 = {
0x0056, pci_device_1000_0056,
#ifdef INIT_SUBSYS_INFO
@@ -69131,6 +70604,15 @@ static const pciDeviceInfo pci_dev_info_
#endif
0
};
+static const pciDeviceInfo pci_dev_info_1002_5952 = {
+ 0x5952, pci_device_1002_5952,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_1002_5952,
+#else
+ NULL,
+#endif
+ 0
+};
static const pciDeviceInfo pci_dev_info_1002_5954 = {
0x5954, pci_device_1002_5954,
#ifdef INIT_SUBSYS_INFO
@@ -69239,6 +70721,15 @@ static const pciDeviceInfo pci_dev_info_
#endif
0
};
+static const pciDeviceInfo pci_dev_info_1002_5a37 = {
+ 0x5a37, pci_device_1002_5a37,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_1002_5a37,
+#else
+ NULL,
+#endif
+ 0
+};
static const pciDeviceInfo pci_dev_info_1002_5a38 = {
0x5a38, pci_device_1002_5a38,
#ifdef INIT_SUBSYS_INFO
@@ -69761,6 +71252,15 @@ static const pciDeviceInfo pci_dev_info_
#endif
0
};
+static const pciDeviceInfo pci_dev_info_1002_7143 = {
+ 0x7143, pci_device_1002_7143,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_1002_7143,
+#else
+ NULL,
+#endif
+ 0
+};
static const pciDeviceInfo pci_dev_info_1002_7145 = {
0x7145, pci_device_1002_7145,
#ifdef INIT_SUBSYS_INFO
@@ -69779,6 +71279,15 @@ static const pciDeviceInfo pci_dev_info_
#endif
0
};
+static const pciDeviceInfo pci_dev_info_1002_7147 = {
+ 0x7147, pci_device_1002_7147,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_1002_7147,
+#else
+ NULL,
+#endif
+ 0
+};
static const pciDeviceInfo pci_dev_info_1002_7149 = {
0x7149, pci_device_1002_7149,
#ifdef INIT_SUBSYS_INFO
@@ -69842,6 +71351,15 @@ static const pciDeviceInfo pci_dev_info_
#endif
0
};
+static const pciDeviceInfo pci_dev_info_1002_7153 = {
+ 0x7153, pci_device_1002_7153,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_1002_7153,
+#else
+ NULL,
+#endif
+ 0
+};
static const pciDeviceInfo pci_dev_info_1002_715e = {
0x715e, pci_device_1002_715e,
#ifdef INIT_SUBSYS_INFO
@@ -69851,6 +71369,15 @@ static const pciDeviceInfo pci_dev_info_
#endif
0
};
+static const pciDeviceInfo pci_dev_info_1002_715f = {
+ 0x715f, pci_device_1002_715f,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_1002_715f,
+#else
+ NULL,
+#endif
+ 0
+};
static const pciDeviceInfo pci_dev_info_1002_7162 = {
0x7162, pci_device_1002_7162,
#ifdef INIT_SUBSYS_INFO
@@ -69878,6 +71405,15 @@ static const pciDeviceInfo pci_dev_info_
#endif
0
};
+static const pciDeviceInfo pci_dev_info_1002_7173 = {
+ 0x7173, pci_device_1002_7173,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_1002_7173,
+#else
+ NULL,
+#endif
+ 0
+};
static const pciDeviceInfo pci_dev_info_1002_7180 = {
0x7180, pci_device_1002_7180,
#ifdef INIT_SUBSYS_INFO
@@ -69896,6 +71432,87 @@ static const pciDeviceInfo pci_dev_info_
#endif
0
};
+static const pciDeviceInfo pci_dev_info_1002_7183 = {
+ 0x7183, pci_device_1002_7183,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_1002_7183,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_1002_7187 = {
+ 0x7187, pci_device_1002_7187,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_1002_7187,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_1002_7188 = {
+ 0x7188, pci_device_1002_7188,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_1002_7188,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_1002_718a = {
+ 0x718a, pci_device_1002_718a,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_1002_718a,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_1002_718c = {
+ 0x718c, pci_device_1002_718c,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_1002_718c,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_1002_718d = {
+ 0x718d, pci_device_1002_718d,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_1002_718d,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_1002_7193 = {
+ 0x7193, pci_device_1002_7193,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_1002_7193,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_1002_719b = {
+ 0x719b, pci_device_1002_719b,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_1002_719b,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_1002_719f = {
+ 0x719f, pci_device_1002_719f,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_1002_719f,
+#else
+ NULL,
+#endif
+ 0
+};
static const pciDeviceInfo pci_dev_info_1002_71a0 = {
0x71a0, pci_device_1002_71a0,
#ifdef INIT_SUBSYS_INFO
@@ -69914,6 +71531,33 @@ static const pciDeviceInfo pci_dev_info_
#endif
0
};
+static const pciDeviceInfo pci_dev_info_1002_71a3 = {
+ 0x71a3, pci_device_1002_71a3,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_1002_71a3,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_1002_71a7 = {
+ 0x71a7, pci_device_1002_71a7,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_1002_71a7,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_1002_71bb = {
+ 0x71bb, pci_device_1002_71bb,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_1002_71bb,
+#else
+ NULL,
+#endif
+ 0
+};
static const pciDeviceInfo pci_dev_info_1002_71c0 = {
0x71c0, pci_device_1002_71c0,
#ifdef INIT_SUBSYS_INFO
@@ -69959,6 +71603,15 @@ static const pciDeviceInfo pci_dev_info_
#endif
0
};
+static const pciDeviceInfo pci_dev_info_1002_71c7 = {
+ 0x71c7, pci_device_1002_71c7,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_1002_71c7,
+#else
+ NULL,
+#endif
+ 0
+};
static const pciDeviceInfo pci_dev_info_1002_71ce = {
0x71ce, pci_device_1002_71ce,
#ifdef INIT_SUBSYS_INFO
@@ -70013,6 +71666,33 @@ static const pciDeviceInfo pci_dev_info_
#endif
0
};
+static const pciDeviceInfo pci_dev_info_1002_71e7 = {
+ 0x71e7, pci_device_1002_71e7,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_1002_71e7,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_1002_7210 = {
+ 0x7210, pci_device_1002_7210,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_1002_7210,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_1002_7211 = {
+ 0x7211, pci_device_1002_7211,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_1002_7211,
+#else
+ NULL,
+#endif
+ 0
+};
static const pciDeviceInfo pci_dev_info_1002_7240 = {
0x7240, pci_device_1002_7240,
#ifdef INIT_SUBSYS_INFO
@@ -70157,6 +71837,15 @@ static const pciDeviceInfo pci_dev_info_
#endif
0
};
+static const pciDeviceInfo pci_dev_info_1002_726b = {
+ 0x726b, pci_device_1002_726b,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_1002_726b,
+#else
+ NULL,
+#endif
+ 0
+};
static const pciDeviceInfo pci_dev_info_1002_726e = {
0x726e, pci_device_1002_726e,
#ifdef INIT_SUBSYS_INFO
@@ -70166,6 +71855,78 @@ static const pciDeviceInfo pci_dev_info_
#endif
0
};
+static const pciDeviceInfo pci_dev_info_1002_7280 = {
+ 0x7280, pci_device_1002_7280,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_1002_7280,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_1002_7288 = {
+ 0x7288, pci_device_1002_7288,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_1002_7288,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_1002_7291 = {
+ 0x7291, pci_device_1002_7291,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_1002_7291,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_1002_7293 = {
+ 0x7293, pci_device_1002_7293,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_1002_7293,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_1002_72a0 = {
+ 0x72a0, pci_device_1002_72a0,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_1002_72a0,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_1002_72a8 = {
+ 0x72a8, pci_device_1002_72a8,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_1002_72a8,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_1002_72b1 = {
+ 0x72b1, pci_device_1002_72b1,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_1002_72b1,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_1002_72b3 = {
+ 0x72b3, pci_device_1002_72b3,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_1002_72b3,
+#else
+ NULL,
+#endif
+ 0
+};
static const pciDeviceInfo pci_dev_info_1002_7833 = {
0x7833, pci_device_1002_7833,
#ifdef INIT_SUBSYS_INFO
@@ -70202,6 +71963,33 @@ static const pciDeviceInfo pci_dev_info_
#endif
0
};
+static const pciDeviceInfo pci_dev_info_1002_791e = {
+ 0x791e, pci_device_1002_791e,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_1002_791e,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_1002_791f = {
+ 0x791f, pci_device_1002_791f,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_1002_791f,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_1002_793f = {
+ 0x793f, pci_device_1002_793f,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_1002_793f,
+#else
+ NULL,
+#endif
+ 0
+};
static const pciDeviceInfo pci_dev_info_1002_7c37 = {
0x7c37, pci_device_1002_7c37,
#ifdef INIT_SUBSYS_INFO
@@ -72376,6 +74164,15 @@ static const pciDeviceInfo pci_dev_info_
#endif
0
};
+static const pciDeviceInfo pci_dev_info_1022_2080 = {
+ 0x2080, pci_device_1022_2080,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_1022_2080,
+#else
+ NULL,
+#endif
+ 0
+};
static const pciDeviceInfo pci_dev_info_1022_2081 = {
0x2081, pci_device_1022_2081,
#ifdef INIT_SUBSYS_INFO
@@ -73780,6 +75577,15 @@ static const pciDeviceInfo pci_dev_info_
#endif
0
};
+static const pciDeviceInfo pci_dev_info_1028_0004 = {
+ 0x0004, pci_device_1028_0004,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_1028_0004,
+#else
+ NULL,
+#endif
+ 0
+};
static const pciDeviceInfo pci_dev_info_1028_0006 = {
0x0006, pci_device_1028_0006,
#ifdef INIT_SUBSYS_INFO
@@ -73915,6 +75721,15 @@ static const pciDeviceInfo pci_dev_info_
#endif
0
};
+static const pciDeviceInfo pci_dev_info_1028_1f03 = {
+ 0x1f03, pci_device_1028_1f03,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_1028_1f03,
+#else
+ NULL,
+#endif
+ 0
+};
#ifdef VENDOR_INCLUDE_NONVIDEO
static const pciDeviceInfo pci_dev_info_102a_0000 = {
0x0000, pci_device_102a_0000,
@@ -74361,6 +76176,15 @@ static const pciDeviceInfo pci_dev_info_
#endif
0
};
+static const pciDeviceInfo pci_dev_info_102f_0032 = {
+ 0x0032, pci_device_102f_0032,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_102f_0032,
+#else
+ NULL,
+#endif
+ 0
+};
static const pciDeviceInfo pci_dev_info_102f_0105 = {
0x0105, pci_device_102f_0105,
#ifdef INIT_SUBSYS_INFO
@@ -76065,6 +77889,24 @@ static const pciDeviceInfo pci_dev_info_
#endif
0
};
+static const pciDeviceInfo pci_dev_info_103c_1302 = {
+ 0x1302, pci_device_103c_1302,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_103c_1302,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_103c_1303 = {
+ 0x1303, pci_device_103c_1303,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_103c_1303,
+#else
+ NULL,
+#endif
+ 0
+};
static const pciDeviceInfo pci_dev_info_103c_2910 = {
0x2910, pci_device_103c_2910,
#ifdef INIT_SUBSYS_INFO
@@ -76101,6 +77943,15 @@ static const pciDeviceInfo pci_dev_info_
#endif
0
};
+static const pciDeviceInfo pci_dev_info_103c_30b5 = {
+ 0x30b5, pci_device_103c_30b5,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_103c_30b5,
+#else
+ NULL,
+#endif
+ 0
+};
static const pciDeviceInfo pci_dev_info_103c_3220 = {
0x3220, pci_device_103c_3220,
#ifdef INIT_SUBSYS_INFO
@@ -76338,6 +78189,15 @@ static const pciDeviceInfo pci_dev_info_
#endif
0
};
+static const pciDeviceInfo pci_dev_info_1043_8168 = {
+ 0x8168, pci_device_1043_8168,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_1043_8168,
+#else
+ NULL,
+#endif
+ 0
+};
static const pciDeviceInfo pci_dev_info_1043_8187 = {
0x8187, pci_device_1043_8187,
#ifdef INIT_SUBSYS_INFO
@@ -76356,6 +78216,15 @@ static const pciDeviceInfo pci_dev_info_
#endif
0
};
+static const pciDeviceInfo pci_dev_info_1043_81f4 = {
+ 0x81f4, pci_device_1043_81f4,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_1043_81f4,
+#else
+ NULL,
+#endif
+ 0
+};
#endif
#ifdef VENDOR_INCLUDE_NONVIDEO
static const pciDeviceInfo pci_dev_info_1044_1012 = {
@@ -77953,6 +79822,15 @@ static const pciDeviceInfo pci_dev_info_
#endif
0
};
+static const pciDeviceInfo pci_dev_info_1057_3052 = {
+ 0x3052, pci_device_1057_3052,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_1057_3052,
+#else
+ NULL,
+#endif
+ 0
+};
static const pciDeviceInfo pci_dev_info_1057_3055 = {
0x3055, pci_device_1057_3055,
#ifdef INIT_SUBSYS_INFO
@@ -78422,6 +80300,15 @@ static const pciDeviceInfo pci_dev_info_
#endif
0
};
+static const pciDeviceInfo pci_dev_info_105a_8650 = {
+ 0x8650, pci_device_105a_8650,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_105a_8650,
+#else
+ NULL,
+#endif
+ 0
+};
static const pciDeviceInfo pci_dev_info_105a_c350 = {
0xc350, pci_device_105a_c350,
#ifdef INIT_SUBSYS_INFO
@@ -78431,6 +80318,15 @@ static const pciDeviceInfo pci_dev_info_
#endif
0
};
+static const pciDeviceInfo pci_dev_info_105a_e350 = {
+ 0xe350, pci_device_105a_e350,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_105a_e350,
+#else
+ NULL,
+#endif
+ 0
+};
#endif
static const pciDeviceInfo pci_dev_info_105d_2309 = {
0x2309, pci_device_105d_2309,
@@ -79610,6 +81506,15 @@ static const pciDeviceInfo pci_dev_info_
#endif
0
};
+static const pciDeviceInfo pci_dev_info_1073_1000 = {
+ 0x1000, pci_device_1073_1000,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_1073_1000,
+#else
+ NULL,
+#endif
+ 0
+};
static const pciDeviceInfo pci_dev_info_1073_2000 = {
0x2000, pci_device_1073_2000,
#ifdef INIT_SUBSYS_INFO
@@ -81714,6 +83619,24 @@ static const pciDeviceInfo pci_dev_info_
#endif
0
};
+static const pciDeviceInfo pci_dev_info_10a9_8010 = {
+ 0x8010, pci_device_10a9_8010,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_10a9_8010,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_10a9_8018 = {
+ 0x8018, pci_device_10a9_8018,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_10a9_8018,
+#else
+ NULL,
+#endif
+ 0
+};
#endif
#ifdef VENDOR_INCLUDE_NONVIDEO
static const pciDeviceInfo pci_dev_info_10aa_0000 = {
@@ -95105,6 +97028,15 @@ static const pciDeviceInfo pci_dev_info_
#endif
0
};
+static const pciDeviceInfo pci_dev_info_1166_0144 = {
+ 0x0144, pci_device_1166_0144,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_1166_0144,
+#else
+ NULL,
+#endif
+ 0
+};
static const pciDeviceInfo pci_dev_info_1166_0200 = {
0x0200, pci_device_1166_0200,
#ifdef INIT_SUBSYS_INFO
@@ -115950,6 +117882,258 @@ static const pciDeviceInfo pci_dev_info_
#endif
0
};
+static const pciDeviceInfo pci_dev_info_8086_2910 = {
+ 0x2910, pci_device_8086_2910,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_2910,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_2920 = {
+ 0x2920, pci_device_8086_2920,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_2920,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_2921 = {
+ 0x2921, pci_device_8086_2921,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_2921,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_2922 = {
+ 0x2922, pci_device_8086_2922,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_2922,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_2923 = {
+ 0x2923, pci_device_8086_2923,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_2923,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_2925 = {
+ 0x2925, pci_device_8086_2925,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_2925,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_2926 = {
+ 0x2926, pci_device_8086_2926,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_2926,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_2928 = {
+ 0x2928, pci_device_8086_2928,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_2928,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_292d = {
+ 0x292d, pci_device_8086_292d,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_292d,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_292e = {
+ 0x292e, pci_device_8086_292e,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_292e,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_2930 = {
+ 0x2930, pci_device_8086_2930,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_2930,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_2932 = {
+ 0x2932, pci_device_8086_2932,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_2932,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_2934 = {
+ 0x2934, pci_device_8086_2934,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_2934,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_2935 = {
+ 0x2935, pci_device_8086_2935,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_2935,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_2936 = {
+ 0x2936, pci_device_8086_2936,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_2936,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_2937 = {
+ 0x2937, pci_device_8086_2937,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_2937,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_2938 = {
+ 0x2938, pci_device_8086_2938,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_2938,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_2939 = {
+ 0x2939, pci_device_8086_2939,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_2939,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_293a = {
+ 0x293a, pci_device_8086_293a,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_293a,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_293c = {
+ 0x293c, pci_device_8086_293c,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_293c,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_293e = {
+ 0x293e, pci_device_8086_293e,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_293e,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_2940 = {
+ 0x2940, pci_device_8086_2940,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_2940,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_2942 = {
+ 0x2942, pci_device_8086_2942,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_2942,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_2944 = {
+ 0x2944, pci_device_8086_2944,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_2944,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_2946 = {
+ 0x2946, pci_device_8086_2946,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_2946,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_2948 = {
+ 0x2948, pci_device_8086_2948,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_2948,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_294a = {
+ 0x294a, pci_device_8086_294a,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_294a,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_294c = {
+ 0x294c, pci_device_8086_294c,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_294c,
+#else
+ NULL,
+#endif
+ 0
+};
static const pciDeviceInfo pci_dev_info_8086_2970 = {
0x2970, pci_device_8086_2970,
#ifdef INIT_SUBSYS_INFO
@@ -116193,6 +118377,285 @@ static const pciDeviceInfo pci_dev_info_
#endif
0
};
+static const pciDeviceInfo pci_dev_info_8086_29b0 = {
+ 0x29b0, pci_device_8086_29b0,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_29b0,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_29b1 = {
+ 0x29b1, pci_device_8086_29b1,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_29b1,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_29b2 = {
+ 0x29b2, pci_device_8086_29b2,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_29b2,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_29b3 = {
+ 0x29b3, pci_device_8086_29b3,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_29b3,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_29b4 = {
+ 0x29b4, pci_device_8086_29b4,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_29b4,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_29b5 = {
+ 0x29b5, pci_device_8086_29b5,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_29b5,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_29b6 = {
+ 0x29b6, pci_device_8086_29b6,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_29b6,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_29b7 = {
+ 0x29b7, pci_device_8086_29b7,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_29b7,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_29c0 = {
+ 0x29c0, pci_device_8086_29c0,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_29c0,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_29c1 = {
+ 0x29c1, pci_device_8086_29c1,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_29c1,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_29c2 = {
+ 0x29c2, pci_device_8086_29c2,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_29c2,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_29c3 = {
+ 0x29c3, pci_device_8086_29c3,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_29c3,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_29c4 = {
+ 0x29c4, pci_device_8086_29c4,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_29c4,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_29c5 = {
+ 0x29c5, pci_device_8086_29c5,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_29c5,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_29c6 = {
+ 0x29c6, pci_device_8086_29c6,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_29c6,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_29c7 = {
+ 0x29c7, pci_device_8086_29c7,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_29c7,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_29cf = {
+ 0x29cf, pci_device_8086_29cf,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_29cf,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_29e0 = {
+ 0x29e0, pci_device_8086_29e0,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_29e0,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_29e1 = {
+ 0x29e1, pci_device_8086_29e1,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_29e1,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_29e4 = {
+ 0x29e4, pci_device_8086_29e4,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_29e4,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_29e5 = {
+ 0x29e5, pci_device_8086_29e5,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_29e5,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_29e6 = {
+ 0x29e6, pci_device_8086_29e6,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_29e6,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_29e7 = {
+ 0x29e7, pci_device_8086_29e7,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_29e7,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_29e9 = {
+ 0x29e9, pci_device_8086_29e9,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_29e9,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_29f0 = {
+ 0x29f0, pci_device_8086_29f0,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_29f0,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_29f1 = {
+ 0x29f1, pci_device_8086_29f1,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_29f1,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_29f4 = {
+ 0x29f4, pci_device_8086_29f4,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_29f4,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_29f5 = {
+ 0x29f5, pci_device_8086_29f5,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_29f5,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_29f6 = {
+ 0x29f6, pci_device_8086_29f6,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_29f6,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_29f7 = {
+ 0x29f7, pci_device_8086_29f7,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_29f7,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_29f9 = {
+ 0x29f9, pci_device_8086_29f9,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_29f9,
+#else
+ NULL,
+#endif
+ 0
+};
static const pciDeviceInfo pci_dev_info_8086_2a00 = {
0x2a00, pci_device_8086_2a00,
#ifdef INIT_SUBSYS_INFO
@@ -116661,6 +119124,303 @@ static const pciDeviceInfo pci_dev_info_
#endif
0
};
+static const pciDeviceInfo pci_dev_info_8086_3600 = {
+ 0x3600, pci_device_8086_3600,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_3600,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_3604 = {
+ 0x3604, pci_device_8086_3604,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_3604,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_3605 = {
+ 0x3605, pci_device_8086_3605,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_3605,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_3606 = {
+ 0x3606, pci_device_8086_3606,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_3606,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_3607 = {
+ 0x3607, pci_device_8086_3607,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_3607,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_3608 = {
+ 0x3608, pci_device_8086_3608,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_3608,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_3609 = {
+ 0x3609, pci_device_8086_3609,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_3609,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_360a = {
+ 0x360a, pci_device_8086_360a,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_360a,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_360b = {
+ 0x360b, pci_device_8086_360b,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_360b,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_360c = {
+ 0x360c, pci_device_8086_360c,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_360c,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_360d = {
+ 0x360d, pci_device_8086_360d,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_360d,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_360e = {
+ 0x360e, pci_device_8086_360e,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_360e,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_360f = {
+ 0x360f, pci_device_8086_360f,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_360f,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_3610 = {
+ 0x3610, pci_device_8086_3610,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_3610,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_4000 = {
+ 0x4000, pci_device_8086_4000,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_4000,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_4008 = {
+ 0x4008, pci_device_8086_4008,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_4008,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_4010 = {
+ 0x4010, pci_device_8086_4010,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_4010,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_4021 = {
+ 0x4021, pci_device_8086_4021,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_4021,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_4022 = {
+ 0x4022, pci_device_8086_4022,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_4022,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_4023 = {
+ 0x4023, pci_device_8086_4023,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_4023,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_4024 = {
+ 0x4024, pci_device_8086_4024,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_4024,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_4025 = {
+ 0x4025, pci_device_8086_4025,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_4025,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_4026 = {
+ 0x4026, pci_device_8086_4026,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_4026,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_4027 = {
+ 0x4027, pci_device_8086_4027,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_4027,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_4028 = {
+ 0x4028, pci_device_8086_4028,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_4028,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_4029 = {
+ 0x4029, pci_device_8086_4029,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_4029,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_402d = {
+ 0x402d, pci_device_8086_402d,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_402d,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_402e = {
+ 0x402e, pci_device_8086_402e,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_402e,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_402f = {
+ 0x402f, pci_device_8086_402f,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_402f,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_4030 = {
+ 0x4030, pci_device_8086_4030,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_4030,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_4032 = {
+ 0x4032, pci_device_8086_4032,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_4032,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_4035 = {
+ 0x4035, pci_device_8086_4035,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_4035,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_4036 = {
+ 0x4036, pci_device_8086_4036,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_4036,
+#else
+ NULL,
+#endif
+ 0
+};
static const pciDeviceInfo pci_dev_info_8086_4220 = {
0x4220, pci_device_8086_4220,
#ifdef INIT_SUBSYS_INFO
@@ -116742,6 +119502,159 @@ static const pciDeviceInfo pci_dev_info_
#endif
0
};
+static const pciDeviceInfo pci_dev_info_8086_65c0 = {
+ 0x65c0, pci_device_8086_65c0,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_65c0,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_65e2 = {
+ 0x65e2, pci_device_8086_65e2,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_65e2,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_65e3 = {
+ 0x65e3, pci_device_8086_65e3,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_65e3,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_65e4 = {
+ 0x65e4, pci_device_8086_65e4,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_65e4,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_65e5 = {
+ 0x65e5, pci_device_8086_65e5,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_65e5,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_65e6 = {
+ 0x65e6, pci_device_8086_65e6,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_65e6,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_65e7 = {
+ 0x65e7, pci_device_8086_65e7,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_65e7,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_65f0 = {
+ 0x65f0, pci_device_8086_65f0,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_65f0,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_65f1 = {
+ 0x65f1, pci_device_8086_65f1,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_65f1,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_65f3 = {
+ 0x65f3, pci_device_8086_65f3,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_65f3,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_65f5 = {
+ 0x65f5, pci_device_8086_65f5,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_65f5,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_65f6 = {
+ 0x65f6, pci_device_8086_65f6,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_65f6,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_65f7 = {
+ 0x65f7, pci_device_8086_65f7,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_65f7,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_65f8 = {
+ 0x65f8, pci_device_8086_65f8,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_65f8,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_65f9 = {
+ 0x65f9, pci_device_8086_65f9,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_65f9,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_65fa = {
+ 0x65fa, pci_device_8086_65fa,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_65fa,
+#else
+ NULL,
+#endif
+ 0
+};
+static const pciDeviceInfo pci_dev_info_8086_65ff = {
+ 0x65ff, pci_device_8086_65ff,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_65ff,
+#else
+ NULL,
+#endif
+ 0
+};
static const pciDeviceInfo pci_dev_info_8086_7000 = {
0x7000, pci_device_8086_7000,
#ifdef INIT_SUBSYS_INFO
@@ -117282,6 +120195,15 @@ static const pciDeviceInfo pci_dev_info_
#endif
0
};
+static const pciDeviceInfo pci_dev_info_8086_a620 = {
+ 0xa620, pci_device_8086_a620,
+#ifdef INIT_SUBSYS_INFO
+ pci_ss_list_8086_a620,
+#else
+ NULL,
+#endif
+ 0
+};
static const pciDeviceInfo pci_dev_info_8086_b152 = {
0xb152, pci_device_8086_b152,
#ifdef INIT_SUBSYS_INFO
@@ -119389,10 +122311,35 @@ static const pciDeviceInfo pci_dev_info_
#endif
#define pci_dev_list_0000 NULL
#define pci_dev_list_001a NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_001c[] = {
+ &pci_dev_info_001c_0001,
+ NULL
+};
+#endif
#define pci_dev_list_0033 NULL
#define pci_dev_list_003d NULL
#define pci_dev_list_0059 NULL
-#define pci_dev_list_0070 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_0070[] = {
+ &pci_dev_info_0070_0003,
+ &pci_dev_info_0070_0009,
+ &pci_dev_info_0070_0801,
+ &pci_dev_info_0070_0807,
+ &pci_dev_info_0070_4000,
+ &pci_dev_info_0070_4001,
+ &pci_dev_info_0070_4009,
+ &pci_dev_info_0070_4800,
+ &pci_dev_info_0070_4801,
+ &pci_dev_info_0070_4803,
+ &pci_dev_info_0070_8003,
+ &pci_dev_info_0070_8801,
+ &pci_dev_info_0070_c801,
+ &pci_dev_info_0070_e807,
+ &pci_dev_info_0070_e817,
+ NULL
+};
+#endif
#define pci_dev_list_0071 NULL
#ifdef VENDOR_INCLUDE_NONVIDEO
static const pciDeviceInfo *pci_dev_list_0095[] = {
@@ -119436,6 +122383,7 @@ static const pciDeviceInfo *pci_dev_list
NULL
};
#endif
+#define pci_dev_list_0403 NULL
#ifdef VENDOR_INCLUDE_NONVIDEO
static const pciDeviceInfo *pci_dev_list_0432[] = {
&pci_dev_info_0432_0001,
@@ -119461,6 +122409,7 @@ static const pciDeviceInfo *pci_dev_list
&pci_dev_info_050d_001a,
&pci_dev_info_050d_0109,
&pci_dev_info_050d_7050,
+ &pci_dev_info_050d_705c,
NULL
};
#endif
@@ -119499,10 +122448,33 @@ static const pciDeviceInfo *pci_dev_list
NULL
};
#endif
+#define pci_dev_list_069d NULL
#define pci_dev_list_0721 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_07ca[] = {
+ &pci_dev_info_07ca_b808,
+ NULL
+};
+#endif
#define pci_dev_list_07e2 NULL
+#define pci_dev_list_0842 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_08ff[] = {
+ &pci_dev_info_08ff_afe4,
+ NULL
+};
+#endif
#define pci_dev_list_0925 NULL
-#define pci_dev_list_093a NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_093a[] = {
+ &pci_dev_info_093a_010e,
+ &pci_dev_info_093a_010f,
+ &pci_dev_info_093a_2468,
+ &pci_dev_info_093a_2603,
+ &pci_dev_info_093a_2608,
+ NULL
+};
+#endif
#ifdef VENDOR_INCLUDE_NONVIDEO
static const pciDeviceInfo *pci_dev_list_09c1[] = {
&pci_dev_info_09c1_0704,
@@ -119511,15 +122483,27 @@ static const pciDeviceInfo *pci_dev_list
#endif
#define pci_dev_list_0a89 NULL
#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_0ace[] = {
+ &pci_dev_info_0ace_1211,
+ NULL
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
static const pciDeviceInfo *pci_dev_list_0b0b[] = {
&pci_dev_info_0b0b_0105,
&pci_dev_info_0b0b_0205,
+ &pci_dev_info_0b0b_0206,
&pci_dev_info_0b0b_0305,
&pci_dev_info_0b0b_0405,
+ &pci_dev_info_0b0b_0406,
&pci_dev_info_0b0b_0505,
&pci_dev_info_0b0b_0506,
&pci_dev_info_0b0b_0605,
&pci_dev_info_0b0b_0705,
+ &pci_dev_info_0b0b_0706,
+ &pci_dev_info_0b0b_0905,
+ &pci_dev_info_0b0b_0906,
+ &pci_dev_info_0b0b_0a06,
NULL
};
#endif
@@ -119661,6 +122645,7 @@ static const pciDeviceInfo *pci_dev_list
&pci_dev_info_1000_0041,
&pci_dev_info_1000_0050,
&pci_dev_info_1000_0054,
+ &pci_dev_info_1000_0055,
&pci_dev_info_1000_0056,
&pci_dev_info_1000_0058,
&pci_dev_info_1000_005a,
@@ -119991,6 +122976,7 @@ static const pciDeviceInfo *pci_dev_list
&pci_dev_info_1002_5944,
&pci_dev_info_1002_5950,
&pci_dev_info_1002_5951,
+ &pci_dev_info_1002_5952,
&pci_dev_info_1002_5954,
&pci_dev_info_1002_5955,
&pci_dev_info_1002_5960,
@@ -120003,6 +122989,7 @@ static const pciDeviceInfo *pci_dev_list
&pci_dev_info_1002_5a33,
&pci_dev_info_1002_5a34,
&pci_dev_info_1002_5a36,
+ &pci_dev_info_1002_5a37,
&pci_dev_info_1002_5a38,
&pci_dev_info_1002_5a39,
&pci_dev_info_1002_5a3f,
@@ -120061,8 +123048,10 @@ static const pciDeviceInfo *pci_dev_list
&pci_dev_info_1002_7129,
&pci_dev_info_1002_7140,
&pci_dev_info_1002_7142,
+ &pci_dev_info_1002_7143,
&pci_dev_info_1002_7145,
&pci_dev_info_1002_7146,
+ &pci_dev_info_1002_7147,
&pci_dev_info_1002_7149,
&pci_dev_info_1002_714a,
&pci_dev_info_1002_714b,
@@ -120070,25 +123059,44 @@ static const pciDeviceInfo *pci_dev_list
&pci_dev_info_1002_714d,
&pci_dev_info_1002_714e,
&pci_dev_info_1002_7152,
+ &pci_dev_info_1002_7153,
&pci_dev_info_1002_715e,
+ &pci_dev_info_1002_715f,
&pci_dev_info_1002_7162,
&pci_dev_info_1002_7166,
&pci_dev_info_1002_7172,
+ &pci_dev_info_1002_7173,
&pci_dev_info_1002_7180,
&pci_dev_info_1002_7181,
+ &pci_dev_info_1002_7183,
+ &pci_dev_info_1002_7187,
+ &pci_dev_info_1002_7188,
+ &pci_dev_info_1002_718a,
+ &pci_dev_info_1002_718c,
+ &pci_dev_info_1002_718d,
+ &pci_dev_info_1002_7193,
+ &pci_dev_info_1002_719b,
+ &pci_dev_info_1002_719f,
&pci_dev_info_1002_71a0,
&pci_dev_info_1002_71a1,
+ &pci_dev_info_1002_71a3,
+ &pci_dev_info_1002_71a7,
+ &pci_dev_info_1002_71bb,
&pci_dev_info_1002_71c0,
&pci_dev_info_1002_71c2,
&pci_dev_info_1002_71c4,
&pci_dev_info_1002_71c5,
&pci_dev_info_1002_71c6,
+ &pci_dev_info_1002_71c7,
&pci_dev_info_1002_71ce,
&pci_dev_info_1002_71d5,
&pci_dev_info_1002_71d6,
&pci_dev_info_1002_71de,
&pci_dev_info_1002_71e0,
&pci_dev_info_1002_71e2,
+ &pci_dev_info_1002_71e7,
+ &pci_dev_info_1002_7210,
+ &pci_dev_info_1002_7211,
&pci_dev_info_1002_7240,
&pci_dev_info_1002_7241,
&pci_dev_info_1002_7242,
@@ -120105,11 +123113,23 @@ static const pciDeviceInfo *pci_dev_list
&pci_dev_info_1002_724d,
&pci_dev_info_1002_724e,
&pci_dev_info_1002_7269,
+ &pci_dev_info_1002_726b,
&pci_dev_info_1002_726e,
+ &pci_dev_info_1002_7280,
+ &pci_dev_info_1002_7288,
+ &pci_dev_info_1002_7291,
+ &pci_dev_info_1002_7293,
+ &pci_dev_info_1002_72a0,
+ &pci_dev_info_1002_72a8,
+ &pci_dev_info_1002_72b1,
+ &pci_dev_info_1002_72b3,
&pci_dev_info_1002_7833,
&pci_dev_info_1002_7834,
&pci_dev_info_1002_7835,
&pci_dev_info_1002_7838,
+ &pci_dev_info_1002_791e,
+ &pci_dev_info_1002_791f,
+ &pci_dev_info_1002_793f,
&pci_dev_info_1002_7c37,
&pci_dev_info_1002_cab0,
&pci_dev_info_1002_cab2,
@@ -120421,6 +123441,7 @@ static const pciDeviceInfo *pci_dev_list
&pci_dev_info_1022_2003,
&pci_dev_info_1022_2020,
&pci_dev_info_1022_2040,
+ &pci_dev_info_1022_2080,
&pci_dev_info_1022_2081,
&pci_dev_info_1022_2082,
&pci_dev_info_1022_208f,
@@ -120587,6 +123608,7 @@ static const pciDeviceInfo *pci_dev_list
&pci_dev_info_1028_0001,
&pci_dev_info_1028_0002,
&pci_dev_info_1028_0003,
+ &pci_dev_info_1028_0004,
&pci_dev_info_1028_0006,
&pci_dev_info_1028_0007,
&pci_dev_info_1028_0008,
@@ -120602,6 +123624,7 @@ static const pciDeviceInfo *pci_dev_list
&pci_dev_info_1028_0013,
&pci_dev_info_1028_0014,
&pci_dev_info_1028_0015,
+ &pci_dev_info_1028_1f03,
NULL
};
#define pci_dev_list_1029 NULL
@@ -120673,6 +123696,7 @@ static const pciDeviceInfo *pci_dev_list
&pci_dev_info_102f_0020,
&pci_dev_info_102f_0030,
&pci_dev_info_102f_0031,
+ &pci_dev_info_102f_0032,
&pci_dev_info_102f_0105,
&pci_dev_info_102f_0106,
&pci_dev_info_102f_0107,
@@ -120888,10 +123912,13 @@ static const pciDeviceInfo *pci_dev_list
&pci_dev_info_103c_12ee,
&pci_dev_info_103c_12f8,
&pci_dev_info_103c_12fa,
+ &pci_dev_info_103c_1302,
+ &pci_dev_info_103c_1303,
&pci_dev_info_103c_2910,
&pci_dev_info_103c_2925,
&pci_dev_info_103c_3080,
&pci_dev_info_103c_3085,
+ &pci_dev_info_103c_30b5,
&pci_dev_info_103c_3220,
&pci_dev_info_103c_3230,
&pci_dev_info_103c_4030,
@@ -120931,8 +123958,10 @@ static const pciDeviceInfo *pci_dev_list
&pci_dev_info_1043_80c5,
&pci_dev_info_1043_80df,
&pci_dev_info_1043_815a,
+ &pci_dev_info_1043_8168,
&pci_dev_info_1043_8187,
&pci_dev_info_1043_8188,
+ &pci_dev_info_1043_81f4,
NULL
};
#endif
@@ -121164,6 +124193,7 @@ static const pciDeviceInfo *pci_dev_list
&pci_dev_info_1057_1801,
&pci_dev_info_1057_18c0,
&pci_dev_info_1057_18c1,
+ &pci_dev_info_1057_3052,
&pci_dev_info_1057_3055,
&pci_dev_info_1057_3410,
&pci_dev_info_1057_4801,
@@ -121222,7 +124252,9 @@ static const pciDeviceInfo *pci_dev_list
&pci_dev_info_105a_7275,
&pci_dev_info_105a_8002,
&pci_dev_info_105a_8350,
+ &pci_dev_info_105a_8650,
&pci_dev_info_105a_c350,
+ &pci_dev_info_105a_e350,
NULL
};
#endif
@@ -121415,6 +124447,7 @@ static const pciDeviceInfo *pci_dev_list
&pci_dev_info_1073_0010,
&pci_dev_info_1073_0012,
&pci_dev_info_1073_0020,
+ &pci_dev_info_1073_1000,
&pci_dev_info_1073_2000,
NULL
};
@@ -121774,6 +124807,8 @@ static const pciDeviceInfo *pci_dev_list
&pci_dev_info_10a9_4002,
&pci_dev_info_10a9_8001,
&pci_dev_info_10a9_8002,
+ &pci_dev_info_10a9_8010,
+ &pci_dev_info_10a9_8018,
NULL
};
#endif
@@ -123748,6 +126783,7 @@ static const pciDeviceInfo *pci_dev_list
&pci_dev_info_1166_0140,
&pci_dev_info_1166_0141,
&pci_dev_info_1166_0142,
+ &pci_dev_info_1166_0144,
&pci_dev_info_1166_0200,
&pci_dev_info_1166_0201,
&pci_dev_info_1166_0203,
@@ -128664,6 +131700,34 @@ static const pciDeviceInfo *pci_dev_list
&pci_dev_info_8086_284b,
&pci_dev_info_8086_284f,
&pci_dev_info_8086_2850,
+ &pci_dev_info_8086_2910,
+ &pci_dev_info_8086_2920,
+ &pci_dev_info_8086_2921,
+ &pci_dev_info_8086_2922,
+ &pci_dev_info_8086_2923,
+ &pci_dev_info_8086_2925,
+ &pci_dev_info_8086_2926,
+ &pci_dev_info_8086_2928,
+ &pci_dev_info_8086_292d,
+ &pci_dev_info_8086_292e,
+ &pci_dev_info_8086_2930,
+ &pci_dev_info_8086_2932,
+ &pci_dev_info_8086_2934,
+ &pci_dev_info_8086_2935,
+ &pci_dev_info_8086_2936,
+ &pci_dev_info_8086_2937,
+ &pci_dev_info_8086_2938,
+ &pci_dev_info_8086_2939,
+ &pci_dev_info_8086_293a,
+ &pci_dev_info_8086_293c,
+ &pci_dev_info_8086_293e,
+ &pci_dev_info_8086_2940,
+ &pci_dev_info_8086_2942,
+ &pci_dev_info_8086_2944,
+ &pci_dev_info_8086_2946,
+ &pci_dev_info_8086_2948,
+ &pci_dev_info_8086_294a,
+ &pci_dev_info_8086_294c,
&pci_dev_info_8086_2970,
&pci_dev_info_8086_2971,
&pci_dev_info_8086_2972,
@@ -128691,6 +131755,37 @@ static const pciDeviceInfo *pci_dev_list
&pci_dev_info_8086_29a5,
&pci_dev_info_8086_29a6,
&pci_dev_info_8086_29a7,
+ &pci_dev_info_8086_29b0,
+ &pci_dev_info_8086_29b1,
+ &pci_dev_info_8086_29b2,
+ &pci_dev_info_8086_29b3,
+ &pci_dev_info_8086_29b4,
+ &pci_dev_info_8086_29b5,
+ &pci_dev_info_8086_29b6,
+ &pci_dev_info_8086_29b7,
+ &pci_dev_info_8086_29c0,
+ &pci_dev_info_8086_29c1,
+ &pci_dev_info_8086_29c2,
+ &pci_dev_info_8086_29c3,
+ &pci_dev_info_8086_29c4,
+ &pci_dev_info_8086_29c5,
+ &pci_dev_info_8086_29c6,
+ &pci_dev_info_8086_29c7,
+ &pci_dev_info_8086_29cf,
+ &pci_dev_info_8086_29e0,
+ &pci_dev_info_8086_29e1,
+ &pci_dev_info_8086_29e4,
+ &pci_dev_info_8086_29e5,
+ &pci_dev_info_8086_29e6,
+ &pci_dev_info_8086_29e7,
+ &pci_dev_info_8086_29e9,
+ &pci_dev_info_8086_29f0,
+ &pci_dev_info_8086_29f1,
+ &pci_dev_info_8086_29f4,
+ &pci_dev_info_8086_29f5,
+ &pci_dev_info_8086_29f6,
+ &pci_dev_info_8086_29f7,
+ &pci_dev_info_8086_29f9,
&pci_dev_info_8086_2a00,
&pci_dev_info_8086_2a01,
&pci_dev_info_8086_2a02,
@@ -128743,6 +131838,39 @@ static const pciDeviceInfo *pci_dev_list
&pci_dev_info_8086_35b6,
&pci_dev_info_8086_35b7,
&pci_dev_info_8086_35c8,
+ &pci_dev_info_8086_3600,
+ &pci_dev_info_8086_3604,
+ &pci_dev_info_8086_3605,
+ &pci_dev_info_8086_3606,
+ &pci_dev_info_8086_3607,
+ &pci_dev_info_8086_3608,
+ &pci_dev_info_8086_3609,
+ &pci_dev_info_8086_360a,
+ &pci_dev_info_8086_360b,
+ &pci_dev_info_8086_360c,
+ &pci_dev_info_8086_360d,
+ &pci_dev_info_8086_360e,
+ &pci_dev_info_8086_360f,
+ &pci_dev_info_8086_3610,
+ &pci_dev_info_8086_4000,
+ &pci_dev_info_8086_4008,
+ &pci_dev_info_8086_4010,
+ &pci_dev_info_8086_4021,
+ &pci_dev_info_8086_4022,
+ &pci_dev_info_8086_4023,
+ &pci_dev_info_8086_4024,
+ &pci_dev_info_8086_4025,
+ &pci_dev_info_8086_4026,
+ &pci_dev_info_8086_4027,
+ &pci_dev_info_8086_4028,
+ &pci_dev_info_8086_4029,
+ &pci_dev_info_8086_402d,
+ &pci_dev_info_8086_402e,
+ &pci_dev_info_8086_402f,
+ &pci_dev_info_8086_4030,
+ &pci_dev_info_8086_4032,
+ &pci_dev_info_8086_4035,
+ &pci_dev_info_8086_4036,
&pci_dev_info_8086_4220,
&pci_dev_info_8086_4222,
&pci_dev_info_8086_4223,
@@ -128752,6 +131880,23 @@ static const pciDeviceInfo *pci_dev_list
&pci_dev_info_8086_5200,
&pci_dev_info_8086_5201,
&pci_dev_info_8086_530d,
+ &pci_dev_info_8086_65c0,
+ &pci_dev_info_8086_65e2,
+ &pci_dev_info_8086_65e3,
+ &pci_dev_info_8086_65e4,
+ &pci_dev_info_8086_65e5,
+ &pci_dev_info_8086_65e6,
+ &pci_dev_info_8086_65e7,
+ &pci_dev_info_8086_65f0,
+ &pci_dev_info_8086_65f1,
+ &pci_dev_info_8086_65f3,
+ &pci_dev_info_8086_65f5,
+ &pci_dev_info_8086_65f6,
+ &pci_dev_info_8086_65f7,
+ &pci_dev_info_8086_65f8,
+ &pci_dev_info_8086_65f9,
+ &pci_dev_info_8086_65fa,
+ &pci_dev_info_8086_65ff,
&pci_dev_info_8086_7000,
&pci_dev_info_8086_7010,
&pci_dev_info_8086_7020,
@@ -128812,6 +131957,7 @@ static const pciDeviceInfo *pci_dev_list
&pci_dev_info_8086_9622,
&pci_dev_info_8086_9641,
&pci_dev_info_8086_96a1,
+ &pci_dev_info_8086_a620,
&pci_dev_info_8086_b152,
&pci_dev_info_8086_b154,
&pci_dev_info_8086_b555,
@@ -129243,6 +132389,9 @@ static const pciVendorInfo pciVendorInfo
{0x001a, pci_vendor_001a, pci_dev_list_001a},
#endif
#ifdef VENDOR_INCLUDE_NONVIDEO
+ {0x001c, pci_vendor_001c, pci_dev_list_001c},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
{0x0033, pci_vendor_0033, pci_dev_list_0033},
#endif
{0x003d, pci_vendor_003d, pci_dev_list_003d},
@@ -129292,6 +132441,9 @@ static const pciVendorInfo pciVendorInfo
{0x0357, pci_vendor_0357, pci_dev_list_0357},
#endif
#ifdef VENDOR_INCLUDE_NONVIDEO
+ {0x0403, pci_vendor_0403, pci_dev_list_0403},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
{0x0432, pci_vendor_0432, pci_dev_list_0432},
#endif
#ifdef VENDOR_INCLUDE_NONVIDEO
@@ -129322,12 +132474,24 @@ static const pciVendorInfo pciVendorInfo
{0x067b, pci_vendor_067b, pci_dev_list_067b},
#endif
#ifdef VENDOR_INCLUDE_NONVIDEO
+ {0x069d, pci_vendor_069d, pci_dev_list_069d},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
{0x0721, pci_vendor_0721, pci_dev_list_0721},
#endif
#ifdef VENDOR_INCLUDE_NONVIDEO
+ {0x07ca, pci_vendor_07ca, pci_dev_list_07ca},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
{0x07e2, pci_vendor_07e2, pci_dev_list_07e2},
#endif
#ifdef VENDOR_INCLUDE_NONVIDEO
+ {0x0842, pci_vendor_0842, pci_dev_list_0842},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+ {0x08ff, pci_vendor_08ff, pci_dev_list_08ff},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
{0x0925, pci_vendor_0925, pci_dev_list_0925},
#endif
#ifdef VENDOR_INCLUDE_NONVIDEO
@@ -129340,6 +132504,9 @@ static const pciVendorInfo pciVendorInfo
{0x0a89, pci_vendor_0a89, pci_dev_list_0a89},
#endif
#ifdef VENDOR_INCLUDE_NONVIDEO
+ {0x0ace, pci_vendor_0ace, pci_dev_list_0ace},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
{0x0b0b, pci_vendor_0b0b, pci_dev_list_0b0b},
#endif
#ifdef VENDOR_INCLUDE_NONVIDEO
@@ -134702,6 +137869,9 @@ static const pciVendorSubsysInfo pciVend
{0x001a, pci_vendor_001a, pci_ss_list_001a},
#endif
#ifdef VENDOR_INCLUDE_NONVIDEO
+ {0x001c, pci_vendor_001c, pci_ss_list_001c},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
{0x0033, pci_vendor_0033, pci_ss_list_0033},
#endif
{0x003d, pci_vendor_003d, pci_ss_list_003d},
@@ -134751,6 +137921,9 @@ static const pciVendorSubsysInfo pciVend
{0x0357, pci_vendor_0357, pci_ss_list_0357},
#endif
#ifdef VENDOR_INCLUDE_NONVIDEO
+ {0x0403, pci_vendor_0403, pci_ss_list_0403},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
{0x0432, pci_vendor_0432, pci_ss_list_0432},
#endif
#ifdef VENDOR_INCLUDE_NONVIDEO
@@ -134781,12 +137954,24 @@ static const pciVendorSubsysInfo pciVend
{0x067b, pci_vendor_067b, pci_ss_list_067b},
#endif
#ifdef VENDOR_INCLUDE_NONVIDEO
+ {0x069d, pci_vendor_069d, pci_ss_list_069d},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
{0x0721, pci_vendor_0721, pci_ss_list_0721},
#endif
#ifdef VENDOR_INCLUDE_NONVIDEO
+ {0x07ca, pci_vendor_07ca, pci_ss_list_07ca},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
{0x07e2, pci_vendor_07e2, pci_ss_list_07e2},
#endif
#ifdef VENDOR_INCLUDE_NONVIDEO
+ {0x0842, pci_vendor_0842, pci_ss_list_0842},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+ {0x08ff, pci_vendor_08ff, pci_ss_list_08ff},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
{0x0925, pci_vendor_0925, pci_ss_list_0925},
#endif
#ifdef VENDOR_INCLUDE_NONVIDEO
@@ -134799,6 +137984,9 @@ static const pciVendorSubsysInfo pciVend
{0x0a89, pci_vendor_0a89, pci_ss_list_0a89},
#endif
#ifdef VENDOR_INCLUDE_NONVIDEO
+ {0x0ace, pci_vendor_0ace, pci_ss_list_0ace},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
{0x0b0b, pci_vendor_0b0b, pci_ss_list_0b0b},
#endif
#ifdef VENDOR_INCLUDE_NONVIDEO
diff-tree 0f0c321adf2850b3d7aafe281362bfe424cb0ca1 (from a811e92104028ae60ba69f73e32ee1e0533b088c)
Author: Alan Coopersmith <alan.coopersmith at sun.com>
Date: Thu Jan 18 15:31:53 2007 -0800
Make xf1bpp build correctly with compilers that don't support -include
diff --git a/hw/xfree86/xf1bpp/Makefile.am b/hw/xfree86/xf1bpp/Makefile.am
index e7c873a..6d510d1 100644
--- a/hw/xfree86/xf1bpp/Makefile.am
+++ b/hw/xfree86/xf1bpp/Makefile.am
@@ -27,128 +27,156 @@ libxf1bppgen_a_SOURCES = \
mfbtileC.c \
mfbtileG.c
-DISTCLEANFILES = $(libxf1bppgen_a_SOURCES)
-
libxf1bppmfb_a_SOURCES = \
- $(top_srcdir)/mfb/maskbits.c \
- $(top_srcdir)/mfb/mfbbitblt.c \
- $(top_srcdir)/mfb/mfbbres.c \
- $(top_srcdir)/mfb/mfbbresd.c \
- $(top_srcdir)/mfb/mfbbstore.c \
- $(top_srcdir)/mfb/mfbclip.c \
- $(top_srcdir)/mfb/mfbcmap.c \
- $(top_srcdir)/mfb/mfbfillarc.c \
- $(top_srcdir)/mfb/mfbfillrct.c \
- $(top_srcdir)/mfb/mfbfillsp.c \
- $(top_srcdir)/mfb/mfbfont.c \
- $(top_srcdir)/mfb/mfbgc.c \
- $(top_srcdir)/mfb/mfbgetsp.c \
- $(top_srcdir)/mfb/mfbhrzvert.c \
- $(top_srcdir)/mfb/mfbimage.c \
- $(top_srcdir)/mfb/mfbline.c \
- $(top_srcdir)/mfb/mfbmisc.c \
- $(top_srcdir)/mfb/mfbpixmap.c \
- $(top_srcdir)/mfb/mfbpntwin.c \
- $(top_srcdir)/mfb/mfbpolypnt.c \
- $(top_srcdir)/mfb/mfbpushpxl.c \
- $(top_srcdir)/mfb/mfbscrclse.c \
- $(top_srcdir)/mfb/mfbscrinit.c \
- $(top_srcdir)/mfb/mfbsetsp.c \
- $(top_srcdir)/mfb/mfbwindow.c \
- $(top_srcdir)/mfb/mfbzerarc.c \
- mfbmodule.c
+ maskbits.c \
+ mfbbitblt.c \
+ mfbbres.c \
+ mfbbresd.c \
+ mfbbstore.c \
+ mfbclip.c \
+ mfbcmap.c \
+ mfbfillarc.c \
+ mfbfillrct.c \
+ mfbfillsp.c \
+ mfbfont.c \
+ mfbgc.c \
+ mfbgetsp.c \
+ mfbhrzvert.c \
+ mfbimage.c \
+ mfbline.c \
+ mfbmisc.c \
+ mfbpixmap.c \
+ mfbpntwin.c \
+ mfbpolypnt.c \
+ mfbpushpxl.c \
+ mfbscrclse.c \
+ mfbscrinit.c \
+ mfbsetsp.c \
+ mfbwindow.c \
+ mfbzerarc.c
+
+BUILT_SOURCES = $(libxf1bppgen_a_SOURCES) $(libxf1bppgen_a_SOURCES)
-libxf1bpp_la_SOURCES = $(libxf1bppmfb_a_SOURCES) $(libxf1bppgen_a_SOURCES)
+libxf1bpp_la_SOURCES = $(libxf1bppmfb_a_SOURCES) $(libxf1bppgen_a_SOURCES) \
+ mfbmodule.c
-AM_CFLAGS = -DXF86MONO -include mfbmap.h $(DIX_CFLAGS) $(XORG_CFLAGS)
+AM_CFLAGS = -DXF86MONO $(DIX_CFLAGS) $(XORG_CFLAGS)
INCLUDES = $(XORG_INCS) -I$(top_srcdir)/mfb
mfbseg.c:
echo "#define POLYSEGMENT" > $@
+ echo "#include \"mfbmap.h\"" >> $@
echo "#include \"$(top_srcdir)/mfb/mfbline.c\"" >> $@
mfbpgbwht.c:
echo "#define MFBPOLYGLYPHBLT xf1bppPolyGlyphBltWhite" > $@
echo "#define OPEQ |=" >> $@
+ echo "#include \"mfbmap.h\"" >> $@
echo "#include \"$(top_srcdir)/mfb/mfbplygblt.c\"" >> $@
mfbpgbblak.c:
echo "#define MFBPOLYGLYPHBLT xf1bppPolyGlyphBltBlack" > $@
echo "#define OPEQ &=~" >> $@
+ echo "#include \"mfbmap.h\"" >> $@
echo "#include \"$(top_srcdir)/mfb/mfbplygblt.c\"" >> $@
mfbpgbinv.c:
echo "#define MFBPOLYGLYPHBLT xf1bppPolyGlyphBltInvert" > $@
echo "#define OPEQ ^=" >> $@
+ echo "#include \"mfbmap.h\"" >> $@
echo "#include \"$(top_srcdir)/mfb/mfbplygblt.c\"" >> $@
mfbigbwht.c:
echo "#define MFBIMAGEGLYPHBLT xf1bppImageGlyphBltWhite" > $@
echo "#define OPEQ |=" >> $@
+ echo "#include \"mfbmap.h\"" >> $@
echo "#include \"$(top_srcdir)/mfb/mfbimggblt.c\"" >> $@
mfbigbblak.c:
echo "#define MFBIMAGEGLYPHBLT xf1bppImageGlyphBltBlack" > $@
echo "#define OPEQ &=~" >> $@
+ echo "#include \"mfbmap.h\"" >> $@
echo "#include \"$(top_srcdir)/mfb/mfbimggblt.c\"" >> $@
mfbpawhite.c:
echo "#define MFBSOLIDFILLAREA xf1bppSolidWhiteArea" > $@
echo "#define MFBSTIPPLEFILLAREA xf1bppStippleWhiteArea" >> $@
echo "#define OPEQ |=" >> $@
echo "#define EQWHOLEWORD =~0" >> $@
+ echo "#include \"mfbmap.h\"" >> $@
echo "#include \"$(top_srcdir)/mfb/mfbpntarea.c\"" >> $@
mfbpablack.c:
echo "#define MFBSOLIDFILLAREA xf1bppSolidBlackArea" > $@
echo "#define MFBSTIPPLEFILLAREA xf1bppStippleBlackArea" >> $@
echo "#define OPEQ &=~" >> $@
echo "#define EQWHOLEWORD =0" >> $@
+ echo "#include \"mfbmap.h\"" >> $@
echo "#include \"$(top_srcdir)/mfb/mfbpntarea.c\"" >> $@
mfbpainv.c:
echo "#define MFBSOLIDFILLAREA xf1bppSolidInvertArea" > $@
echo "#define MFBSTIPPLEFILLAREA xf1bppStippleInvertArea" >> $@
echo "#define OPEQ ^=" >> $@
echo "#define EQWHOLEWORD ^=~0" >> $@
+ echo "#include \"mfbmap.h\"" >> $@
echo "#include \"$(top_srcdir)/mfb/mfbpntarea.c\"" >> $@
mfbtewhite.c:
echo "#define OP" > $@
echo "#define CLIPTETEXT xf1bppImageGlyphBltWhite" >> $@
echo "#define MFBTEGLYPHBLT xf1bppTEGlyphBltWhite" >> $@
+ echo "#include \"mfbmap.h\"" >> $@
echo "#include \"$(top_srcdir)/mfb/mfbtegblt.c\"" >> $@
mfbteblack.c:
echo "#define OP ~" > $@
echo "#define CLIPTETEXT xf1bppImageGlyphBltBlack" >> $@
echo "#define MFBTEGLYPHBLT xf1bppTEGlyphBltBlack" >> $@
+ echo "#include \"mfbmap.h\"" >> $@
echo "#include \"$(top_srcdir)/mfb/mfbtegblt.c\"" >> $@
mfbplywhite.c:
echo "#define MFBFILLPOLY1RECT xf1bppFillPolyWhite" > $@
echo "#define OPEQ |=" >> $@
echo "#define EQWHOLEWORD =~0" >> $@
+ echo "#include \"mfbmap.h\"" >> $@
echo "#include \"$(top_srcdir)/mfb/mfbply1rct.c\"" >> $@
mfbplyblack.c:
echo "#define MFBFILLPOLY1RECT xf1bppFillPolyBlack" > $@
echo "#define OPEQ &=~" >> $@
echo "#define EQWHOLEWORD =0" >> $@
+ echo "#include \"mfbmap.h\"" >> $@
echo "#include \"$(top_srcdir)/mfb/mfbply1rct.c\"" >> $@
mfbplyinv.c:
echo "#define MFBFILLPOLY1RECT xf1bppFillPolyInvert" > $@
echo "#define OPEQ ^=" >> $@
echo "#define EQWHOLEWORD ^=~0" >> $@
+ echo "#include \"mfbmap.h\"" >> $@
echo "#include \"$(top_srcdir)/mfb/mfbply1rct.c\"" >> $@
mfbbltC.c:
echo "#define MROP Mcopy" > $@
+ echo "#include \"mfbmap.h\"" >> $@
echo "#include \"$(top_srcdir)/mfb/mfbblt.c\"" >> $@
mfbbltX.c:
echo "#define MROP Mxor" > $@
+ echo "#include \"mfbmap.h\"" >> $@
echo "#include \"$(top_srcdir)/mfb/mfbblt.c\"" >> $@
mfbbltCI.c:
echo "#define MROP McopyInverted" > $@
+ echo "#include \"mfbmap.h\"" >> $@
echo "#include \"$(top_srcdir)/mfb/mfbblt.c\"" >> $@
mfbbltO.c:
echo "#define MROP Mor" > $@
+ echo "#include \"mfbmap.h\"" >> $@
echo "#include \"$(top_srcdir)/mfb/mfbblt.c\"" >> $@
mfbbltG.c:
echo "#define MROP M0" > $@
+ echo "#include \"mfbmap.h\"" >> $@
echo "#include \"$(top_srcdir)/mfb/mfbblt.c\"" >> $@
mfbtileC.c:
echo "#define MROP Mcopy" > $@
+ echo "#include \"mfbmap.h\"" >> $@
echo "#include \"$(top_srcdir)/mfb/mfbtile.c\"" >> $@
mfbtileG.c:
echo "#define MRop M0" > $@
+ echo "#include \"mfbmap.h\"" >> $@
echo "#include \"$(top_srcdir)/mfb/mfbtile.c\"" >> $@
+$(libxf1bppmfb_a_SOURCES):
+ for i in $(libxf1bppmfb_a_SOURCES) ; do \
+ echo "#include \"mfbmap.h\"" > $$i ; \
+ echo "#include \"$(top_srcdir)/mfb/$$i\"" >> $$i ; \
+ done
+
+
EXTRA_DIST = mfbmap.sh mfbunmap.sh
diff-tree a811e92104028ae60ba69f73e32ee1e0533b088c (from df147c10ce597c56c16cbca552e8a3e3ecb3cdaa)
Author: Eric Anholt <eric at anholt.net>
Date: Thu Jan 18 14:28:01 2007 -0800
Account for CRTC rotation in the cursor containment code.
diff --git a/randr/rrpointer.c b/randr/rrpointer.c
index c092e49..2a5ae7d 100644
--- a/randr/rrpointer.c
+++ b/randr/rrpointer.c
@@ -22,6 +22,32 @@
#include "randrstr.h"
+/**
+ * Returns the width/height that the crtc scans out from the framebuffer
+ */
+static void
+RRCrtcGetScanoutSize(RRCrtcPtr crtc, int *width, int *height)
+{
+ if (crtc->mode == NULL) {
+ *width = 0;
+ *height = 0;
+ return;
+ }
+
+ switch (crtc->rotation & 0xf) {
+ case RR_Rotate_0:
+ case RR_Rotate_180:
+ *width = crtc->mode->mode.width;
+ *height = crtc->mode->mode.height;
+ break;
+ case RR_Rotate_90:
+ case RR_Rotate_270:
+ *width = crtc->mode->mode.height;
+ *height = crtc->mode->mode.width;
+ break;
+ }
+}
+
/*
* When the pointer moves, check to see if the specified position is outside
* any of theavailable CRTCs and move it to a 'sensible' place if so, where
@@ -34,11 +60,15 @@ static Bool
RRCrtcContainsPosition (RRCrtcPtr crtc, int x, int y)
{
RRModePtr mode = crtc->mode;
-
+ int scan_width, scan_height;
+
if (!mode)
return FALSE;
- if (crtc->x <= x && x < crtc->x + mode->mode.width &&
- crtc->y <= y && y < crtc->y + mode->mode.height)
+
+ RRCrtcGetScanoutSize (crtc, &scan_width, &scan_height);
+
+ if (crtc->x <= x && x < crtc->x + scan_width &&
+ crtc->y <= y && y < crtc->y + scan_height)
return TRUE;
return FALSE;
}
@@ -54,28 +84,32 @@ RRPointerToNearestCrtc (ScreenPtr pScree
RRCrtcPtr nearest = NULL;
int best = 0;
int best_dx = 0, best_dy = 0;
-
+
for (c = 0; c < pScrPriv->numCrtcs; c++)
{
RRCrtcPtr crtc = pScrPriv->crtcs[c];
RRModePtr mode = crtc->mode;
int dx, dy;
int dist;
+ int scan_width, scan_height;
if (!mode)
continue;
if (crtc == skip)
continue;
+
+ RRCrtcGetScanoutSize (crtc, &scan_width, &scan_height);
+
if (x < crtc->x)
dx = crtc->x - x;
- else if (x > crtc->x + mode->mode.width)
- dx = x - (crtc->x + mode->mode.width);
+ else if (x > crtc->x + scan_width)
+ dx = x - (crtc->x + scan_width);
else
dx = 0;
if (y < crtc->y)
dy = crtc->y - x;
- else if (y > crtc->y + mode->mode.height)
- dy = y - (crtc->y + mode->mode.height);
+ else if (y > crtc->y + scan_height)
+ dy = y - (crtc->y + scan_height);
else
dy = 0;
dist = dx + dy;
diff-tree df147c10ce597c56c16cbca552e8a3e3ecb3cdaa (from 2dfd1aab244a2c8da3b62b522b9a8434e474af17)
Author: Alan Coopersmith <alan.coopersmith at sun.com>
Date: Wed Jan 17 16:47:07 2007 -0800
Xserver man page: remove bc, add -wr
diff --git a/doc/Xserver.man.pre b/doc/Xserver.man.pre
index 2457edf..7cf3c26 100644
--- a/doc/Xserver.man.pre
+++ b/doc/Xserver.man.pre
@@ -100,11 +100,6 @@ specifies a file which contains a collec
to authenticate access. See also the \fIxdm\fP(1) and
\fIXsecurity\fP(__miscmansuffix__) manual pages.
.TP 8
-.B bc
-disables certain kinds of error checking, for bug compatibility with
-previous releases (e.g., to work around bugs in R2 and R3 xterms and toolkits).
-Deprecated.
-.TP 8
.B \-bs
disables backing store support on all screens.
.TP 8
@@ -266,6 +261,10 @@ required by the X protocol, which allows
client's backing store expectations but does not provide a way to tell
the client that it is doing so.
.TP 8
+.B \-wr
+sets the default root window to solid white instead of the standard root weave
+pattern.
+.TP 8
.B \-x \fIextension\fP
loads the specified extension at init.
This is a no-op for most implementations.
diff-tree 2dfd1aab244a2c8da3b62b522b9a8434e474af17 (from 42a48786acf54f83167de4f561526986d4e27033)
Author: Alan Coopersmith <alan.coopersmith at sun.com>
Date: Wed Jan 17 14:39:28 2007 -0800
Always include compiler.h in cfbmskbits.h instead of checking #ifdef XFREE86
diff --git a/cfb/cfbmskbits.h b/cfb/cfbmskbits.h
index 7aa446c..6076269 100644
--- a/cfb/cfbmskbits.h
+++ b/cfb/cfbmskbits.h
@@ -32,10 +32,7 @@ THE USE OR PERFORMANCE OF THIS SOFTWARE.
#include <X11/X.h>
#include <X11/Xmd.h>
#include "servermd.h"
-#if defined(XFREE86) || ( defined(__OpenBSD__) && defined(__alpha__) ) \
- || (defined(__bsdi__))
#include "compiler.h"
-#endif
/*
* ==========================================================================
diff-tree 42a48786acf54f83167de4f561526986d4e27033 (from cde17015dff1ced2aabb8b76c08f9110237821a5)
Author: Eric Anholt <eric at anholt.net>
Date: Wed Jan 17 14:34:42 2007 -0800
Add a setter for randr_crtc->rotations.
diff --git a/randr/randrstr.h b/randr/randrstr.h
index 136a47e..99022c3 100644
--- a/randr/randrstr.h
+++ b/randr/randrstr.h
@@ -543,6 +543,13 @@ RRCrtcGammaSetSize (RRCrtcPtr crtc,
int size);
/*
+ * Set the allowable rotations of the CRTC.
+ */
+Bool
+RRCrtcSetRotations (RRCrtcPtr crtc,
+ Rotation rotations);
+
+/*
* Destroy a Crtc at shutdown
*/
void
diff --git a/randr/rrcrtc.c b/randr/rrcrtc.c
index 0767420..cfd4da9 100644
--- a/randr/rrcrtc.c
+++ b/randr/rrcrtc.c
@@ -427,6 +427,16 @@ RRCrtcGammaSetSize (RRCrtcPtr crtc,
}
/*
+ * Set the allowable rotations of the CRTC.
+ */
+Bool
+RRCrtcSetRotations (RRCrtcPtr crtc,
+ Rotation rotations)
+{
+ crtc->rotations = rotations;
+}
+
+/*
* Initialize crtc type
*/
Bool
diff-tree cde17015dff1ced2aabb8b76c08f9110237821a5 (from e3add7c8ecbb2a0a662860f208f6ae7d1857c717)
Author: Eric Anholt <eric at anholt.net>
Date: Tue Jan 16 13:01:03 2007 -0800
When changing a non-pending property, call the screen rrOutputSetProperty hook.
diff --git a/randr/rrproperty.c b/randr/rrproperty.c
index 4b77d39..916caf0 100644
--- a/randr/rrproperty.c
+++ b/randr/rrproperty.c
@@ -125,6 +125,7 @@ RRChangeOutputProperty (RROutputPtr outp
{
RRPropertyPtr prop;
xRROutputPropertyNotifyEvent event;
+ rrScrPrivPtr pScrPriv = rrGetScrPriv(output->pScreen);
int sizeInBytes;
int totalSize;
pointer data;
@@ -213,6 +214,13 @@ RRChangeOutputProperty (RROutputPtr outp
prop->next = output->properties;
output->properties = prop;
}
+
+ if (!prop->is_pending) {
+ /* What should we do in case of failure? */
+ pScrPriv->rrOutputSetProperty(output->pScreen, output,
+ prop->propertyName, prop_value);
+ }
+
if (sendevent)
{
event.type = RREventBase + RRNotify;
diff-tree e3add7c8ecbb2a0a662860f208f6ae7d1857c717 (from 7fccec91c46baac4f8d2965180dc535b4eb7d65c)
Author: Eric Anholt <eric at anholt.net>
Date: Tue Jan 16 12:59:34 2007 -0800
Don't forget to add the property we configure to the properties list.
diff --git a/randr/rrproperty.c b/randr/rrproperty.c
index 56bb39a..4b77d39 100644
--- a/randr/rrproperty.c
+++ b/randr/rrproperty.c
@@ -298,6 +298,12 @@ RRConfigureOutputProperty (RROutputPtr o
if (prop->valid_values)
xfree (prop->valid_values);
prop->valid_values = new_values;
+
+ if (add) {
+ prop->next = output->properties;
+ output->properties = prop;
+ }
+
return Success;
}
diff-tree 7fccec91c46baac4f8d2965180dc535b4eb7d65c (from 78f9592c112d4245f6119b98c244bbb4cae3e5aa)
Author: Eric Anholt <eric at anholt.net>
Date: Wed Jan 10 13:10:43 2007 -0800
Bug #9555: Always define _GNU_SOURCE in glibc environments.
This keeps us from having to define _POSIX_C_SOURCE, _BSD_SOURCE, and
_XOPEN_SORUCE to get the C environment we want in different places. It also
fixes the build on linux due to RTLD_DEFAULT having not been defined.
diff --git a/configure.ac b/configure.ac
index 3f5e5d8..c3107dc 100644
--- a/configure.ac
+++ b/configure.ac
@@ -1757,20 +1757,13 @@ AC_SUBST(XKB_COMPILED_DIR)
dnl and the rest of these are generic, so they're in config.h
AC_DEFINE(XResExtension, 1, [Build XRes extension])
-dnl CYGWIN does not define fd_set if _POSIX_SOURCE is defined
-dnl _*_SOURCE on Solaris restricts to the standards, and removes non-standard
-dnl functions which X uses
-case $host_os in
- cygwin*) ;;
- solaris*) ;;
- darwin*) ;;
- freebsd*|netbsd*|openbsd*) ;;
- *)
- AC_DEFINE(_POSIX_SOURCE, 1, [POSIX-compliant source])
- AC_DEFINE(_XOPEN_SOURCE, 500, [X/Open-compliant source])
- AC_DEFINE(_BSD_SOURCE, 1, [BSD-compliant source])
- ;;
-esac
+AC_TRY_COMPILE([
+#include <features.h>
+#ifndef __GLIBC__
+#error not glibc
+#endif
+], [], [AC_DEFINE(_GNU_SOURCE, 1,
+ [ Enable GNU and other extensions to the C environment for glibc])])
AC_DEFINE_DIR(PROJECTROOT, prefix, [Overall prefix])
diff --git a/include/dix-config.h.in b/include/dix-config.h.in
index 6bf2786..1a9fdc5 100644
--- a/include/dix-config.h.in
+++ b/include/dix-config.h.in
@@ -419,16 +419,8 @@
/* Endian order */
#undef X_BYTE_ORDER
-/* BSD-compliant source */
-#undef _BSD_SOURCE
-
-/* POSIX-compliant source */
-#undef _POSIX_SOURCE
-
-#ifndef _XOPEN_SOURCE
-/* X/Open-compliant source */
-#undef _XOPEN_SOURCE
-#endif
+/* Enable GNU and other extensions to the C environment for GLIBC */
+#undef _GNU_SOURCE
/* Define to empty if `const' does not conform to ANSI C. */
#undef const
diff --git a/os/utils.c b/os/utils.c
index b98c9c1..7c725e3 100644
--- a/os/utils.c
+++ b/os/utils.c
@@ -53,23 +53,6 @@ OR PERFORMANCE OF THIS SOFTWARE.
#include <dix-config.h>
#endif
-#ifndef __GLIBC__
-#include <time.h>
-#else
-/* The world's most shocking hack, to ensure we get clock_gettime() and
- * CLOCK_MONOTONIC. */
-#ifdef _POSIX_C_SOURCE
-#define _SAVED_POSIX_C_SOURCE _POSIX_C_SOURCE
-#undef _POSIX_C_SOURCE
-#endif
-#define _POSIX_C_SOURCE 199309L
-#include <time.h>
-#undef _POSIX_C_SOURCE
-#ifdef _SAVED_POSIX_C_SOURCE
-#define _POSIX_C_SOURCE _SAVED_POSIX_C_SOURCE
-#endif
-#endif /* __linux__ */
-
#ifdef __CYGWIN__
#include <stdlib.h>
#include <signal.h>
@@ -80,6 +63,7 @@ OR PERFORMANCE OF THIS SOFTWARE.
#endif
#include <X11/Xos.h>
#include <stdio.h>
+#include <time.h>
#include "misc.h"
#include <X11/X.h>
#define XSERV_t
diff-tree 78f9592c112d4245f6119b98c244bbb4cae3e5aa (from 6a2fb2928714ce77ee342cdc23a1178e5e766cf2)
Author: Alan Hourihane <alanh at fairlite.demon.co.uk>
Date: Wed Jan 10 16:04:20 2007 +0000
lnx_ev56.c has to be built with -mcpu=ev56. Fix it.
diff --git a/hw/xfree86/os-support/linux/Makefile.am b/hw/xfree86/os-support/linux/Makefile.am
index 9c4fa49..10f2440 100644
--- a/hw/xfree86/os-support/linux/Makefile.am
+++ b/hw/xfree86/os-support/linux/Makefile.am
@@ -6,9 +6,14 @@ PLATFORM_DEFINES = -DOS_PROBE_PCI_CHIPSE
PLATFORM_INCLUDES = -I$(srcdir)/../shared
endif
if LINUX_ALPHA
-PLATFORM_PCI_SUPPORT = lnx_ev56.c \
+noinst_LTLIBRARIES += liblinuxev56.la
+PLATFORM_PCI_SUPPORT = \
$(srcdir)/lnx_axp.c \
$(srcdir)/../shared/xf86Axp.c
+
+liblinuxev56_la_CFLAGS = -mcpu=ev56
+
+liblinuxev56_la_SOURCES = lnx_ev56.c
endif
if LNXACPI
@@ -48,3 +53,7 @@ EXTRA_DIST = \
$(LNX_EXTRA_SRCS) \
lnx.h \
$(srcdir)/../shared/xf86Axp.h
+
+if LINUX_ALPHA
+liblinux_la_LIBADD = liblinuxev56.la
+endif
diff --git a/hw/xfree86/os-support/linux/lnx_ev56.c b/hw/xfree86/os-support/linux/lnx_ev56.c
index 78756a6..11c45e5 100644
--- a/hw/xfree86/os-support/linux/lnx_ev56.c
+++ b/hw/xfree86/os-support/linux/lnx_ev56.c
@@ -1,4 +1,4 @@
-
+/* This file has to be built with -mcpu=ev56 */
#ifdef HAVE_XORG_CONFIG_H
#include <xorg-config.h>
#endif
diff-tree 6a2fb2928714ce77ee342cdc23a1178e5e766cf2 (from e3aa6ad201eb20862c11c000e76206e317a96dc9)
Author: Eric Anholt <eric at anholt.net>
Date: Tue Jan 9 16:34:40 2007 -0800
Track rename of DamagePost -> DamageAdd.
diff --git a/damageext/damageext.c b/damageext/damageext.c
index a90dfb8..ae1091e 100755
--- a/damageext/damageext.c
+++ b/damageext/damageext.c
@@ -280,14 +280,14 @@ ProcDamageSubtract (ClientPtr client)
}
static int
-ProcDamagePost (ClientPtr client)
+ProcDamageAdd (ClientPtr client)
{
- REQUEST(xDamagePostReq);
+ REQUEST(xDamageAddReq);
DrawablePtr pDrawable;
RegionPtr pRegion;
int rc;
- REQUEST_SIZE_MATCH(xDamagePostReq);
+ REQUEST_SIZE_MATCH(xDamageAddReq);
VERIFY_REGION(pRegion, stuff->region, client, DixWriteAccess);
rc = dixLookupDrawable(&pDrawable, stuff->drawable, client, 0,
DixReadAccess);
@@ -307,7 +307,7 @@ ProcDamagePost (ClientPtr client)
/* Major version controls available requests */
static const int version_requests[] = {
X_DamageQueryVersion, /* before client sends QueryVersion */
- X_DamagePost, /* Version 1 */
+ X_DamageAdd, /* Version 1 */
};
#define NUM_VERSION_REQUESTS (sizeof (version_requests) / sizeof (version_requests[0]))
@@ -319,7 +319,7 @@ int (*ProcDamageVector[XDamageNumberRequ
ProcDamageDestroy,
ProcDamageSubtract,
/*************** Version 1.1 ****************/
- ProcDamagePost,
+ ProcDamageAdd,
};
@@ -389,10 +389,10 @@ SProcDamageSubtract (ClientPtr client)
}
static int
-SProcDamagePost (ClientPtr client)
+SProcDamageAdd (ClientPtr client)
{
register int n;
- REQUEST(xDamagePostReq);
+ REQUEST(xDamageAddReq);
swaps (&stuff->length, n);
REQUEST_SIZE_MATCH(xDamageSubtractReq);
@@ -408,7 +408,7 @@ int (*SProcDamageVector[XDamageNumberReq
SProcDamageDestroy,
SProcDamageSubtract,
/*************** Version 1.1 ****************/
- SProcDamagePost,
+ SProcDamageAdd,
};
static int
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