xf86-video-ati: Branch 'master'
Roland Scheidegger
sroland at kemper.freedesktop.org
Wed Jan 3 16:56:37 EET 2007
src/radeon_driver.c | 87 ++++++++++++++++++++++++++++++++--------------------
1 files changed, 55 insertions(+), 32 deletions(-)
New commits:
diff-tree 9506f7015a1e442f4ca0bd3bfae555ec7e8a5f37 (from d5c6306385cbc7b13a132ae72ed04e04e24d9886)
Author: Roland Scheidegger <sroland at tungstengraphics.com>
Date: Wed Jan 3 15:56:23 2007 +0100
fix uninitialized mode regs (bug 9495)
Since the reorganization of the mode setting code, the mode registers relying
on state already set (by bios) were not read, thus clearing out all bits the
driver does not touch. At the very least, this could lead to completely
nonfunctional to misbehaving dvi output (see bug 9495). Fix this by using the
SavedReg values, which also makes it more obvious that those are bits which
were not set by the driver previously, but come from register readback.
diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index 87d60e8..4b2f3ed 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -5527,7 +5527,8 @@ static void RADEONInitTvDacCntl(ScrnInfo
RADEONInfoPtr info = RADEONPTR(pScrn);
if (info->ChipFamily == CHIP_FAMILY_R420 ||
info->ChipFamily == CHIP_FAMILY_RV410) {
- save->tv_dac_cntl &= ~(RADEON_TV_DAC_STD_MASK |
+ save->tv_dac_cntl = info->SavedReg.tv_dac_cntl &
+ ~(RADEON_TV_DAC_STD_MASK |
RADEON_TV_DAC_BGADJ_MASK |
R420_TV_DAC_DACADJ_MASK |
R420_TV_DAC_RDACPD |
@@ -5535,13 +5536,15 @@ static void RADEONInitTvDacCntl(ScrnInfo
R420_TV_DAC_GDACPD |
R420_TV_DAC_TVENABLE);
} else {
- save->tv_dac_cntl &= ~(RADEON_TV_DAC_STD_MASK |
+ save->tv_dac_cntl = info->SavedReg.tv_dac_cntl &
+ ~(RADEON_TV_DAC_STD_MASK |
RADEON_TV_DAC_BGADJ_MASK |
RADEON_TV_DAC_DACADJ_MASK |
RADEON_TV_DAC_RDACPD |
RADEON_TV_DAC_GDACPD |
RADEON_TV_DAC_GDACPD);
}
+ /* FIXME: doesn't make sense, this just replaces the previous value... */
save->tv_dac_cntl = (RADEON_TV_DAC_NBLANK |
RADEON_TV_DAC_NHOLD |
RADEON_TV_DAC_STD_PS2 |
@@ -5554,7 +5557,7 @@ static void RADEONInitFPRegisters(ScrnIn
RADEONInfoPtr info = RADEONPTR(pScrn);
RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
int i;
- CARD32 tmp = save->tmds_pll_cntl & 0xfffff;
+ CARD32 tmp = info->SavedReg.tmds_pll_cntl & 0xfffff;
for (i=0; i<4; i++) {
if (info->tmds_pll[i].freq == 0) break;
@@ -5568,19 +5571,21 @@ static void RADEONInitFPRegisters(ScrnIn
if (tmp & 0xfff00000)
save->tmds_pll_cntl = tmp;
else {
- save->tmds_pll_cntl &= 0xfff00000;
+ save->tmds_pll_cntl = info->SavedReg.tmds_pll_cntl & 0xfff00000;
save->tmds_pll_cntl |= tmp;
}
} else save->tmds_pll_cntl = tmp;
- save->tmds_transmitter_cntl &= ~(RADEON_TMDS_TRANSMITTER_PLLRST);
+ save->tmds_transmitter_cntl = info->SavedReg.tmds_transmitter_cntl &
+ ~(RADEON_TMDS_TRANSMITTER_PLLRST);
if (IS_R300_VARIANT || (info->ChipFamily == CHIP_FAMILY_R200) || !pRADEONEnt->HasCRTC2)
save->tmds_transmitter_cntl &= ~(RADEON_TMDS_TRANSMITTER_PLLEN);
else /* weird, RV chips got this bit reversed? */
save->tmds_transmitter_cntl |= (RADEON_TMDS_TRANSMITTER_PLLEN);
- save->fp_gen_cntl |= (RADEON_FP_CRTC_DONT_SHADOW_VPAR |
+ save->fp_gen_cntl = info->SavedReg.fp_gen_cntl |
+ (RADEON_FP_CRTC_DONT_SHADOW_VPAR |
RADEON_FP_CRTC_DONT_SHADOW_HEND );
if (pScrn->rgbBits == 8)
@@ -5614,9 +5619,11 @@ static void RADEONInitFP2Registers(ScrnI
RADEONInfoPtr info = RADEONPTR(pScrn);
if (pScrn->rgbBits == 8)
- save->fp2_gen_cntl |= RADEON_FP2_PANEL_FORMAT; /* 24 bit format, */
+ save->fp2_gen_cntl = info->SavedReg.fp2_gen_cntl |
+ RADEON_FP2_PANEL_FORMAT; /* 24 bit format, */
else
- save->fp2_gen_cntl &= ~RADEON_FP2_PANEL_FORMAT;/* 18 bit format, */
+ save->fp2_gen_cntl = info->SavedReg.fp2_gen_cntl &
+ ~RADEON_FP2_PANEL_FORMAT;/* 18 bit format, */
if (IsPrimary) {
if ((info->ChipFamily == CHIP_FAMILY_R200) || IS_R300_VARIANT) {
@@ -5656,11 +5663,14 @@ static void RADEONInitFP2Registers(ScrnI
static void RADEONInitLVDSRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save,
DisplayModePtr mode, BOOL IsPrimary)
{
-
+ RADEONInfoPtr info = RADEONPTR(pScrn);
+/* XXX saved but never used??? */
if (IsPrimary)
- save->lvds_gen_cntl &= ~RADEON_LVDS_SEL_CRTC2;
+ save->lvds_gen_cntl = info->SavedReg.lvds_gen_cntl &
+ ~RADEON_LVDS_SEL_CRTC2;
else
- save->lvds_gen_cntl |= RADEON_LVDS_SEL_CRTC2;
+ save->lvds_gen_cntl = info->SavedReg.lvds_gen_cntl |
+ RADEON_LVDS_SEL_CRTC2;
}
@@ -5684,9 +5694,11 @@ static void RADEONInitRMXRegisters(ScrnI
Vratio = (float)yres/(float)info->PanelYRes;
}
- save->fp_vert_stretch &= RADEON_VERT_STRETCH_RESERVED;
- save->fp_horz_stretch &= (RADEON_HORZ_FP_LOOP_STRETCH |
- RADEON_HORZ_AUTO_RATIO_INC);
+ save->fp_vert_stretch = info->SavedReg.fp_vert_stretch &
+ RADEON_VERT_STRETCH_RESERVED;
+ save->fp_horz_stretch = info->SavedReg.fp_horz_stretch &
+ (RADEON_HORZ_FP_LOOP_STRETCH |
+ RADEON_HORZ_AUTO_RATIO_INC);
if (Hratio == 1.0 || !(mode->Flags & RADEON_USE_RMX)) {
save->fp_horz_stretch |= ((xres/8-1)<<16);
@@ -5717,9 +5729,10 @@ static void RADEONInitDACRegisters(ScrnI
if (IsPrimary) {
if ((info->ChipFamily == CHIP_FAMILY_R200) || IS_R300_VARIANT) {
- save->disp_output_cntl &= ~RADEON_DISP_DAC_SOURCE_MASK;
+ save->disp_output_cntl = info->SavedReg.disp_output_cntl &
+ ~RADEON_DISP_DAC_SOURCE_MASK;
} else {
- save->dac2_cntl &= ~(RADEON_DAC2_DAC_CLK_SEL);
+ save->dac2_cntl = info->SavedReg.dac2_cntl & ~(RADEON_DAC2_DAC_CLK_SEL);
}
save->dac_cntl = (RADEON_DAC_MASK_ALL
| RADEON_DAC_VGA_ADR_EN
@@ -5727,10 +5740,11 @@ static void RADEONInitDACRegisters(ScrnI
} else {
if ((info->ChipFamily == CHIP_FAMILY_R200) || IS_R300_VARIANT) {
- save->disp_output_cntl &= ~RADEON_DISP_DAC_SOURCE_MASK;
+ save->disp_output_cntl = info->SavedReg.disp_output_cntl &
+ ~RADEON_DISP_DAC_SOURCE_MASK;
save->disp_output_cntl |= RADEON_DISP_DAC_SOURCE_CRTC2;
} else {
- save->dac2_cntl |= RADEON_DAC2_DAC_CLK_SEL;
+ save->dac2_cntl = info->SavedReg.dac2_cntl | RADEON_DAC2_DAC_CLK_SEL;
}
}
}
@@ -5744,27 +5758,33 @@ static void RADEONInitDAC2Registers(Scrn
RADEONInitTvDacCntl(pScrn, save);
if (IsPrimary) {
- /*save->crtc2_gen_cntl |= RADEON_CRTC2_CRT2_ON;*/
- save->dac2_cntl |= RADEON_DAC2_DAC2_CLK_SEL;
+ /*save->crtc2_gen_cntl = info->SavedReg.crtc2_gen_cntl | RADEON_CRTC2_CRT2_ON;*/
+ save->dac2_cntl = info->SavedReg.dac2_cntl | RADEON_DAC2_DAC2_CLK_SEL;
if (IS_R300_VARIANT) {
- save->disp_output_cntl &= ~RADEON_DISP_TVDAC_SOURCE_MASK;
+ save->disp_output_cntl = info->SavedReg.disp_output_cntl &
+ ~RADEON_DISP_TVDAC_SOURCE_MASK;
save->disp_output_cntl |= RADEON_DISP_TVDAC_SOURCE_CRTC;
} else if (info->ChipFamily == CHIP_FAMILY_R200) {
- save->fp2_gen_cntl &= ~(R200_FP2_SOURCE_SEL_MASK |
+ save->fp2_gen_cntl = info->SavedReg.fp2_gen_cntl &
+ ~(R200_FP2_SOURCE_SEL_MASK |
RADEON_FP2_DVO_RATE_SEL_SDR);
- /*save->fp2_gen_cntl |= (RADEON_FP2_ON |
+ /*save->fp2_gen_cntl = info->SavedReg.fp2_gen_cntl |
+ (RADEON_FP2_ON |
RADEON_FP2_BLANK_EN |
- RADEON_FP2_DVO_EN);*/
+ RADEON_FP2_DVO_EN);*/
} else {
- save->disp_hw_debug |= RADEON_CRT2_DISP1_SEL;
+ save->disp_hw_debug = info->SavedReg.disp_hw_debug | RADEON_CRT2_DISP1_SEL;
}
} else {
+ save->dac2_cntl = info->SavedReg.dac2_cntl | RADEON_DAC2_DAC2_CLK_SEL;
if (IS_R300_VARIANT) {
- save->dac2_cntl |= RADEON_DAC2_DAC2_CLK_SEL;
- save->disp_output_cntl &= ~RADEON_DISP_TVDAC_SOURCE_MASK;
+ save->dac2_cntl = info->SavedReg.dac2_cntl | RADEON_DAC2_DAC2_CLK_SEL;
+ save->disp_output_cntl = info->SavedReg.disp_output_cntl &
+ ~RADEON_DISP_TVDAC_SOURCE_MASK;
save->disp_output_cntl |= RADEON_DISP_TVDAC_SOURCE_CRTC2;
} else if (info->ChipFamily == CHIP_FAMILY_R200) {
- save->fp2_gen_cntl &= ~(R200_FP2_SOURCE_SEL_MASK |
+ save->fp2_gen_cntl = info->SavedReg.fp2_gen_cntl &
+ ~(R200_FP2_SOURCE_SEL_MASK |
RADEON_FP2_DVO_RATE_SEL_SDR);
save->fp2_gen_cntl |= (R200_FP2_SOURCE_SEL_CRTC2 /*|
RADEON_FP2_BLANK_EN |
@@ -5773,8 +5793,9 @@ static void RADEONInitDAC2Registers(Scrn
/*save->fp_h2_sync_strt_wid = save->crtc2_h_sync_strt_wid;
save->fp_v2_sync_strt_wid = save->crtc2_v_sync_strt_wid;*/
} else {
- save->dac2_cntl |= RADEON_DAC2_DAC2_CLK_SEL;
- save->disp_hw_debug &= ~RADEON_CRT2_DISP1_SEL;
+ save->dac2_cntl = info->SavedReg.dac2_cntl | RADEON_DAC2_DAC2_CLK_SEL;
+ save->disp_hw_debug = info->SavedReg.disp_hw_debug &
+ ~RADEON_CRT2_DISP1_SEL;
}
}
}
@@ -5956,8 +5977,10 @@ static Bool RADEONInitCrtcRegisters(Scrn
*/
if (!info->IsSwitching) {
save->fp_gen_cntl = 0;
- save->fp_vert_stretch &= RADEON_VERT_STRETCH_RESERVED;
- save->fp_horz_stretch &= (RADEON_HORZ_FP_LOOP_STRETCH |
+ save->fp_vert_stretch = info->SavedReg.fp_vert_stretch &
+ RADEON_VERT_STRETCH_RESERVED;
+ save->fp_horz_stretch = info->SavedReg.fp_horz_stretch &
+ (RADEON_HORZ_FP_LOOP_STRETCH |
RADEON_HORZ_AUTO_RATIO_INC);
}
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