xf86-video-intel: Branch 'modesetting' - src/i830_exa.c

[Eric Anholt]

 src/i830_exa.c |    3 ++-
 1 files changed, 2 insertions(+), 1 deletion(-)

New commits:
diff-tree c3aed56d46baba057d83dc6ea12c6b4e705e54ba (from 98318dfcc99264fb7b7ef34568712812aa6300b6)
Author: Eric Anholt <eric at anholt.net>
Date:   Fri Feb 9 13:16:37 2007 -0800

    Fix comments on 965 pitch alignment restrictions.

diff --git a/src/i830_exa.c b/src/i830_exa.c
index c3a4c40..42552d4 100644
--- a/src/i830_exa.c
+++ b/src/i830_exa.c
@@ -346,7 +346,8 @@ I830EXAInit(ScreenPtr pScreen)
      * i965 limits 3D surface to 4kB-aligned offset if tiled.
      * i965 limits 3D surfaces to w,h of ?,8192.
      * i965 limits 3D surface to pitch of 1B - 128kB.
-     * i965 limits 3D surface pitch alignment to 512B, only if tiled.
+     * i965 limits 3D surface pitch alignment to 1 or 2 times the element size.
+     * i965 limits 3D surface pitch alignment to 512B if tiled.
      * i965 limits 3D destination drawing rect to w,h of 8192,8192.
      *
      * i915 limits 3D textures to 4B-aligned offset if un-tiled.