xf86-video-intel: Branch 'modesetting' - 4 commits - src/common.h src/i810_driver.c src/i830_accel.c src/i830_dga.c src/i830_dri.c src/i830_driver.c src/i830_exa.c src/i830_exa_render.c src/i830.h src/i830_memory.c src/i830_render.c src/i830_rotate.c src/i830_xaa.c src/i915_exa_render.c src/i915_render.c src/i915_video.c src/i965_exa_render.c src/i965_render.c src/Makefile.am src/rotation_sf0.g4a src/rotation_sf90.g4a src/rotation_sf_prog0.h src/rotation_sf_prog90.h src/rotation_wm0.g4a src/rotation_wm90.g4a src/rotation_wm_prog0.h src/rotation_wm_prog90.h
Eric Anholt
anholt at kemper.freedesktop.org
Thu Feb 1 00:03:52 EET 2007
src/Makefile.am | 7
src/common.h | 11
src/i810_driver.c | 3
src/i830.h | 70 -
src/i830_accel.c | 30
src/i830_dga.c | 10
src/i830_dri.c | 55 -
src/i830_driver.c | 52 -
src/i830_exa.c | 145 ---
src/i830_memory.c | 196 ----
src/i830_render.c | 295 ++++---
src/i830_rotate.c | 1908 -----------------------------------------------
src/i830_xaa.c | 169 ++++
src/i915_render.c | 118 +-
src/i915_video.c | 12
src/i965_render.c | 916 +++++++++++-----------
src/rotation_sf0.g4a | 17
src/rotation_sf90.g4a | 17
src/rotation_sf_prog0.h | 17
src/rotation_sf_prog90.h | 17
src/rotation_wm0.g4a | 123 ---
src/rotation_wm90.g4a | 127 ---
src/rotation_wm_prog0.h | 68 -
src/rotation_wm_prog90.h | 68 -
24 files changed, 1021 insertions(+), 3430 deletions(-)
New commits:
diff-tree 5238ff9c80718f9f8baa06123aa1bb6e3193fce6 (from c47210d94ed17ad9e8e489a1e1886732e6dc7220)
Author: Eric Anholt <eric at anholt.net>
Date: Wed Jan 31 14:01:41 2007 -0800
Naming and formatting cleanup in Render acceleration code.
diff --git a/src/i830.h b/src/i830.h
index 4996cdd..42933f9 100644
--- a/src/i830.h
+++ b/src/i830.h
@@ -639,30 +639,29 @@ DisplayModePtr i830_ddc_get_modes(xf86Ou
/* i830_tv.c */
void i830_tv_init(ScrnInfoPtr pScrn);
-extern Bool I830EXACheckComposite(int, PicturePtr, PicturePtr, PicturePtr);
-extern Bool I830EXAPrepareComposite(int, PicturePtr, PicturePtr, PicturePtr,
- PixmapPtr, PixmapPtr, PixmapPtr);
-extern Bool I915EXACheckComposite(int, PicturePtr, PicturePtr, PicturePtr);
-extern Bool I915EXAPrepareComposite(int, PicturePtr, PicturePtr, PicturePtr,
- PixmapPtr, PixmapPtr, PixmapPtr);
-
-extern Bool I965EXACheckComposite(int, PicturePtr, PicturePtr, PicturePtr);
-extern Bool I965EXAPrepareComposite(int, PicturePtr, PicturePtr, PicturePtr,
- PixmapPtr, PixmapPtr, PixmapPtr);
-extern void I965EXAComposite(PixmapPtr pDst, int srcX, int srcY, int maskX,
- int maskY, int dstX, int dstY, int width, int height);
-void IntelEXAComposite(PixmapPtr pDst, int srcX, int srcY,
- int maskX, int maskY, int dstX, int dstY, int w, int h);
-void IntelEXADoneComposite(PixmapPtr pDst);
-
-extern Bool
-I830EXACheckComposite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture,
- PicturePtr pDstPicture);
-
-extern Bool
-I830EXAPrepareComposite(int op, PicturePtr pSrcPicture,
- PicturePtr pMaskPicture, PicturePtr pDstPicture,
- PixmapPtr pSrc, PixmapPtr pMask, PixmapPtr pDst);
+/* i830_render.c */
+Bool i830_check_composite(int op, PicturePtr pSrc, PicturePtr pMask,
+ PicturePtr pDst);
+Bool i830_prepare_composite(int op, PicturePtr pSrc, PicturePtr pMask,
+ PicturePtr pDst, PixmapPtr pSrcPixmap,
+ PixmapPtr pMaskPixmap, PixmapPtr pDstPixmap);
+void i830_composite(PixmapPtr pDst, int srcX, int srcY,
+ int maskX, int maskY, int dstX, int dstY, int w, int h);
+void i830_done_composite(PixmapPtr pDst);
+/* i915_render.c */
+Bool i915_check_composite(int op, PicturePtr pSrc, PicturePtr pMask,
+ PicturePtr pDst);
+Bool i915_prepare_composite(int op, PicturePtr pSrc, PicturePtr pMask,
+ PicturePtr pDst, PixmapPtr pSrcPixmap,
+ PixmapPtr pMaskPixmap, PixmapPtr pDstPixmap);
+/* i965_render.c */
+Bool i965_check_composite(int op, PicturePtr pSrc, PicturePtr pMask,
+ PicturePtr pDst);
+Bool i965_prepare_composite(int op, PicturePtr pSrc, PicturePtr pMask,
+ PicturePtr pDst, PixmapPtr pSrcPixmap,
+ PixmapPtr pMaskPixmap, PixmapPtr pDstPixmap);
+void i965_composite(PixmapPtr pDst, int srcX, int srcY,
+ int maskX, int maskY, int dstX, int dstY, int w, int h);
void
i830_get_transformed_coordinates(int x, int y, PictTransformPtr transform,
diff --git a/src/i830_exa.c b/src/i830_exa.c
index 8a1577a..97b4a98 100644
--- a/src/i830_exa.c
+++ b/src/i830_exa.c
@@ -398,23 +398,25 @@ I830EXAInit(ScreenPtr pScreen)
pI830->EXADriverPtr->DoneCopy = I830EXADoneCopy;
/* Composite */
- if (IS_I915G(pI830) || IS_I915GM(pI830) ||
- IS_I945G(pI830) || IS_I945GM(pI830)) {
- pI830->EXADriverPtr->CheckComposite = I915EXACheckComposite;
- pI830->EXADriverPtr->PrepareComposite = I915EXAPrepareComposite;
- pI830->EXADriverPtr->Composite = IntelEXAComposite;
- pI830->EXADriverPtr->DoneComposite = IntelEXADoneComposite;
- } else if (IS_I865G(pI830) || IS_I855(pI830) ||
- IS_845G(pI830) || IS_I830(pI830)) {
- pI830->EXADriverPtr->CheckComposite = I830EXACheckComposite;
- pI830->EXADriverPtr->PrepareComposite = I830EXAPrepareComposite;
- pI830->EXADriverPtr->Composite = IntelEXAComposite;
- pI830->EXADriverPtr->DoneComposite = IntelEXADoneComposite;
- } else if (IS_I965G(pI830)) {
- pI830->EXADriverPtr->CheckComposite = I965EXACheckComposite;
- pI830->EXADriverPtr->PrepareComposite = I965EXAPrepareComposite;
- pI830->EXADriverPtr->Composite = I965EXAComposite;
- pI830->EXADriverPtr->DoneComposite = IntelEXADoneComposite;
+ if (IS_I865G(pI830) || IS_I855(pI830) ||
+ IS_845G(pI830) || IS_I830(pI830))
+ {
+ pI830->EXADriverPtr->CheckComposite = i830_check_composite;
+ pI830->EXADriverPtr->PrepareComposite = i830_prepare_composite;
+ pI830->EXADriverPtr->Composite = i830_composite;
+ pI830->EXADriverPtr->DoneComposite = i830_done_composite;
+ } else if (IS_I915G(pI830) || IS_I915GM(pI830) ||
+ IS_I945G(pI830) || IS_I945GM(pI830))
+ {
+ pI830->EXADriverPtr->CheckComposite = i915_check_composite;
+ pI830->EXADriverPtr->PrepareComposite = i915_prepare_composite;
+ pI830->EXADriverPtr->Composite = i830_composite;
+ pI830->EXADriverPtr->DoneComposite = i830_done_composite;
+ } else {
+ pI830->EXADriverPtr->CheckComposite = i965_check_composite;
+ pI830->EXADriverPtr->PrepareComposite = i965_prepare_composite;
+ pI830->EXADriverPtr->Composite = i965_composite;
+ pI830->EXADriverPtr->DoneComposite = i830_done_composite;
}
if(!exaDriverInit(pScreen, pI830->EXADriverPtr)) {
diff --git a/src/i830_render.c b/src/i830_render.c
index c335f6d..9933843 100644
--- a/src/i830_render.c
+++ b/src/i830_render.c
@@ -48,7 +48,7 @@ do { \
#define I830FALLBACK(s, arg...) \
do { \
return FALSE; \
-} while(0)
+} while(0)
#endif
struct blendinfo {
@@ -112,7 +112,7 @@ struct formatinfo {
#define TB0A_ARG1_SEL_TEXEL2 (8 << 6)
#define TB0A_ARG1_SEL_TEXEL3 (9 << 6)
-static struct blendinfo I830BlendOp[] = {
+static struct blendinfo i830_blend_op[] = {
/* Clear */
{0, 0, BLENDFACTOR_ZERO, BLENDFACTOR_ZERO},
/* Src */
@@ -141,21 +141,20 @@ static struct blendinfo I830BlendOp[] =
{0, 0, BLENDFACTOR_ONE, BLENDFACTOR_ONE},
};
-
-static struct formatinfo I830TexFormats[] = {
- {PICT_a8r8g8b8, MT_32BIT_ARGB8888 },
- {PICT_x8r8g8b8, MT_32BIT_ARGB8888 },
- {PICT_a8b8g8r8, MT_32BIT_ABGR8888 },
- {PICT_x8b8g8r8, MT_32BIT_ABGR8888 },
- {PICT_r5g6b5, MT_16BIT_RGB565 },
- {PICT_a1r5g5b5, MT_16BIT_ARGB1555 },
- {PICT_x1r5g5b5, MT_16BIT_ARGB1555 },
- {PICT_a8, MT_8BIT_I8 },
+static struct formatinfo i830_tex_formats[] = {
+ {PICT_a8r8g8b8, MT_32BIT_ARGB8888 },
+ {PICT_x8r8g8b8, MT_32BIT_ARGB8888 },
+ {PICT_a8b8g8r8, MT_32BIT_ABGR8888 },
+ {PICT_x8b8g8r8, MT_32BIT_ABGR8888 },
+ {PICT_r5g6b5, MT_16BIT_RGB565 },
+ {PICT_a1r5g5b5, MT_16BIT_ARGB1555 },
+ {PICT_x1r5g5b5, MT_16BIT_ARGB1555 },
+ {PICT_a8, MT_8BIT_I8 },
};
-static Bool I830GetDestFormat(PicturePtr pDstPicture, CARD32 *dst_format)
+static Bool i830_get_dest_format(PicturePtr pDstPicture, CARD32 *dst_format)
{
- /* XXX: color buffer format for i830 */
+ /* XXX: color buffer format for i830 */
switch (pDstPicture->format) {
case PICT_a8r8g8b8:
case PICT_x8r8g8b8:
@@ -177,35 +176,35 @@ static Bool I830GetDestFormat(PicturePtr
break;
default:
I830FALLBACK("Unsupported dest format 0x%x\n",
- (int)pDstPicture->format);
+ (int)pDstPicture->format);
}
return TRUE;
}
-static CARD32 I830GetBlendCntl(int op, PicturePtr pMask, CARD32 dst_format)
+static CARD32 i830_get_blend_cntl(int op, PicturePtr pMask, CARD32 dst_format)
{
CARD32 sblend, dblend;
- sblend = I830BlendOp[op].src_blend;
- dblend = I830BlendOp[op].dst_blend;
+ sblend = i830_blend_op[op].src_blend;
+ dblend = i830_blend_op[op].dst_blend;
/* If there's no dst alpha channel, adjust the blend op so that we'll treat
* it as always 1.
*/
- if (PICT_FORMAT_A(dst_format) == 0 && I830BlendOp[op].dst_alpha) {
+ if (PICT_FORMAT_A(dst_format) == 0 && i830_blend_op[op].dst_alpha) {
if (sblend == BLENDFACTOR_DST_ALPHA)
sblend = BLENDFACTOR_ONE;
else if (sblend == BLENDFACTOR_INV_DST_ALPHA)
sblend = BLENDFACTOR_ZERO;
}
- /* If the source alpha is being used, then we should only be in a case where
- * the source blend factor is 0, and the source blend value is the mask
- * channels multiplied by the source picture's alpha.
+ /* If the source alpha is being used, then we should only be in a case
+ * where the source blend factor is 0, and the source blend value is the
+ * mask channels multiplied by the source picture's alpha.
*/
- if (pMask && pMask->componentAlpha && I830BlendOp[op].src_alpha) {
+ if (pMask && pMask->componentAlpha && i830_blend_op[op].src_alpha) {
if (dblend == BLENDFACTOR_SRC_ALPHA) {
dblend = BLENDFACTOR_SRC_COLR;
} else if (dblend == BLENDFACTOR_INV_SRC_ALPHA) {
@@ -213,27 +212,28 @@ static CARD32 I830GetBlendCntl(int op, P
}
}
- return (sblend << S8_SRC_BLEND_FACTOR_SHIFT) |
- (dblend << S8_DST_BLEND_FACTOR_SHIFT);
+ return (sblend << S8_SRC_BLEND_FACTOR_SHIFT) |
+ (dblend << S8_DST_BLEND_FACTOR_SHIFT);
}
-static Bool I830CheckCompositeTexture(PicturePtr pPict, int unit)
+static Bool i830_check_composite_texture(PicturePtr pPict, int unit)
{
int w = pPict->pDrawable->width;
int h = pPict->pDrawable->height;
int i;
-
+
if ((w > 0x7ff) || (h > 0x7ff))
I830FALLBACK("Picture w/h too large (%dx%d)\n", w, h);
- for (i = 0; i < sizeof(I830TexFormats) / sizeof(I830TexFormats[0]); i++)
+ for (i = 0; i < sizeof(i830_tex_formats) / sizeof(i830_tex_formats[0]);
+ i++)
{
- if (I830TexFormats[i].fmt == pPict->format)
+ if (i830_tex_formats[i].fmt == pPict->format)
break;
}
- if (i == sizeof(I830TexFormats) / sizeof(I830TexFormats[0]))
+ if (i == sizeof(i830_tex_formats) / sizeof(i830_tex_formats[0]))
I830FALLBACK("Unsupported picture format 0x%x\n",
- (int)pPict->format);
+ (int)pPict->format);
/* FIXME: fix repeat support */
if (pPict->repeat)
@@ -241,20 +241,22 @@ static Bool I830CheckCompositeTexture(Pi
if (pPict->filter != PictFilterNearest &&
pPict->filter != PictFilterBilinear)
+ {
I830FALLBACK("Unsupported filter 0x%x\n", pPict->filter);
+ }
return TRUE;
}
static Bool
-I830TextureSetup(PicturePtr pPict, PixmapPtr pPix, int unit)
+i830_texture_setup(PicturePtr pPict, PixmapPtr pPix, int unit)
{
ScrnInfoPtr pScrn = xf86Screens[pPict->pDrawable->pScreen->myNum];
I830Ptr pI830 = I830PTR(pScrn);
CARD32 format, offset, pitch, filter;
int w, h, i;
- CARD32 wrap_mode = TEXCOORDMODE_CLAMP;
+ CARD32 wrap_mode = TEXCOORDMODE_CLAMP;
offset = intel_get_pixmap_offset(pPix);
pitch = intel_get_pixmap_pitch(pPix);
@@ -263,25 +265,27 @@ I830TextureSetup(PicturePtr pPict, Pixma
pI830->scale_units[unit][0] = pPix->drawable.width;
pI830->scale_units[unit][1] = pPix->drawable.height;
- for (i = 0; i < sizeof(I830TexFormats) / sizeof(I830TexFormats[0]); i++) {
- if (I830TexFormats[i].fmt == pPict->format)
+ for (i = 0; i < sizeof(i830_tex_formats) / sizeof(i830_tex_formats[0]);
+ i++)
+ {
+ if (i830_tex_formats[i].fmt == pPict->format)
break;
}
- if ( i == sizeof(I830TexFormats)/ sizeof(I830TexFormats[0]) )
+ if (i == sizeof(i830_tex_formats)/ sizeof(i830_tex_formats[0]))
I830FALLBACK("unknown texture format\n");
- format = I830TexFormats[i].card_fmt;
+ format = i830_tex_formats[i].card_fmt;
- if (pPict->repeat)
+ if (pPict->repeat)
wrap_mode = TEXCOORDMODE_WRAP; /* XXX: correct ? */
-
+
switch (pPict->filter) {
case PictFilterNearest:
- filter = ((FILTER_NEAREST<<TM0S3_MAG_FILTER_SHIFT) |
- (FILTER_NEAREST<<TM0S3_MIN_FILTER_SHIFT));
+ filter = ((FILTER_NEAREST<<TM0S3_MAG_FILTER_SHIFT) |
+ (FILTER_NEAREST<<TM0S3_MIN_FILTER_SHIFT));
break;
case PictFilterBilinear:
- filter = ((FILTER_LINEAR<<TM0S3_MAG_FILTER_SHIFT) |
- (FILTER_LINEAR<<TM0S3_MIN_FILTER_SHIFT));
+ filter = ((FILTER_LINEAR<<TM0S3_MAG_FILTER_SHIFT) |
+ (FILTER_LINEAR<<TM0S3_MIN_FILTER_SHIFT));
break;
default:
filter = 0;
@@ -300,7 +304,7 @@ I830TextureSetup(PicturePtr pPict, Pixma
OUT_RING(_3DSTATE_MAP_INFO_CMD);
OUT_RING(format | TEXMAP_INDEX(unit) | MAP_FORMAT_2D);
OUT_RING(((pPix->drawable.height - 1) << 16) |
- (pPix->drawable.width - 1)); /* height, width */
+ (pPix->drawable.width - 1)); /* height, width */
OUT_RING(offset); /* map address */
OUT_RING(((pitch / 4) - 1) << 2); /* map pitch */
OUT_RING(0);
@@ -310,16 +314,19 @@ I830TextureSetup(PicturePtr pPict, Pixma
{
BEGIN_LP_RING(2);
/* coord sets */
- OUT_RING(_3DSTATE_MAP_COORD_SET_CMD | TEXCOORD_SET(unit) |
- ENABLE_TEXCOORD_PARAMS | TEXCOORDS_ARE_NORMAL |
- TEXCOORDTYPE_CARTESIAN | ENABLE_ADDR_V_CNTL |
- TEXCOORD_ADDR_V_MODE(wrap_mode) |
- ENABLE_ADDR_U_CNTL | TEXCOORD_ADDR_U_MODE(wrap_mode));
+ OUT_RING(_3DSTATE_MAP_COORD_SET_CMD | TEXCOORD_SET(unit) |
+ ENABLE_TEXCOORD_PARAMS | TEXCOORDS_ARE_NORMAL |
+ TEXCOORDTYPE_CARTESIAN | ENABLE_ADDR_V_CNTL |
+ TEXCOORD_ADDR_V_MODE(wrap_mode) |
+ ENABLE_ADDR_U_CNTL | TEXCOORD_ADDR_U_MODE(wrap_mode));
OUT_RING(MI_NOOP);
/* XXX: filter seems hang engine...*/
#if 0
- OUT_RING(I830_STATE3D_MAP_FILTER | FILTER_MAP_INDEX(unit) | ENABLE_KEYS| DISABLE_COLOR_KEY | DISABLE_CHROMA_KEY | DISABLE_KILL_PIXEL |ENABLE_MIP_MODE_FILTER | MIPFILTER_NONE | filter);
+ OUT_RING(I830_STATE3D_MAP_FILTER | FILTER_MAP_INDEX(unit) |
+ ENABLE_KEYS| DISABLE_COLOR_KEY | DISABLE_CHROMA_KEY |
+ DISABLE_KILL_PIXEL |ENABLE_MIP_MODE_FILTER |
+ MIPFILTER_NONE | filter);
OUT_RING(0);
#endif
@@ -334,63 +341,63 @@ I830TextureSetup(PicturePtr pPict, Pixma
ErrorF("try to sync to show any errors...");
I830Sync(pScrn);
#endif
-
+
return TRUE;
}
Bool
-I830EXACheckComposite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture,
- PicturePtr pDstPicture)
+i830_check_composite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture,
+ PicturePtr pDstPicture)
{
CARD32 tmp1;
-
+
/* Check for unsupported compositing operations. */
- if (op >= sizeof(I830BlendOp) / sizeof(I830BlendOp[0]))
+ if (op >= sizeof(i830_blend_op) / sizeof(i830_blend_op[0]))
I830FALLBACK("Unsupported Composite op 0x%x\n", op);
-
+
if (pMaskPicture != NULL && pMaskPicture->componentAlpha) {
/* Check if it's component alpha that relies on a source alpha and on
* the source value. We can only get one of those into the single
* source value that we get to blend with.
*/
- if (I830BlendOp[op].src_alpha &&
- (I830BlendOp[op].src_blend != BLENDFACTOR_ZERO))
+ if (i830_blend_op[op].src_alpha &&
+ (i830_blend_op[op].src_blend != BLENDFACTOR_ZERO))
I830FALLBACK("Component alpha not supported with source "
- "alpha and source value blending.\n");
+ "alpha and source value blending.\n");
}
- if (!I830CheckCompositeTexture(pSrcPicture, 0))
+ if (!i830_check_composite_texture(pSrcPicture, 0))
I830FALLBACK("Check Src picture texture\n");
- if (pMaskPicture != NULL && !I830CheckCompositeTexture(pMaskPicture, 1))
+ if (pMaskPicture != NULL && !i830_check_composite_texture(pMaskPicture, 1))
I830FALLBACK("Check Mask picture texture\n");
- if (!I830GetDestFormat(pDstPicture, &tmp1))
+ if (!i830_get_dest_format(pDstPicture, &tmp1))
I830FALLBACK("Get Color buffer format\n");
return TRUE;
}
Bool
-I830EXAPrepareComposite(int op, PicturePtr pSrcPicture,
- PicturePtr pMaskPicture, PicturePtr pDstPicture,
- PixmapPtr pSrc, PixmapPtr pMask, PixmapPtr pDst)
+i830_prepare_composite(int op, PicturePtr pSrcPicture,
+ PicturePtr pMaskPicture, PicturePtr pDstPicture,
+ PixmapPtr pSrc, PixmapPtr pMask, PixmapPtr pDst)
{
-/* XXX: setup texture map from pixmap, vertex format, blend cntl */
+ /* XXX: setup texture map from pixmap, vertex format, blend cntl */
ScrnInfoPtr pScrn = xf86Screens[pSrcPicture->pDrawable->pScreen->myNum];
I830Ptr pI830 = I830PTR(pScrn);
CARD32 dst_format, dst_offset, dst_pitch;
- I830GetDestFormat(pDstPicture, &dst_format);
+ i830_get_dest_format(pDstPicture, &dst_format);
dst_offset = intel_get_pixmap_offset(pDst);
dst_pitch = intel_get_pixmap_pitch(pDst);
pI830->last_3d = LAST_3D_RENDER;
- if (!I830TextureSetup(pSrcPicture, pSrc, 0))
+ if (!i830_texture_setup(pSrcPicture, pSrc, 0))
I830FALLBACK("fail to setup src texture\n");
if (pMask != NULL) {
- if (!I830TextureSetup(pMaskPicture, pMask, 1))
- I830FALLBACK("fail to setup mask texture\n");
+ if (!i830_texture_setup(pMaskPicture, pMask, 1))
+ I830FALLBACK("fail to setup mask texture\n");
} else {
pI830->transform[1] = NULL;
pI830->scale_units[1][0] = -1;
@@ -398,17 +405,16 @@ I830EXAPrepareComposite(int op, PictureP
}
{
-
CARD32 cblend, ablend, blendctl, vf2;
BEGIN_LP_RING(22+6);
-
- /*color buffer*/
+
+ /* color buffer */
OUT_RING(_3DSTATE_BUF_INFO_CMD);
OUT_RING(BUF_3D_ID_COLOR_BACK| BUF_3D_PITCH(dst_pitch));
OUT_RING(BUF_3D_ADDR(dst_offset));
OUT_RING(MI_NOOP);
-
+
OUT_RING(_3DSTATE_DST_BUF_VARS_CMD);
OUT_RING(dst_format);
@@ -423,10 +429,10 @@ I830EXAPrepareComposite(int op, PictureP
OUT_RING(_3DSTATE_DFLT_SPEC_CMD);
OUT_RING(0);
-
+
OUT_RING(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(3) | 0);
- OUT_RING((1 << S3_POINT_WIDTH_SHIFT) | (2 << S3_LINE_WIDTH_SHIFT) |
- S3_CULLMODE_NONE | S3_VERTEXHAS_XY);
+ OUT_RING((1 << S3_POINT_WIDTH_SHIFT) | (2 << S3_LINE_WIDTH_SHIFT) |
+ S3_CULLMODE_NONE | S3_VERTEXHAS_XY);
OUT_RING(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(2) | 0);
if (pMask)
vf2 = 2 << 12; /* 2 texture coord sets */
@@ -437,7 +443,7 @@ I830EXAPrepareComposite(int op, PictureP
vf2 |= (TEXCOORDFMT_2D << 18);
else
vf2 |= (TEXCOORDFMT_1D << 18);
-
+
vf2 |= (TEXCOORDFMT_1D << 20);
vf2 |= (TEXCOORDFMT_1D << 22);
vf2 |= (TEXCOORDFMT_1D << 24);
@@ -452,10 +458,10 @@ I830EXAPrepareComposite(int op, PictureP
/* IN operator: Multiply src by mask components or mask alpha.*/
/* TEXBLENDOP_MODULE: arg1*arg2 */
cblend = TB0C_LAST_STAGE | TB0C_RESULT_SCALE_1X | TB0C_OP_MODULE |
- TB0C_OUTPUT_WRITE_CURRENT;
- ablend = TB0A_RESULT_SCALE_1X | TB0A_OP_MODULE |
+ TB0C_OUTPUT_WRITE_CURRENT;
+ ablend = TB0A_RESULT_SCALE_1X | TB0A_OP_MODULE |
TB0A_OUTPUT_WRITE_CURRENT;
-
+
cblend |= TB0C_ARG1_SEL_TEXEL0;
ablend |= TB0A_ARG1_SEL_TEXEL0;
if (pMask) {
@@ -465,11 +471,12 @@ I830EXAPrepareComposite(int op, PictureP
cblend |= (TB0C_ARG2_SEL_TEXEL1 | TB0C_ARG2_REPLICATE_ALPHA);
ablend |= TB0A_ARG2_SEL_TEXEL1;
} else {
- cblend |= TB0C_ARG2_SEL_ONE;
- ablend |= TB0A_ARG2_SEL_ONE;
+ cblend |= TB0C_ARG2_SEL_ONE;
+ ablend |= TB0A_ARG2_SEL_ONE;
}
-
- OUT_RING(_3DSTATE_LOAD_STATE_IMMEDIATE_2 | LOAD_TEXTURE_BLEND_STAGE(0)|1);
+
+ OUT_RING(_3DSTATE_LOAD_STATE_IMMEDIATE_2 |
+ LOAD_TEXTURE_BLEND_STAGE(0)|1);
OUT_RING(cblend);
OUT_RING(ablend);
OUT_RING(0);
@@ -477,16 +484,16 @@ I830EXAPrepareComposite(int op, PictureP
OUT_RING(MI_FLUSH | MI_WRITE_DIRTY_STATE | MI_INVALIDATE_MAP_CACHE);
OUT_RING(MI_NOOP); /* pad to quadword */
- blendctl = I830GetBlendCntl(op, pMaskPicture, pDstPicture->format);
+ blendctl = i830_get_blend_cntl(op, pMaskPicture, pDstPicture->format);
OUT_RING(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(8) | 0);
OUT_RING(S8_ENABLE_COLOR_BLEND | S8_BLENDFUNC_ADD |(blendctl<<4) |
- S8_ENABLE_COLOR_BUFFER_WRITE);
+ S8_ENABLE_COLOR_BUFFER_WRITE);
ADVANCE_LP_RING();
}
#ifdef I830DEBUG
- Error("try to sync to show any errors...");
- I830Sync(pScrn);
+ Error("try to sync to show any errors...");
+ I830Sync(pScrn);
#endif
return TRUE;
@@ -499,8 +506,8 @@ I830EXAPrepareComposite(int op, PictureP
* This function is shared between i830 and i915 generation code.
*/
void
-IntelEXAComposite(PixmapPtr pDst, int srcX, int srcY, int maskX, int maskY,
- int dstX, int dstY, int w, int h)
+i830_composite(PixmapPtr pDst, int srcX, int srcY, int maskX, int maskY,
+ int dstX, int dstY, int w, int h)
{
ScrnInfoPtr pScrn = xf86Screens[pDst->drawable.pScreen->myNum];
I830Ptr pI830 = I830PTR(pScrn);
@@ -533,7 +540,7 @@ IntelEXAComposite(PixmapPtr pDst, int sr
}
{
- int vertex_count;
+ int vertex_count;
if (has_mask)
vertex_count = 3*6;
@@ -555,8 +562,8 @@ IntelEXAComposite(PixmapPtr pDst, int sr
OUT_RING_F(src_x[0] / pI830->scale_units[0][0]);
OUT_RING_F(src_y[0] / pI830->scale_units[0][1]);
if (has_mask) {
- OUT_RING_F(mask_x[0] / pI830->scale_units[1][0]);
- OUT_RING_F(mask_y[0] / pI830->scale_units[1][1]);
+ OUT_RING_F(mask_x[0] / pI830->scale_units[1][0]);
+ OUT_RING_F(mask_y[0] / pI830->scale_units[1][1]);
}
OUT_RING_F(dstX);
@@ -564,8 +571,8 @@ IntelEXAComposite(PixmapPtr pDst, int sr
OUT_RING_F(src_x[1] / pI830->scale_units[0][0]);
OUT_RING_F(src_y[1] / pI830->scale_units[0][1]);
if (has_mask) {
- OUT_RING_F(mask_x[1] / pI830->scale_units[1][0]);
- OUT_RING_F(mask_y[1] / pI830->scale_units[1][1]);
+ OUT_RING_F(mask_x[1] / pI830->scale_units[1][0]);
+ OUT_RING_F(mask_y[1] / pI830->scale_units[1][1]);
}
OUT_RING_F(dstX + w);
@@ -573,15 +580,20 @@ IntelEXAComposite(PixmapPtr pDst, int sr
OUT_RING_F(src_x[2] / pI830->scale_units[0][0]);
OUT_RING_F(src_y[2] / pI830->scale_units[0][1]);
if (has_mask) {
- OUT_RING_F(mask_x[2] / pI830->scale_units[1][0]);
- OUT_RING_F(mask_y[2] / pI830->scale_units[1][1]);
+ OUT_RING_F(mask_x[2] / pI830->scale_units[1][0]);
+ OUT_RING_F(mask_y[2] / pI830->scale_units[1][1]);
}
ADVANCE_LP_RING();
}
}
+/**
+ * Do any cleanup from the Composite operation.
+ *
+ * This is shared between i830 through i965.
+ */
void
-IntelEXADoneComposite(PixmapPtr pDst)
+i830_done_composite(PixmapPtr pDst)
{
#if ALWAYS_SYNC
ScrnInfoPtr pScrn = xf86Screens[pDst->drawable.pScreen->myNum];
diff --git a/src/i830_xaa.c b/src/i830_xaa.c
index 96b23fa..dbe1521 100644
--- a/src/i830_xaa.c
+++ b/src/i830_xaa.c
@@ -240,26 +240,25 @@ I830XAAInit(ScreenPtr pScreen)
return FALSE;
if (ps != NULL) {
- if (IS_I915G(pI830) || IS_I915GM(pI830) ||
- IS_I945G(pI830) || IS_I945GM(pI830))
+ if (IS_I865G(pI830) || IS_I855(pI830) ||
+ IS_845G(pI830) || IS_I830(pI830))
{
- pI830->xaa_check_composite = I915EXACheckComposite;
- pI830->xaa_prepare_composite = I915EXAPrepareComposite;
- pI830->xaa_composite = IntelEXAComposite;
- pI830->xaa_done_composite = IntelEXADoneComposite;
- } else if (IS_I865G(pI830) || IS_I855(pI830) ||
- IS_845G(pI830) || IS_I830(pI830)) {
- pI830->xaa_check_composite = I830EXACheckComposite;
- pI830->xaa_prepare_composite = I830EXAPrepareComposite;
- pI830->xaa_composite = IntelEXAComposite;
- pI830->xaa_done_composite = IntelEXADoneComposite;
- } else if (IS_I965G(pI830)) {
- pI830->xaa_check_composite = I965EXACheckComposite;
- pI830->xaa_prepare_composite = I965EXAPrepareComposite;
- pI830->xaa_composite = I965EXAComposite;
- pI830->xaa_done_composite = IntelEXADoneComposite;
+ pI830->EXADriverPtr->CheckComposite = i830_check_composite;
+ pI830->EXADriverPtr->PrepareComposite = i830_prepare_composite;
+ pI830->EXADriverPtr->Composite = i830_composite;
+ pI830->EXADriverPtr->DoneComposite = i830_done_composite;
+ } else if (IS_I915G(pI830) || IS_I915GM(pI830) ||
+ IS_I945G(pI830) || IS_I945GM(pI830))
+ {
+ pI830->EXADriverPtr->CheckComposite = i915_check_composite;
+ pI830->EXADriverPtr->PrepareComposite = i915_prepare_composite;
+ pI830->EXADriverPtr->Composite = i830_composite;
+ pI830->EXADriverPtr->DoneComposite = i830_done_composite;
} else {
- return TRUE;
+ pI830->EXADriverPtr->CheckComposite = i965_check_composite;
+ pI830->EXADriverPtr->PrepareComposite = i965_prepare_composite;
+ pI830->EXADriverPtr->Composite = i965_composite;
+ pI830->EXADriverPtr->DoneComposite = i830_done_composite;
}
pI830->saved_composite = ps->Composite;
diff --git a/src/i915_render.c b/src/i915_render.c
index 2fb41ad..4d42242 100644
--- a/src/i915_render.c
+++ b/src/i915_render.c
@@ -64,7 +64,7 @@ struct blendinfo {
CARD32 dst_blend;
};
-static struct blendinfo I915BlendOp[] = {
+static struct blendinfo i915_blend_op[] = {
/* Clear */
{0, 0, BLENDFACT_ZERO, BLENDFACT_ZERO},
/* Src */
@@ -93,42 +93,42 @@ static struct blendinfo I915BlendOp[] =
{0, 0, BLENDFACT_ONE, BLENDFACT_ONE},
};
-static struct formatinfo I915TexFormats[] = {
- {PICT_a8r8g8b8, MAPSURF_32BIT | MT_32BIT_ARGB8888 },
- {PICT_x8r8g8b8, MAPSURF_32BIT | MT_32BIT_XRGB8888 },
- {PICT_a8b8g8r8, MAPSURF_32BIT | MT_32BIT_ABGR8888 },
- {PICT_x8b8g8r8, MAPSURF_32BIT | MT_32BIT_XBGR8888 },
- {PICT_r5g6b5, MAPSURF_16BIT | MT_16BIT_RGB565 },
- {PICT_a1r5g5b5, MAPSURF_16BIT | MT_16BIT_ARGB1555 },
- {PICT_x1r5g5b5, MAPSURF_16BIT | MT_16BIT_ARGB1555 },
- {PICT_a4r4g4b4, MAPSURF_16BIT | MT_16BIT_ARGB4444 },
- {PICT_x4r4g4b4, MAPSURF_16BIT | MT_16BIT_ARGB4444 },
- {PICT_a8, MAPSURF_8BIT | MT_8BIT_A8 },
+static struct formatinfo i915_tex_formats[] = {
+ {PICT_a8r8g8b8, MAPSURF_32BIT | MT_32BIT_ARGB8888 },
+ {PICT_x8r8g8b8, MAPSURF_32BIT | MT_32BIT_XRGB8888 },
+ {PICT_a8b8g8r8, MAPSURF_32BIT | MT_32BIT_ABGR8888 },
+ {PICT_x8b8g8r8, MAPSURF_32BIT | MT_32BIT_XBGR8888 },
+ {PICT_r5g6b5, MAPSURF_16BIT | MT_16BIT_RGB565 },
+ {PICT_a1r5g5b5, MAPSURF_16BIT | MT_16BIT_ARGB1555 },
+ {PICT_x1r5g5b5, MAPSURF_16BIT | MT_16BIT_ARGB1555 },
+ {PICT_a4r4g4b4, MAPSURF_16BIT | MT_16BIT_ARGB4444 },
+ {PICT_x4r4g4b4, MAPSURF_16BIT | MT_16BIT_ARGB4444 },
+ {PICT_a8, MAPSURF_8BIT | MT_8BIT_A8 },
};
-static CARD32 I915GetBlendCntl(int op, PicturePtr pMask, CARD32 dst_format)
+static CARD32 i915_get_blend_cntl(int op, PicturePtr pMask, CARD32 dst_format)
{
CARD32 sblend, dblend;
- sblend = I915BlendOp[op].src_blend;
- dblend = I915BlendOp[op].dst_blend;
+ sblend = i915_blend_op[op].src_blend;
+ dblend = i915_blend_op[op].dst_blend;
/* If there's no dst alpha channel, adjust the blend op so that we'll treat
* it as always 1.
*/
- if (PICT_FORMAT_A(dst_format) == 0 && I915BlendOp[op].dst_alpha) {
+ if (PICT_FORMAT_A(dst_format) == 0 && i915_blend_op[op].dst_alpha) {
if (sblend == BLENDFACT_DST_ALPHA)
sblend = BLENDFACT_ONE;
else if (sblend == BLENDFACT_INV_DST_ALPHA)
sblend = BLENDFACT_ZERO;
}
- /* If the source alpha is being used, then we should only be in a case where
- * the source blend factor is 0, and the source blend value is the mask
- * channels multiplied by the source picture's alpha.
+ /* If the source alpha is being used, then we should only be in a case
+ * where the source blend factor is 0, and the source blend value is the
+ * mask channels multiplied by the source picture's alpha.
*/
if (pMask && pMask->componentAlpha && PICT_FORMAT_RGB(pMask->format) &&
- I915BlendOp[op].src_alpha)
+ i915_blend_op[op].src_alpha)
{
if (dblend == BLENDFACT_SRC_ALPHA) {
dblend = BLENDFACT_SRC_COLR;
@@ -141,7 +141,7 @@ static CARD32 I915GetBlendCntl(int op, P
(dblend << S6_CBUF_DST_BLEND_FACT_SHIFT);
}
-static Bool I915GetDestFormat(PicturePtr pDstPicture, CARD32 *dst_format)
+static Bool i915_get_dest_format(PicturePtr pDstPicture, CARD32 *dst_format)
{
switch (pDstPicture->format) {
case PICT_a8r8g8b8:
@@ -171,13 +171,13 @@ static Bool I915GetDestFormat(PicturePtr
break;
default:
I830FALLBACK("Unsupported dest format 0x%x\n",
- (int)pDstPicture->format);
+ (int)pDstPicture->format);
}
return TRUE;
}
-static Bool I915CheckCompositeTexture(PicturePtr pPict, int unit)
+static Bool i915_check_composite_texture(PicturePtr pPict, int unit)
{
int w = pPict->pDrawable->width;
int h = pPict->pDrawable->height;
@@ -186,14 +186,15 @@ static Bool I915CheckCompositeTexture(Pi
if ((w > 0x7ff) || (h > 0x7ff))
I830FALLBACK("Picture w/h too large (%dx%d)\n", w, h);
- for (i = 0; i < sizeof(I915TexFormats) / sizeof(I915TexFormats[0]); i++)
+ for (i = 0; i < sizeof(i915_tex_formats) / sizeof(i915_tex_formats[0]);
+ i++)
{
- if (I915TexFormats[i].fmt == pPict->format)
+ if (i915_tex_formats[i].fmt == pPict->format)
break;
}
- if (i == sizeof(I915TexFormats) / sizeof(I915TexFormats[0]))
+ if (i == sizeof(i915_tex_formats) / sizeof(i915_tex_formats[0]))
I830FALLBACK("Unsupported picture format 0x%x\n",
- (int)pPict->format);
+ (int)pPict->format);
if (pPict->repeat && pPict->repeatType != RepeatNormal)
I830FALLBACK("extended repeat (%d) not supported\n",
@@ -207,13 +208,13 @@ static Bool I915CheckCompositeTexture(Pi
}
Bool
-I915EXACheckComposite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture,
- PicturePtr pDstPicture)
+i915_check_composite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture,
+ PicturePtr pDstPicture)
{
CARD32 tmp1;
/* Check for unsupported compositing operations. */
- if (op >= sizeof(I915BlendOp) / sizeof(I915BlendOp[0]))
+ if (op >= sizeof(i915_blend_op) / sizeof(i915_blend_op[0]))
I830FALLBACK("Unsupported Composite op 0x%x\n", op);
if (pMaskPicture != NULL && pMaskPicture->componentAlpha &&
PICT_FORMAT_RGB(pMaskPicture->format))
@@ -222,25 +223,25 @@ I915EXACheckComposite(int op, PicturePtr
* the source value. We can only get one of those into the single
* source value that we get to blend with.
*/
- if (I915BlendOp[op].src_alpha &&
- (I915BlendOp[op].src_blend != BLENDFACT_ZERO))
+ if (i915_blend_op[op].src_alpha &&
+ (i915_blend_op[op].src_blend != BLENDFACT_ZERO))
I830FALLBACK("Component alpha not supported with source "
- "alpha and source value blending.\n");
+ "alpha and source value blending.\n");
}
- if (!I915CheckCompositeTexture(pSrcPicture, 0))
+ if (!i915_check_composite_texture(pSrcPicture, 0))
I830FALLBACK("Check Src picture texture\n");
- if (pMaskPicture != NULL && !I915CheckCompositeTexture(pMaskPicture, 1))
+ if (pMaskPicture != NULL && !i915_check_composite_texture(pMaskPicture, 1))
I830FALLBACK("Check Mask picture texture\n");
- if (!I915GetDestFormat(pDstPicture, &tmp1))
+ if (!i915_get_dest_format(pDstPicture, &tmp1))
I830FALLBACK("Get Color buffer format\n");
return TRUE;
}
static Bool
-I915TextureSetup(PicturePtr pPict, PixmapPtr pPix, int unit)
+i915_texture_setup(PicturePtr pPict, PixmapPtr pPix, int unit)
{
ScrnInfoPtr pScrn = xf86Screens[pPict->pDrawable->pScreen->myNum];
I830Ptr pI830 = I830PTR(pScrn);
@@ -255,13 +256,15 @@ I915TextureSetup(PicturePtr pPict, Pixma
pI830->scale_units[unit][0] = pPix->drawable.width;
pI830->scale_units[unit][1] = pPix->drawable.height;
- for (i = 0; i < sizeof(I915TexFormats) / sizeof(I915TexFormats[0]); i++) {
- if (I915TexFormats[i].fmt == pPict->format)
+ for (i = 0; i < sizeof(i915_tex_formats) / sizeof(i915_tex_formats[0]);
+ i++)
+ {
+ if (i915_tex_formats[i].fmt == pPict->format)
break;
}
- if (i == sizeof(I915TexFormats)/ sizeof(I915TexFormats[0]))
+ if (i == sizeof(i915_tex_formats)/ sizeof(i915_tex_formats[0]))
I830FALLBACK("unknown texture format\n");
- format = I915TexFormats[i].card_fmt;
+ format = i915_tex_formats[i].card_fmt;
if (pPict->repeat)
wrap_mode = TEXCOORDMODE_WRAP;
@@ -269,11 +272,11 @@ I915TextureSetup(PicturePtr pPict, Pixma
switch (pPict->filter) {
case PictFilterNearest:
filter = (FILTER_NEAREST << SS2_MAG_FILTER_SHIFT) |
- (FILTER_NEAREST << SS2_MIN_FILTER_SHIFT);
+ (FILTER_NEAREST << SS2_MIN_FILTER_SHIFT);
break;
case PictFilterBilinear:
filter = (FILTER_LINEAR << SS2_MAG_FILTER_SHIFT) |
- (FILTER_LINEAR << SS2_MIN_FILTER_SHIFT);
+ (FILTER_LINEAR << SS2_MIN_FILTER_SHIFT);
break;
default:
filter = 0;
@@ -288,7 +291,8 @@ I915TextureSetup(PicturePtr pPict, Pixma
pI830->samplerstate[unit * 3 + 1] |= MS3_USE_FENCE_REGS;
pI830->mapstate[unit * 3 + 2] = ((pitch / 4) - 1) << MS4_PITCH_SHIFT;
- pI830->samplerstate[unit * 3 + 0] = (MIPFILTER_NONE << SS2_MIP_FILTER_SHIFT);
+ pI830->samplerstate[unit * 3 + 0] = (MIPFILTER_NONE <<
+ SS2_MIP_FILTER_SHIFT);
pI830->samplerstate[unit * 3 + 0] |= filter;
pI830->samplerstate[unit * 3 + 1] = SS3_NORMALIZED_COORDS;
pI830->samplerstate[unit * 3 + 1] |= wrap_mode << SS3_TCX_ADDR_MODE_SHIFT;
@@ -302,9 +306,9 @@ I915TextureSetup(PicturePtr pPict, Pixma
}
Bool
-I915EXAPrepareComposite(int op, PicturePtr pSrcPicture,
- PicturePtr pMaskPicture, PicturePtr pDstPicture,
- PixmapPtr pSrc, PixmapPtr pMask, PixmapPtr pDst)
+i915_prepare_composite(int op, PicturePtr pSrcPicture,
+ PicturePtr pMaskPicture, PicturePtr pDstPicture,
+ PixmapPtr pSrc, PixmapPtr pMask, PixmapPtr pDst)
{
ScrnInfoPtr pScrn = xf86Screens[pSrcPicture->pDrawable->pScreen->myNum];
I830Ptr pI830 = I830PTR(pScrn);
@@ -317,16 +321,16 @@ I915EXAPrepareComposite(int op, PictureP
pI830->last_3d = LAST_3D_RENDER;
- I915GetDestFormat(pDstPicture, &dst_format);
+ i915_get_dest_format(pDstPicture, &dst_format);
dst_offset = intel_get_pixmap_offset(pDst);
dst_pitch = intel_get_pixmap_pitch(pDst);
FS_LOCALS(20);
- if (!I915TextureSetup(pSrcPicture, pSrc, 0))
+ if (!i915_texture_setup(pSrcPicture, pSrc, 0))
I830FALLBACK("fail to setup src texture\n");
if (pMask != NULL) {
- if (!I915TextureSetup(pMaskPicture, pMask, 1))
- I830FALLBACK("fail to setup mask texture\n");
+ if (!i915_texture_setup(pMaskPicture, pMask, 1))
+ I830FALLBACK("fail to setup mask texture\n");
} else {
pI830->transform[1] = NULL;
pI830->scale_units[1][0] = -1;
@@ -399,7 +403,7 @@ I915EXAPrepareComposite(int op, PictureP
OUT_RING(ss2);
OUT_RING((1 << S4_POINT_WIDTH_SHIFT) | S4_LINE_WIDTH_ONE |
S4_CULLMODE_NONE| S4_VFMT_XY);
- blendctl = I915GetBlendCntl(op, pMaskPicture, pDstPicture->format);
+ blendctl = i915_get_blend_cntl(op, pMaskPicture, pDstPicture->format);
OUT_RING(0x00000000); /* Disable stencil buffer */
OUT_RING(S6_CBUF_BLEND_ENABLE | S6_COLOR_WRITE_ENABLE |
(BLENDFUNC_ADD << S6_CBUF_BLEND_FUNC_SHIFT) | blendctl);
@@ -459,7 +463,7 @@ I915EXAPrepareComposite(int op, PictureP
if (pMaskPicture->componentAlpha &&
PICT_FORMAT_RGB(pMaskPicture->format))
{
- if (I915BlendOp[op].src_alpha) {
+ if (i915_blend_op[op].src_alpha) {
i915_fs_mul(FS_OC, i915_fs_operand(FS_R0, W, W, W, W),
i915_fs_operand_reg(FS_R1));
} else {
diff --git a/src/i965_render.c b/src/i965_render.c
index 99bd628..5ff174d 100644
--- a/src/i965_render.c
+++ b/src/i965_render.c
@@ -52,12 +52,9 @@ do { \
#define I830FALLBACK(s, arg...) \
do { \
return FALSE; \
-} while(0)
+} while(0)
#endif
-static void I965GetBlendCntl(int op, PicturePtr pMask, CARD32 dst_format,
- CARD32 *sblend, CARD32 *dblend);
-
struct blendinfo {
Bool dst_alpha;
Bool src_alpha;
@@ -73,7 +70,7 @@ struct formatinfo {
// refer vol2, 3d rasterization 3.8.1
/* defined in brw_defines.h */
-static struct blendinfo I965BlendOp[] = {
+static struct blendinfo i965_blend_op[] = {
/* Clear */
{0, 0, BRW_BLENDFACTOR_ZERO, BRW_BLENDFACTOR_ZERO},
/* Src */
@@ -102,28 +99,30 @@ static struct blendinfo I965BlendOp[] =
{0, 0, BRW_BLENDFACTOR_ONE, BRW_BLENDFACTOR_ONE},
};
-/* FIXME: surface format defined in brw_defines.h, shared Sampling engine 1.7.2*/
-static struct formatinfo I965TexFormats[] = {
- {PICT_a8r8g8b8, BRW_SURFACEFORMAT_B8G8R8A8_UNORM },
- {PICT_x8r8g8b8, BRW_SURFACEFORMAT_B8G8R8X8_UNORM },
- {PICT_a8b8g8r8, BRW_SURFACEFORMAT_R8G8B8A8_UNORM },
- {PICT_x8b8g8r8, BRW_SURFACEFORMAT_R8G8B8X8_UNORM },
- {PICT_r5g6b5, BRW_SURFACEFORMAT_B5G6R5_UNORM },
- {PICT_a1r5g5b5, BRW_SURFACEFORMAT_B5G5R5A1_UNORM },
- {PICT_a8, BRW_SURFACEFORMAT_A8_UNORM },
+/* FIXME: surface format defined in brw_defines.h, shared Sampling engine
+ * 1.7.2
+ */
+static struct formatinfo i965_tex_formats[] = {
+ {PICT_a8r8g8b8, BRW_SURFACEFORMAT_B8G8R8A8_UNORM },
+ {PICT_x8r8g8b8, BRW_SURFACEFORMAT_B8G8R8X8_UNORM },
+ {PICT_a8b8g8r8, BRW_SURFACEFORMAT_R8G8B8A8_UNORM },
+ {PICT_x8b8g8r8, BRW_SURFACEFORMAT_R8G8B8X8_UNORM },
+ {PICT_r5g6b5, BRW_SURFACEFORMAT_B5G6R5_UNORM },
+ {PICT_a1r5g5b5, BRW_SURFACEFORMAT_B5G5R5A1_UNORM },
+ {PICT_a8, BRW_SURFACEFORMAT_A8_UNORM },
};
-static void I965GetBlendCntl(int op, PicturePtr pMask, CARD32 dst_format,
- CARD32 *sblend, CARD32 *dblend)
+static void i965_get_blend_cntl(int op, PicturePtr pMask, CARD32 dst_format,
+ CARD32 *sblend, CARD32 *dblend)
{
- *sblend = I965BlendOp[op].src_blend;
- *dblend = I965BlendOp[op].dst_blend;
+ *sblend = i965_blend_op[op].src_blend;
+ *dblend = i965_blend_op[op].dst_blend;
/* If there's no dst alpha channel, adjust the blend op so that we'll treat
* it as always 1.
*/
- if (PICT_FORMAT_A(dst_format) == 0 && I965BlendOp[op].dst_alpha) {
+ if (PICT_FORMAT_A(dst_format) == 0 && i965_blend_op[op].dst_alpha) {
if (*sblend == BRW_BLENDFACTOR_DST_ALPHA)
*sblend = BRW_BLENDFACTOR_ONE;
else if (*sblend == BRW_BLENDFACTOR_INV_DST_ALPHA)
@@ -134,7 +133,7 @@ static void I965GetBlendCntl(int op, Pic
* the source blend factor is 0, and the source blend value is the mask
* channels multiplied by the source picture's alpha.
*/
- if (pMask && pMask->componentAlpha && I965BlendOp[op].src_alpha) {
+ if (pMask && pMask->componentAlpha && i965_blend_op[op].src_alpha) {
if (*dblend == BRW_BLENDFACTOR_SRC_ALPHA) {
*dblend = BRW_BLENDFACTOR_SRC_COLOR;
} else if (*dblend == BRW_BLENDFACTOR_INV_SRC_ALPHA) {
@@ -144,7 +143,7 @@ static void I965GetBlendCntl(int op, Pic
}
-static Bool I965GetDestFormat(PicturePtr pDstPicture, CARD32 *dst_format)
+static Bool i965_get_dest_format(PicturePtr pDstPicture, CARD32 *dst_format)
{
switch (pDstPicture->format) {
case PICT_a8r8g8b8:
@@ -172,33 +171,34 @@ static Bool I965GetDestFormat(PicturePtr
*/
case PICT_a4r4g4b4:
case PICT_x4r4g4b4:
- *dst_format = BRW_SURFACEFORMAT_B4G4R4A4_UNORM;
+ *dst_format = BRW_SURFACEFORMAT_B4G4R4A4_UNORM;
break;
default:
I830FALLBACK("Unsupported dest format 0x%x\n",
- (int)pDstPicture->format);
+ (int)pDstPicture->format);
}
return TRUE;
}
-static Bool I965CheckCompositeTexture(PicturePtr pPict, int unit)
+static Bool i965_check_composite_texture(PicturePtr pPict, int unit)
{
int w = pPict->pDrawable->width;
int h = pPict->pDrawable->height;
int i;
-
+
if ((w > 0x7ff) || (h > 0x7ff))
I830FALLBACK("Picture w/h too large (%dx%d)\n", w, h);
- for (i = 0; i < sizeof(I965TexFormats) / sizeof(I965TexFormats[0]); i++)
+ for (i = 0; i < sizeof(i965_tex_formats) / sizeof(i965_tex_formats[0]);
+ i++)
{
- if (I965TexFormats[i].fmt == pPict->format)
+ if (i965_tex_formats[i].fmt == pPict->format)
break;
}
- if (i == sizeof(I965TexFormats) / sizeof(I965TexFormats[0]))
+ if (i == sizeof(i965_tex_formats) / sizeof(i965_tex_formats[0]))
I830FALLBACK("Unsupported picture format 0x%x\n",
- (int)pPict->format);
+ (int)pPict->format);
if (pPict->repeat && pPict->repeatType != RepeatNormal)
I830FALLBACK("extended repeat (%d) not supported\n",
@@ -206,19 +206,21 @@ static Bool I965CheckCompositeTexture(Pi
if (pPict->filter != PictFilterNearest &&
pPict->filter != PictFilterBilinear)
+ {
I830FALLBACK("Unsupported filter 0x%x\n", pPict->filter);
+ }
return TRUE;
}
Bool
-I965EXACheckComposite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture,
- PicturePtr pDstPicture)
+i965_check_composite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture,
+ PicturePtr pDstPicture)
{
CARD32 tmp1;
-
+
/* Check for unsupported compositing operations. */
- if (op >= sizeof(I965BlendOp) / sizeof(I965BlendOp[0]))
+ if (op >= sizeof(i965_blend_op) / sizeof(i965_blend_op[0]))
I830FALLBACK("Unsupported Composite op 0x%x\n", op);
if (pMaskPicture != NULL && pMaskPicture->componentAlpha) {
@@ -226,20 +228,22 @@ I965EXACheckComposite(int op, PicturePtr
* the source value. We can only get one of those into the single
* source value that we get to blend with.
*/
- if (I965BlendOp[op].src_alpha &&
- (I965BlendOp[op].src_blend != BRW_BLENDFACTOR_ZERO))
- I830FALLBACK("Component alpha not supported with source "
- "alpha and source value blending.\n");
+ if (i965_blend_op[op].src_alpha &&
+ (i965_blend_op[op].src_blend != BRW_BLENDFACTOR_ZERO))
+ {
+ I830FALLBACK("Component alpha not supported with source "
+ "alpha and source value blending.\n");
+ }
/* XXX: fallback now for mask with componentAlpha */
I830FALLBACK("mask componentAlpha not ready.\n");
}
- if (!I965CheckCompositeTexture(pSrcPicture, 0))
+ if (!i965_check_composite_texture(pSrcPicture, 0))
I830FALLBACK("Check Src picture texture\n");
- if (pMaskPicture != NULL && !I965CheckCompositeTexture(pMaskPicture, 1))
+ if (pMaskPicture != NULL && !i965_check_composite_texture(pMaskPicture, 1))
I830FALLBACK("Check Mask picture texture\n");
- if (!I965GetDestFormat(pDstPicture, &tmp1))
+ if (!i965_get_dest_format(pDstPicture, &tmp1))
I830FALLBACK("Get Color buffer format\n");
return TRUE;
@@ -260,7 +264,7 @@ static struct brw_surface_state *dest_su
static struct brw_surface_state *src_surf_state;
static struct brw_surface_state *mask_surf_state;
static struct brw_sampler_state *src_sampler_state;
-static struct brw_sampler_state *mask_sampler_state;
+static struct brw_sampler_state *mask_sampler_state;
static struct brw_sampler_default_color *default_color_state;
static struct brw_vs_unit_state *vs_state;
@@ -274,7 +278,7 @@ static struct brw_instruction *ps_kernel
static struct brw_instruction *sip_kernel;
static CARD32 *binding_table;
-static int binding_table_entries;
+static int binding_table_entries;
static int dest_surf_offset, src_surf_offset, mask_surf_offset;
static int src_sampler_offset, mask_sampler_offset,vs_offset;
@@ -282,12 +286,12 @@ static int sf_offset, wm_offset, cc_offs
static int sf_kernel_offset, ps_kernel_offset, sip_kernel_offset;
static int wm_scratch_offset;
static int binding_table_offset;
-static int default_color_offset;
+static int default_color_offset;
static int next_offset, total_state_size;
static char *state_base;
static int state_base_offset;
static float *vb;
-static int vb_size = (4 * 4) * 4 ; /* 4 DWORDS per vertex*/
+static int vb_size = (4 * 4) * 4 ; /* 4 DWORDS per vertex*/
static CARD32 src_blend, dst_blend;
@@ -348,20 +352,23 @@ static const CARD32 ps_kernel_static_mas
#include "exa_wm_masknoca_prog.h"
};
-static CARD32 i965_get_card_format(PicturePtr pPict)
+static CARD32 i965_get_card_format(PicturePtr pPict)
{
- int i;
- for (i = 0; i < sizeof(I965TexFormats) / sizeof(I965TexFormats[0]); i++) {
- if (I965TexFormats[i].fmt == pPict->format)
- break;
- }
- return I965TexFormats[i].card_fmt;
+ int i;
+
+ for (i = 0; i < sizeof(i965_tex_formats) / sizeof(i965_tex_formats[0]);
+ i++)
+ {
+ if (i965_tex_formats[i].fmt == pPict->format)
+ break;
+ }
+ return i965_tex_formats[i].card_fmt;
}
Bool
-I965EXAPrepareComposite(int op, PicturePtr pSrcPicture,
- PicturePtr pMaskPicture, PicturePtr pDstPicture,
- PixmapPtr pSrc, PixmapPtr pMask, PixmapPtr pDst)
+i965_prepare_composite(int op, PicturePtr pSrcPicture,
+ PicturePtr pMaskPicture, PicturePtr pDstPicture,
+ PixmapPtr pSrc, PixmapPtr pMask, PixmapPtr pDst)
{
ScrnInfoPtr pScrn = xf86Screens[pSrcPicture->pDrawable->pScreen->myNum];
I830Ptr pI830 = I830PTR(pScrn);
@@ -402,235 +409,241 @@ I965EXAPrepareComposite(int op, PictureP
pI830->scale_units[1][1] = pMask->drawable.height;
}
- /* setup 3d pipeline state */
+ /* setup 3d pipeline state */
+
+ binding_table_entries = 2; /* default no mask */
+
+ /* Wait for sync before we start setting up our new state */
+ i830WaitSync(pScrn);
+
+ /* Set up our layout of state in framebuffer. First the general state: */
+ next_offset = 0;
+ vs_offset = ALIGN(next_offset, 64);
+ next_offset = vs_offset + sizeof(*vs_state);
+
+ sf_offset = ALIGN(next_offset, 32);
+ next_offset = sf_offset + sizeof(*sf_state);
+
+ wm_offset = ALIGN(next_offset, 32);
+ next_offset = wm_offset + sizeof(*wm_state);
- binding_table_entries = 2; /* default no mask */
+ wm_scratch_offset = ALIGN(next_offset, 1024);
+ next_offset = wm_scratch_offset + 1024 * PS_MAX_THREADS;
- /* Wait for sync before we start setting up our new state */
- i830WaitSync(pScrn);
+ cc_offset = ALIGN(next_offset, 32);
+ next_offset = cc_offset + sizeof(*cc_state);
+
+ /* keep current sf_kernel, which will send one setup urb entry to
+ * PS kernel
+ */
+ sf_kernel_offset = ALIGN(next_offset, 64);
+ if (pMask)
+ next_offset = sf_kernel_offset + sizeof (sf_kernel_static_mask);
+ else
+ next_offset = sf_kernel_offset + sizeof (sf_kernel_static);
- /* Set up our layout of state in framebuffer. First the general state: */
- next_offset = 0;
- vs_offset = ALIGN(next_offset, 64);
- next_offset = vs_offset + sizeof(*vs_state);
-
- sf_offset = ALIGN(next_offset, 32);
- next_offset = sf_offset + sizeof(*sf_state);
-
- wm_offset = ALIGN(next_offset, 32);
- next_offset = wm_offset + sizeof(*wm_state);
-
- wm_scratch_offset = ALIGN(next_offset, 1024);
- next_offset = wm_scratch_offset + 1024 * PS_MAX_THREADS;
-
- cc_offset = ALIGN(next_offset, 32);
- next_offset = cc_offset + sizeof(*cc_state);
-
- /* keep current sf_kernel, which will send one setup urb entry to
- PS kernel */
- sf_kernel_offset = ALIGN(next_offset, 64);
- if (pMask)
- next_offset = sf_kernel_offset + sizeof (sf_kernel_static_mask);
- else
- next_offset = sf_kernel_offset + sizeof (sf_kernel_static);
-
- //XXX: ps_kernel may be seperated, fix with offset
- ps_kernel_offset = ALIGN(next_offset, 64);
- if (pMask) {
+ /* XXX: ps_kernel may be seperated, fix with offset */
+ ps_kernel_offset = ALIGN(next_offset, 64);
+ if (pMask) {
if (pMaskPicture->componentAlpha)
next_offset = ps_kernel_offset + sizeof(ps_kernel_static_maskca);
- else
+ else
next_offset = ps_kernel_offset + sizeof(ps_kernel_static_masknoca);
- } else
+ } else {
next_offset = ps_kernel_offset + sizeof (ps_kernel_static_nomask);
-
- sip_kernel_offset = ALIGN(next_offset, 64);
- next_offset = sip_kernel_offset + sizeof (sip_kernel_static);
-
- // needed?
- cc_viewport_offset = ALIGN(next_offset, 32);
- next_offset = cc_viewport_offset + sizeof(*cc_viewport);
-
- // for texture sampler
- src_sampler_offset = ALIGN(next_offset, 32);
- next_offset = src_sampler_offset + sizeof(*src_sampler_state);
+ }
+
+ sip_kernel_offset = ALIGN(next_offset, 64);
+ next_offset = sip_kernel_offset + sizeof (sip_kernel_static);
- if (pMask) {
+ /* needed? */
+ cc_viewport_offset = ALIGN(next_offset, 32);
+ next_offset = cc_viewport_offset + sizeof(*cc_viewport);
+
+ /* for texture sampler */
+ src_sampler_offset = ALIGN(next_offset, 32);
+ next_offset = src_sampler_offset + sizeof(*src_sampler_state);
+
+ if (pMask) {
mask_sampler_offset = ALIGN(next_offset, 32);
next_offset = mask_sampler_offset + sizeof(*mask_sampler_state);
- }
- /* Align VB to native size of elements, for safety */
- vb_offset = ALIGN(next_offset, 8);
- next_offset = vb_offset + vb_size;
-
- /* And then the general state: */
- dest_surf_offset = ALIGN(next_offset, 32);
- next_offset = dest_surf_offset + sizeof(*dest_surf_state);
+ }
+ /* Align VB to native size of elements, for safety */
+ vb_offset = ALIGN(next_offset, 8);
+ next_offset = vb_offset + vb_size;
+
+ /* And then the general state: */
+ dest_surf_offset = ALIGN(next_offset, 32);
+ next_offset = dest_surf_offset + sizeof(*dest_surf_state);
- src_surf_offset = ALIGN(next_offset, 32);
- next_offset = src_surf_offset + sizeof(*src_surf_state);
+ src_surf_offset = ALIGN(next_offset, 32);
+ next_offset = src_surf_offset + sizeof(*src_surf_state);
- if (pMask) {
+ if (pMask) {
mask_surf_offset = ALIGN(next_offset, 32);
next_offset = mask_surf_offset + sizeof(*mask_surf_state);
binding_table_entries = 3;
- }
+ }
- binding_table_offset = ALIGN(next_offset, 32);
- next_offset = binding_table_offset + (binding_table_entries * 4);
+ binding_table_offset = ALIGN(next_offset, 32);
+ next_offset = binding_table_offset + (binding_table_entries * 4);
- default_color_offset = ALIGN(next_offset, 32);
- next_offset = default_color_offset + sizeof(*default_color_state);
+ default_color_offset = ALIGN(next_offset, 32);
+ next_offset = default_color_offset + sizeof(*default_color_state);
- total_state_size = next_offset;
- assert(total_state_size < EXA_LINEAR_EXTRA);
-
- state_base_offset = pI830->EXAStateMem.Start;
- state_base_offset = ALIGN(state_base_offset, 64);
- state_base = (char *)(pI830->FbBase + state_base_offset);
-
- vs_state = (void *)(state_base + vs_offset);
- sf_state = (void *)(state_base + sf_offset);
- wm_state = (void *)(state_base + wm_offset);
- cc_state = (void *)(state_base + cc_offset);
- sf_kernel = (void *)(state_base + sf_kernel_offset);
- ps_kernel = (void *)(state_base + ps_kernel_offset);
- sip_kernel = (void *)(state_base + sip_kernel_offset);
-
- cc_viewport = (void *)(state_base + cc_viewport_offset);
-
- dest_surf_state = (void *)(state_base + dest_surf_offset);
- src_surf_state = (void *)(state_base + src_surf_offset);
- if (pMask)
+ total_state_size = next_offset;
+ assert(total_state_size < EXA_LINEAR_EXTRA);
+
+ state_base_offset = pI830->EXAStateMem.Start;
+ state_base_offset = ALIGN(state_base_offset, 64);
+ state_base = (char *)(pI830->FbBase + state_base_offset);
+
+ vs_state = (void *)(state_base + vs_offset);
+ sf_state = (void *)(state_base + sf_offset);
+ wm_state = (void *)(state_base + wm_offset);
+ cc_state = (void *)(state_base + cc_offset);
+ sf_kernel = (void *)(state_base + sf_kernel_offset);
+ ps_kernel = (void *)(state_base + ps_kernel_offset);
+ sip_kernel = (void *)(state_base + sip_kernel_offset);
+
+ cc_viewport = (void *)(state_base + cc_viewport_offset);
+
+ dest_surf_state = (void *)(state_base + dest_surf_offset);
+ src_surf_state = (void *)(state_base + src_surf_offset);
+ if (pMask)
mask_surf_state = (void *)(state_base + mask_surf_offset);
- src_sampler_state = (void *)(state_base + src_sampler_offset);
- if (pMask)
+ src_sampler_state = (void *)(state_base + src_sampler_offset);
+ if (pMask)
mask_sampler_state = (void *)(state_base + mask_sampler_offset);
- binding_table = (void *)(state_base + binding_table_offset);
+ binding_table = (void *)(state_base + binding_table_offset);
- vb = (void *)(state_base + vb_offset);
+ vb = (void *)(state_base + vb_offset);
- default_color_state = (void*)(state_base + default_color_offset);
+ default_color_state = (void*)(state_base + default_color_offset);
- /* Set up a default static partitioning of the URB, which is supposed to
- * allow anything we would want to do, at potentially lower performance.
- */
+ /* Set up a default static partitioning of the URB, which is supposed to
+ * allow anything we would want to do, at potentially lower performance.
+ */
#define URB_CS_ENTRY_SIZE 0
#define URB_CS_ENTRIES 0
-
+
#define URB_VS_ENTRY_SIZE 1 // each 512-bit row
#define URB_VS_ENTRIES 8 // we needs at least 8 entries
-
+
#define URB_GS_ENTRY_SIZE 0
#define URB_GS_ENTRIES 0
-
+
#define URB_CLIP_ENTRY_SIZE 0
#define URB_CLIP_ENTRIES 0
-
+
#define URB_SF_ENTRY_SIZE 2
#define URB_SF_ENTRIES 1
- urb_vs_start = 0;
- urb_vs_size = URB_VS_ENTRIES * URB_VS_ENTRY_SIZE;
- urb_gs_start = urb_vs_start + urb_vs_size;
- urb_gs_size = URB_GS_ENTRIES * URB_GS_ENTRY_SIZE;
- urb_clip_start = urb_gs_start + urb_gs_size;
- urb_clip_size = URB_CLIP_ENTRIES * URB_CLIP_ENTRY_SIZE;
- urb_sf_start = urb_clip_start + urb_clip_size;
- urb_sf_size = URB_SF_ENTRIES * URB_SF_ENTRY_SIZE;
- urb_cs_start = urb_sf_start + urb_sf_size;
- urb_cs_size = URB_CS_ENTRIES * URB_CS_ENTRY_SIZE;
-
- /* We'll be poking the state buffers that could be in use by the 3d hardware
- * here, but we should have synced the 3D engine already in I830PutImage.
- */
+ urb_vs_start = 0;
+ urb_vs_size = URB_VS_ENTRIES * URB_VS_ENTRY_SIZE;
+ urb_gs_start = urb_vs_start + urb_vs_size;
+ urb_gs_size = URB_GS_ENTRIES * URB_GS_ENTRY_SIZE;
+ urb_clip_start = urb_gs_start + urb_gs_size;
+ urb_clip_size = URB_CLIP_ENTRIES * URB_CLIP_ENTRY_SIZE;
+ urb_sf_start = urb_clip_start + urb_clip_size;
+ urb_sf_size = URB_SF_ENTRIES * URB_SF_ENTRY_SIZE;
+ urb_cs_start = urb_sf_start + urb_sf_size;
+ urb_cs_size = URB_CS_ENTRIES * URB_CS_ENTRY_SIZE;
+
+ /* We'll be poking the state buffers that could be in use by the 3d
+ * hardware here, but we should have synced the 3D engine already in
+ * I830PutImage. XXX
+ */
- memset (cc_viewport, 0, sizeof (*cc_viewport));
- cc_viewport->min_depth = -1.e35;
- cc_viewport->max_depth = 1.e35;
-
- /* Color calculator state */
- memset(cc_state, 0, sizeof(*cc_state));
- cc_state->cc0.stencil_enable = 0; /* disable stencil */
- cc_state->cc2.depth_test = 0; /* disable depth test */
- cc_state->cc2.logicop_enable = 0; /* disable logic op */
- cc_state->cc3.ia_blend_enable = 1; /* blend alpha just like colors */
- cc_state->cc3.blend_enable = 1; /* enable color blend */
- cc_state->cc3.alpha_test = 0; /* disable alpha test */
- cc_state->cc4.cc_viewport_state_offset = (state_base_offset + cc_viewport_offset) >> 5;
- cc_state->cc5.dither_enable = 0; /* disable dither */
- cc_state->cc5.logicop_func = 0xc; /* COPY */
- cc_state->cc5.statistics_enable = 1;
- cc_state->cc5.ia_blend_function = BRW_BLENDFUNCTION_ADD;
- I965GetBlendCntl(op, pMaskPicture, pDstPicture->format,
- &src_blend, &dst_blend);
- /* XXX: alpha blend factor should be same as color, but check
- for CA case in future */
- cc_state->cc5.ia_src_blend_factor = src_blend;
- cc_state->cc5.ia_dest_blend_factor = dst_blend;
- cc_state->cc6.blend_function = BRW_BLENDFUNCTION_ADD;
- cc_state->cc6.src_blend_factor = src_blend;
- cc_state->cc6.dest_blend_factor = dst_blend;
- cc_state->cc6.clamp_post_alpha_blend = 1;
- cc_state->cc6.clamp_pre_alpha_blend = 1;
- cc_state->cc6.clamp_range = 0; /* clamp range [0,1] */
-
- /* Upload system kernel */
- memcpy (sip_kernel, sip_kernel_static, sizeof (sip_kernel_static));
-
- /* Set up the state buffer for the destination surface */
- memset(dest_surf_state, 0, sizeof(*dest_surf_state));
- dest_surf_state->ss0.surface_type = BRW_SURFACE_2D;
- dest_surf_state->ss0.data_return_format = BRW_SURFACERETURNFORMAT_FLOAT32;
- I965GetDestFormat(pDstPicture, &dst_format);
- dest_surf_state->ss0.surface_format = dst_format;
-
- dest_surf_state->ss0.writedisable_alpha = 0;
- dest_surf_state->ss0.writedisable_red = 0;
- dest_surf_state->ss0.writedisable_green = 0;
- dest_surf_state->ss0.writedisable_blue = 0;
- dest_surf_state->ss0.color_blend = 1;
- dest_surf_state->ss0.vert_line_stride = 0;
- dest_surf_state->ss0.vert_line_stride_ofs = 0;
- dest_surf_state->ss0.mipmap_layout_mode = 0;
- dest_surf_state->ss0.render_cache_read_mode = 0;
-
- dest_surf_state->ss1.base_addr = dst_offset;
- dest_surf_state->ss2.height = pDst->drawable.height - 1;
- dest_surf_state->ss2.width = pDst->drawable.width - 1;
- dest_surf_state->ss2.mip_count = 0;
- dest_surf_state->ss2.render_target_rotation = 0;
- dest_surf_state->ss3.pitch = dst_pitch - 1;
-
- /* Set up the source surface state buffer */
- memset(src_surf_state, 0, sizeof(*src_surf_state));
- src_surf_state->ss0.surface_type = BRW_SURFACE_2D;
- src_surf_state->ss0.surface_format = i965_get_card_format(pSrcPicture);
-
- src_surf_state->ss0.writedisable_alpha = 0;
- src_surf_state->ss0.writedisable_red = 0;
- src_surf_state->ss0.writedisable_green = 0;
- src_surf_state->ss0.writedisable_blue = 0;
- src_surf_state->ss0.color_blend = 1;
- src_surf_state->ss0.vert_line_stride = 0;
- src_surf_state->ss0.vert_line_stride_ofs = 0;
- src_surf_state->ss0.mipmap_layout_mode = 0;
- src_surf_state->ss0.render_cache_read_mode = 0;
-
- src_surf_state->ss1.base_addr = src_offset;
- src_surf_state->ss2.width = pSrc->drawable.width - 1;
- src_surf_state->ss2.height = pSrc->drawable.height - 1;
- src_surf_state->ss2.mip_count = 0;
- src_surf_state->ss2.render_target_rotation = 0;
- src_surf_state->ss3.pitch = src_pitch - 1;
+ memset (cc_viewport, 0, sizeof (*cc_viewport));
+ cc_viewport->min_depth = -1.e35;
+ cc_viewport->max_depth = 1.e35;
+
+ /* Color calculator state */
+ memset(cc_state, 0, sizeof(*cc_state));
+ cc_state->cc0.stencil_enable = 0; /* disable stencil */
+ cc_state->cc2.depth_test = 0; /* disable depth test */
+ cc_state->cc2.logicop_enable = 0; /* disable logic op */
+ cc_state->cc3.ia_blend_enable = 1; /* blend alpha just like colors */
+ cc_state->cc3.blend_enable = 1; /* enable color blend */
+ cc_state->cc3.alpha_test = 0; /* disable alpha test */
+ cc_state->cc4.cc_viewport_state_offset = (state_base_offset +
+ cc_viewport_offset) >> 5;
+ cc_state->cc5.dither_enable = 0; /* disable dither */
+ cc_state->cc5.logicop_func = 0xc; /* COPY */
+ cc_state->cc5.statistics_enable = 1;
+ cc_state->cc5.ia_blend_function = BRW_BLENDFUNCTION_ADD;
+ i965_get_blend_cntl(op, pMaskPicture, pDstPicture->format,
+ &src_blend, &dst_blend);
+ /* XXX: alpha blend factor should be same as color, but check
+ * for CA case in future
+ */
+ cc_state->cc5.ia_src_blend_factor = src_blend;
+ cc_state->cc5.ia_dest_blend_factor = dst_blend;
+ cc_state->cc6.blend_function = BRW_BLENDFUNCTION_ADD;
+ cc_state->cc6.src_blend_factor = src_blend;
+ cc_state->cc6.dest_blend_factor = dst_blend;
+ cc_state->cc6.clamp_post_alpha_blend = 1;
+ cc_state->cc6.clamp_pre_alpha_blend = 1;
+ cc_state->cc6.clamp_range = 0; /* clamp range [0,1] */
+
+ /* Upload system kernel */
+ memcpy (sip_kernel, sip_kernel_static, sizeof (sip_kernel_static));
+
+ /* Set up the state buffer for the destination surface */
+ memset(dest_surf_state, 0, sizeof(*dest_surf_state));
+ dest_surf_state->ss0.surface_type = BRW_SURFACE_2D;
+ dest_surf_state->ss0.data_return_format = BRW_SURFACERETURNFORMAT_FLOAT32;
+ i965_get_dest_format(pDstPicture, &dst_format);
+ dest_surf_state->ss0.surface_format = dst_format;
+
+ dest_surf_state->ss0.writedisable_alpha = 0;
+ dest_surf_state->ss0.writedisable_red = 0;
+ dest_surf_state->ss0.writedisable_green = 0;
+ dest_surf_state->ss0.writedisable_blue = 0;
+ dest_surf_state->ss0.color_blend = 1;
+ dest_surf_state->ss0.vert_line_stride = 0;
+ dest_surf_state->ss0.vert_line_stride_ofs = 0;
+ dest_surf_state->ss0.mipmap_layout_mode = 0;
+ dest_surf_state->ss0.render_cache_read_mode = 0;
+
+ dest_surf_state->ss1.base_addr = dst_offset;
+ dest_surf_state->ss2.height = pDst->drawable.height - 1;
+ dest_surf_state->ss2.width = pDst->drawable.width - 1;
+ dest_surf_state->ss2.mip_count = 0;
+ dest_surf_state->ss2.render_target_rotation = 0;
+ dest_surf_state->ss3.pitch = dst_pitch - 1;
+
+ /* Set up the source surface state buffer */
+ memset(src_surf_state, 0, sizeof(*src_surf_state));
+ src_surf_state->ss0.surface_type = BRW_SURFACE_2D;
+ src_surf_state->ss0.surface_format = i965_get_card_format(pSrcPicture);
+
+ src_surf_state->ss0.writedisable_alpha = 0;
+ src_surf_state->ss0.writedisable_red = 0;
+ src_surf_state->ss0.writedisable_green = 0;
+ src_surf_state->ss0.writedisable_blue = 0;
+ src_surf_state->ss0.color_blend = 1;
+ src_surf_state->ss0.vert_line_stride = 0;
+ src_surf_state->ss0.vert_line_stride_ofs = 0;
+ src_surf_state->ss0.mipmap_layout_mode = 0;
+ src_surf_state->ss0.render_cache_read_mode = 0;
+
+ src_surf_state->ss1.base_addr = src_offset;
+ src_surf_state->ss2.width = pSrc->drawable.width - 1;
+ src_surf_state->ss2.height = pSrc->drawable.height - 1;
+ src_surf_state->ss2.mip_count = 0;
+ src_surf_state->ss2.render_target_rotation = 0;
+ src_surf_state->ss3.pitch = src_pitch - 1;
- /* setup mask surface */
- if (pMask) {
+ /* setup mask surface */
+ if (pMask) {
memset(mask_surf_state, 0, sizeof(*mask_surf_state));
mask_surf_state->ss0.surface_type = BRW_SURFACE_2D;
- mask_surf_state->ss0.surface_format = i965_get_card_format(pMaskPicture);
+ mask_surf_state->ss0.surface_format =
+ i965_get_card_format(pMaskPicture);
mask_surf_state->ss0.writedisable_alpha = 0;
mask_surf_state->ss0.writedisable_red = 0;
@@ -641,68 +654,68 @@ I965EXAPrepareComposite(int op, PictureP
mask_surf_state->ss0.vert_line_stride_ofs = 0;
mask_surf_state->ss0.mipmap_layout_mode = 0;
mask_surf_state->ss0.render_cache_read_mode = 0;
-
+
mask_surf_state->ss1.base_addr = mask_offset;
mask_surf_state->ss2.width = pMask->drawable.width - 1;
mask_surf_state->ss2.height = pMask->drawable.height - 1;
mask_surf_state->ss2.mip_count = 0;
mask_surf_state->ss2.render_target_rotation = 0;
- mask_surf_state->ss3.pitch = mask_pitch - 1;
- }
+ mask_surf_state->ss3.pitch = mask_pitch - 1;
+ }
- /* Set up a binding table for our surfaces. Only the PS will use it */
- binding_table[0] = state_base_offset + dest_surf_offset;
- binding_table[1] = state_base_offset + src_surf_offset;
- if (pMask)
+ /* Set up a binding table for our surfaces. Only the PS will use it */
+ binding_table[0] = state_base_offset + dest_surf_offset;
+ binding_table[1] = state_base_offset + src_surf_offset;
+ if (pMask)
binding_table[2] = state_base_offset + mask_surf_offset;
- /* PS kernel use this sampler */
- memset(src_sampler_state, 0, sizeof(*src_sampler_state));
- src_sampler_state->ss0.lod_preclamp = 1; /* GL mode */
- switch(pSrcPicture->filter) {
- case PictFilterNearest:
- src_sampler_state->ss0.min_filter = BRW_MAPFILTER_NEAREST;
+ /* PS kernel use this sampler */
+ memset(src_sampler_state, 0, sizeof(*src_sampler_state));
+ src_sampler_state->ss0.lod_preclamp = 1; /* GL mode */
+ switch(pSrcPicture->filter) {
+ case PictFilterNearest:
+ src_sampler_state->ss0.min_filter = BRW_MAPFILTER_NEAREST;
src_sampler_state->ss0.mag_filter = BRW_MAPFILTER_NEAREST;
break;
- case PictFilterBilinear:
- src_sampler_state->ss0.min_filter = BRW_MAPFILTER_LINEAR;
+ case PictFilterBilinear:
+ src_sampler_state->ss0.min_filter = BRW_MAPFILTER_LINEAR;
src_sampler_state->ss0.mag_filter = BRW_MAPFILTER_LINEAR;
break;
- default:
+ default:
I830FALLBACK("Bad filter 0x%x\n", pSrcPicture->filter);
- }
+ }
- memset(default_color_state, 0, sizeof(*default_color_state));
- default_color_state->color[0] = 0.0; /* R */
- default_color_state->color[1] = 0.0; /* G */
- default_color_state->color[2] = 0.0; /* B */
- default_color_state->color[3] = 1.0; /* A */
+ memset(default_color_state, 0, sizeof(*default_color_state));
+ default_color_state->color[0] = 0.0; /* R */
+ default_color_state->color[1] = 0.0; /* G */
+ default_color_state->color[2] = 0.0; /* B */
+ default_color_state->color[3] = 1.0; /* A */
- src_sampler_state->ss0.default_color_mode = 0; /* GL mode */
+ src_sampler_state->ss0.default_color_mode = 0; /* GL mode */
- if (!pSrcPicture->repeat) {
- src_sampler_state->ss1.r_wrap_mode = BRW_TEXCOORDMODE_CLAMP_BORDER;
+ if (!pSrcPicture->repeat) {
+ src_sampler_state->ss1.r_wrap_mode = BRW_TEXCOORDMODE_CLAMP_BORDER;
src_sampler_state->ss1.s_wrap_mode = BRW_TEXCOORDMODE_CLAMP_BORDER;
src_sampler_state->ss1.t_wrap_mode = BRW_TEXCOORDMODE_CLAMP_BORDER;
- src_sampler_state->ss2.default_color_pointer =
- (state_base_offset + default_color_offset) >> 5;
- } else {
- src_sampler_state->ss1.r_wrap_mode = BRW_TEXCOORDMODE_WRAP;
+ src_sampler_state->ss2.default_color_pointer =
+ (state_base_offset + default_color_offset) >> 5;
+ } else {
+ src_sampler_state->ss1.r_wrap_mode = BRW_TEXCOORDMODE_WRAP;
src_sampler_state->ss1.s_wrap_mode = BRW_TEXCOORDMODE_WRAP;
src_sampler_state->ss1.t_wrap_mode = BRW_TEXCOORDMODE_WRAP;
- }
- src_sampler_state->ss3.chroma_key_enable = 0; /* disable chromakey */
+ }
+ src_sampler_state->ss3.chroma_key_enable = 0; /* disable chromakey */
- if (pMask) {
+ if (pMask) {
memset(mask_sampler_state, 0, sizeof(*mask_sampler_state));
mask_sampler_state->ss0.lod_preclamp = 1; /* GL mode */
switch(pMaskPicture->filter) {
case PictFilterNearest:
- mask_sampler_state->ss0.min_filter = BRW_MAPFILTER_NEAREST;
+ mask_sampler_state->ss0.min_filter = BRW_MAPFILTER_NEAREST;
mask_sampler_state->ss0.mag_filter = BRW_MAPFILTER_NEAREST;
break;
case PictFilterBilinear:
- mask_sampler_state->ss0.min_filter = BRW_MAPFILTER_LINEAR;
+ mask_sampler_state->ss0.min_filter = BRW_MAPFILTER_LINEAR;
mask_sampler_state->ss0.mag_filter = BRW_MAPFILTER_LINEAR;
break;
default:
@@ -710,189 +723,203 @@ I965EXAPrepareComposite(int op, PictureP
}
if (!pMaskPicture->repeat) {
- mask_sampler_state->ss1.r_wrap_mode = BRW_TEXCOORDMODE_CLAMP_BORDER;
- mask_sampler_state->ss1.s_wrap_mode = BRW_TEXCOORDMODE_CLAMP_BORDER;
- mask_sampler_state->ss1.t_wrap_mode = BRW_TEXCOORDMODE_CLAMP_BORDER;
- mask_sampler_state->ss2.default_color_pointer =
- (state_base_offset + default_color_offset)>>5;
+ mask_sampler_state->ss1.r_wrap_mode =
+ BRW_TEXCOORDMODE_CLAMP_BORDER;
+ mask_sampler_state->ss1.s_wrap_mode =
+ BRW_TEXCOORDMODE_CLAMP_BORDER;
+ mask_sampler_state->ss1.t_wrap_mode =
+ BRW_TEXCOORDMODE_CLAMP_BORDER;
+ mask_sampler_state->ss2.default_color_pointer =
+ (state_base_offset + default_color_offset)>>5;
} else {
- mask_sampler_state->ss1.r_wrap_mode = BRW_TEXCOORDMODE_WRAP;
+ mask_sampler_state->ss1.r_wrap_mode = BRW_TEXCOORDMODE_WRAP;
mask_sampler_state->ss1.s_wrap_mode = BRW_TEXCOORDMODE_WRAP;
mask_sampler_state->ss1.t_wrap_mode = BRW_TEXCOORDMODE_WRAP;
}
mask_sampler_state->ss3.chroma_key_enable = 0; /* disable chromakey */
- }
+ }
- /* Set up the vertex shader to be disabled (passthrough) */
- memset(vs_state, 0, sizeof(*vs_state));
- vs_state->thread4.nr_urb_entries = URB_VS_ENTRIES;
- vs_state->thread4.urb_entry_allocation_size = URB_VS_ENTRY_SIZE - 1;
- vs_state->vs6.vs_enable = 0;
- vs_state->vs6.vert_cache_disable = 1;
-
- // XXX: sf_kernel? keep it as now
- /* Set up the SF kernel to do coord interp: for each attribute,
- * calculate dA/dx and dA/dy. Hand these interpolation coefficients
- * back to SF which then hands pixels off to WM.
- */
- if (pMask)
- memcpy (sf_kernel, sf_kernel_static_mask, sizeof (sf_kernel_static));
- else
- memcpy (sf_kernel, sf_kernel_static, sizeof (sf_kernel_static));
-
- memset(sf_state, 0, sizeof(*sf_state));
- sf_state->thread0.kernel_start_pointer =
- (state_base_offset + sf_kernel_offset) >> 6;
- sf_state->thread0.grf_reg_count = BRW_GRF_BLOCKS(SF_KERNEL_NUM_GRF);
- sf_state->sf1.single_program_flow = 1;
- sf_state->sf1.binding_table_entry_count = 0;
- sf_state->sf1.thread_priority = 0;
- sf_state->sf1.floating_point_mode = 0; /* Mesa does this */
- sf_state->sf1.illegal_op_exception_enable = 1;
- sf_state->sf1.mask_stack_exception_enable = 1;
- sf_state->sf1.sw_exception_enable = 1;
- sf_state->thread2.per_thread_scratch_space = 0;
- sf_state->thread2.scratch_space_base_pointer = 0; /* not used in our kernel */
- sf_state->thread3.const_urb_entry_read_length = 0; /* no const URBs */
- sf_state->thread3.const_urb_entry_read_offset = 0; /* no const URBs */
- sf_state->thread3.urb_entry_read_length = 1; /* 1 URB per vertex */
- sf_state->thread3.urb_entry_read_offset = 0;
- sf_state->thread3.dispatch_grf_start_reg = 3;
- sf_state->thread4.max_threads = SF_MAX_THREADS - 1;
- sf_state->thread4.urb_entry_allocation_size = URB_SF_ENTRY_SIZE - 1;
- sf_state->thread4.nr_urb_entries = URB_SF_ENTRIES;
- sf_state->thread4.stats_enable = 1;
- sf_state->sf5.viewport_transform = FALSE; /* skip viewport */
- sf_state->sf6.cull_mode = BRW_CULLMODE_NONE;
- sf_state->sf6.scissor = 0;
- sf_state->sf7.trifan_pv = 2;
- sf_state->sf6.dest_org_vbias = 0x8;
- sf_state->sf6.dest_org_hbias = 0x8;
+ /* Set up the vertex shader to be disabled (passthrough) */
+ memset(vs_state, 0, sizeof(*vs_state));
+ vs_state->thread4.nr_urb_entries = URB_VS_ENTRIES;
+ vs_state->thread4.urb_entry_allocation_size = URB_VS_ENTRY_SIZE - 1;
+ vs_state->vs6.vs_enable = 0;
+ vs_state->vs6.vert_cache_disable = 1;
+
+ /* XXX: sf_kernel? keep it as now */
+ /* Set up the SF kernel to do coord interp: for each attribute,
+ * calculate dA/dx and dA/dy. Hand these interpolation coefficients
+ * back to SF which then hands pixels off to WM.
+ */
+ if (pMask)
+ memcpy(sf_kernel, sf_kernel_static_mask, sizeof (sf_kernel_static));
+ else
+ memcpy(sf_kernel, sf_kernel_static, sizeof (sf_kernel_static));
+
+ memset(sf_state, 0, sizeof(*sf_state));
+ sf_state->thread0.kernel_start_pointer =
+ (state_base_offset + sf_kernel_offset) >> 6;
+ sf_state->thread0.grf_reg_count = BRW_GRF_BLOCKS(SF_KERNEL_NUM_GRF);
+ sf_state->sf1.single_program_flow = 1;
+ sf_state->sf1.binding_table_entry_count = 0;
+ sf_state->sf1.thread_priority = 0;
+ sf_state->sf1.floating_point_mode = 0; /* Mesa does this */
+ sf_state->sf1.illegal_op_exception_enable = 1;
+ sf_state->sf1.mask_stack_exception_enable = 1;
+ sf_state->sf1.sw_exception_enable = 1;
+ sf_state->thread2.per_thread_scratch_space = 0;
+ /* scratch space is not used in our kernel */
+ sf_state->thread2.scratch_space_base_pointer = 0;
+ sf_state->thread3.const_urb_entry_read_length = 0; /* no const URBs */
+ sf_state->thread3.const_urb_entry_read_offset = 0; /* no const URBs */
+ sf_state->thread3.urb_entry_read_length = 1; /* 1 URB per vertex */
+ sf_state->thread3.urb_entry_read_offset = 0;
+ sf_state->thread3.dispatch_grf_start_reg = 3;
+ sf_state->thread4.max_threads = SF_MAX_THREADS - 1;
+ sf_state->thread4.urb_entry_allocation_size = URB_SF_ENTRY_SIZE - 1;
+ sf_state->thread4.nr_urb_entries = URB_SF_ENTRIES;
+ sf_state->thread4.stats_enable = 1;
+ sf_state->sf5.viewport_transform = FALSE; /* skip viewport */
+ sf_state->sf6.cull_mode = BRW_CULLMODE_NONE;
+ sf_state->sf6.scissor = 0;
+ sf_state->sf7.trifan_pv = 2;
+ sf_state->sf6.dest_org_vbias = 0x8;
+ sf_state->sf6.dest_org_hbias = 0x8;
- /* Set up the PS kernel (dispatched by WM)
- */
-
- if (pMask) {
+ /* Set up the PS kernel (dispatched by WM) */
+ if (pMask) {
if (pMaskPicture->componentAlpha)
- memcpy (ps_kernel, ps_kernel_static_maskca, sizeof (ps_kernel_static_maskca));
+ memcpy(ps_kernel, ps_kernel_static_maskca,
+ sizeof (ps_kernel_static_maskca));
else
- memcpy (ps_kernel, ps_kernel_static_masknoca, sizeof (ps_kernel_static_masknoca));
- } else
- memcpy (ps_kernel, ps_kernel_static_nomask, sizeof (ps_kernel_static_nomask));
-
- memset (wm_state, 0, sizeof (*wm_state));
- wm_state->thread0.kernel_start_pointer =
- (state_base_offset + ps_kernel_offset) >> 6;
- wm_state->thread0.grf_reg_count = BRW_GRF_BLOCKS(PS_KERNEL_NUM_GRF);
- wm_state->thread1.single_program_flow = 1;
- if (!pMask)
- wm_state->thread1.binding_table_entry_count = 2; /* 1 tex and fb */
- else
- wm_state->thread1.binding_table_entry_count = 3; /* 2 tex and fb */
-
- wm_state->thread2.scratch_space_base_pointer = (state_base_offset +
- wm_scratch_offset)>>10;
- wm_state->thread2.per_thread_scratch_space = 0;
- // XXX: urb allocation
- wm_state->thread3.const_urb_entry_read_length = 0;
- wm_state->thread3.const_urb_entry_read_offset = 0;
- if (pMask)
- wm_state->thread3.urb_entry_read_length = 2; /* two per pair of attrib */
- else
- wm_state->thread3.urb_entry_read_length = 1; /* one per pair of attrib */
- wm_state->thread3.urb_entry_read_offset = 0;
- // wm kernel use urb from 3, see wm_program in compiler module
- wm_state->thread3.dispatch_grf_start_reg = 3; /* must match kernel */
-
- wm_state->wm4.stats_enable = 1; /* statistic */
- wm_state->wm4.sampler_state_pointer = (state_base_offset + src_sampler_offset) >> 5;
- wm_state->wm4.sampler_count = 1; /* 1-4 samplers used */
- wm_state->wm5.max_threads = PS_MAX_THREADS - 1;
- wm_state->wm5.thread_dispatch_enable = 1;
- //just use 16-pixel dispatch (4 subspans), don't need to change kernel start point
- wm_state->wm5.enable_16_pix = 1;
- wm_state->wm5.enable_8_pix = 0;
- wm_state->wm5.early_depth_test = 1;
+ memcpy(ps_kernel, ps_kernel_static_masknoca,
+ sizeof (ps_kernel_static_masknoca));
+ } else {
+ memcpy(ps_kernel, ps_kernel_static_nomask,
+ sizeof (ps_kernel_static_nomask));
+ }
- /* Begin the long sequence of commands needed to set up the 3D
- * rendering pipe
- */
- {
+ memset(wm_state, 0, sizeof (*wm_state));
+ wm_state->thread0.kernel_start_pointer =
+ (state_base_offset + ps_kernel_offset) >> 6;
+ wm_state->thread0.grf_reg_count = BRW_GRF_BLOCKS(PS_KERNEL_NUM_GRF);
+ wm_state->thread1.single_program_flow = 1;
+ if (!pMask)
+ wm_state->thread1.binding_table_entry_count = 2; /* 1 tex and fb */
+ else
+ wm_state->thread1.binding_table_entry_count = 3; /* 2 tex and fb */
+
+ wm_state->thread2.scratch_space_base_pointer = (state_base_offset +
+ wm_scratch_offset)>>10;
+ wm_state->thread2.per_thread_scratch_space = 0;
+ // XXX: urb allocation
+ wm_state->thread3.const_urb_entry_read_length = 0;
+ wm_state->thread3.const_urb_entry_read_offset = 0;
+ /* Each pair of attributes (src/mask coords) is one URB entry */
+ if (pMask)
+ wm_state->thread3.urb_entry_read_length = 2;
+ else
+ wm_state->thread3.urb_entry_read_length = 1;
+ wm_state->thread3.urb_entry_read_offset = 0;
+ /* wm kernel use urb from 3, see wm_program in compiler module */
+ wm_state->thread3.dispatch_grf_start_reg = 3; /* must match kernel */
+
+ wm_state->wm4.stats_enable = 1; /* statistic */
+ wm_state->wm4.sampler_state_pointer = (state_base_offset +
+ src_sampler_offset) >> 5;
+ wm_state->wm4.sampler_count = 1; /* 1-4 samplers used */
+ wm_state->wm5.max_threads = PS_MAX_THREADS - 1;
+ wm_state->wm5.thread_dispatch_enable = 1;
+ /* just use 16-pixel dispatch (4 subspans), don't need to change kernel
+ * start point
+ */
+ wm_state->wm5.enable_16_pix = 1;
+ wm_state->wm5.enable_8_pix = 0;
+ wm_state->wm5.early_depth_test = 1;
+
+ /* Begin the long sequence of commands needed to set up the 3D
+ * rendering pipe
+ */
+ {
BEGIN_LP_RING(2);
- OUT_RING(MI_FLUSH |
- MI_STATE_INSTRUCTION_CACHE_FLUSH |
- BRW_MI_GLOBAL_SNAPSHOT_RESET);
+ OUT_RING(MI_FLUSH |
+ MI_STATE_INSTRUCTION_CACHE_FLUSH |
+ BRW_MI_GLOBAL_SNAPSHOT_RESET);
OUT_RING(MI_NOOP);
ADVANCE_LP_RING();
- }
- {
+ }
+ {
BEGIN_LP_RING(12);
-
+
/* Match Mesa driver setup */
OUT_RING(BRW_PIPELINE_SELECT | PIPELINE_SELECT_3D);
-
+
OUT_RING(BRW_CS_URB_STATE | 0);
OUT_RING((0 << 4) | /* URB Entry Allocation Size */
- (0 << 0)); /* Number of URB Entries */
+ (0 << 0)); /* Number of URB Entries */
- /* Zero out the two base address registers so all offsets are absolute */
+ /* Zero out the two base address registers so all offsets are
+ * absolute.
+ */
OUT_RING(BRW_STATE_BASE_ADDRESS | 4);
OUT_RING(0 | BASE_ADDRESS_MODIFY); /* Generate state base address */
OUT_RING(0 | BASE_ADDRESS_MODIFY); /* Surface state base address */
OUT_RING(0 | BASE_ADDRESS_MODIFY); /* media base addr, don't care */
- OUT_RING(0x10000000 | BASE_ADDRESS_MODIFY); /* general state max addr, disabled */
- OUT_RING(0x10000000 | BASE_ADDRESS_MODIFY); /* media object state max addr, disabled */
+ /* general state max addr, disabled */
+ OUT_RING(0x10000000 | BASE_ADDRESS_MODIFY);
+ /* media object state max addr, disabled */
+ OUT_RING(0x10000000 | BASE_ADDRESS_MODIFY);
- /* Set system instruction pointer */
+ /* Set system instruction pointer */
OUT_RING(BRW_STATE_SIP | 0);
- OUT_RING(state_base_offset + sip_kernel_offset); /* system instruction pointer */
+ OUT_RING(state_base_offset + sip_kernel_offset);
OUT_RING(MI_NOOP);
ADVANCE_LP_RING();
- }
- {
+ }
+ {
BEGIN_LP_RING(26);
- /* Pipe control */
+ /* Pipe control */
OUT_RING(BRW_PIPE_CONTROL |
- BRW_PIPE_CONTROL_NOWRITE |
- BRW_PIPE_CONTROL_IS_FLUSH |
- 2);
+ BRW_PIPE_CONTROL_NOWRITE |
+ BRW_PIPE_CONTROL_IS_FLUSH |
+ 2);
OUT_RING(0); /* Destination address */
OUT_RING(0); /* Immediate data low DW */
OUT_RING(0); /* Immediate data high DW */
- /* Binding table pointers */
+ /* Binding table pointers */
OUT_RING(BRW_3DSTATE_BINDING_TABLE_POINTERS | 4);
OUT_RING(0); /* vs */
OUT_RING(0); /* gs */
OUT_RING(0); /* clip */
OUT_RING(0); /* sf */
- /* Only the PS uses the binding table */
+ /* Only the PS uses the binding table */
OUT_RING(state_base_offset + binding_table_offset); /* ps */
- /* The drawing rectangle clipping is always on. Set it to values that
- * shouldn't do any clipping.
- */
- OUT_RING(BRW_3DSTATE_DRAWING_RECTANGLE | 2); /* XXX 3 for BLC or CTG */
+ /* The drawing rectangle clipping is always on. Set it to values that
+ * shouldn't do any clipping.
+ */
+ OUT_RING(BRW_3DSTATE_DRAWING_RECTANGLE | 2); /* XXX 3 for BLC or CTG */
OUT_RING(0x00000000); /* ymin, xmin */
OUT_RING((pScrn->virtualX - 1) |
(pScrn->virtualY - 1) << 16); /* ymax, xmax */
OUT_RING(0x00000000); /* yorigin, xorigin */
- /* skip the depth buffer */
- /* skip the polygon stipple */
- /* skip the polygon stipple offset */
- /* skip the line stipple */
-
- /* Set the pointers to the 3d pipeline state */
+ /* skip the depth buffer */
+ /* skip the polygon stipple */
+ /* skip the polygon stipple offset */
+ /* skip the line stipple */
+
+ /* Set the pointers to the 3d pipeline state */
OUT_RING(BRW_3DSTATE_PIPELINED_POINTERS | 5);
OUT_RING(state_base_offset + vs_offset); /* 32 byte aligned */
- OUT_RING(BRW_GS_DISABLE); /* disable GS, resulting in passthrough */
- OUT_RING(BRW_CLIP_DISABLE); /* disable CLIP, resulting in passthrough */
+ OUT_RING(BRW_GS_DISABLE); /* disable GS, resulting in passthrough */
+ OUT_RING(BRW_CLIP_DISABLE); /* disable CLIP, resulting in passthrough */
OUT_RING(state_base_offset + sf_offset); /* 32 byte aligned */
OUT_RING(state_base_offset + wm_offset); /* 32 byte aligned */
OUT_RING(state_base_offset + cc_offset); /* 64 byte aligned */
- /* URB fence */
+ /* URB fence */
OUT_RING(BRW_URB_FENCE |
UF0_CS_REALLOC |
UF0_SF_REALLOC |
@@ -906,27 +933,28 @@ I965EXAPrepareComposite(int op, PictureP
OUT_RING(((urb_cs_start + urb_cs_size) << UF2_CS_FENCE_SHIFT) |
((urb_sf_start + urb_sf_size) << UF2_SF_FENCE_SHIFT));
- /* Constant buffer state */
+ /* Constant buffer state */
OUT_RING(BRW_CS_URB_STATE | 0);
- OUT_RING(((URB_CS_ENTRY_SIZE - 1) << 4) | /* URB Entry Allocation Size */
- (URB_CS_ENTRIES << 0)); /* Number of URB Entries */
+ OUT_RING(((URB_CS_ENTRY_SIZE - 1) << 4) |
+ (URB_CS_ENTRIES << 0));
ADVANCE_LP_RING();
- }
- {
+ }
+ {
int nelem = pMask ? 3: 2;
BEGIN_LP_RING(pMask?12:10);
- /* Set up the pointer to our vertex buffer */
- OUT_RING(BRW_3DSTATE_VERTEX_BUFFERS | 3);
+ /* Set up the pointer to our vertex buffer */
+ OUT_RING(BRW_3DSTATE_VERTEX_BUFFERS | 3);
OUT_RING((0 << VB0_BUFFER_INDEX_SHIFT) |
VB0_VERTEXDATA |
- ((4 * 2 * nelem) << VB0_BUFFER_PITCH_SHIFT));
+ ((4 * 2 * nelem) << VB0_BUFFER_PITCH_SHIFT));
OUT_RING(state_base_offset + vb_offset);
OUT_RING(2); // max index, prim has 4 coords
OUT_RING(0); // ignore for VERTEXDATA, but still there
- /* Set up our vertex elements, sourced from the single vertex buffer. */
- OUT_RING(BRW_3DSTATE_VERTEX_ELEMENTS | ((2 * nelem) - 1));
- /* offset 0: X,Y -> {X, Y, 1.0, 1.0} */
+ /* Set up our vertex elements, sourced from the single vertex buffer.
+ */
+ OUT_RING(BRW_3DSTATE_VERTEX_ELEMENTS | ((2 * nelem) - 1));
+ /* offset 0: X,Y -> {X, Y, 1.0, 1.0} */
OUT_RING((0 << VE0_VERTEX_BUFFER_INDEX_SHIFT) |
VE0_VALID |
(BRW_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) |
@@ -936,7 +964,7 @@ I965EXAPrepareComposite(int op, PictureP
(BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT) |
(BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT) |
(0 << VE1_DESTINATION_ELEMENT_OFFSET_SHIFT));
- /* offset 8: S0, T0 -> {S0, T0, 1.0, 1.0} */
+ /* offset 8: S0, T0 -> {S0, T0, 1.0, 1.0} */
OUT_RING((0 << VE0_VERTEX_BUFFER_INDEX_SHIFT) |
VE0_VALID |
(BRW_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) |
@@ -948,30 +976,30 @@ I965EXAPrepareComposite(int op, PictureP
(4 << VE1_DESTINATION_ELEMENT_OFFSET_SHIFT));
if (pMask) {
- OUT_RING((0 << VE0_VERTEX_BUFFER_INDEX_SHIFT) |
- VE0_VALID |
- (BRW_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) |
- (16 << VE0_OFFSET_SHIFT));
- OUT_RING((BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT) |
- (BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT) |
- (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT) |
- (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT) |
- (8 << VE1_DESTINATION_ELEMENT_OFFSET_SHIFT));
+ OUT_RING((0 << VE0_VERTEX_BUFFER_INDEX_SHIFT) |
+ VE0_VALID |
+ (BRW_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) |
+ (16 << VE0_OFFSET_SHIFT));
+ OUT_RING((BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT) |
+ (BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT) |
+ (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT) |
+ (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT) |
+ (8 << VE1_DESTINATION_ELEMENT_OFFSET_SHIFT));
}
-
+
ADVANCE_LP_RING();
- }
+ }
#ifdef I830DEBUG
ErrorF("try to sync to show any errors...");
I830Sync(pScrn);
#endif
return TRUE;
-}
+}
void
-I965EXAComposite(PixmapPtr pDst, int srcX, int srcY, int maskX, int maskY,
- int dstX, int dstY, int w, int h)
+i965_composite(PixmapPtr pDst, int srcX, int srcY, int maskX, int maskY,
+ int dstX, int dstY, int w, int h)
{
ScrnInfoPtr pScrn = xf86Screens[pDst->drawable.pScreen->myNum];
I830Ptr pI830 = I830PTR(pScrn);
@@ -1039,12 +1067,12 @@ I965EXAComposite(PixmapPtr pDst, int src
}
vb[i++] = (float)dstX;
vb[i++] = (float)dstY;
-
+
{
BEGIN_LP_RING(6);
- OUT_RING(BRW_3DPRIMITIVE |
+ OUT_RING(BRW_3DPRIMITIVE |
BRW_3DPRIMITIVE_VERTEX_SEQUENTIAL |
- (_3DPRIM_RECTLIST << BRW_3DPRIMITIVE_TOPOLOGY_SHIFT) |
+ (_3DPRIM_RECTLIST << BRW_3DPRIMITIVE_TOPOLOGY_SHIFT) |
(0 << 9) | /* CTG - indirect vertex count */
4);
OUT_RING(3); /* vertex count per instance */
diff-tree c47210d94ed17ad9e8e489a1e1886732e6dc7220 (from 72ea0e514dcbebd009833c21f40e9bfb84074628)
Author: Eric Anholt <eric at anholt.net>
Date: Wed Jan 31 12:50:31 2007 -0800
Move the render code to non-EXA-specific filenames.
diff --git a/src/Makefile.am b/src/Makefile.am
index ba12635..7656e02 100644
--- a/src/Makefile.am
+++ b/src/Makefile.am
@@ -92,9 +92,9 @@ i810_drv_la_SOURCES = \
i965_video.c \
i830_exa.c \
i830_xaa.c \
- i830_exa_render.c \
- i915_exa_render.c \
- i965_exa_render.c
+ i830_render.c \
+ i915_render.c \
+ i965_render.c
if HAVE_GEN4ASM
sf_prog.h: packed_yuv_sf.g4a
diff --git a/src/common.h b/src/common.h
index 561dfac..91e31b5 100644
--- a/src/common.h
+++ b/src/common.h
@@ -130,6 +130,17 @@ extern void I830DPRINTF_stub(const char
outring &= ringmask; \
} while (0)
+union intfloat {
+ float f;
+ unsigned int ui;
+};
+
+#define OUT_RING_F(x) do { \
+ union intfloat tmp; \
+ tmp.f = (float)(x); \
+ OUT_RING(tmp.ui); \
+} while(0)
+
#define ADVANCE_LP_RING() do { \
if (ringused > needed) \
FatalError("%s: ADVANCE_LP_RING: exceeded allocation %d/%d\n ", \
diff --git a/src/i830_exa.c b/src/i830_exa.c
index 02d2dcf..8a1577a 100644
--- a/src/i830_exa.c
+++ b/src/i830_exa.c
@@ -97,18 +97,6 @@ const int I830PatternROP[16] =
ROP_1
};
-/* move to common.h */
-union intfloat {
- float f;
- unsigned int ui;
-};
-
-#define OUT_RING_F(x) do { \
- union intfloat tmp; \
- tmp.f = (float)(x); \
- OUT_RING(tmp.ui); \
-} while(0)
-
/**
* I830EXASync - wait for a command to finish
* @pScreen: current screen
@@ -309,103 +297,6 @@ i830_get_transformed_coordinates(int x,
}
}
-/**
- * Do a single rectangle composite operation.
- *
- * This function is shared between i830 and i915 generation code.
- */
-void
-IntelEXAComposite(PixmapPtr pDst, int srcX, int srcY, int maskX, int maskY,
- int dstX, int dstY, int w, int h)
-{
- ScrnInfoPtr pScrn = xf86Screens[pDst->drawable.pScreen->myNum];
- I830Ptr pI830 = I830PTR(pScrn);
- Bool has_mask;
- float src_x[3], src_y[3], mask_x[3], mask_y[3];
-
- i830_get_transformed_coordinates(srcX, srcY,
- pI830->transform[0],
- &src_x[0], &src_y[0]);
- i830_get_transformed_coordinates(srcX, srcY + h,
- pI830->transform[0],
- &src_x[1], &src_y[1]);
- i830_get_transformed_coordinates(srcX + w, srcY + h,
- pI830->transform[0],
- &src_x[2], &src_y[2]);
-
- if (pI830->scale_units[1][0] == -1 || pI830->scale_units[1][1] == -1) {
- has_mask = FALSE;
- } else {
- has_mask = TRUE;
- i830_get_transformed_coordinates(maskX, maskY,
- pI830->transform[1],
- &mask_x[0], &mask_y[0]);
- i830_get_transformed_coordinates(maskX, maskY + h,
- pI830->transform[1],
- &mask_x[1], &mask_y[1]);
- i830_get_transformed_coordinates(maskX + w, maskY + h,
- pI830->transform[1],
- &mask_x[2], &mask_y[2]);
- }
-
- {
- int vertex_count;
-
- if (has_mask)
- vertex_count = 3*6;
- else
- vertex_count = 3*4;
-
- BEGIN_LP_RING(6+vertex_count);
-
- OUT_RING(MI_NOOP);
- OUT_RING(MI_NOOP);
- OUT_RING(MI_NOOP);
- OUT_RING(MI_NOOP);
- OUT_RING(MI_NOOP);
-
- OUT_RING(PRIM3D_INLINE | PRIM3D_RECTLIST | (vertex_count-1));
-
- OUT_RING_F(dstX);
- OUT_RING_F(dstY);
- OUT_RING_F(src_x[0] / pI830->scale_units[0][0]);
- OUT_RING_F(src_y[0] / pI830->scale_units[0][1]);
- if (has_mask) {
- OUT_RING_F(mask_x[0] / pI830->scale_units[1][0]);
- OUT_RING_F(mask_y[0] / pI830->scale_units[1][1]);
- }
-
- OUT_RING_F(dstX);
- OUT_RING_F(dstY + h);
- OUT_RING_F(src_x[1] / pI830->scale_units[0][0]);
- OUT_RING_F(src_y[1] / pI830->scale_units[0][1]);
- if (has_mask) {
- OUT_RING_F(mask_x[1] / pI830->scale_units[1][0]);
- OUT_RING_F(mask_y[1] / pI830->scale_units[1][1]);
- }
-
- OUT_RING_F(dstX + w);
- OUT_RING_F(dstY + h);
- OUT_RING_F(src_x[2] / pI830->scale_units[0][0]);
- OUT_RING_F(src_y[2] / pI830->scale_units[0][1]);
- if (has_mask) {
- OUT_RING_F(mask_x[2] / pI830->scale_units[1][0]);
- OUT_RING_F(mask_y[2] / pI830->scale_units[1][1]);
- }
- ADVANCE_LP_RING();
- }
-}
-
-void
-IntelEXADoneComposite(PixmapPtr pDst)
-{
-#if ALWAYS_SYNC
- ScrnInfoPtr pScrn = xf86Screens[pDst->drawable.pScreen->myNum];
-
- I830Sync(pScrn);
-#endif
-}
-
/*
* TODO:
* - Dual head?
diff --git a/src/i830_exa_render.c b/src/i830_exa_render.c
deleted file mode 100644
index bf521b4..0000000
--- a/src/i830_exa_render.c
+++ /dev/null
@@ -1,494 +0,0 @@
-/*
- * Copyright © 2006 Intel Corporation
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- *
- * Authors:
- * Wang Zhenyu <zhenyu.z.wang at intel.com>
- * Eric Anholt <eric at anholt.net>
- *
- */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "xf86.h"
-#include "i830.h"
-#include "i830_reg.h"
-
-#ifdef I830DEBUG
-#define DEBUG_I830FALLBACK 1
-#endif
-
-#ifdef DEBUG_I830FALLBACK
-#define I830FALLBACK(s, arg...) \
-do { \
- DPRINTF(PFX, "EXA fallback: " s "\n", ##arg); \
- return FALSE; \
-} while(0)
-#else
-#define I830FALLBACK(s, arg...) \
-do { \
- return FALSE; \
-} while(0)
-#endif
-
-struct blendinfo {
- Bool dst_alpha;
- Bool src_alpha;
- CARD32 src_blend;
- CARD32 dst_blend;
-};
-
-struct formatinfo {
- int fmt;
- CARD32 card_fmt;
-};
-
-#define TB0C_LAST_STAGE (1 << 31)
-#define TB0C_RESULT_SCALE_1X (0 << 29)
-#define TB0C_RESULT_SCALE_2X (1 << 29)
-#define TB0C_RESULT_SCALE_4X (2 << 29)
-#define TB0C_OP_MODULE (3 << 25)
-#define TB0C_OUTPUT_WRITE_CURRENT (0 << 24)
-#define TB0C_OUTPUT_WRITE_ACCUM (1 << 24)
-#define TB0C_ARG3_REPLICATE_ALPHA (1<<23)
-#define TB0C_ARG3_INVERT (1<<22)
-#define TB0C_ARG3_SEL_XXX
-#define TB0C_ARG2_REPLICATE_ALPHA (1<<17)
-#define TB0C_ARG2_INVERT (1<<16)
-#define TB0C_ARG2_SEL_ONE (0 << 12)
-#define TB0C_ARG2_SEL_FACTOR (1 << 12)
-#define TB0C_ARG2_SEL_TEXEL0 (6 << 12)
-#define TB0C_ARG2_SEL_TEXEL1 (7 << 12)
-#define TB0C_ARG2_SEL_TEXEL2 (8 << 12)
-#define TB0C_ARG2_SEL_TEXEL3 (9 << 12)
-#define TB0C_ARG1_REPLICATE_ALPHA (1<<11)
-#define TB0C_ARG1_INVERT (1<<10)
-#define TB0C_ARG1_SEL_TEXEL0 (6 << 6)
-#define TB0C_ARG1_SEL_TEXEL1 (7 << 6)
-#define TB0C_ARG1_SEL_TEXEL2 (8 << 6)
-#define TB0C_ARG1_SEL_TEXEL3 (9 << 6)
-#define TB0C_ARG0_REPLICATE_ALPHA (1<<5)
-#define TB0C_ARG0_SEL_XXX
-
-#define TB0A_CTR_STAGE_ENABLE (1<<31)
-#define TB0A_RESULT_SCALE_1X (0 << 29)
-#define TB0A_RESULT_SCALE_2X (1 << 29)
-#define TB0A_RESULT_SCALE_4X (2 << 29)
-#define TB0A_OP_MODULE (3 << 25)
-#define TB0A_OUTPUT_WRITE_CURRENT (0<<24)
-#define TB0A_OUTPUT_WRITE_ACCUM (1<<24)
-#define TB0A_CTR_STAGE_SEL_BITS_XXX
-#define TB0A_ARG3_SEL_XXX
-#define TB0A_ARG3_INVERT (1<<17)
-#define TB0A_ARG2_INVERT (1<<16)
-#define TB0A_ARG2_SEL_ONE (0 << 12)
-#define TB0A_ARG2_SEL_TEXEL0 (6 << 12)
-#define TB0A_ARG2_SEL_TEXEL1 (7 << 12)
-#define TB0A_ARG2_SEL_TEXEL2 (8 << 12)
-#define TB0A_ARG2_SEL_TEXEL3 (9 << 12)
-#define TB0A_ARG1_INVERT (1<<10)
-#define TB0A_ARG1_SEL_TEXEL0 (6 << 6)
-#define TB0A_ARG1_SEL_TEXEL1 (7 << 6)
-#define TB0A_ARG1_SEL_TEXEL2 (8 << 6)
-#define TB0A_ARG1_SEL_TEXEL3 (9 << 6)
-
-static struct blendinfo I830BlendOp[] = {
- /* Clear */
- {0, 0, BLENDFACTOR_ZERO, BLENDFACTOR_ZERO},
- /* Src */
- {0, 0, BLENDFACTOR_ONE, BLENDFACTOR_ZERO},
- /* Dst */
- {0, 0, BLENDFACTOR_ZERO, BLENDFACTOR_ONE},
- /* Over */
- {0, 1, BLENDFACTOR_ONE, BLENDFACTOR_INV_SRC_ALPHA},
- /* OverReverse */
- {1, 0, BLENDFACTOR_INV_DST_ALPHA, BLENDFACTOR_ONE},
- /* In */
- {1, 0, BLENDFACTOR_DST_ALPHA, BLENDFACTOR_ZERO},
- /* InReverse */
- {0, 1, BLENDFACTOR_ZERO, BLENDFACTOR_SRC_ALPHA},
- /* Out */
- {1, 0, BLENDFACTOR_INV_DST_ALPHA, BLENDFACTOR_ZERO},
- /* OutReverse */
- {0, 1, BLENDFACTOR_ZERO, BLENDFACTOR_INV_SRC_ALPHA},
- /* Atop */
- {1, 1, BLENDFACTOR_DST_ALPHA, BLENDFACTOR_INV_SRC_ALPHA},
- /* AtopReverse */
- {1, 1, BLENDFACTOR_INV_DST_ALPHA, BLENDFACTOR_SRC_ALPHA},
- /* Xor */
- {1, 1, BLENDFACTOR_INV_DST_ALPHA, BLENDFACTOR_INV_SRC_ALPHA},
- /* Add */
- {0, 0, BLENDFACTOR_ONE, BLENDFACTOR_ONE},
-};
-
-
-static struct formatinfo I830TexFormats[] = {
- {PICT_a8r8g8b8, MT_32BIT_ARGB8888 },
- {PICT_x8r8g8b8, MT_32BIT_ARGB8888 },
- {PICT_a8b8g8r8, MT_32BIT_ABGR8888 },
- {PICT_x8b8g8r8, MT_32BIT_ABGR8888 },
- {PICT_r5g6b5, MT_16BIT_RGB565 },
- {PICT_a1r5g5b5, MT_16BIT_ARGB1555 },
- {PICT_x1r5g5b5, MT_16BIT_ARGB1555 },
- {PICT_a8, MT_8BIT_I8 },
-};
-
-static Bool I830GetDestFormat(PicturePtr pDstPicture, CARD32 *dst_format)
-{
- /* XXX: color buffer format for i830 */
- switch (pDstPicture->format) {
- case PICT_a8r8g8b8:
- case PICT_x8r8g8b8:
- *dst_format = COLR_BUF_ARGB8888;
- break;
- case PICT_r5g6b5:
- *dst_format = COLR_BUF_RGB565;
- break;
- case PICT_a1r5g5b5:
- case PICT_x1r5g5b5:
- *dst_format = COLR_BUF_ARGB1555;
- break;
- case PICT_a8:
- *dst_format = COLR_BUF_8BIT;
- break;
- case PICT_a4r4g4b4:
- case PICT_x4r4g4b4:
- *dst_format = COLR_BUF_ARGB4444;
- break;
- default:
- I830FALLBACK("Unsupported dest format 0x%x\n",
- (int)pDstPicture->format);
- }
-
- return TRUE;
-}
-
-
-static CARD32 I830GetBlendCntl(int op, PicturePtr pMask, CARD32 dst_format)
-{
- CARD32 sblend, dblend;
-
- sblend = I830BlendOp[op].src_blend;
- dblend = I830BlendOp[op].dst_blend;
-
- /* If there's no dst alpha channel, adjust the blend op so that we'll treat
- * it as always 1.
- */
- if (PICT_FORMAT_A(dst_format) == 0 && I830BlendOp[op].dst_alpha) {
- if (sblend == BLENDFACTOR_DST_ALPHA)
- sblend = BLENDFACTOR_ONE;
- else if (sblend == BLENDFACTOR_INV_DST_ALPHA)
- sblend = BLENDFACTOR_ZERO;
- }
-
- /* If the source alpha is being used, then we should only be in a case where
- * the source blend factor is 0, and the source blend value is the mask
- * channels multiplied by the source picture's alpha.
- */
- if (pMask && pMask->componentAlpha && I830BlendOp[op].src_alpha) {
- if (dblend == BLENDFACTOR_SRC_ALPHA) {
- dblend = BLENDFACTOR_SRC_COLR;
- } else if (dblend == BLENDFACTOR_INV_SRC_ALPHA) {
- dblend = BLENDFACTOR_INV_SRC_COLR;
- }
- }
-
- return (sblend << S8_SRC_BLEND_FACTOR_SHIFT) |
- (dblend << S8_DST_BLEND_FACTOR_SHIFT);
-}
-
-static Bool I830CheckCompositeTexture(PicturePtr pPict, int unit)
-{
- int w = pPict->pDrawable->width;
- int h = pPict->pDrawable->height;
- int i;
-
- if ((w > 0x7ff) || (h > 0x7ff))
- I830FALLBACK("Picture w/h too large (%dx%d)\n", w, h);
-
- for (i = 0; i < sizeof(I830TexFormats) / sizeof(I830TexFormats[0]); i++)
- {
- if (I830TexFormats[i].fmt == pPict->format)
- break;
- }
- if (i == sizeof(I830TexFormats) / sizeof(I830TexFormats[0]))
- I830FALLBACK("Unsupported picture format 0x%x\n",
- (int)pPict->format);
-
- /* FIXME: fix repeat support */
- if (pPict->repeat)
- I830FALLBACK("repeat unsupport now\n");
-
- if (pPict->filter != PictFilterNearest &&
- pPict->filter != PictFilterBilinear)
- I830FALLBACK("Unsupported filter 0x%x\n", pPict->filter);
-
- return TRUE;
-}
-
-static Bool
-I830TextureSetup(PicturePtr pPict, PixmapPtr pPix, int unit)
-{
-
- ScrnInfoPtr pScrn = xf86Screens[pPict->pDrawable->pScreen->myNum];
- I830Ptr pI830 = I830PTR(pScrn);
- CARD32 format, offset, pitch, filter;
- int w, h, i;
- CARD32 wrap_mode = TEXCOORDMODE_CLAMP;
-
- offset = intel_get_pixmap_offset(pPix);
- pitch = intel_get_pixmap_pitch(pPix);
- w = pPict->pDrawable->width;
- h = pPict->pDrawable->height;
- pI830->scale_units[unit][0] = pPix->drawable.width;
- pI830->scale_units[unit][1] = pPix->drawable.height;
-
- for (i = 0; i < sizeof(I830TexFormats) / sizeof(I830TexFormats[0]); i++) {
- if (I830TexFormats[i].fmt == pPict->format)
- break;
- }
- if ( i == sizeof(I830TexFormats)/ sizeof(I830TexFormats[0]) )
- I830FALLBACK("unknown texture format\n");
- format = I830TexFormats[i].card_fmt;
-
- if (pPict->repeat)
- wrap_mode = TEXCOORDMODE_WRAP; /* XXX: correct ? */
-
- switch (pPict->filter) {
- case PictFilterNearest:
- filter = ((FILTER_NEAREST<<TM0S3_MAG_FILTER_SHIFT) |
- (FILTER_NEAREST<<TM0S3_MIN_FILTER_SHIFT));
- break;
- case PictFilterBilinear:
- filter = ((FILTER_LINEAR<<TM0S3_MAG_FILTER_SHIFT) |
- (FILTER_LINEAR<<TM0S3_MIN_FILTER_SHIFT));
- break;
- default:
- filter = 0;
- I830FALLBACK("Bad filter 0x%x\n", pPict->filter);
- }
-
- {
- if (pPix->drawable.bitsPerPixel == 8)
- format |= MAP_SURFACE_8BIT;
- else if (pPix->drawable.bitsPerPixel == 16)
- format |= MAP_SURFACE_16BIT;
- else
- format |= MAP_SURFACE_32BIT;
-
- BEGIN_LP_RING(6);
- OUT_RING(_3DSTATE_MAP_INFO_CMD);
- OUT_RING(format | TEXMAP_INDEX(unit) | MAP_FORMAT_2D);
- OUT_RING(((pPix->drawable.height - 1) << 16) |
- (pPix->drawable.width - 1)); /* height, width */
- OUT_RING(offset); /* map address */
- OUT_RING(((pitch / 4) - 1) << 2); /* map pitch */
- OUT_RING(0);
- ADVANCE_LP_RING();
- }
-
- {
- BEGIN_LP_RING(2);
- /* coord sets */
- OUT_RING(_3DSTATE_MAP_COORD_SET_CMD | TEXCOORD_SET(unit) |
- ENABLE_TEXCOORD_PARAMS | TEXCOORDS_ARE_NORMAL |
- TEXCOORDTYPE_CARTESIAN | ENABLE_ADDR_V_CNTL |
- TEXCOORD_ADDR_V_MODE(wrap_mode) |
- ENABLE_ADDR_U_CNTL | TEXCOORD_ADDR_U_MODE(wrap_mode));
- OUT_RING(MI_NOOP);
-
- /* XXX: filter seems hang engine...*/
-#if 0
- OUT_RING(I830_STATE3D_MAP_FILTER | FILTER_MAP_INDEX(unit) | ENABLE_KEYS| DISABLE_COLOR_KEY | DISABLE_CHROMA_KEY | DISABLE_KILL_PIXEL |ENABLE_MIP_MODE_FILTER | MIPFILTER_NONE | filter);
- OUT_RING(0);
-#endif
-
- /* max & min mip level ? or base mip level? */
-
- ADVANCE_LP_RING();
- }
-
- pI830->transform[unit] = pPict->transform;
-
-#ifdef I830DEBUG
- ErrorF("try to sync to show any errors...");
- I830Sync(pScrn);
-#endif
-
- return TRUE;
-}
-
-Bool
-I830EXACheckComposite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture,
- PicturePtr pDstPicture)
-{
- CARD32 tmp1;
-
- /* Check for unsupported compositing operations. */
- if (op >= sizeof(I830BlendOp) / sizeof(I830BlendOp[0]))
- I830FALLBACK("Unsupported Composite op 0x%x\n", op);
-
- if (pMaskPicture != NULL && pMaskPicture->componentAlpha) {
- /* Check if it's component alpha that relies on a source alpha and on
- * the source value. We can only get one of those into the single
- * source value that we get to blend with.
- */
- if (I830BlendOp[op].src_alpha &&
- (I830BlendOp[op].src_blend != BLENDFACTOR_ZERO))
- I830FALLBACK("Component alpha not supported with source "
- "alpha and source value blending.\n");
- }
-
- if (!I830CheckCompositeTexture(pSrcPicture, 0))
- I830FALLBACK("Check Src picture texture\n");
- if (pMaskPicture != NULL && !I830CheckCompositeTexture(pMaskPicture, 1))
- I830FALLBACK("Check Mask picture texture\n");
-
- if (!I830GetDestFormat(pDstPicture, &tmp1))
- I830FALLBACK("Get Color buffer format\n");
-
- return TRUE;
-}
-
-Bool
-I830EXAPrepareComposite(int op, PicturePtr pSrcPicture,
- PicturePtr pMaskPicture, PicturePtr pDstPicture,
- PixmapPtr pSrc, PixmapPtr pMask, PixmapPtr pDst)
-{
-/* XXX: setup texture map from pixmap, vertex format, blend cntl */
- ScrnInfoPtr pScrn = xf86Screens[pSrcPicture->pDrawable->pScreen->myNum];
- I830Ptr pI830 = I830PTR(pScrn);
- CARD32 dst_format, dst_offset, dst_pitch;
-
- I830GetDestFormat(pDstPicture, &dst_format);
- dst_offset = intel_get_pixmap_offset(pDst);
- dst_pitch = intel_get_pixmap_pitch(pDst);
-
- pI830->last_3d = LAST_3D_RENDER;
-
- if (!I830TextureSetup(pSrcPicture, pSrc, 0))
- I830FALLBACK("fail to setup src texture\n");
- if (pMask != NULL) {
- if (!I830TextureSetup(pMaskPicture, pMask, 1))
- I830FALLBACK("fail to setup mask texture\n");
- } else {
- pI830->transform[1] = NULL;
- pI830->scale_units[1][0] = -1;
- pI830->scale_units[1][1] = -1;
- }
-
- {
-
- CARD32 cblend, ablend, blendctl, vf2;
-
- BEGIN_LP_RING(22+6);
-
- /*color buffer*/
- OUT_RING(_3DSTATE_BUF_INFO_CMD);
- OUT_RING(BUF_3D_ID_COLOR_BACK| BUF_3D_PITCH(dst_pitch));
- OUT_RING(BUF_3D_ADDR(dst_offset));
- OUT_RING(MI_NOOP);
-
- OUT_RING(_3DSTATE_DST_BUF_VARS_CMD);
- OUT_RING(dst_format);
-
- OUT_RING(MI_FLUSH | MI_WRITE_DIRTY_STATE | MI_INVALIDATE_MAP_CACHE);
- OUT_RING(MI_NOOP); /* pad to quadword */
- /* defaults */
- OUT_RING(_3DSTATE_DFLT_Z_CMD);
- OUT_RING(0);
-
- OUT_RING(_3DSTATE_DFLT_DIFFUSE_CMD);
- OUT_RING(0);
-
- OUT_RING(_3DSTATE_DFLT_SPEC_CMD);
- OUT_RING(0);
-
- OUT_RING(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(3) | 0);
- OUT_RING((1 << S3_POINT_WIDTH_SHIFT) | (2 << S3_LINE_WIDTH_SHIFT) |
- S3_CULLMODE_NONE | S3_VERTEXHAS_XY);
- OUT_RING(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(2) | 0);
- if (pMask)
- vf2 = 2 << 12; /* 2 texture coord sets */
- else
- vf2 = 1 << 12;
- vf2 |= (TEXCOORDFMT_2D << 16);
- if (pMask)
- vf2 |= (TEXCOORDFMT_2D << 18);
- else
- vf2 |= (TEXCOORDFMT_1D << 18);
-
- vf2 |= (TEXCOORDFMT_1D << 20);
- vf2 |= (TEXCOORDFMT_1D << 22);
- vf2 |= (TEXCOORDFMT_1D << 24);
- vf2 |= (TEXCOORDFMT_1D << 26);
- vf2 |= (TEXCOORDFMT_1D << 28);
- vf2 |= (TEXCOORDFMT_1D << 30);
- OUT_RING(vf2);
-
- OUT_RING(MI_FLUSH | MI_WRITE_DIRTY_STATE | MI_INVALIDATE_MAP_CACHE);
- OUT_RING(MI_NOOP); /* pad to quadword */
- /* For (src In mask) operation */
- /* IN operator: Multiply src by mask components or mask alpha.*/
- /* TEXBLENDOP_MODULE: arg1*arg2 */
- cblend = TB0C_LAST_STAGE | TB0C_RESULT_SCALE_1X | TB0C_OP_MODULE |
- TB0C_OUTPUT_WRITE_CURRENT;
- ablend = TB0A_RESULT_SCALE_1X | TB0A_OP_MODULE |
- TB0A_OUTPUT_WRITE_CURRENT;
-
- cblend |= TB0C_ARG1_SEL_TEXEL0;
- ablend |= TB0A_ARG1_SEL_TEXEL0;
- if (pMask) {
- if (pMaskPicture->componentAlpha && pDstPicture->format != PICT_a8)
- cblend |= TB0C_ARG2_SEL_TEXEL1;
- else
- cblend |= (TB0C_ARG2_SEL_TEXEL1 | TB0C_ARG2_REPLICATE_ALPHA);
- ablend |= TB0A_ARG2_SEL_TEXEL1;
- } else {
- cblend |= TB0C_ARG2_SEL_ONE;
- ablend |= TB0A_ARG2_SEL_ONE;
- }
-
- OUT_RING(_3DSTATE_LOAD_STATE_IMMEDIATE_2 | LOAD_TEXTURE_BLEND_STAGE(0)|1);
- OUT_RING(cblend);
- OUT_RING(ablend);
- OUT_RING(0);
-
- OUT_RING(MI_FLUSH | MI_WRITE_DIRTY_STATE | MI_INVALIDATE_MAP_CACHE);
- OUT_RING(MI_NOOP); /* pad to quadword */
-
- blendctl = I830GetBlendCntl(op, pMaskPicture, pDstPicture->format);
- OUT_RING(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(8) | 0);
- OUT_RING(S8_ENABLE_COLOR_BLEND | S8_BLENDFUNC_ADD |(blendctl<<4) |
- S8_ENABLE_COLOR_BUFFER_WRITE);
- ADVANCE_LP_RING();
- }
-
-#ifdef I830DEBUG
- Error("try to sync to show any errors...");
- I830Sync(pScrn);
-#endif
-
- return TRUE;
-}
-
diff --git a/src/i830_render.c b/src/i830_render.c
new file mode 100644
index 0000000..c335f6d
--- /dev/null
+++ b/src/i830_render.c
@@ -0,0 +1,591 @@
+/*
+ * Copyright © 2006 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Authors:
+ * Wang Zhenyu <zhenyu.z.wang at intel.com>
+ * Eric Anholt <eric at anholt.net>
+ *
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include "xf86.h"
+#include "i830.h"
+#include "i830_reg.h"
+
+#ifdef I830DEBUG
+#define DEBUG_I830FALLBACK 1
+#endif
+
+#ifdef DEBUG_I830FALLBACK
+#define I830FALLBACK(s, arg...) \
+do { \
+ DPRINTF(PFX, "EXA fallback: " s "\n", ##arg); \
+ return FALSE; \
+} while(0)
+#else
+#define I830FALLBACK(s, arg...) \
+do { \
+ return FALSE; \
+} while(0)
+#endif
+
+struct blendinfo {
+ Bool dst_alpha;
+ Bool src_alpha;
+ CARD32 src_blend;
+ CARD32 dst_blend;
+};
+
+struct formatinfo {
+ int fmt;
+ CARD32 card_fmt;
+};
+
+#define TB0C_LAST_STAGE (1 << 31)
+#define TB0C_RESULT_SCALE_1X (0 << 29)
+#define TB0C_RESULT_SCALE_2X (1 << 29)
+#define TB0C_RESULT_SCALE_4X (2 << 29)
+#define TB0C_OP_MODULE (3 << 25)
+#define TB0C_OUTPUT_WRITE_CURRENT (0 << 24)
+#define TB0C_OUTPUT_WRITE_ACCUM (1 << 24)
+#define TB0C_ARG3_REPLICATE_ALPHA (1<<23)
+#define TB0C_ARG3_INVERT (1<<22)
+#define TB0C_ARG3_SEL_XXX
+#define TB0C_ARG2_REPLICATE_ALPHA (1<<17)
+#define TB0C_ARG2_INVERT (1<<16)
+#define TB0C_ARG2_SEL_ONE (0 << 12)
+#define TB0C_ARG2_SEL_FACTOR (1 << 12)
+#define TB0C_ARG2_SEL_TEXEL0 (6 << 12)
+#define TB0C_ARG2_SEL_TEXEL1 (7 << 12)
+#define TB0C_ARG2_SEL_TEXEL2 (8 << 12)
+#define TB0C_ARG2_SEL_TEXEL3 (9 << 12)
+#define TB0C_ARG1_REPLICATE_ALPHA (1<<11)
+#define TB0C_ARG1_INVERT (1<<10)
+#define TB0C_ARG1_SEL_TEXEL0 (6 << 6)
+#define TB0C_ARG1_SEL_TEXEL1 (7 << 6)
+#define TB0C_ARG1_SEL_TEXEL2 (8 << 6)
+#define TB0C_ARG1_SEL_TEXEL3 (9 << 6)
+#define TB0C_ARG0_REPLICATE_ALPHA (1<<5)
+#define TB0C_ARG0_SEL_XXX
+
+#define TB0A_CTR_STAGE_ENABLE (1<<31)
+#define TB0A_RESULT_SCALE_1X (0 << 29)
+#define TB0A_RESULT_SCALE_2X (1 << 29)
+#define TB0A_RESULT_SCALE_4X (2 << 29)
+#define TB0A_OP_MODULE (3 << 25)
+#define TB0A_OUTPUT_WRITE_CURRENT (0<<24)
+#define TB0A_OUTPUT_WRITE_ACCUM (1<<24)
+#define TB0A_CTR_STAGE_SEL_BITS_XXX
+#define TB0A_ARG3_SEL_XXX
+#define TB0A_ARG3_INVERT (1<<17)
+#define TB0A_ARG2_INVERT (1<<16)
+#define TB0A_ARG2_SEL_ONE (0 << 12)
+#define TB0A_ARG2_SEL_TEXEL0 (6 << 12)
+#define TB0A_ARG2_SEL_TEXEL1 (7 << 12)
+#define TB0A_ARG2_SEL_TEXEL2 (8 << 12)
+#define TB0A_ARG2_SEL_TEXEL3 (9 << 12)
+#define TB0A_ARG1_INVERT (1<<10)
+#define TB0A_ARG1_SEL_TEXEL0 (6 << 6)
+#define TB0A_ARG1_SEL_TEXEL1 (7 << 6)
+#define TB0A_ARG1_SEL_TEXEL2 (8 << 6)
+#define TB0A_ARG1_SEL_TEXEL3 (9 << 6)
+
+static struct blendinfo I830BlendOp[] = {
+ /* Clear */
+ {0, 0, BLENDFACTOR_ZERO, BLENDFACTOR_ZERO},
+ /* Src */
+ {0, 0, BLENDFACTOR_ONE, BLENDFACTOR_ZERO},
+ /* Dst */
+ {0, 0, BLENDFACTOR_ZERO, BLENDFACTOR_ONE},
+ /* Over */
+ {0, 1, BLENDFACTOR_ONE, BLENDFACTOR_INV_SRC_ALPHA},
+ /* OverReverse */
+ {1, 0, BLENDFACTOR_INV_DST_ALPHA, BLENDFACTOR_ONE},
+ /* In */
+ {1, 0, BLENDFACTOR_DST_ALPHA, BLENDFACTOR_ZERO},
+ /* InReverse */
+ {0, 1, BLENDFACTOR_ZERO, BLENDFACTOR_SRC_ALPHA},
+ /* Out */
+ {1, 0, BLENDFACTOR_INV_DST_ALPHA, BLENDFACTOR_ZERO},
+ /* OutReverse */
+ {0, 1, BLENDFACTOR_ZERO, BLENDFACTOR_INV_SRC_ALPHA},
+ /* Atop */
+ {1, 1, BLENDFACTOR_DST_ALPHA, BLENDFACTOR_INV_SRC_ALPHA},
+ /* AtopReverse */
+ {1, 1, BLENDFACTOR_INV_DST_ALPHA, BLENDFACTOR_SRC_ALPHA},
+ /* Xor */
+ {1, 1, BLENDFACTOR_INV_DST_ALPHA, BLENDFACTOR_INV_SRC_ALPHA},
+ /* Add */
+ {0, 0, BLENDFACTOR_ONE, BLENDFACTOR_ONE},
+};
+
+
+static struct formatinfo I830TexFormats[] = {
+ {PICT_a8r8g8b8, MT_32BIT_ARGB8888 },
+ {PICT_x8r8g8b8, MT_32BIT_ARGB8888 },
+ {PICT_a8b8g8r8, MT_32BIT_ABGR8888 },
+ {PICT_x8b8g8r8, MT_32BIT_ABGR8888 },
+ {PICT_r5g6b5, MT_16BIT_RGB565 },
+ {PICT_a1r5g5b5, MT_16BIT_ARGB1555 },
+ {PICT_x1r5g5b5, MT_16BIT_ARGB1555 },
+ {PICT_a8, MT_8BIT_I8 },
+};
+
+static Bool I830GetDestFormat(PicturePtr pDstPicture, CARD32 *dst_format)
+{
+ /* XXX: color buffer format for i830 */
+ switch (pDstPicture->format) {
+ case PICT_a8r8g8b8:
+ case PICT_x8r8g8b8:
+ *dst_format = COLR_BUF_ARGB8888;
+ break;
+ case PICT_r5g6b5:
+ *dst_format = COLR_BUF_RGB565;
+ break;
+ case PICT_a1r5g5b5:
+ case PICT_x1r5g5b5:
+ *dst_format = COLR_BUF_ARGB1555;
+ break;
+ case PICT_a8:
+ *dst_format = COLR_BUF_8BIT;
+ break;
+ case PICT_a4r4g4b4:
+ case PICT_x4r4g4b4:
+ *dst_format = COLR_BUF_ARGB4444;
+ break;
+ default:
+ I830FALLBACK("Unsupported dest format 0x%x\n",
+ (int)pDstPicture->format);
+ }
+
+ return TRUE;
+}
+
+
+static CARD32 I830GetBlendCntl(int op, PicturePtr pMask, CARD32 dst_format)
+{
+ CARD32 sblend, dblend;
+
+ sblend = I830BlendOp[op].src_blend;
+ dblend = I830BlendOp[op].dst_blend;
+
+ /* If there's no dst alpha channel, adjust the blend op so that we'll treat
+ * it as always 1.
+ */
+ if (PICT_FORMAT_A(dst_format) == 0 && I830BlendOp[op].dst_alpha) {
+ if (sblend == BLENDFACTOR_DST_ALPHA)
+ sblend = BLENDFACTOR_ONE;
+ else if (sblend == BLENDFACTOR_INV_DST_ALPHA)
+ sblend = BLENDFACTOR_ZERO;
+ }
+
+ /* If the source alpha is being used, then we should only be in a case where
+ * the source blend factor is 0, and the source blend value is the mask
+ * channels multiplied by the source picture's alpha.
+ */
+ if (pMask && pMask->componentAlpha && I830BlendOp[op].src_alpha) {
+ if (dblend == BLENDFACTOR_SRC_ALPHA) {
+ dblend = BLENDFACTOR_SRC_COLR;
+ } else if (dblend == BLENDFACTOR_INV_SRC_ALPHA) {
+ dblend = BLENDFACTOR_INV_SRC_COLR;
+ }
+ }
+
+ return (sblend << S8_SRC_BLEND_FACTOR_SHIFT) |
+ (dblend << S8_DST_BLEND_FACTOR_SHIFT);
+}
+
+static Bool I830CheckCompositeTexture(PicturePtr pPict, int unit)
+{
+ int w = pPict->pDrawable->width;
+ int h = pPict->pDrawable->height;
+ int i;
+
+ if ((w > 0x7ff) || (h > 0x7ff))
+ I830FALLBACK("Picture w/h too large (%dx%d)\n", w, h);
+
+ for (i = 0; i < sizeof(I830TexFormats) / sizeof(I830TexFormats[0]); i++)
+ {
+ if (I830TexFormats[i].fmt == pPict->format)
+ break;
+ }
+ if (i == sizeof(I830TexFormats) / sizeof(I830TexFormats[0]))
+ I830FALLBACK("Unsupported picture format 0x%x\n",
+ (int)pPict->format);
+
+ /* FIXME: fix repeat support */
+ if (pPict->repeat)
+ I830FALLBACK("repeat unsupport now\n");
+
+ if (pPict->filter != PictFilterNearest &&
+ pPict->filter != PictFilterBilinear)
+ I830FALLBACK("Unsupported filter 0x%x\n", pPict->filter);
+
+ return TRUE;
+}
+
+static Bool
+I830TextureSetup(PicturePtr pPict, PixmapPtr pPix, int unit)
+{
+
+ ScrnInfoPtr pScrn = xf86Screens[pPict->pDrawable->pScreen->myNum];
+ I830Ptr pI830 = I830PTR(pScrn);
+ CARD32 format, offset, pitch, filter;
+ int w, h, i;
+ CARD32 wrap_mode = TEXCOORDMODE_CLAMP;
+
+ offset = intel_get_pixmap_offset(pPix);
+ pitch = intel_get_pixmap_pitch(pPix);
+ w = pPict->pDrawable->width;
+ h = pPict->pDrawable->height;
+ pI830->scale_units[unit][0] = pPix->drawable.width;
+ pI830->scale_units[unit][1] = pPix->drawable.height;
+
+ for (i = 0; i < sizeof(I830TexFormats) / sizeof(I830TexFormats[0]); i++) {
+ if (I830TexFormats[i].fmt == pPict->format)
+ break;
+ }
+ if ( i == sizeof(I830TexFormats)/ sizeof(I830TexFormats[0]) )
+ I830FALLBACK("unknown texture format\n");
+ format = I830TexFormats[i].card_fmt;
+
+ if (pPict->repeat)
+ wrap_mode = TEXCOORDMODE_WRAP; /* XXX: correct ? */
+
+ switch (pPict->filter) {
+ case PictFilterNearest:
+ filter = ((FILTER_NEAREST<<TM0S3_MAG_FILTER_SHIFT) |
+ (FILTER_NEAREST<<TM0S3_MIN_FILTER_SHIFT));
+ break;
+ case PictFilterBilinear:
+ filter = ((FILTER_LINEAR<<TM0S3_MAG_FILTER_SHIFT) |
+ (FILTER_LINEAR<<TM0S3_MIN_FILTER_SHIFT));
+ break;
+ default:
+ filter = 0;
+ I830FALLBACK("Bad filter 0x%x\n", pPict->filter);
+ }
+
+ {
+ if (pPix->drawable.bitsPerPixel == 8)
+ format |= MAP_SURFACE_8BIT;
+ else if (pPix->drawable.bitsPerPixel == 16)
+ format |= MAP_SURFACE_16BIT;
+ else
+ format |= MAP_SURFACE_32BIT;
+
+ BEGIN_LP_RING(6);
+ OUT_RING(_3DSTATE_MAP_INFO_CMD);
+ OUT_RING(format | TEXMAP_INDEX(unit) | MAP_FORMAT_2D);
+ OUT_RING(((pPix->drawable.height - 1) << 16) |
+ (pPix->drawable.width - 1)); /* height, width */
+ OUT_RING(offset); /* map address */
+ OUT_RING(((pitch / 4) - 1) << 2); /* map pitch */
+ OUT_RING(0);
+ ADVANCE_LP_RING();
+ }
+
+ {
+ BEGIN_LP_RING(2);
+ /* coord sets */
+ OUT_RING(_3DSTATE_MAP_COORD_SET_CMD | TEXCOORD_SET(unit) |
+ ENABLE_TEXCOORD_PARAMS | TEXCOORDS_ARE_NORMAL |
+ TEXCOORDTYPE_CARTESIAN | ENABLE_ADDR_V_CNTL |
+ TEXCOORD_ADDR_V_MODE(wrap_mode) |
+ ENABLE_ADDR_U_CNTL | TEXCOORD_ADDR_U_MODE(wrap_mode));
+ OUT_RING(MI_NOOP);
+
+ /* XXX: filter seems hang engine...*/
+#if 0
+ OUT_RING(I830_STATE3D_MAP_FILTER | FILTER_MAP_INDEX(unit) | ENABLE_KEYS| DISABLE_COLOR_KEY | DISABLE_CHROMA_KEY | DISABLE_KILL_PIXEL |ENABLE_MIP_MODE_FILTER | MIPFILTER_NONE | filter);
+ OUT_RING(0);
+#endif
+
+ /* max & min mip level ? or base mip level? */
+
+ ADVANCE_LP_RING();
+ }
+
+ pI830->transform[unit] = pPict->transform;
+
+#ifdef I830DEBUG
+ ErrorF("try to sync to show any errors...");
+ I830Sync(pScrn);
+#endif
+
+ return TRUE;
+}
+
+Bool
+I830EXACheckComposite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture,
+ PicturePtr pDstPicture)
+{
+ CARD32 tmp1;
+
+ /* Check for unsupported compositing operations. */
+ if (op >= sizeof(I830BlendOp) / sizeof(I830BlendOp[0]))
+ I830FALLBACK("Unsupported Composite op 0x%x\n", op);
+
+ if (pMaskPicture != NULL && pMaskPicture->componentAlpha) {
+ /* Check if it's component alpha that relies on a source alpha and on
+ * the source value. We can only get one of those into the single
+ * source value that we get to blend with.
+ */
+ if (I830BlendOp[op].src_alpha &&
+ (I830BlendOp[op].src_blend != BLENDFACTOR_ZERO))
+ I830FALLBACK("Component alpha not supported with source "
+ "alpha and source value blending.\n");
+ }
+
+ if (!I830CheckCompositeTexture(pSrcPicture, 0))
+ I830FALLBACK("Check Src picture texture\n");
+ if (pMaskPicture != NULL && !I830CheckCompositeTexture(pMaskPicture, 1))
+ I830FALLBACK("Check Mask picture texture\n");
+
+ if (!I830GetDestFormat(pDstPicture, &tmp1))
+ I830FALLBACK("Get Color buffer format\n");
+
+ return TRUE;
+}
+
+Bool
+I830EXAPrepareComposite(int op, PicturePtr pSrcPicture,
+ PicturePtr pMaskPicture, PicturePtr pDstPicture,
+ PixmapPtr pSrc, PixmapPtr pMask, PixmapPtr pDst)
+{
+/* XXX: setup texture map from pixmap, vertex format, blend cntl */
+ ScrnInfoPtr pScrn = xf86Screens[pSrcPicture->pDrawable->pScreen->myNum];
+ I830Ptr pI830 = I830PTR(pScrn);
+ CARD32 dst_format, dst_offset, dst_pitch;
+
+ I830GetDestFormat(pDstPicture, &dst_format);
+ dst_offset = intel_get_pixmap_offset(pDst);
+ dst_pitch = intel_get_pixmap_pitch(pDst);
+
+ pI830->last_3d = LAST_3D_RENDER;
+
+ if (!I830TextureSetup(pSrcPicture, pSrc, 0))
+ I830FALLBACK("fail to setup src texture\n");
+ if (pMask != NULL) {
+ if (!I830TextureSetup(pMaskPicture, pMask, 1))
+ I830FALLBACK("fail to setup mask texture\n");
+ } else {
+ pI830->transform[1] = NULL;
+ pI830->scale_units[1][0] = -1;
+ pI830->scale_units[1][1] = -1;
+ }
+
+ {
+
+ CARD32 cblend, ablend, blendctl, vf2;
+
+ BEGIN_LP_RING(22+6);
+
+ /*color buffer*/
+ OUT_RING(_3DSTATE_BUF_INFO_CMD);
+ OUT_RING(BUF_3D_ID_COLOR_BACK| BUF_3D_PITCH(dst_pitch));
+ OUT_RING(BUF_3D_ADDR(dst_offset));
+ OUT_RING(MI_NOOP);
+
+ OUT_RING(_3DSTATE_DST_BUF_VARS_CMD);
+ OUT_RING(dst_format);
+
+ OUT_RING(MI_FLUSH | MI_WRITE_DIRTY_STATE | MI_INVALIDATE_MAP_CACHE);
+ OUT_RING(MI_NOOP); /* pad to quadword */
+ /* defaults */
+ OUT_RING(_3DSTATE_DFLT_Z_CMD);
+ OUT_RING(0);
+
+ OUT_RING(_3DSTATE_DFLT_DIFFUSE_CMD);
+ OUT_RING(0);
+
+ OUT_RING(_3DSTATE_DFLT_SPEC_CMD);
+ OUT_RING(0);
+
+ OUT_RING(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(3) | 0);
+ OUT_RING((1 << S3_POINT_WIDTH_SHIFT) | (2 << S3_LINE_WIDTH_SHIFT) |
+ S3_CULLMODE_NONE | S3_VERTEXHAS_XY);
+ OUT_RING(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(2) | 0);
+ if (pMask)
+ vf2 = 2 << 12; /* 2 texture coord sets */
+ else
+ vf2 = 1 << 12;
+ vf2 |= (TEXCOORDFMT_2D << 16);
+ if (pMask)
+ vf2 |= (TEXCOORDFMT_2D << 18);
+ else
+ vf2 |= (TEXCOORDFMT_1D << 18);
+
+ vf2 |= (TEXCOORDFMT_1D << 20);
+ vf2 |= (TEXCOORDFMT_1D << 22);
+ vf2 |= (TEXCOORDFMT_1D << 24);
+ vf2 |= (TEXCOORDFMT_1D << 26);
+ vf2 |= (TEXCOORDFMT_1D << 28);
+ vf2 |= (TEXCOORDFMT_1D << 30);
+ OUT_RING(vf2);
+
+ OUT_RING(MI_FLUSH | MI_WRITE_DIRTY_STATE | MI_INVALIDATE_MAP_CACHE);
+ OUT_RING(MI_NOOP); /* pad to quadword */
+ /* For (src In mask) operation */
+ /* IN operator: Multiply src by mask components or mask alpha.*/
+ /* TEXBLENDOP_MODULE: arg1*arg2 */
+ cblend = TB0C_LAST_STAGE | TB0C_RESULT_SCALE_1X | TB0C_OP_MODULE |
+ TB0C_OUTPUT_WRITE_CURRENT;
+ ablend = TB0A_RESULT_SCALE_1X | TB0A_OP_MODULE |
+ TB0A_OUTPUT_WRITE_CURRENT;
+
+ cblend |= TB0C_ARG1_SEL_TEXEL0;
+ ablend |= TB0A_ARG1_SEL_TEXEL0;
+ if (pMask) {
+ if (pMaskPicture->componentAlpha && pDstPicture->format != PICT_a8)
+ cblend |= TB0C_ARG2_SEL_TEXEL1;
+ else
+ cblend |= (TB0C_ARG2_SEL_TEXEL1 | TB0C_ARG2_REPLICATE_ALPHA);
+ ablend |= TB0A_ARG2_SEL_TEXEL1;
+ } else {
+ cblend |= TB0C_ARG2_SEL_ONE;
+ ablend |= TB0A_ARG2_SEL_ONE;
+ }
+
+ OUT_RING(_3DSTATE_LOAD_STATE_IMMEDIATE_2 | LOAD_TEXTURE_BLEND_STAGE(0)|1);
+ OUT_RING(cblend);
+ OUT_RING(ablend);
+ OUT_RING(0);
+
+ OUT_RING(MI_FLUSH | MI_WRITE_DIRTY_STATE | MI_INVALIDATE_MAP_CACHE);
+ OUT_RING(MI_NOOP); /* pad to quadword */
+
+ blendctl = I830GetBlendCntl(op, pMaskPicture, pDstPicture->format);
+ OUT_RING(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(8) | 0);
+ OUT_RING(S8_ENABLE_COLOR_BLEND | S8_BLENDFUNC_ADD |(blendctl<<4) |
+ S8_ENABLE_COLOR_BUFFER_WRITE);
+ ADVANCE_LP_RING();
+ }
+
+#ifdef I830DEBUG
+ Error("try to sync to show any errors...");
+ I830Sync(pScrn);
+#endif
+
+ return TRUE;
+}
+
+
+/**
+ * Do a single rectangle composite operation.
+ *
+ * This function is shared between i830 and i915 generation code.
+ */
+void
+IntelEXAComposite(PixmapPtr pDst, int srcX, int srcY, int maskX, int maskY,
+ int dstX, int dstY, int w, int h)
+{
+ ScrnInfoPtr pScrn = xf86Screens[pDst->drawable.pScreen->myNum];
+ I830Ptr pI830 = I830PTR(pScrn);
+ Bool has_mask;
+ float src_x[3], src_y[3], mask_x[3], mask_y[3];
+
+ i830_get_transformed_coordinates(srcX, srcY,
+ pI830->transform[0],
+ &src_x[0], &src_y[0]);
+ i830_get_transformed_coordinates(srcX, srcY + h,
+ pI830->transform[0],
+ &src_x[1], &src_y[1]);
+ i830_get_transformed_coordinates(srcX + w, srcY + h,
+ pI830->transform[0],
+ &src_x[2], &src_y[2]);
+
+ if (pI830->scale_units[1][0] == -1 || pI830->scale_units[1][1] == -1) {
+ has_mask = FALSE;
+ } else {
+ has_mask = TRUE;
+ i830_get_transformed_coordinates(maskX, maskY,
+ pI830->transform[1],
+ &mask_x[0], &mask_y[0]);
+ i830_get_transformed_coordinates(maskX, maskY + h,
+ pI830->transform[1],
+ &mask_x[1], &mask_y[1]);
+ i830_get_transformed_coordinates(maskX + w, maskY + h,
+ pI830->transform[1],
+ &mask_x[2], &mask_y[2]);
+ }
+
+ {
+ int vertex_count;
+
+ if (has_mask)
+ vertex_count = 3*6;
+ else
+ vertex_count = 3*4;
+
+ BEGIN_LP_RING(6+vertex_count);
+
+ OUT_RING(MI_NOOP);
+ OUT_RING(MI_NOOP);
+ OUT_RING(MI_NOOP);
+ OUT_RING(MI_NOOP);
+ OUT_RING(MI_NOOP);
+
+ OUT_RING(PRIM3D_INLINE | PRIM3D_RECTLIST | (vertex_count-1));
+
+ OUT_RING_F(dstX);
+ OUT_RING_F(dstY);
+ OUT_RING_F(src_x[0] / pI830->scale_units[0][0]);
+ OUT_RING_F(src_y[0] / pI830->scale_units[0][1]);
+ if (has_mask) {
+ OUT_RING_F(mask_x[0] / pI830->scale_units[1][0]);
+ OUT_RING_F(mask_y[0] / pI830->scale_units[1][1]);
+ }
+
+ OUT_RING_F(dstX);
+ OUT_RING_F(dstY + h);
+ OUT_RING_F(src_x[1] / pI830->scale_units[0][0]);
+ OUT_RING_F(src_y[1] / pI830->scale_units[0][1]);
+ if (has_mask) {
+ OUT_RING_F(mask_x[1] / pI830->scale_units[1][0]);
+ OUT_RING_F(mask_y[1] / pI830->scale_units[1][1]);
+ }
+
+ OUT_RING_F(dstX + w);
+ OUT_RING_F(dstY + h);
+ OUT_RING_F(src_x[2] / pI830->scale_units[0][0]);
+ OUT_RING_F(src_y[2] / pI830->scale_units[0][1]);
+ if (has_mask) {
+ OUT_RING_F(mask_x[2] / pI830->scale_units[1][0]);
+ OUT_RING_F(mask_y[2] / pI830->scale_units[1][1]);
+ }
+ ADVANCE_LP_RING();
+ }
+}
+
+void
+IntelEXADoneComposite(PixmapPtr pDst)
+{
+#if ALWAYS_SYNC
+ ScrnInfoPtr pScrn = xf86Screens[pDst->drawable.pScreen->myNum];
+
+ I830Sync(pScrn);
+#endif
+}
diff --git a/src/i915_exa_render.c b/src/i915_exa_render.c
deleted file mode 100644
index 2fb41ad..0000000
--- a/src/i915_exa_render.c
+++ /dev/null
@@ -1,477 +0,0 @@
-/*
- * Copyright © 2006 Intel Corporation
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- *
- * Authors:
- * Wang Zhenyu <zhenyu.z.wang at intel.com>
- * Eric Anholt <eric at anholt.net>
- *
- */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "xf86.h"
-#include "i830.h"
-#include "i915_reg.h"
-#include "i915_3d.h"
-
-#ifdef I830DEBUG
-#define DEBUG_I830FALLBACK 1
-#endif
-
-#ifdef DEBUG_I830FALLBACK
-#define I830FALLBACK(s, arg...) \
-do { \
- DPRINTF(PFX, "EXA fallback: " s "\n", ##arg); \
- return FALSE; \
-} while(0)
-#else
-#define I830FALLBACK(s, arg...) \
-do { \
- return FALSE; \
-} while(0)
-#endif
-
-struct formatinfo {
- int fmt;
- CARD32 card_fmt;
-};
-
-struct blendinfo {
- Bool dst_alpha;
- Bool src_alpha;
- CARD32 src_blend;
- CARD32 dst_blend;
-};
-
-static struct blendinfo I915BlendOp[] = {
- /* Clear */
- {0, 0, BLENDFACT_ZERO, BLENDFACT_ZERO},
- /* Src */
- {0, 0, BLENDFACT_ONE, BLENDFACT_ZERO},
- /* Dst */
- {0, 0, BLENDFACT_ZERO, BLENDFACT_ONE},
- /* Over */
- {0, 1, BLENDFACT_ONE, BLENDFACT_INV_SRC_ALPHA},
- /* OverReverse */
- {1, 0, BLENDFACT_INV_DST_ALPHA, BLENDFACT_ONE},
- /* In */
- {1, 0, BLENDFACT_DST_ALPHA, BLENDFACT_ZERO},
- /* InReverse */
- {0, 1, BLENDFACT_ZERO, BLENDFACT_SRC_ALPHA},
- /* Out */
- {1, 0, BLENDFACT_INV_DST_ALPHA, BLENDFACT_ZERO},
- /* OutReverse */
- {0, 1, BLENDFACT_ZERO, BLENDFACT_INV_SRC_ALPHA},
- /* Atop */
- {1, 1, BLENDFACT_DST_ALPHA, BLENDFACT_INV_SRC_ALPHA},
- /* AtopReverse */
- {1, 1, BLENDFACT_INV_DST_ALPHA, BLENDFACT_SRC_ALPHA},
- /* Xor */
- {1, 1, BLENDFACT_INV_DST_ALPHA, BLENDFACT_INV_SRC_ALPHA},
- /* Add */
- {0, 0, BLENDFACT_ONE, BLENDFACT_ONE},
-};
-
-static struct formatinfo I915TexFormats[] = {
- {PICT_a8r8g8b8, MAPSURF_32BIT | MT_32BIT_ARGB8888 },
- {PICT_x8r8g8b8, MAPSURF_32BIT | MT_32BIT_XRGB8888 },
- {PICT_a8b8g8r8, MAPSURF_32BIT | MT_32BIT_ABGR8888 },
- {PICT_x8b8g8r8, MAPSURF_32BIT | MT_32BIT_XBGR8888 },
- {PICT_r5g6b5, MAPSURF_16BIT | MT_16BIT_RGB565 },
- {PICT_a1r5g5b5, MAPSURF_16BIT | MT_16BIT_ARGB1555 },
- {PICT_x1r5g5b5, MAPSURF_16BIT | MT_16BIT_ARGB1555 },
- {PICT_a4r4g4b4, MAPSURF_16BIT | MT_16BIT_ARGB4444 },
- {PICT_x4r4g4b4, MAPSURF_16BIT | MT_16BIT_ARGB4444 },
- {PICT_a8, MAPSURF_8BIT | MT_8BIT_A8 },
-};
-
-static CARD32 I915GetBlendCntl(int op, PicturePtr pMask, CARD32 dst_format)
-{
- CARD32 sblend, dblend;
-
- sblend = I915BlendOp[op].src_blend;
- dblend = I915BlendOp[op].dst_blend;
-
- /* If there's no dst alpha channel, adjust the blend op so that we'll treat
- * it as always 1.
- */
- if (PICT_FORMAT_A(dst_format) == 0 && I915BlendOp[op].dst_alpha) {
- if (sblend == BLENDFACT_DST_ALPHA)
- sblend = BLENDFACT_ONE;
- else if (sblend == BLENDFACT_INV_DST_ALPHA)
- sblend = BLENDFACT_ZERO;
- }
-
- /* If the source alpha is being used, then we should only be in a case where
- * the source blend factor is 0, and the source blend value is the mask
- * channels multiplied by the source picture's alpha.
- */
- if (pMask && pMask->componentAlpha && PICT_FORMAT_RGB(pMask->format) &&
- I915BlendOp[op].src_alpha)
- {
- if (dblend == BLENDFACT_SRC_ALPHA) {
- dblend = BLENDFACT_SRC_COLR;
- } else if (dblend == BLENDFACT_INV_SRC_ALPHA) {
- dblend = BLENDFACT_INV_SRC_COLR;
- }
- }
-
- return (sblend << S6_CBUF_SRC_BLEND_FACT_SHIFT) |
- (dblend << S6_CBUF_DST_BLEND_FACT_SHIFT);
-}
-
-static Bool I915GetDestFormat(PicturePtr pDstPicture, CARD32 *dst_format)
-{
- switch (pDstPicture->format) {
- case PICT_a8r8g8b8:
- case PICT_x8r8g8b8:
- *dst_format = COLR_BUF_ARGB8888;
- break;
- case PICT_r5g6b5:
- *dst_format = COLR_BUF_RGB565;
- break;
- case PICT_a1r5g5b5:
- case PICT_x1r5g5b5:
- *dst_format = COLR_BUF_ARGB1555;
- break;
- /* COLR_BUF_8BIT is special for YUV surfaces. While we may end up being
- * able to use it depending on how the hardware implements it, disable it
- * for now while we don't know what exactly it does (what channel does it
- * read from?
- */
- /*
- case PICT_a8:
- *dst_format = COLR_BUF_8BIT;
- break;
- */
- case PICT_a4r4g4b4:
- case PICT_x4r4g4b4:
- *dst_format = COLR_BUF_ARGB4444;
- break;
- default:
- I830FALLBACK("Unsupported dest format 0x%x\n",
- (int)pDstPicture->format);
- }
-
- return TRUE;
-}
-
-static Bool I915CheckCompositeTexture(PicturePtr pPict, int unit)
-{
- int w = pPict->pDrawable->width;
- int h = pPict->pDrawable->height;
- int i;
-
- if ((w > 0x7ff) || (h > 0x7ff))
- I830FALLBACK("Picture w/h too large (%dx%d)\n", w, h);
-
- for (i = 0; i < sizeof(I915TexFormats) / sizeof(I915TexFormats[0]); i++)
- {
- if (I915TexFormats[i].fmt == pPict->format)
- break;
- }
- if (i == sizeof(I915TexFormats) / sizeof(I915TexFormats[0]))
- I830FALLBACK("Unsupported picture format 0x%x\n",
- (int)pPict->format);
-
- if (pPict->repeat && pPict->repeatType != RepeatNormal)
- I830FALLBACK("extended repeat (%d) not supported\n",
- pPict->repeatType);
-
- if (pPict->filter != PictFilterNearest &&
- pPict->filter != PictFilterBilinear)
- I830FALLBACK("Unsupported filter 0x%x\n", pPict->filter);
-
- return TRUE;
-}
-
-Bool
-I915EXACheckComposite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture,
- PicturePtr pDstPicture)
-{
- CARD32 tmp1;
-
- /* Check for unsupported compositing operations. */
- if (op >= sizeof(I915BlendOp) / sizeof(I915BlendOp[0]))
- I830FALLBACK("Unsupported Composite op 0x%x\n", op);
- if (pMaskPicture != NULL && pMaskPicture->componentAlpha &&
- PICT_FORMAT_RGB(pMaskPicture->format))
- {
- /* Check if it's component alpha that relies on a source alpha and on
- * the source value. We can only get one of those into the single
- * source value that we get to blend with.
- */
- if (I915BlendOp[op].src_alpha &&
- (I915BlendOp[op].src_blend != BLENDFACT_ZERO))
- I830FALLBACK("Component alpha not supported with source "
- "alpha and source value blending.\n");
- }
-
- if (!I915CheckCompositeTexture(pSrcPicture, 0))
- I830FALLBACK("Check Src picture texture\n");
- if (pMaskPicture != NULL && !I915CheckCompositeTexture(pMaskPicture, 1))
- I830FALLBACK("Check Mask picture texture\n");
-
- if (!I915GetDestFormat(pDstPicture, &tmp1))
- I830FALLBACK("Get Color buffer format\n");
-
- return TRUE;
-}
-
-static Bool
-I915TextureSetup(PicturePtr pPict, PixmapPtr pPix, int unit)
-{
- ScrnInfoPtr pScrn = xf86Screens[pPict->pDrawable->pScreen->myNum];
- I830Ptr pI830 = I830PTR(pScrn);
- CARD32 format, offset, pitch, filter;
- int w, h, i;
- CARD32 wrap_mode = TEXCOORDMODE_CLAMP_BORDER;
-
- offset = intel_get_pixmap_offset(pPix);
- pitch = intel_get_pixmap_pitch(pPix);
- w = pPict->pDrawable->width;
- h = pPict->pDrawable->height;
- pI830->scale_units[unit][0] = pPix->drawable.width;
- pI830->scale_units[unit][1] = pPix->drawable.height;
-
- for (i = 0; i < sizeof(I915TexFormats) / sizeof(I915TexFormats[0]); i++) {
- if (I915TexFormats[i].fmt == pPict->format)
- break;
- }
- if (i == sizeof(I915TexFormats)/ sizeof(I915TexFormats[0]))
- I830FALLBACK("unknown texture format\n");
- format = I915TexFormats[i].card_fmt;
-
- if (pPict->repeat)
- wrap_mode = TEXCOORDMODE_WRAP;
-
- switch (pPict->filter) {
- case PictFilterNearest:
- filter = (FILTER_NEAREST << SS2_MAG_FILTER_SHIFT) |
- (FILTER_NEAREST << SS2_MIN_FILTER_SHIFT);
- break;
- case PictFilterBilinear:
- filter = (FILTER_LINEAR << SS2_MAG_FILTER_SHIFT) |
- (FILTER_LINEAR << SS2_MIN_FILTER_SHIFT);
- break;
- default:
- filter = 0;
- I830FALLBACK("Bad filter 0x%x\n", pPict->filter);
- }
-
- pI830->mapstate[unit * 3 + 0] = offset;
- pI830->mapstate[unit * 3 + 1] = format |
- ((pPix->drawable.height - 1) << MS3_HEIGHT_SHIFT) |
- ((pPix->drawable.width - 1) << MS3_WIDTH_SHIFT);
- if (!pI830->disableTiling)
- pI830->samplerstate[unit * 3 + 1] |= MS3_USE_FENCE_REGS;
- pI830->mapstate[unit * 3 + 2] = ((pitch / 4) - 1) << MS4_PITCH_SHIFT;
-
- pI830->samplerstate[unit * 3 + 0] = (MIPFILTER_NONE << SS2_MIP_FILTER_SHIFT);
- pI830->samplerstate[unit * 3 + 0] |= filter;
- pI830->samplerstate[unit * 3 + 1] = SS3_NORMALIZED_COORDS;
- pI830->samplerstate[unit * 3 + 1] |= wrap_mode << SS3_TCX_ADDR_MODE_SHIFT;
- pI830->samplerstate[unit * 3 + 1] |= wrap_mode << SS3_TCY_ADDR_MODE_SHIFT;
- pI830->samplerstate[unit * 3 + 1] |= unit << SS3_TEXTUREMAP_INDEX_SHIFT;
- pI830->samplerstate[unit * 3 + 2] = 0x00000000; /* border color */
-
- pI830->transform[unit] = pPict->transform;
-
- return TRUE;
-}
-
-Bool
-I915EXAPrepareComposite(int op, PicturePtr pSrcPicture,
- PicturePtr pMaskPicture, PicturePtr pDstPicture,
- PixmapPtr pSrc, PixmapPtr pMask, PixmapPtr pDst)
-{
- ScrnInfoPtr pScrn = xf86Screens[pSrcPicture->pDrawable->pScreen->myNum];
- I830Ptr pI830 = I830PTR(pScrn);
- CARD32 dst_format, dst_offset, dst_pitch;
- CARD32 blendctl;
-
-#ifdef I830DEBUG
- ErrorF("Enter i915 prepareComposite\n");
-#endif
-
- pI830->last_3d = LAST_3D_RENDER;
-
- I915GetDestFormat(pDstPicture, &dst_format);
- dst_offset = intel_get_pixmap_offset(pDst);
- dst_pitch = intel_get_pixmap_pitch(pDst);
- FS_LOCALS(20);
-
- if (!I915TextureSetup(pSrcPicture, pSrc, 0))
- I830FALLBACK("fail to setup src texture\n");
- if (pMask != NULL) {
- if (!I915TextureSetup(pMaskPicture, pMask, 1))
- I830FALLBACK("fail to setup mask texture\n");
- } else {
- pI830->transform[1] = NULL;
- pI830->scale_units[1][0] = -1;
- pI830->scale_units[1][1] = -1;
- }
-
- if (pMask == NULL) {
- BEGIN_LP_RING(10);
- OUT_RING(_3DSTATE_MAP_STATE | 3);
- OUT_RING(0x00000001); /* map 0 */
- OUT_RING(pI830->mapstate[0]);
- OUT_RING(pI830->mapstate[1]);
- OUT_RING(pI830->mapstate[2]);
-
- OUT_RING(_3DSTATE_SAMPLER_STATE | 3);
- OUT_RING(0x00000001); /* sampler 0 */
- OUT_RING(pI830->samplerstate[0]);
- OUT_RING(pI830->samplerstate[1]);
- OUT_RING(pI830->samplerstate[2]);
- ADVANCE_LP_RING();
- } else {
- BEGIN_LP_RING(16);
- OUT_RING(_3DSTATE_MAP_STATE | 6);
- OUT_RING(0x00000003); /* map 0,1 */
- OUT_RING(pI830->mapstate[0]);
- OUT_RING(pI830->mapstate[1]);
- OUT_RING(pI830->mapstate[2]);
- OUT_RING(pI830->mapstate[3]);
- OUT_RING(pI830->mapstate[4]);
- OUT_RING(pI830->mapstate[5]);
-
- OUT_RING(_3DSTATE_SAMPLER_STATE | 6);
- OUT_RING(0x00000003); /* sampler 0,1 */
- OUT_RING(pI830->samplerstate[0]);
- OUT_RING(pI830->samplerstate[1]);
- OUT_RING(pI830->samplerstate[2]);
- OUT_RING(pI830->samplerstate[3]);
- OUT_RING(pI830->samplerstate[4]);
- OUT_RING(pI830->samplerstate[5]);
- ADVANCE_LP_RING();
- }
- {
- CARD32 ss2;
-
- BEGIN_LP_RING(18);
- /* color buffer
- * XXX: Need to add USE_FENCE if we ever tile the X Server's pixmaps or
- * visible screen.
- */
- OUT_RING(_3DSTATE_BUF_INFO_CMD);
- OUT_RING(BUF_3D_ID_COLOR_BACK| BUF_3D_PITCH(dst_pitch));
- OUT_RING(BUF_3D_ADDR(dst_offset));
-
- OUT_RING(_3DSTATE_DST_BUF_VARS_CMD);
- OUT_RING(dst_format);
-
- OUT_RING(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(2) |
- I1_LOAD_S(4) | I1_LOAD_S(5) | I1_LOAD_S(6) | 3);
- ss2 = S2_TEXCOORD_FMT(0, TEXCOORDFMT_2D);
- if (pMask)
- ss2 |= S2_TEXCOORD_FMT(1, TEXCOORDFMT_2D);
- else
- ss2 |= S2_TEXCOORD_FMT(1, TEXCOORDFMT_NOT_PRESENT);
- ss2 |= S2_TEXCOORD_FMT(2, TEXCOORDFMT_NOT_PRESENT);
- ss2 |= S2_TEXCOORD_FMT(3, TEXCOORDFMT_NOT_PRESENT);
- ss2 |= S2_TEXCOORD_FMT(4, TEXCOORDFMT_NOT_PRESENT);
- ss2 |= S2_TEXCOORD_FMT(5, TEXCOORDFMT_NOT_PRESENT);
- ss2 |= S2_TEXCOORD_FMT(6, TEXCOORDFMT_NOT_PRESENT);
- ss2 |= S2_TEXCOORD_FMT(7, TEXCOORDFMT_NOT_PRESENT);
- OUT_RING(ss2);
- OUT_RING((1 << S4_POINT_WIDTH_SHIFT) | S4_LINE_WIDTH_ONE |
- S4_CULLMODE_NONE| S4_VFMT_XY);
- blendctl = I915GetBlendCntl(op, pMaskPicture, pDstPicture->format);
- OUT_RING(0x00000000); /* Disable stencil buffer */
- OUT_RING(S6_CBUF_BLEND_ENABLE | S6_COLOR_WRITE_ENABLE |
- (BLENDFUNC_ADD << S6_CBUF_BLEND_FUNC_SHIFT) | blendctl);
-
- /* issue a flush */
- OUT_RING(MI_FLUSH | MI_WRITE_DIRTY_STATE | MI_INVALIDATE_MAP_CACHE);
- OUT_RING(MI_NOOP);
-
- /* draw rect is unconditional */
- OUT_RING(_3DSTATE_DRAW_RECT_CMD);
- OUT_RING(0x00000000);
- OUT_RING(0x00000000); /* ymin, xmin*/
- OUT_RING(DRAW_YMAX(pDst->drawable.height - 1) |
- DRAW_XMAX(pDst->drawable.width - 1));
- OUT_RING(0x00000000); /* yorig, xorig (relate to color buffer?)*/
- OUT_RING(MI_NOOP);
- ADVANCE_LP_RING();
- }
-
- FS_BEGIN();
-
- /* Declare the registers necessary for our program. I don't think the
- * S then T ordering is necessary.
- */
- i915_fs_dcl(FS_S0);
- if (pMask)
- i915_fs_dcl(FS_S1);
- i915_fs_dcl(FS_T0);
- if (pMask)
- i915_fs_dcl(FS_T1);
-
- /* Load the pSrcPicture texel */
- i915_fs_texld(FS_R0, FS_S0, FS_T0);
- /* If the texture lacks an alpha channel, force the alpha to 1. */
- if (PICT_FORMAT_A(pSrcPicture->format) == 0)
- i915_fs_mov_masked(FS_R0, MASK_W, i915_fs_operand_one());
-
- if (!pMask) {
- /* No mask, so move to output color */
- i915_fs_mov(FS_OC, i915_fs_operand_reg(FS_R0));
- } else {
- /* Load the pMaskPicture texel */
- i915_fs_texld(FS_R1, FS_S1, FS_T1);
- /* If the texture lacks an alpha channel, force the alpha to 1. */
- if (PICT_FORMAT_A(pMaskPicture->format) == 0)
- i915_fs_mov_masked(FS_R1, MASK_W, i915_fs_operand_one());
-
- /* If component alpha is active in the mask and the blend operation
- * uses the source alpha, then we know we don't need the source
- * value (otherwise we would have hit a fallback earlier), so we
- * provide the source alpha (src.A * mask.X) as output color.
- * Conversely, if CA is set and we don't need the source alpha, then
- * we produce the source value (src.X * mask.X) and the source alpha
- * is unused.. Otherwise, we provide the non-CA source value
- * (src.X * mask.A).
- */
- if (pMaskPicture->componentAlpha &&
- PICT_FORMAT_RGB(pMaskPicture->format))
- {
- if (I915BlendOp[op].src_alpha) {
- i915_fs_mul(FS_OC, i915_fs_operand(FS_R0, W, W, W, W),
- i915_fs_operand_reg(FS_R1));
- } else {
- i915_fs_mul(FS_OC, i915_fs_operand_reg(FS_R0),
- i915_fs_operand_reg(FS_R1));
- }
- } else {
- i915_fs_mul(FS_OC, i915_fs_operand_reg(FS_R0),
- i915_fs_operand(FS_R1, W, W, W, W));
- }
- }
- FS_END();
-
- return TRUE;
-}
diff --git a/src/i915_render.c b/src/i915_render.c
new file mode 100644
index 0000000..2fb41ad
--- /dev/null
+++ b/src/i915_render.c
@@ -0,0 +1,477 @@
+/*
+ * Copyright © 2006 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Authors:
+ * Wang Zhenyu <zhenyu.z.wang at intel.com>
+ * Eric Anholt <eric at anholt.net>
+ *
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include "xf86.h"
+#include "i830.h"
+#include "i915_reg.h"
+#include "i915_3d.h"
+
+#ifdef I830DEBUG
+#define DEBUG_I830FALLBACK 1
+#endif
+
+#ifdef DEBUG_I830FALLBACK
+#define I830FALLBACK(s, arg...) \
+do { \
+ DPRINTF(PFX, "EXA fallback: " s "\n", ##arg); \
+ return FALSE; \
+} while(0)
+#else
+#define I830FALLBACK(s, arg...) \
+do { \
+ return FALSE; \
+} while(0)
+#endif
+
+struct formatinfo {
+ int fmt;
+ CARD32 card_fmt;
+};
+
+struct blendinfo {
+ Bool dst_alpha;
+ Bool src_alpha;
+ CARD32 src_blend;
+ CARD32 dst_blend;
+};
+
+static struct blendinfo I915BlendOp[] = {
+ /* Clear */
+ {0, 0, BLENDFACT_ZERO, BLENDFACT_ZERO},
+ /* Src */
+ {0, 0, BLENDFACT_ONE, BLENDFACT_ZERO},
+ /* Dst */
+ {0, 0, BLENDFACT_ZERO, BLENDFACT_ONE},
+ /* Over */
+ {0, 1, BLENDFACT_ONE, BLENDFACT_INV_SRC_ALPHA},
+ /* OverReverse */
+ {1, 0, BLENDFACT_INV_DST_ALPHA, BLENDFACT_ONE},
+ /* In */
+ {1, 0, BLENDFACT_DST_ALPHA, BLENDFACT_ZERO},
+ /* InReverse */
+ {0, 1, BLENDFACT_ZERO, BLENDFACT_SRC_ALPHA},
+ /* Out */
+ {1, 0, BLENDFACT_INV_DST_ALPHA, BLENDFACT_ZERO},
+ /* OutReverse */
+ {0, 1, BLENDFACT_ZERO, BLENDFACT_INV_SRC_ALPHA},
+ /* Atop */
+ {1, 1, BLENDFACT_DST_ALPHA, BLENDFACT_INV_SRC_ALPHA},
+ /* AtopReverse */
+ {1, 1, BLENDFACT_INV_DST_ALPHA, BLENDFACT_SRC_ALPHA},
+ /* Xor */
+ {1, 1, BLENDFACT_INV_DST_ALPHA, BLENDFACT_INV_SRC_ALPHA},
+ /* Add */
+ {0, 0, BLENDFACT_ONE, BLENDFACT_ONE},
+};
+
+static struct formatinfo I915TexFormats[] = {
+ {PICT_a8r8g8b8, MAPSURF_32BIT | MT_32BIT_ARGB8888 },
+ {PICT_x8r8g8b8, MAPSURF_32BIT | MT_32BIT_XRGB8888 },
+ {PICT_a8b8g8r8, MAPSURF_32BIT | MT_32BIT_ABGR8888 },
+ {PICT_x8b8g8r8, MAPSURF_32BIT | MT_32BIT_XBGR8888 },
+ {PICT_r5g6b5, MAPSURF_16BIT | MT_16BIT_RGB565 },
+ {PICT_a1r5g5b5, MAPSURF_16BIT | MT_16BIT_ARGB1555 },
+ {PICT_x1r5g5b5, MAPSURF_16BIT | MT_16BIT_ARGB1555 },
+ {PICT_a4r4g4b4, MAPSURF_16BIT | MT_16BIT_ARGB4444 },
+ {PICT_x4r4g4b4, MAPSURF_16BIT | MT_16BIT_ARGB4444 },
+ {PICT_a8, MAPSURF_8BIT | MT_8BIT_A8 },
+};
+
+static CARD32 I915GetBlendCntl(int op, PicturePtr pMask, CARD32 dst_format)
+{
+ CARD32 sblend, dblend;
+
+ sblend = I915BlendOp[op].src_blend;
+ dblend = I915BlendOp[op].dst_blend;
+
+ /* If there's no dst alpha channel, adjust the blend op so that we'll treat
+ * it as always 1.
+ */
+ if (PICT_FORMAT_A(dst_format) == 0 && I915BlendOp[op].dst_alpha) {
+ if (sblend == BLENDFACT_DST_ALPHA)
+ sblend = BLENDFACT_ONE;
+ else if (sblend == BLENDFACT_INV_DST_ALPHA)
+ sblend = BLENDFACT_ZERO;
+ }
+
+ /* If the source alpha is being used, then we should only be in a case where
+ * the source blend factor is 0, and the source blend value is the mask
+ * channels multiplied by the source picture's alpha.
+ */
+ if (pMask && pMask->componentAlpha && PICT_FORMAT_RGB(pMask->format) &&
+ I915BlendOp[op].src_alpha)
+ {
+ if (dblend == BLENDFACT_SRC_ALPHA) {
+ dblend = BLENDFACT_SRC_COLR;
+ } else if (dblend == BLENDFACT_INV_SRC_ALPHA) {
+ dblend = BLENDFACT_INV_SRC_COLR;
+ }
+ }
+
+ return (sblend << S6_CBUF_SRC_BLEND_FACT_SHIFT) |
+ (dblend << S6_CBUF_DST_BLEND_FACT_SHIFT);
+}
+
+static Bool I915GetDestFormat(PicturePtr pDstPicture, CARD32 *dst_format)
+{
+ switch (pDstPicture->format) {
+ case PICT_a8r8g8b8:
+ case PICT_x8r8g8b8:
+ *dst_format = COLR_BUF_ARGB8888;
+ break;
+ case PICT_r5g6b5:
+ *dst_format = COLR_BUF_RGB565;
+ break;
+ case PICT_a1r5g5b5:
+ case PICT_x1r5g5b5:
+ *dst_format = COLR_BUF_ARGB1555;
+ break;
+ /* COLR_BUF_8BIT is special for YUV surfaces. While we may end up being
+ * able to use it depending on how the hardware implements it, disable it
+ * for now while we don't know what exactly it does (what channel does it
+ * read from?
+ */
+ /*
+ case PICT_a8:
+ *dst_format = COLR_BUF_8BIT;
+ break;
+ */
+ case PICT_a4r4g4b4:
+ case PICT_x4r4g4b4:
+ *dst_format = COLR_BUF_ARGB4444;
+ break;
+ default:
+ I830FALLBACK("Unsupported dest format 0x%x\n",
+ (int)pDstPicture->format);
+ }
+
+ return TRUE;
+}
+
+static Bool I915CheckCompositeTexture(PicturePtr pPict, int unit)
+{
+ int w = pPict->pDrawable->width;
+ int h = pPict->pDrawable->height;
+ int i;
+
+ if ((w > 0x7ff) || (h > 0x7ff))
+ I830FALLBACK("Picture w/h too large (%dx%d)\n", w, h);
+
+ for (i = 0; i < sizeof(I915TexFormats) / sizeof(I915TexFormats[0]); i++)
+ {
+ if (I915TexFormats[i].fmt == pPict->format)
+ break;
+ }
+ if (i == sizeof(I915TexFormats) / sizeof(I915TexFormats[0]))
+ I830FALLBACK("Unsupported picture format 0x%x\n",
+ (int)pPict->format);
+
+ if (pPict->repeat && pPict->repeatType != RepeatNormal)
+ I830FALLBACK("extended repeat (%d) not supported\n",
+ pPict->repeatType);
+
+ if (pPict->filter != PictFilterNearest &&
+ pPict->filter != PictFilterBilinear)
+ I830FALLBACK("Unsupported filter 0x%x\n", pPict->filter);
+
+ return TRUE;
+}
+
+Bool
+I915EXACheckComposite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture,
+ PicturePtr pDstPicture)
+{
+ CARD32 tmp1;
+
+ /* Check for unsupported compositing operations. */
+ if (op >= sizeof(I915BlendOp) / sizeof(I915BlendOp[0]))
+ I830FALLBACK("Unsupported Composite op 0x%x\n", op);
+ if (pMaskPicture != NULL && pMaskPicture->componentAlpha &&
+ PICT_FORMAT_RGB(pMaskPicture->format))
+ {
+ /* Check if it's component alpha that relies on a source alpha and on
+ * the source value. We can only get one of those into the single
+ * source value that we get to blend with.
+ */
+ if (I915BlendOp[op].src_alpha &&
+ (I915BlendOp[op].src_blend != BLENDFACT_ZERO))
+ I830FALLBACK("Component alpha not supported with source "
+ "alpha and source value blending.\n");
+ }
+
+ if (!I915CheckCompositeTexture(pSrcPicture, 0))
+ I830FALLBACK("Check Src picture texture\n");
+ if (pMaskPicture != NULL && !I915CheckCompositeTexture(pMaskPicture, 1))
+ I830FALLBACK("Check Mask picture texture\n");
+
+ if (!I915GetDestFormat(pDstPicture, &tmp1))
+ I830FALLBACK("Get Color buffer format\n");
+
+ return TRUE;
+}
+
+static Bool
+I915TextureSetup(PicturePtr pPict, PixmapPtr pPix, int unit)
+{
+ ScrnInfoPtr pScrn = xf86Screens[pPict->pDrawable->pScreen->myNum];
+ I830Ptr pI830 = I830PTR(pScrn);
+ CARD32 format, offset, pitch, filter;
+ int w, h, i;
+ CARD32 wrap_mode = TEXCOORDMODE_CLAMP_BORDER;
+
+ offset = intel_get_pixmap_offset(pPix);
+ pitch = intel_get_pixmap_pitch(pPix);
+ w = pPict->pDrawable->width;
+ h = pPict->pDrawable->height;
+ pI830->scale_units[unit][0] = pPix->drawable.width;
+ pI830->scale_units[unit][1] = pPix->drawable.height;
+
+ for (i = 0; i < sizeof(I915TexFormats) / sizeof(I915TexFormats[0]); i++) {
+ if (I915TexFormats[i].fmt == pPict->format)
+ break;
+ }
+ if (i == sizeof(I915TexFormats)/ sizeof(I915TexFormats[0]))
+ I830FALLBACK("unknown texture format\n");
+ format = I915TexFormats[i].card_fmt;
+
+ if (pPict->repeat)
+ wrap_mode = TEXCOORDMODE_WRAP;
+
+ switch (pPict->filter) {
+ case PictFilterNearest:
+ filter = (FILTER_NEAREST << SS2_MAG_FILTER_SHIFT) |
+ (FILTER_NEAREST << SS2_MIN_FILTER_SHIFT);
+ break;
+ case PictFilterBilinear:
+ filter = (FILTER_LINEAR << SS2_MAG_FILTER_SHIFT) |
+ (FILTER_LINEAR << SS2_MIN_FILTER_SHIFT);
+ break;
+ default:
+ filter = 0;
+ I830FALLBACK("Bad filter 0x%x\n", pPict->filter);
+ }
+
+ pI830->mapstate[unit * 3 + 0] = offset;
+ pI830->mapstate[unit * 3 + 1] = format |
+ ((pPix->drawable.height - 1) << MS3_HEIGHT_SHIFT) |
+ ((pPix->drawable.width - 1) << MS3_WIDTH_SHIFT);
+ if (!pI830->disableTiling)
+ pI830->samplerstate[unit * 3 + 1] |= MS3_USE_FENCE_REGS;
+ pI830->mapstate[unit * 3 + 2] = ((pitch / 4) - 1) << MS4_PITCH_SHIFT;
+
+ pI830->samplerstate[unit * 3 + 0] = (MIPFILTER_NONE << SS2_MIP_FILTER_SHIFT);
+ pI830->samplerstate[unit * 3 + 0] |= filter;
+ pI830->samplerstate[unit * 3 + 1] = SS3_NORMALIZED_COORDS;
+ pI830->samplerstate[unit * 3 + 1] |= wrap_mode << SS3_TCX_ADDR_MODE_SHIFT;
+ pI830->samplerstate[unit * 3 + 1] |= wrap_mode << SS3_TCY_ADDR_MODE_SHIFT;
+ pI830->samplerstate[unit * 3 + 1] |= unit << SS3_TEXTUREMAP_INDEX_SHIFT;
+ pI830->samplerstate[unit * 3 + 2] = 0x00000000; /* border color */
+
+ pI830->transform[unit] = pPict->transform;
+
+ return TRUE;
+}
+
+Bool
+I915EXAPrepareComposite(int op, PicturePtr pSrcPicture,
+ PicturePtr pMaskPicture, PicturePtr pDstPicture,
+ PixmapPtr pSrc, PixmapPtr pMask, PixmapPtr pDst)
+{
+ ScrnInfoPtr pScrn = xf86Screens[pSrcPicture->pDrawable->pScreen->myNum];
+ I830Ptr pI830 = I830PTR(pScrn);
+ CARD32 dst_format, dst_offset, dst_pitch;
+ CARD32 blendctl;
+
+#ifdef I830DEBUG
+ ErrorF("Enter i915 prepareComposite\n");
+#endif
+
+ pI830->last_3d = LAST_3D_RENDER;
+
+ I915GetDestFormat(pDstPicture, &dst_format);
+ dst_offset = intel_get_pixmap_offset(pDst);
+ dst_pitch = intel_get_pixmap_pitch(pDst);
+ FS_LOCALS(20);
+
+ if (!I915TextureSetup(pSrcPicture, pSrc, 0))
+ I830FALLBACK("fail to setup src texture\n");
+ if (pMask != NULL) {
+ if (!I915TextureSetup(pMaskPicture, pMask, 1))
+ I830FALLBACK("fail to setup mask texture\n");
+ } else {
+ pI830->transform[1] = NULL;
+ pI830->scale_units[1][0] = -1;
+ pI830->scale_units[1][1] = -1;
+ }
+
+ if (pMask == NULL) {
+ BEGIN_LP_RING(10);
+ OUT_RING(_3DSTATE_MAP_STATE | 3);
+ OUT_RING(0x00000001); /* map 0 */
+ OUT_RING(pI830->mapstate[0]);
+ OUT_RING(pI830->mapstate[1]);
+ OUT_RING(pI830->mapstate[2]);
+
+ OUT_RING(_3DSTATE_SAMPLER_STATE | 3);
+ OUT_RING(0x00000001); /* sampler 0 */
+ OUT_RING(pI830->samplerstate[0]);
+ OUT_RING(pI830->samplerstate[1]);
+ OUT_RING(pI830->samplerstate[2]);
+ ADVANCE_LP_RING();
+ } else {
+ BEGIN_LP_RING(16);
+ OUT_RING(_3DSTATE_MAP_STATE | 6);
+ OUT_RING(0x00000003); /* map 0,1 */
+ OUT_RING(pI830->mapstate[0]);
+ OUT_RING(pI830->mapstate[1]);
+ OUT_RING(pI830->mapstate[2]);
+ OUT_RING(pI830->mapstate[3]);
+ OUT_RING(pI830->mapstate[4]);
+ OUT_RING(pI830->mapstate[5]);
+
+ OUT_RING(_3DSTATE_SAMPLER_STATE | 6);
+ OUT_RING(0x00000003); /* sampler 0,1 */
+ OUT_RING(pI830->samplerstate[0]);
+ OUT_RING(pI830->samplerstate[1]);
+ OUT_RING(pI830->samplerstate[2]);
+ OUT_RING(pI830->samplerstate[3]);
+ OUT_RING(pI830->samplerstate[4]);
+ OUT_RING(pI830->samplerstate[5]);
+ ADVANCE_LP_RING();
+ }
+ {
+ CARD32 ss2;
+
+ BEGIN_LP_RING(18);
+ /* color buffer
+ * XXX: Need to add USE_FENCE if we ever tile the X Server's pixmaps or
+ * visible screen.
+ */
+ OUT_RING(_3DSTATE_BUF_INFO_CMD);
+ OUT_RING(BUF_3D_ID_COLOR_BACK| BUF_3D_PITCH(dst_pitch));
+ OUT_RING(BUF_3D_ADDR(dst_offset));
+
+ OUT_RING(_3DSTATE_DST_BUF_VARS_CMD);
+ OUT_RING(dst_format);
+
+ OUT_RING(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(2) |
+ I1_LOAD_S(4) | I1_LOAD_S(5) | I1_LOAD_S(6) | 3);
+ ss2 = S2_TEXCOORD_FMT(0, TEXCOORDFMT_2D);
+ if (pMask)
+ ss2 |= S2_TEXCOORD_FMT(1, TEXCOORDFMT_2D);
+ else
+ ss2 |= S2_TEXCOORD_FMT(1, TEXCOORDFMT_NOT_PRESENT);
+ ss2 |= S2_TEXCOORD_FMT(2, TEXCOORDFMT_NOT_PRESENT);
+ ss2 |= S2_TEXCOORD_FMT(3, TEXCOORDFMT_NOT_PRESENT);
+ ss2 |= S2_TEXCOORD_FMT(4, TEXCOORDFMT_NOT_PRESENT);
+ ss2 |= S2_TEXCOORD_FMT(5, TEXCOORDFMT_NOT_PRESENT);
+ ss2 |= S2_TEXCOORD_FMT(6, TEXCOORDFMT_NOT_PRESENT);
+ ss2 |= S2_TEXCOORD_FMT(7, TEXCOORDFMT_NOT_PRESENT);
+ OUT_RING(ss2);
+ OUT_RING((1 << S4_POINT_WIDTH_SHIFT) | S4_LINE_WIDTH_ONE |
+ S4_CULLMODE_NONE| S4_VFMT_XY);
+ blendctl = I915GetBlendCntl(op, pMaskPicture, pDstPicture->format);
+ OUT_RING(0x00000000); /* Disable stencil buffer */
+ OUT_RING(S6_CBUF_BLEND_ENABLE | S6_COLOR_WRITE_ENABLE |
+ (BLENDFUNC_ADD << S6_CBUF_BLEND_FUNC_SHIFT) | blendctl);
+
+ /* issue a flush */
+ OUT_RING(MI_FLUSH | MI_WRITE_DIRTY_STATE | MI_INVALIDATE_MAP_CACHE);
+ OUT_RING(MI_NOOP);
+
+ /* draw rect is unconditional */
+ OUT_RING(_3DSTATE_DRAW_RECT_CMD);
+ OUT_RING(0x00000000);
+ OUT_RING(0x00000000); /* ymin, xmin*/
+ OUT_RING(DRAW_YMAX(pDst->drawable.height - 1) |
+ DRAW_XMAX(pDst->drawable.width - 1));
+ OUT_RING(0x00000000); /* yorig, xorig (relate to color buffer?)*/
+ OUT_RING(MI_NOOP);
+ ADVANCE_LP_RING();
+ }
+
+ FS_BEGIN();
+
+ /* Declare the registers necessary for our program. I don't think the
+ * S then T ordering is necessary.
+ */
+ i915_fs_dcl(FS_S0);
+ if (pMask)
+ i915_fs_dcl(FS_S1);
+ i915_fs_dcl(FS_T0);
+ if (pMask)
+ i915_fs_dcl(FS_T1);
+
+ /* Load the pSrcPicture texel */
+ i915_fs_texld(FS_R0, FS_S0, FS_T0);
+ /* If the texture lacks an alpha channel, force the alpha to 1. */
+ if (PICT_FORMAT_A(pSrcPicture->format) == 0)
+ i915_fs_mov_masked(FS_R0, MASK_W, i915_fs_operand_one());
+
+ if (!pMask) {
+ /* No mask, so move to output color */
+ i915_fs_mov(FS_OC, i915_fs_operand_reg(FS_R0));
+ } else {
+ /* Load the pMaskPicture texel */
+ i915_fs_texld(FS_R1, FS_S1, FS_T1);
+ /* If the texture lacks an alpha channel, force the alpha to 1. */
+ if (PICT_FORMAT_A(pMaskPicture->format) == 0)
+ i915_fs_mov_masked(FS_R1, MASK_W, i915_fs_operand_one());
+
+ /* If component alpha is active in the mask and the blend operation
+ * uses the source alpha, then we know we don't need the source
+ * value (otherwise we would have hit a fallback earlier), so we
+ * provide the source alpha (src.A * mask.X) as output color.
+ * Conversely, if CA is set and we don't need the source alpha, then
+ * we produce the source value (src.X * mask.X) and the source alpha
+ * is unused.. Otherwise, we provide the non-CA source value
+ * (src.X * mask.A).
+ */
+ if (pMaskPicture->componentAlpha &&
+ PICT_FORMAT_RGB(pMaskPicture->format))
+ {
+ if (I915BlendOp[op].src_alpha) {
+ i915_fs_mul(FS_OC, i915_fs_operand(FS_R0, W, W, W, W),
+ i915_fs_operand_reg(FS_R1));
+ } else {
+ i915_fs_mul(FS_OC, i915_fs_operand_reg(FS_R0),
+ i915_fs_operand_reg(FS_R1));
+ }
+ } else {
+ i915_fs_mul(FS_OC, i915_fs_operand_reg(FS_R0),
+ i915_fs_operand(FS_R1, W, W, W, W));
+ }
+ }
+ FS_END();
+
+ return TRUE;
+}
diff --git a/src/i915_video.c b/src/i915_video.c
index 591b6f8..e837097 100644
--- a/src/i915_video.c
+++ b/src/i915_video.c
@@ -39,18 +39,6 @@
#include "i915_reg.h"
#include "i915_3d.h"
-union intfloat {
- CARD32 ui;
- float f;
-};
-
-#define OUT_RING_F(x) do { \
- union intfloat _tmp; \
- _tmp.f = x; \
- OUT_RING(_tmp.ui); \
-} while (0)
-
-
void
I915DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id,
RegionPtr dstRegion,
diff --git a/src/i965_exa_render.c b/src/i965_exa_render.c
deleted file mode 100644
index 99bd628..0000000
--- a/src/i965_exa_render.c
+++ /dev/null
@@ -1,1081 +0,0 @@
-/*
- * Copyright © 2006 Intel Corporation
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- *
- * Authors:
- * Wang Zhenyu <zhenyu.z.wang at intel.com>
- * Eric Anholt <eric at anholt.net>
- *
- */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "xf86.h"
-#include "i830.h"
-#include "i915_reg.h"
-
-/* bring in brw structs */
-#include "brw_defines.h"
-#include "brw_structs.h"
-
-#ifdef I830DEBUG
-#define DEBUG_I830FALLBACK 1
-#endif
-
-#ifdef DEBUG_I830FALLBACK
-#define I830FALLBACK(s, arg...) \
-do { \
- DPRINTF(PFX, "EXA fallback: " s "\n", ##arg); \
- return FALSE; \
-} while(0)
-#else
-#define I830FALLBACK(s, arg...) \
-do { \
- return FALSE; \
-} while(0)
-#endif
-
-static void I965GetBlendCntl(int op, PicturePtr pMask, CARD32 dst_format,
- CARD32 *sblend, CARD32 *dblend);
-
-struct blendinfo {
- Bool dst_alpha;
- Bool src_alpha;
- CARD32 src_blend;
- CARD32 dst_blend;
-};
-
-struct formatinfo {
- int fmt;
- CARD32 card_fmt;
-};
-
-// refer vol2, 3d rasterization 3.8.1
-
-/* defined in brw_defines.h */
-static struct blendinfo I965BlendOp[] = {
- /* Clear */
- {0, 0, BRW_BLENDFACTOR_ZERO, BRW_BLENDFACTOR_ZERO},
- /* Src */
- {0, 0, BRW_BLENDFACTOR_ONE, BRW_BLENDFACTOR_ZERO},
- /* Dst */
- {0, 0, BRW_BLENDFACTOR_ZERO, BRW_BLENDFACTOR_ONE},
- /* Over */
- {0, 1, BRW_BLENDFACTOR_ONE, BRW_BLENDFACTOR_INV_SRC_ALPHA},
- /* OverReverse */
- {1, 0, BRW_BLENDFACTOR_INV_DST_ALPHA, BRW_BLENDFACTOR_ONE},
- /* In */
- {1, 0, BRW_BLENDFACTOR_DST_ALPHA, BRW_BLENDFACTOR_ZERO},
- /* InReverse */
- {0, 1, BRW_BLENDFACTOR_ZERO, BRW_BLENDFACTOR_SRC_ALPHA},
- /* Out */
- {1, 0, BRW_BLENDFACTOR_INV_DST_ALPHA, BRW_BLENDFACTOR_ZERO},
- /* OutReverse */
- {0, 1, BRW_BLENDFACTOR_ZERO, BRW_BLENDFACTOR_INV_SRC_ALPHA},
- /* Atop */
- {1, 1, BRW_BLENDFACTOR_DST_ALPHA, BRW_BLENDFACTOR_INV_SRC_ALPHA},
- /* AtopReverse */
- {1, 1, BRW_BLENDFACTOR_INV_DST_ALPHA, BRW_BLENDFACTOR_SRC_ALPHA},
- /* Xor */
- {1, 1, BRW_BLENDFACTOR_INV_DST_ALPHA, BRW_BLENDFACTOR_INV_SRC_ALPHA},
- /* Add */
- {0, 0, BRW_BLENDFACTOR_ONE, BRW_BLENDFACTOR_ONE},
-};
-
-/* FIXME: surface format defined in brw_defines.h, shared Sampling engine 1.7.2*/
-static struct formatinfo I965TexFormats[] = {
- {PICT_a8r8g8b8, BRW_SURFACEFORMAT_B8G8R8A8_UNORM },
- {PICT_x8r8g8b8, BRW_SURFACEFORMAT_B8G8R8X8_UNORM },
- {PICT_a8b8g8r8, BRW_SURFACEFORMAT_R8G8B8A8_UNORM },
- {PICT_x8b8g8r8, BRW_SURFACEFORMAT_R8G8B8X8_UNORM },
- {PICT_r5g6b5, BRW_SURFACEFORMAT_B5G6R5_UNORM },
- {PICT_a1r5g5b5, BRW_SURFACEFORMAT_B5G5R5A1_UNORM },
- {PICT_a8, BRW_SURFACEFORMAT_A8_UNORM },
-};
-
-static void I965GetBlendCntl(int op, PicturePtr pMask, CARD32 dst_format,
- CARD32 *sblend, CARD32 *dblend)
-{
-
- *sblend = I965BlendOp[op].src_blend;
- *dblend = I965BlendOp[op].dst_blend;
-
- /* If there's no dst alpha channel, adjust the blend op so that we'll treat
- * it as always 1.
- */
- if (PICT_FORMAT_A(dst_format) == 0 && I965BlendOp[op].dst_alpha) {
- if (*sblend == BRW_BLENDFACTOR_DST_ALPHA)
- *sblend = BRW_BLENDFACTOR_ONE;
- else if (*sblend == BRW_BLENDFACTOR_INV_DST_ALPHA)
- *sblend = BRW_BLENDFACTOR_ZERO;
- }
-
- /* If the source alpha is being used, then we should only be in a case where
- * the source blend factor is 0, and the source blend value is the mask
- * channels multiplied by the source picture's alpha.
- */
- if (pMask && pMask->componentAlpha && I965BlendOp[op].src_alpha) {
- if (*dblend == BRW_BLENDFACTOR_SRC_ALPHA) {
- *dblend = BRW_BLENDFACTOR_SRC_COLOR;
- } else if (*dblend == BRW_BLENDFACTOR_INV_SRC_ALPHA) {
- *dblend = BRW_BLENDFACTOR_INV_SRC_COLOR;
- }
- }
-
-}
-
-static Bool I965GetDestFormat(PicturePtr pDstPicture, CARD32 *dst_format)
-{
- switch (pDstPicture->format) {
- case PICT_a8r8g8b8:
- case PICT_x8r8g8b8:
- *dst_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
- break;
- case PICT_r5g6b5:
- *dst_format = BRW_SURFACEFORMAT_B5G6R5_UNORM;
- break;
- case PICT_a1r5g5b5:
- *dst_format = BRW_SURFACEFORMAT_B5G5R5A1_UNORM;
- break;
- case PICT_x1r5g5b5:
- *dst_format = BRW_SURFACEFORMAT_B5G5R5X1_UNORM;
- break;
- /* COLR_BUF_8BIT is special for YUV surfaces. While we may end up being
- * able to use it depending on how the hardware implements it, disable it
- * for now while we don't know what exactly it does (what channel does it
- * read from?
- */
- /*
- case PICT_a8:
- *dst_format = COLR_BUF_8BIT;
- break;
- */
- case PICT_a4r4g4b4:
- case PICT_x4r4g4b4:
- *dst_format = BRW_SURFACEFORMAT_B4G4R4A4_UNORM;
- break;
- default:
- I830FALLBACK("Unsupported dest format 0x%x\n",
- (int)pDstPicture->format);
- }
-
- return TRUE;
-}
-
-static Bool I965CheckCompositeTexture(PicturePtr pPict, int unit)
-{
- int w = pPict->pDrawable->width;
- int h = pPict->pDrawable->height;
- int i;
-
- if ((w > 0x7ff) || (h > 0x7ff))
- I830FALLBACK("Picture w/h too large (%dx%d)\n", w, h);
-
- for (i = 0; i < sizeof(I965TexFormats) / sizeof(I965TexFormats[0]); i++)
- {
- if (I965TexFormats[i].fmt == pPict->format)
- break;
- }
- if (i == sizeof(I965TexFormats) / sizeof(I965TexFormats[0]))
- I830FALLBACK("Unsupported picture format 0x%x\n",
- (int)pPict->format);
-
- if (pPict->repeat && pPict->repeatType != RepeatNormal)
- I830FALLBACK("extended repeat (%d) not supported\n",
- pPict->repeatType);
-
- if (pPict->filter != PictFilterNearest &&
- pPict->filter != PictFilterBilinear)
- I830FALLBACK("Unsupported filter 0x%x\n", pPict->filter);
-
- return TRUE;
-}
-
-Bool
-I965EXACheckComposite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture,
- PicturePtr pDstPicture)
-{
- CARD32 tmp1;
-
- /* Check for unsupported compositing operations. */
- if (op >= sizeof(I965BlendOp) / sizeof(I965BlendOp[0]))
- I830FALLBACK("Unsupported Composite op 0x%x\n", op);
-
- if (pMaskPicture != NULL && pMaskPicture->componentAlpha) {
- /* Check if it's component alpha that relies on a source alpha and on
- * the source value. We can only get one of those into the single
- * source value that we get to blend with.
- */
- if (I965BlendOp[op].src_alpha &&
- (I965BlendOp[op].src_blend != BRW_BLENDFACTOR_ZERO))
- I830FALLBACK("Component alpha not supported with source "
- "alpha and source value blending.\n");
- /* XXX: fallback now for mask with componentAlpha */
- I830FALLBACK("mask componentAlpha not ready.\n");
- }
-
- if (!I965CheckCompositeTexture(pSrcPicture, 0))
- I830FALLBACK("Check Src picture texture\n");
- if (pMaskPicture != NULL && !I965CheckCompositeTexture(pMaskPicture, 1))
- I830FALLBACK("Check Mask picture texture\n");
-
- if (!I965GetDestFormat(pDstPicture, &tmp1))
- I830FALLBACK("Get Color buffer format\n");
-
- return TRUE;
-
-}
-
-#define ALIGN(i,m) (((i) + (m) - 1) & ~((m) - 1))
-#define MIN(a,b) ((a) < (b) ? (a) : (b))
-#define BRW_GRF_BLOCKS(nreg) ((nreg + 15) / 16 - 1)
-
-static int urb_vs_start, urb_vs_size;
-static int urb_gs_start, urb_gs_size;
-static int urb_clip_start, urb_clip_size;
-static int urb_sf_start, urb_sf_size;
-static int urb_cs_start, urb_cs_size;
-
-static struct brw_surface_state *dest_surf_state;
-static struct brw_surface_state *src_surf_state;
-static struct brw_surface_state *mask_surf_state;
-static struct brw_sampler_state *src_sampler_state;
-static struct brw_sampler_state *mask_sampler_state;
-static struct brw_sampler_default_color *default_color_state;
-
-static struct brw_vs_unit_state *vs_state;
-static struct brw_sf_unit_state *sf_state;
-static struct brw_wm_unit_state *wm_state;
-static struct brw_cc_unit_state *cc_state;
-static struct brw_cc_viewport *cc_viewport;
-
-static struct brw_instruction *sf_kernel;
-static struct brw_instruction *ps_kernel;
-static struct brw_instruction *sip_kernel;
-
-static CARD32 *binding_table;
-static int binding_table_entries;
-
-static int dest_surf_offset, src_surf_offset, mask_surf_offset;
-static int src_sampler_offset, mask_sampler_offset,vs_offset;
-static int sf_offset, wm_offset, cc_offset, vb_offset, cc_viewport_offset;
-static int sf_kernel_offset, ps_kernel_offset, sip_kernel_offset;
-static int wm_scratch_offset;
-static int binding_table_offset;
-static int default_color_offset;
-static int next_offset, total_state_size;
-static char *state_base;
-static int state_base_offset;
-static float *vb;
-static int vb_size = (4 * 4) * 4 ; /* 4 DWORDS per vertex*/
-
-static CARD32 src_blend, dst_blend;
-
-static const CARD32 sip_kernel_static[][4] = {
-/* wait (1) a0<1>UW a145<0,1,0>UW { align1 + } */
- { 0x00000030, 0x20000108, 0x00001220, 0x00000000 },
-/* nop (4) g0<1>UD { align1 + } */
- { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
-/* nop (4) g0<1>UD { align1 + } */
- { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
-/* nop (4) g0<1>UD { align1 + } */
- { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
-/* nop (4) g0<1>UD { align1 + } */
- { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
-/* nop (4) g0<1>UD { align1 + } */
- { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
-/* nop (4) g0<1>UD { align1 + } */
- { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
-/* nop (4) g0<1>UD { align1 + } */
- { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
-/* nop (4) g0<1>UD { align1 + } */
- { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
-/* nop (4) g0<1>UD { align1 + } */
- { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
-};
-
-/*
- * this program computes dA/dx and dA/dy for the texture coordinates along
- * with the base texture coordinate. It was extracted from the Mesa driver
- */
-
-#define SF_KERNEL_NUM_GRF 16
-#define SF_MAX_THREADS 1
-
-static const CARD32 sf_kernel_static[][4] = {
-#include "exa_sf_prog.h"
-};
-
-static const CARD32 sf_kernel_static_mask[][4] = {
-#include "exa_sf_mask_prog.h"
-};
-
-/* ps kernels */
-#define PS_KERNEL_NUM_GRF 32
-#define PS_MAX_THREADS 32
-/* 1: no mask */
-static const CARD32 ps_kernel_static_nomask [][4] = {
-#include "exa_wm_nomask_prog.h"
-};
-
-/* 2: mask with componentAlpha, src * mask color, XXX: later */
-static const CARD32 ps_kernel_static_maskca [][4] = {
-/*#include "i965_composite_wm_maskca.h" */
-};
-
-/* 3: mask without componentAlpha, src * mask alpha */
-static const CARD32 ps_kernel_static_masknoca [][4] = {
-#include "exa_wm_masknoca_prog.h"
-};
-
-static CARD32 i965_get_card_format(PicturePtr pPict)
-{
- int i;
- for (i = 0; i < sizeof(I965TexFormats) / sizeof(I965TexFormats[0]); i++) {
- if (I965TexFormats[i].fmt == pPict->format)
- break;
- }
- return I965TexFormats[i].card_fmt;
-}
-
-Bool
-I965EXAPrepareComposite(int op, PicturePtr pSrcPicture,
- PicturePtr pMaskPicture, PicturePtr pDstPicture,
- PixmapPtr pSrc, PixmapPtr pMask, PixmapPtr pDst)
-{
- ScrnInfoPtr pScrn = xf86Screens[pSrcPicture->pDrawable->pScreen->myNum];
- I830Ptr pI830 = I830PTR(pScrn);
- CARD32 src_offset, src_pitch;
- CARD32 mask_offset = 0, mask_pitch = 0;
- CARD32 dst_format, dst_offset, dst_pitch;
-
-#ifdef XF86DRI
- if (pI830->directRenderingEnabled) {
- drmI830Sarea *pSAREAPriv = DRIGetSAREAPrivate(pScrn->pScreen);
-
- pSAREAPriv->ctxOwner = DRIGetContext(pScrn->pScreen);
- }
-#endif
-
- pI830->last_3d = LAST_3D_RENDER;
-
- src_offset = intel_get_pixmap_offset(pSrc);
- src_pitch = intel_get_pixmap_pitch(pSrc);
- dst_offset = intel_get_pixmap_offset(pDst);
- dst_pitch = intel_get_pixmap_pitch(pDst);
- if (pMask) {
- mask_offset = intel_get_pixmap_offset(pMask);
- mask_pitch = intel_get_pixmap_pitch(pMask);
- }
- pI830->scale_units[0][0] = pSrc->drawable.width;
- pI830->scale_units[0][1] = pSrc->drawable.height;
-
- pI830->transform[0] = pSrcPicture->transform;
-
- if (!pMask) {
- pI830->transform[1] = NULL;
- pI830->scale_units[1][0] = -1;
- pI830->scale_units[1][1] = -1;
- } else {
- pI830->transform[1] = pMaskPicture->transform;
- pI830->scale_units[1][0] = pMask->drawable.width;
- pI830->scale_units[1][1] = pMask->drawable.height;
- }
-
- /* setup 3d pipeline state */
-
- binding_table_entries = 2; /* default no mask */
-
- /* Wait for sync before we start setting up our new state */
- i830WaitSync(pScrn);
-
- /* Set up our layout of state in framebuffer. First the general state: */
- next_offset = 0;
- vs_offset = ALIGN(next_offset, 64);
- next_offset = vs_offset + sizeof(*vs_state);
-
- sf_offset = ALIGN(next_offset, 32);
- next_offset = sf_offset + sizeof(*sf_state);
-
- wm_offset = ALIGN(next_offset, 32);
- next_offset = wm_offset + sizeof(*wm_state);
-
- wm_scratch_offset = ALIGN(next_offset, 1024);
- next_offset = wm_scratch_offset + 1024 * PS_MAX_THREADS;
-
- cc_offset = ALIGN(next_offset, 32);
- next_offset = cc_offset + sizeof(*cc_state);
-
- /* keep current sf_kernel, which will send one setup urb entry to
- PS kernel */
- sf_kernel_offset = ALIGN(next_offset, 64);
- if (pMask)
- next_offset = sf_kernel_offset + sizeof (sf_kernel_static_mask);
- else
- next_offset = sf_kernel_offset + sizeof (sf_kernel_static);
-
- //XXX: ps_kernel may be seperated, fix with offset
- ps_kernel_offset = ALIGN(next_offset, 64);
- if (pMask) {
- if (pMaskPicture->componentAlpha)
- next_offset = ps_kernel_offset + sizeof(ps_kernel_static_maskca);
- else
- next_offset = ps_kernel_offset + sizeof(ps_kernel_static_masknoca);
- } else
- next_offset = ps_kernel_offset + sizeof (ps_kernel_static_nomask);
-
- sip_kernel_offset = ALIGN(next_offset, 64);
- next_offset = sip_kernel_offset + sizeof (sip_kernel_static);
-
- // needed?
- cc_viewport_offset = ALIGN(next_offset, 32);
- next_offset = cc_viewport_offset + sizeof(*cc_viewport);
-
- // for texture sampler
- src_sampler_offset = ALIGN(next_offset, 32);
- next_offset = src_sampler_offset + sizeof(*src_sampler_state);
-
- if (pMask) {
- mask_sampler_offset = ALIGN(next_offset, 32);
- next_offset = mask_sampler_offset + sizeof(*mask_sampler_state);
- }
- /* Align VB to native size of elements, for safety */
- vb_offset = ALIGN(next_offset, 8);
- next_offset = vb_offset + vb_size;
-
- /* And then the general state: */
- dest_surf_offset = ALIGN(next_offset, 32);
- next_offset = dest_surf_offset + sizeof(*dest_surf_state);
-
- src_surf_offset = ALIGN(next_offset, 32);
- next_offset = src_surf_offset + sizeof(*src_surf_state);
-
- if (pMask) {
- mask_surf_offset = ALIGN(next_offset, 32);
- next_offset = mask_surf_offset + sizeof(*mask_surf_state);
- binding_table_entries = 3;
- }
-
- binding_table_offset = ALIGN(next_offset, 32);
- next_offset = binding_table_offset + (binding_table_entries * 4);
-
- default_color_offset = ALIGN(next_offset, 32);
- next_offset = default_color_offset + sizeof(*default_color_state);
-
- total_state_size = next_offset;
- assert(total_state_size < EXA_LINEAR_EXTRA);
-
- state_base_offset = pI830->EXAStateMem.Start;
- state_base_offset = ALIGN(state_base_offset, 64);
- state_base = (char *)(pI830->FbBase + state_base_offset);
-
- vs_state = (void *)(state_base + vs_offset);
- sf_state = (void *)(state_base + sf_offset);
- wm_state = (void *)(state_base + wm_offset);
- cc_state = (void *)(state_base + cc_offset);
- sf_kernel = (void *)(state_base + sf_kernel_offset);
- ps_kernel = (void *)(state_base + ps_kernel_offset);
- sip_kernel = (void *)(state_base + sip_kernel_offset);
-
- cc_viewport = (void *)(state_base + cc_viewport_offset);
-
- dest_surf_state = (void *)(state_base + dest_surf_offset);
- src_surf_state = (void *)(state_base + src_surf_offset);
- if (pMask)
- mask_surf_state = (void *)(state_base + mask_surf_offset);
-
- src_sampler_state = (void *)(state_base + src_sampler_offset);
- if (pMask)
- mask_sampler_state = (void *)(state_base + mask_sampler_offset);
-
- binding_table = (void *)(state_base + binding_table_offset);
-
- vb = (void *)(state_base + vb_offset);
-
- default_color_state = (void*)(state_base + default_color_offset);
-
- /* Set up a default static partitioning of the URB, which is supposed to
- * allow anything we would want to do, at potentially lower performance.
- */
-#define URB_CS_ENTRY_SIZE 0
-#define URB_CS_ENTRIES 0
-
-#define URB_VS_ENTRY_SIZE 1 // each 512-bit row
-#define URB_VS_ENTRIES 8 // we needs at least 8 entries
-
-#define URB_GS_ENTRY_SIZE 0
-#define URB_GS_ENTRIES 0
-
-#define URB_CLIP_ENTRY_SIZE 0
-#define URB_CLIP_ENTRIES 0
-
-#define URB_SF_ENTRY_SIZE 2
-#define URB_SF_ENTRIES 1
-
- urb_vs_start = 0;
- urb_vs_size = URB_VS_ENTRIES * URB_VS_ENTRY_SIZE;
- urb_gs_start = urb_vs_start + urb_vs_size;
- urb_gs_size = URB_GS_ENTRIES * URB_GS_ENTRY_SIZE;
- urb_clip_start = urb_gs_start + urb_gs_size;
- urb_clip_size = URB_CLIP_ENTRIES * URB_CLIP_ENTRY_SIZE;
- urb_sf_start = urb_clip_start + urb_clip_size;
- urb_sf_size = URB_SF_ENTRIES * URB_SF_ENTRY_SIZE;
- urb_cs_start = urb_sf_start + urb_sf_size;
- urb_cs_size = URB_CS_ENTRIES * URB_CS_ENTRY_SIZE;
-
- /* We'll be poking the state buffers that could be in use by the 3d hardware
- * here, but we should have synced the 3D engine already in I830PutImage.
- */
-
- memset (cc_viewport, 0, sizeof (*cc_viewport));
- cc_viewport->min_depth = -1.e35;
- cc_viewport->max_depth = 1.e35;
-
- /* Color calculator state */
- memset(cc_state, 0, sizeof(*cc_state));
- cc_state->cc0.stencil_enable = 0; /* disable stencil */
- cc_state->cc2.depth_test = 0; /* disable depth test */
- cc_state->cc2.logicop_enable = 0; /* disable logic op */
- cc_state->cc3.ia_blend_enable = 1; /* blend alpha just like colors */
- cc_state->cc3.blend_enable = 1; /* enable color blend */
- cc_state->cc3.alpha_test = 0; /* disable alpha test */
- cc_state->cc4.cc_viewport_state_offset = (state_base_offset + cc_viewport_offset) >> 5;
- cc_state->cc5.dither_enable = 0; /* disable dither */
- cc_state->cc5.logicop_func = 0xc; /* COPY */
- cc_state->cc5.statistics_enable = 1;
- cc_state->cc5.ia_blend_function = BRW_BLENDFUNCTION_ADD;
- I965GetBlendCntl(op, pMaskPicture, pDstPicture->format,
- &src_blend, &dst_blend);
- /* XXX: alpha blend factor should be same as color, but check
- for CA case in future */
- cc_state->cc5.ia_src_blend_factor = src_blend;
- cc_state->cc5.ia_dest_blend_factor = dst_blend;
- cc_state->cc6.blend_function = BRW_BLENDFUNCTION_ADD;
- cc_state->cc6.src_blend_factor = src_blend;
- cc_state->cc6.dest_blend_factor = dst_blend;
- cc_state->cc6.clamp_post_alpha_blend = 1;
- cc_state->cc6.clamp_pre_alpha_blend = 1;
- cc_state->cc6.clamp_range = 0; /* clamp range [0,1] */
-
- /* Upload system kernel */
- memcpy (sip_kernel, sip_kernel_static, sizeof (sip_kernel_static));
-
- /* Set up the state buffer for the destination surface */
- memset(dest_surf_state, 0, sizeof(*dest_surf_state));
- dest_surf_state->ss0.surface_type = BRW_SURFACE_2D;
- dest_surf_state->ss0.data_return_format = BRW_SURFACERETURNFORMAT_FLOAT32;
- I965GetDestFormat(pDstPicture, &dst_format);
- dest_surf_state->ss0.surface_format = dst_format;
-
- dest_surf_state->ss0.writedisable_alpha = 0;
- dest_surf_state->ss0.writedisable_red = 0;
- dest_surf_state->ss0.writedisable_green = 0;
- dest_surf_state->ss0.writedisable_blue = 0;
- dest_surf_state->ss0.color_blend = 1;
- dest_surf_state->ss0.vert_line_stride = 0;
- dest_surf_state->ss0.vert_line_stride_ofs = 0;
- dest_surf_state->ss0.mipmap_layout_mode = 0;
- dest_surf_state->ss0.render_cache_read_mode = 0;
-
- dest_surf_state->ss1.base_addr = dst_offset;
- dest_surf_state->ss2.height = pDst->drawable.height - 1;
- dest_surf_state->ss2.width = pDst->drawable.width - 1;
- dest_surf_state->ss2.mip_count = 0;
- dest_surf_state->ss2.render_target_rotation = 0;
- dest_surf_state->ss3.pitch = dst_pitch - 1;
-
- /* Set up the source surface state buffer */
- memset(src_surf_state, 0, sizeof(*src_surf_state));
- src_surf_state->ss0.surface_type = BRW_SURFACE_2D;
- src_surf_state->ss0.surface_format = i965_get_card_format(pSrcPicture);
-
- src_surf_state->ss0.writedisable_alpha = 0;
- src_surf_state->ss0.writedisable_red = 0;
- src_surf_state->ss0.writedisable_green = 0;
- src_surf_state->ss0.writedisable_blue = 0;
- src_surf_state->ss0.color_blend = 1;
- src_surf_state->ss0.vert_line_stride = 0;
- src_surf_state->ss0.vert_line_stride_ofs = 0;
- src_surf_state->ss0.mipmap_layout_mode = 0;
- src_surf_state->ss0.render_cache_read_mode = 0;
-
- src_surf_state->ss1.base_addr = src_offset;
- src_surf_state->ss2.width = pSrc->drawable.width - 1;
- src_surf_state->ss2.height = pSrc->drawable.height - 1;
- src_surf_state->ss2.mip_count = 0;
- src_surf_state->ss2.render_target_rotation = 0;
- src_surf_state->ss3.pitch = src_pitch - 1;
-
- /* setup mask surface */
- if (pMask) {
- memset(mask_surf_state, 0, sizeof(*mask_surf_state));
- mask_surf_state->ss0.surface_type = BRW_SURFACE_2D;
- mask_surf_state->ss0.surface_format = i965_get_card_format(pMaskPicture);
-
- mask_surf_state->ss0.writedisable_alpha = 0;
- mask_surf_state->ss0.writedisable_red = 0;
- mask_surf_state->ss0.writedisable_green = 0;
- mask_surf_state->ss0.writedisable_blue = 0;
- mask_surf_state->ss0.color_blend = 1;
- mask_surf_state->ss0.vert_line_stride = 0;
- mask_surf_state->ss0.vert_line_stride_ofs = 0;
- mask_surf_state->ss0.mipmap_layout_mode = 0;
- mask_surf_state->ss0.render_cache_read_mode = 0;
-
- mask_surf_state->ss1.base_addr = mask_offset;
- mask_surf_state->ss2.width = pMask->drawable.width - 1;
- mask_surf_state->ss2.height = pMask->drawable.height - 1;
- mask_surf_state->ss2.mip_count = 0;
- mask_surf_state->ss2.render_target_rotation = 0;
- mask_surf_state->ss3.pitch = mask_pitch - 1;
- }
-
- /* Set up a binding table for our surfaces. Only the PS will use it */
- binding_table[0] = state_base_offset + dest_surf_offset;
- binding_table[1] = state_base_offset + src_surf_offset;
- if (pMask)
- binding_table[2] = state_base_offset + mask_surf_offset;
-
- /* PS kernel use this sampler */
- memset(src_sampler_state, 0, sizeof(*src_sampler_state));
- src_sampler_state->ss0.lod_preclamp = 1; /* GL mode */
- switch(pSrcPicture->filter) {
- case PictFilterNearest:
- src_sampler_state->ss0.min_filter = BRW_MAPFILTER_NEAREST;
- src_sampler_state->ss0.mag_filter = BRW_MAPFILTER_NEAREST;
- break;
- case PictFilterBilinear:
- src_sampler_state->ss0.min_filter = BRW_MAPFILTER_LINEAR;
- src_sampler_state->ss0.mag_filter = BRW_MAPFILTER_LINEAR;
- break;
- default:
- I830FALLBACK("Bad filter 0x%x\n", pSrcPicture->filter);
- }
-
- memset(default_color_state, 0, sizeof(*default_color_state));
- default_color_state->color[0] = 0.0; /* R */
- default_color_state->color[1] = 0.0; /* G */
- default_color_state->color[2] = 0.0; /* B */
- default_color_state->color[3] = 1.0; /* A */
-
- src_sampler_state->ss0.default_color_mode = 0; /* GL mode */
-
- if (!pSrcPicture->repeat) {
- src_sampler_state->ss1.r_wrap_mode = BRW_TEXCOORDMODE_CLAMP_BORDER;
- src_sampler_state->ss1.s_wrap_mode = BRW_TEXCOORDMODE_CLAMP_BORDER;
- src_sampler_state->ss1.t_wrap_mode = BRW_TEXCOORDMODE_CLAMP_BORDER;
- src_sampler_state->ss2.default_color_pointer =
- (state_base_offset + default_color_offset) >> 5;
- } else {
- src_sampler_state->ss1.r_wrap_mode = BRW_TEXCOORDMODE_WRAP;
- src_sampler_state->ss1.s_wrap_mode = BRW_TEXCOORDMODE_WRAP;
- src_sampler_state->ss1.t_wrap_mode = BRW_TEXCOORDMODE_WRAP;
- }
- src_sampler_state->ss3.chroma_key_enable = 0; /* disable chromakey */
-
- if (pMask) {
- memset(mask_sampler_state, 0, sizeof(*mask_sampler_state));
- mask_sampler_state->ss0.lod_preclamp = 1; /* GL mode */
- switch(pMaskPicture->filter) {
- case PictFilterNearest:
- mask_sampler_state->ss0.min_filter = BRW_MAPFILTER_NEAREST;
- mask_sampler_state->ss0.mag_filter = BRW_MAPFILTER_NEAREST;
- break;
- case PictFilterBilinear:
- mask_sampler_state->ss0.min_filter = BRW_MAPFILTER_LINEAR;
- mask_sampler_state->ss0.mag_filter = BRW_MAPFILTER_LINEAR;
- break;
- default:
- I830FALLBACK("Bad filter 0x%x\n", pMaskPicture->filter);
- }
-
- if (!pMaskPicture->repeat) {
- mask_sampler_state->ss1.r_wrap_mode = BRW_TEXCOORDMODE_CLAMP_BORDER;
- mask_sampler_state->ss1.s_wrap_mode = BRW_TEXCOORDMODE_CLAMP_BORDER;
- mask_sampler_state->ss1.t_wrap_mode = BRW_TEXCOORDMODE_CLAMP_BORDER;
- mask_sampler_state->ss2.default_color_pointer =
- (state_base_offset + default_color_offset)>>5;
- } else {
- mask_sampler_state->ss1.r_wrap_mode = BRW_TEXCOORDMODE_WRAP;
- mask_sampler_state->ss1.s_wrap_mode = BRW_TEXCOORDMODE_WRAP;
- mask_sampler_state->ss1.t_wrap_mode = BRW_TEXCOORDMODE_WRAP;
- }
- mask_sampler_state->ss3.chroma_key_enable = 0; /* disable chromakey */
- }
-
- /* Set up the vertex shader to be disabled (passthrough) */
- memset(vs_state, 0, sizeof(*vs_state));
- vs_state->thread4.nr_urb_entries = URB_VS_ENTRIES;
- vs_state->thread4.urb_entry_allocation_size = URB_VS_ENTRY_SIZE - 1;
- vs_state->vs6.vs_enable = 0;
- vs_state->vs6.vert_cache_disable = 1;
-
- // XXX: sf_kernel? keep it as now
- /* Set up the SF kernel to do coord interp: for each attribute,
- * calculate dA/dx and dA/dy. Hand these interpolation coefficients
- * back to SF which then hands pixels off to WM.
- */
- if (pMask)
- memcpy (sf_kernel, sf_kernel_static_mask, sizeof (sf_kernel_static));
- else
- memcpy (sf_kernel, sf_kernel_static, sizeof (sf_kernel_static));
-
- memset(sf_state, 0, sizeof(*sf_state));
- sf_state->thread0.kernel_start_pointer =
- (state_base_offset + sf_kernel_offset) >> 6;
- sf_state->thread0.grf_reg_count = BRW_GRF_BLOCKS(SF_KERNEL_NUM_GRF);
- sf_state->sf1.single_program_flow = 1;
- sf_state->sf1.binding_table_entry_count = 0;
- sf_state->sf1.thread_priority = 0;
- sf_state->sf1.floating_point_mode = 0; /* Mesa does this */
- sf_state->sf1.illegal_op_exception_enable = 1;
- sf_state->sf1.mask_stack_exception_enable = 1;
- sf_state->sf1.sw_exception_enable = 1;
- sf_state->thread2.per_thread_scratch_space = 0;
- sf_state->thread2.scratch_space_base_pointer = 0; /* not used in our kernel */
- sf_state->thread3.const_urb_entry_read_length = 0; /* no const URBs */
- sf_state->thread3.const_urb_entry_read_offset = 0; /* no const URBs */
- sf_state->thread3.urb_entry_read_length = 1; /* 1 URB per vertex */
- sf_state->thread3.urb_entry_read_offset = 0;
- sf_state->thread3.dispatch_grf_start_reg = 3;
- sf_state->thread4.max_threads = SF_MAX_THREADS - 1;
- sf_state->thread4.urb_entry_allocation_size = URB_SF_ENTRY_SIZE - 1;
- sf_state->thread4.nr_urb_entries = URB_SF_ENTRIES;
- sf_state->thread4.stats_enable = 1;
- sf_state->sf5.viewport_transform = FALSE; /* skip viewport */
- sf_state->sf6.cull_mode = BRW_CULLMODE_NONE;
- sf_state->sf6.scissor = 0;
- sf_state->sf7.trifan_pv = 2;
- sf_state->sf6.dest_org_vbias = 0x8;
- sf_state->sf6.dest_org_hbias = 0x8;
-
- /* Set up the PS kernel (dispatched by WM)
- */
-
- if (pMask) {
- if (pMaskPicture->componentAlpha)
- memcpy (ps_kernel, ps_kernel_static_maskca, sizeof (ps_kernel_static_maskca));
- else
- memcpy (ps_kernel, ps_kernel_static_masknoca, sizeof (ps_kernel_static_masknoca));
- } else
- memcpy (ps_kernel, ps_kernel_static_nomask, sizeof (ps_kernel_static_nomask));
-
- memset (wm_state, 0, sizeof (*wm_state));
- wm_state->thread0.kernel_start_pointer =
- (state_base_offset + ps_kernel_offset) >> 6;
- wm_state->thread0.grf_reg_count = BRW_GRF_BLOCKS(PS_KERNEL_NUM_GRF);
- wm_state->thread1.single_program_flow = 1;
- if (!pMask)
- wm_state->thread1.binding_table_entry_count = 2; /* 1 tex and fb */
- else
- wm_state->thread1.binding_table_entry_count = 3; /* 2 tex and fb */
-
- wm_state->thread2.scratch_space_base_pointer = (state_base_offset +
- wm_scratch_offset)>>10;
- wm_state->thread2.per_thread_scratch_space = 0;
- // XXX: urb allocation
- wm_state->thread3.const_urb_entry_read_length = 0;
- wm_state->thread3.const_urb_entry_read_offset = 0;
- if (pMask)
- wm_state->thread3.urb_entry_read_length = 2; /* two per pair of attrib */
- else
- wm_state->thread3.urb_entry_read_length = 1; /* one per pair of attrib */
- wm_state->thread3.urb_entry_read_offset = 0;
- // wm kernel use urb from 3, see wm_program in compiler module
- wm_state->thread3.dispatch_grf_start_reg = 3; /* must match kernel */
-
- wm_state->wm4.stats_enable = 1; /* statistic */
- wm_state->wm4.sampler_state_pointer = (state_base_offset + src_sampler_offset) >> 5;
- wm_state->wm4.sampler_count = 1; /* 1-4 samplers used */
- wm_state->wm5.max_threads = PS_MAX_THREADS - 1;
- wm_state->wm5.thread_dispatch_enable = 1;
- //just use 16-pixel dispatch (4 subspans), don't need to change kernel start point
- wm_state->wm5.enable_16_pix = 1;
- wm_state->wm5.enable_8_pix = 0;
- wm_state->wm5.early_depth_test = 1;
-
- /* Begin the long sequence of commands needed to set up the 3D
- * rendering pipe
- */
- {
- BEGIN_LP_RING(2);
- OUT_RING(MI_FLUSH |
- MI_STATE_INSTRUCTION_CACHE_FLUSH |
- BRW_MI_GLOBAL_SNAPSHOT_RESET);
- OUT_RING(MI_NOOP);
- ADVANCE_LP_RING();
- }
- {
- BEGIN_LP_RING(12);
-
- /* Match Mesa driver setup */
- OUT_RING(BRW_PIPELINE_SELECT | PIPELINE_SELECT_3D);
-
- OUT_RING(BRW_CS_URB_STATE | 0);
- OUT_RING((0 << 4) | /* URB Entry Allocation Size */
- (0 << 0)); /* Number of URB Entries */
-
- /* Zero out the two base address registers so all offsets are absolute */
- OUT_RING(BRW_STATE_BASE_ADDRESS | 4);
- OUT_RING(0 | BASE_ADDRESS_MODIFY); /* Generate state base address */
- OUT_RING(0 | BASE_ADDRESS_MODIFY); /* Surface state base address */
- OUT_RING(0 | BASE_ADDRESS_MODIFY); /* media base addr, don't care */
- OUT_RING(0x10000000 | BASE_ADDRESS_MODIFY); /* general state max addr, disabled */
- OUT_RING(0x10000000 | BASE_ADDRESS_MODIFY); /* media object state max addr, disabled */
-
- /* Set system instruction pointer */
- OUT_RING(BRW_STATE_SIP | 0);
- OUT_RING(state_base_offset + sip_kernel_offset); /* system instruction pointer */
- OUT_RING(MI_NOOP);
- ADVANCE_LP_RING();
- }
- {
- BEGIN_LP_RING(26);
- /* Pipe control */
- OUT_RING(BRW_PIPE_CONTROL |
- BRW_PIPE_CONTROL_NOWRITE |
- BRW_PIPE_CONTROL_IS_FLUSH |
- 2);
- OUT_RING(0); /* Destination address */
- OUT_RING(0); /* Immediate data low DW */
- OUT_RING(0); /* Immediate data high DW */
-
- /* Binding table pointers */
- OUT_RING(BRW_3DSTATE_BINDING_TABLE_POINTERS | 4);
- OUT_RING(0); /* vs */
- OUT_RING(0); /* gs */
- OUT_RING(0); /* clip */
- OUT_RING(0); /* sf */
- /* Only the PS uses the binding table */
- OUT_RING(state_base_offset + binding_table_offset); /* ps */
-
- /* The drawing rectangle clipping is always on. Set it to values that
- * shouldn't do any clipping.
- */
- OUT_RING(BRW_3DSTATE_DRAWING_RECTANGLE | 2); /* XXX 3 for BLC or CTG */
- OUT_RING(0x00000000); /* ymin, xmin */
- OUT_RING((pScrn->virtualX - 1) |
- (pScrn->virtualY - 1) << 16); /* ymax, xmax */
- OUT_RING(0x00000000); /* yorigin, xorigin */
-
- /* skip the depth buffer */
- /* skip the polygon stipple */
- /* skip the polygon stipple offset */
- /* skip the line stipple */
-
- /* Set the pointers to the 3d pipeline state */
- OUT_RING(BRW_3DSTATE_PIPELINED_POINTERS | 5);
- OUT_RING(state_base_offset + vs_offset); /* 32 byte aligned */
- OUT_RING(BRW_GS_DISABLE); /* disable GS, resulting in passthrough */
- OUT_RING(BRW_CLIP_DISABLE); /* disable CLIP, resulting in passthrough */
- OUT_RING(state_base_offset + sf_offset); /* 32 byte aligned */
- OUT_RING(state_base_offset + wm_offset); /* 32 byte aligned */
- OUT_RING(state_base_offset + cc_offset); /* 64 byte aligned */
-
- /* URB fence */
- OUT_RING(BRW_URB_FENCE |
- UF0_CS_REALLOC |
- UF0_SF_REALLOC |
- UF0_CLIP_REALLOC |
- UF0_GS_REALLOC |
- UF0_VS_REALLOC |
- 1);
- OUT_RING(((urb_clip_start + urb_clip_size) << UF1_CLIP_FENCE_SHIFT) |
- ((urb_gs_start + urb_gs_size) << UF1_GS_FENCE_SHIFT) |
- ((urb_vs_start + urb_vs_size) << UF1_VS_FENCE_SHIFT));
- OUT_RING(((urb_cs_start + urb_cs_size) << UF2_CS_FENCE_SHIFT) |
- ((urb_sf_start + urb_sf_size) << UF2_SF_FENCE_SHIFT));
-
- /* Constant buffer state */
- OUT_RING(BRW_CS_URB_STATE | 0);
- OUT_RING(((URB_CS_ENTRY_SIZE - 1) << 4) | /* URB Entry Allocation Size */
- (URB_CS_ENTRIES << 0)); /* Number of URB Entries */
- ADVANCE_LP_RING();
- }
- {
- int nelem = pMask ? 3: 2;
- BEGIN_LP_RING(pMask?12:10);
- /* Set up the pointer to our vertex buffer */
- OUT_RING(BRW_3DSTATE_VERTEX_BUFFERS | 3);
- OUT_RING((0 << VB0_BUFFER_INDEX_SHIFT) |
- VB0_VERTEXDATA |
- ((4 * 2 * nelem) << VB0_BUFFER_PITCH_SHIFT));
- OUT_RING(state_base_offset + vb_offset);
- OUT_RING(2); // max index, prim has 4 coords
- OUT_RING(0); // ignore for VERTEXDATA, but still there
-
- /* Set up our vertex elements, sourced from the single vertex buffer. */
- OUT_RING(BRW_3DSTATE_VERTEX_ELEMENTS | ((2 * nelem) - 1));
- /* offset 0: X,Y -> {X, Y, 1.0, 1.0} */
- OUT_RING((0 << VE0_VERTEX_BUFFER_INDEX_SHIFT) |
- VE0_VALID |
- (BRW_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) |
- (0 << VE0_OFFSET_SHIFT));
- OUT_RING((BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT) |
- (BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT) |
- (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT) |
- (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT) |
- (0 << VE1_DESTINATION_ELEMENT_OFFSET_SHIFT));
- /* offset 8: S0, T0 -> {S0, T0, 1.0, 1.0} */
- OUT_RING((0 << VE0_VERTEX_BUFFER_INDEX_SHIFT) |
- VE0_VALID |
- (BRW_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) |
- (8 << VE0_OFFSET_SHIFT));
- OUT_RING((BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT) |
- (BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT) |
- (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT) |
- (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT) |
- (4 << VE1_DESTINATION_ELEMENT_OFFSET_SHIFT));
-
- if (pMask) {
- OUT_RING((0 << VE0_VERTEX_BUFFER_INDEX_SHIFT) |
- VE0_VALID |
- (BRW_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) |
- (16 << VE0_OFFSET_SHIFT));
- OUT_RING((BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT) |
- (BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT) |
- (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT) |
- (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT) |
- (8 << VE1_DESTINATION_ELEMENT_OFFSET_SHIFT));
- }
-
- ADVANCE_LP_RING();
- }
-
-#ifdef I830DEBUG
- ErrorF("try to sync to show any errors...");
- I830Sync(pScrn);
-#endif
- return TRUE;
-}
-
-void
-I965EXAComposite(PixmapPtr pDst, int srcX, int srcY, int maskX, int maskY,
- int dstX, int dstY, int w, int h)
-{
- ScrnInfoPtr pScrn = xf86Screens[pDst->drawable.pScreen->myNum];
- I830Ptr pI830 = I830PTR(pScrn);
- Bool has_mask;
- float src_x[3], src_y[3], mask_x[3], mask_y[3];
- int i;
-
- i830_get_transformed_coordinates(srcX, srcY,
- pI830->transform[0],
- &src_x[0], &src_y[0]);
- i830_get_transformed_coordinates(srcX, srcY + h,
- pI830->transform[0],
- &src_x[1], &src_y[1]);
- i830_get_transformed_coordinates(srcX + w, srcY + h,
- pI830->transform[0],
- &src_x[2], &src_y[2]);
-
- if (pI830->scale_units[1][0] == -1 || pI830->scale_units[1][1] == -1) {
- has_mask = FALSE;
- } else {
- has_mask = TRUE;
- i830_get_transformed_coordinates(maskX, maskY,
- pI830->transform[1],
- &mask_x[0], &mask_y[0]);
- i830_get_transformed_coordinates(maskX, maskY + h,
- pI830->transform[1],
- &mask_x[1], &mask_y[1]);
- i830_get_transformed_coordinates(maskX + w, maskY + h,
- pI830->transform[1],
- &mask_x[2], &mask_y[2]);
- }
-
- /* Wait for any existing composite rectangles to land before we overwrite
- * the VB with the next one.
- */
- i830WaitSync(pScrn);
-
- i = 0;
- /* rect (x2,y2) */
- vb[i++] = src_x[2] / pI830->scale_units[0][0];
- vb[i++] = src_y[2] / pI830->scale_units[0][1];
- if (has_mask) {
- vb[i++] = mask_x[2] / pI830->scale_units[1][0];
- vb[i++] = mask_y[2] / pI830->scale_units[1][1];
- }
- vb[i++] = (float)(dstX + w);
- vb[i++] = (float)(dstY + h);
-
- /* rect (x1,y2) */
- vb[i++] = src_x[1] / pI830->scale_units[0][0];
- vb[i++] = src_y[1] / pI830->scale_units[0][1];
- if (has_mask) {
- vb[i++] = mask_x[1] / pI830->scale_units[1][0];
- vb[i++] = mask_y[1] / pI830->scale_units[1][1];
- }
- vb[i++] = (float)dstX;
- vb[i++] = (float)(dstY + h);
-
- /* rect (x1,y1) */
- vb[i++] = src_x[0] / pI830->scale_units[0][0];
- vb[i++] = src_y[0] / pI830->scale_units[0][1];
- if (has_mask) {
- vb[i++] = mask_x[0] / pI830->scale_units[1][0];
- vb[i++] = mask_y[0] / pI830->scale_units[1][1];
- }
- vb[i++] = (float)dstX;
- vb[i++] = (float)dstY;
-
- {
- BEGIN_LP_RING(6);
- OUT_RING(BRW_3DPRIMITIVE |
- BRW_3DPRIMITIVE_VERTEX_SEQUENTIAL |
- (_3DPRIM_RECTLIST << BRW_3DPRIMITIVE_TOPOLOGY_SHIFT) |
- (0 << 9) | /* CTG - indirect vertex count */
- 4);
- OUT_RING(3); /* vertex count per instance */
- OUT_RING(0); /* start vertex offset */
- OUT_RING(1); /* single instance */
- OUT_RING(0); /* start instance location */
- OUT_RING(0); /* index buffer offset, ignored */
- ADVANCE_LP_RING();
- }
-#ifdef I830DEBUG
- ErrorF("sync after 3dprimitive");
- I830Sync(pScrn);
-#endif
- /* we must be sure that the pipeline is flushed before next exa draw,
- because that will be new state, binding state and instructions*/
- {
- BEGIN_LP_RING(4);
- OUT_RING(BRW_PIPE_CONTROL |
- BRW_PIPE_CONTROL_NOWRITE |
- BRW_PIPE_CONTROL_WC_FLUSH |
- BRW_PIPE_CONTROL_IS_FLUSH |
- (1 << 10) | /* XXX texture cache flush for BLC/CTG */
- 2);
- OUT_RING(0); /* Destination address */
- OUT_RING(0); /* Immediate data low DW */
- OUT_RING(0); /* Immediate data high DW */
- ADVANCE_LP_RING();
- }
-
- /* Mark sync so we can wait for it before setting up the VB on the next
- * rectangle.
- */
- i830MarkSync(pScrn);
-}
diff --git a/src/i965_render.c b/src/i965_render.c
new file mode 100644
index 0000000..99bd628
--- /dev/null
+++ b/src/i965_render.c
@@ -0,0 +1,1081 @@
+/*
+ * Copyright © 2006 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Authors:
+ * Wang Zhenyu <zhenyu.z.wang at intel.com>
+ * Eric Anholt <eric at anholt.net>
+ *
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include "xf86.h"
+#include "i830.h"
+#include "i915_reg.h"
+
+/* bring in brw structs */
+#include "brw_defines.h"
+#include "brw_structs.h"
+
+#ifdef I830DEBUG
+#define DEBUG_I830FALLBACK 1
+#endif
+
+#ifdef DEBUG_I830FALLBACK
+#define I830FALLBACK(s, arg...) \
+do { \
+ DPRINTF(PFX, "EXA fallback: " s "\n", ##arg); \
+ return FALSE; \
+} while(0)
+#else
+#define I830FALLBACK(s, arg...) \
+do { \
+ return FALSE; \
+} while(0)
+#endif
+
+static void I965GetBlendCntl(int op, PicturePtr pMask, CARD32 dst_format,
+ CARD32 *sblend, CARD32 *dblend);
+
+struct blendinfo {
+ Bool dst_alpha;
+ Bool src_alpha;
+ CARD32 src_blend;
+ CARD32 dst_blend;
+};
+
+struct formatinfo {
+ int fmt;
+ CARD32 card_fmt;
+};
+
+// refer vol2, 3d rasterization 3.8.1
+
+/* defined in brw_defines.h */
+static struct blendinfo I965BlendOp[] = {
+ /* Clear */
+ {0, 0, BRW_BLENDFACTOR_ZERO, BRW_BLENDFACTOR_ZERO},
+ /* Src */
+ {0, 0, BRW_BLENDFACTOR_ONE, BRW_BLENDFACTOR_ZERO},
+ /* Dst */
+ {0, 0, BRW_BLENDFACTOR_ZERO, BRW_BLENDFACTOR_ONE},
+ /* Over */
+ {0, 1, BRW_BLENDFACTOR_ONE, BRW_BLENDFACTOR_INV_SRC_ALPHA},
+ /* OverReverse */
+ {1, 0, BRW_BLENDFACTOR_INV_DST_ALPHA, BRW_BLENDFACTOR_ONE},
+ /* In */
+ {1, 0, BRW_BLENDFACTOR_DST_ALPHA, BRW_BLENDFACTOR_ZERO},
+ /* InReverse */
+ {0, 1, BRW_BLENDFACTOR_ZERO, BRW_BLENDFACTOR_SRC_ALPHA},
+ /* Out */
+ {1, 0, BRW_BLENDFACTOR_INV_DST_ALPHA, BRW_BLENDFACTOR_ZERO},
+ /* OutReverse */
+ {0, 1, BRW_BLENDFACTOR_ZERO, BRW_BLENDFACTOR_INV_SRC_ALPHA},
+ /* Atop */
+ {1, 1, BRW_BLENDFACTOR_DST_ALPHA, BRW_BLENDFACTOR_INV_SRC_ALPHA},
+ /* AtopReverse */
+ {1, 1, BRW_BLENDFACTOR_INV_DST_ALPHA, BRW_BLENDFACTOR_SRC_ALPHA},
+ /* Xor */
+ {1, 1, BRW_BLENDFACTOR_INV_DST_ALPHA, BRW_BLENDFACTOR_INV_SRC_ALPHA},
+ /* Add */
+ {0, 0, BRW_BLENDFACTOR_ONE, BRW_BLENDFACTOR_ONE},
+};
+
+/* FIXME: surface format defined in brw_defines.h, shared Sampling engine 1.7.2*/
+static struct formatinfo I965TexFormats[] = {
+ {PICT_a8r8g8b8, BRW_SURFACEFORMAT_B8G8R8A8_UNORM },
+ {PICT_x8r8g8b8, BRW_SURFACEFORMAT_B8G8R8X8_UNORM },
+ {PICT_a8b8g8r8, BRW_SURFACEFORMAT_R8G8B8A8_UNORM },
+ {PICT_x8b8g8r8, BRW_SURFACEFORMAT_R8G8B8X8_UNORM },
+ {PICT_r5g6b5, BRW_SURFACEFORMAT_B5G6R5_UNORM },
+ {PICT_a1r5g5b5, BRW_SURFACEFORMAT_B5G5R5A1_UNORM },
+ {PICT_a8, BRW_SURFACEFORMAT_A8_UNORM },
+};
+
+static void I965GetBlendCntl(int op, PicturePtr pMask, CARD32 dst_format,
+ CARD32 *sblend, CARD32 *dblend)
+{
+
+ *sblend = I965BlendOp[op].src_blend;
+ *dblend = I965BlendOp[op].dst_blend;
+
+ /* If there's no dst alpha channel, adjust the blend op so that we'll treat
+ * it as always 1.
+ */
+ if (PICT_FORMAT_A(dst_format) == 0 && I965BlendOp[op].dst_alpha) {
+ if (*sblend == BRW_BLENDFACTOR_DST_ALPHA)
+ *sblend = BRW_BLENDFACTOR_ONE;
+ else if (*sblend == BRW_BLENDFACTOR_INV_DST_ALPHA)
+ *sblend = BRW_BLENDFACTOR_ZERO;
+ }
+
+ /* If the source alpha is being used, then we should only be in a case where
+ * the source blend factor is 0, and the source blend value is the mask
+ * channels multiplied by the source picture's alpha.
+ */
+ if (pMask && pMask->componentAlpha && I965BlendOp[op].src_alpha) {
+ if (*dblend == BRW_BLENDFACTOR_SRC_ALPHA) {
+ *dblend = BRW_BLENDFACTOR_SRC_COLOR;
+ } else if (*dblend == BRW_BLENDFACTOR_INV_SRC_ALPHA) {
+ *dblend = BRW_BLENDFACTOR_INV_SRC_COLOR;
+ }
+ }
+
+}
+
+static Bool I965GetDestFormat(PicturePtr pDstPicture, CARD32 *dst_format)
+{
+ switch (pDstPicture->format) {
+ case PICT_a8r8g8b8:
+ case PICT_x8r8g8b8:
+ *dst_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
+ break;
+ case PICT_r5g6b5:
+ *dst_format = BRW_SURFACEFORMAT_B5G6R5_UNORM;
+ break;
+ case PICT_a1r5g5b5:
+ *dst_format = BRW_SURFACEFORMAT_B5G5R5A1_UNORM;
+ break;
+ case PICT_x1r5g5b5:
+ *dst_format = BRW_SURFACEFORMAT_B5G5R5X1_UNORM;
+ break;
+ /* COLR_BUF_8BIT is special for YUV surfaces. While we may end up being
+ * able to use it depending on how the hardware implements it, disable it
+ * for now while we don't know what exactly it does (what channel does it
+ * read from?
+ */
+ /*
+ case PICT_a8:
+ *dst_format = COLR_BUF_8BIT;
+ break;
+ */
+ case PICT_a4r4g4b4:
+ case PICT_x4r4g4b4:
+ *dst_format = BRW_SURFACEFORMAT_B4G4R4A4_UNORM;
+ break;
+ default:
+ I830FALLBACK("Unsupported dest format 0x%x\n",
+ (int)pDstPicture->format);
+ }
+
+ return TRUE;
+}
+
+static Bool I965CheckCompositeTexture(PicturePtr pPict, int unit)
+{
+ int w = pPict->pDrawable->width;
+ int h = pPict->pDrawable->height;
+ int i;
+
+ if ((w > 0x7ff) || (h > 0x7ff))
+ I830FALLBACK("Picture w/h too large (%dx%d)\n", w, h);
+
+ for (i = 0; i < sizeof(I965TexFormats) / sizeof(I965TexFormats[0]); i++)
+ {
+ if (I965TexFormats[i].fmt == pPict->format)
+ break;
+ }
+ if (i == sizeof(I965TexFormats) / sizeof(I965TexFormats[0]))
+ I830FALLBACK("Unsupported picture format 0x%x\n",
+ (int)pPict->format);
+
+ if (pPict->repeat && pPict->repeatType != RepeatNormal)
+ I830FALLBACK("extended repeat (%d) not supported\n",
+ pPict->repeatType);
+
+ if (pPict->filter != PictFilterNearest &&
+ pPict->filter != PictFilterBilinear)
+ I830FALLBACK("Unsupported filter 0x%x\n", pPict->filter);
+
+ return TRUE;
+}
+
+Bool
+I965EXACheckComposite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture,
+ PicturePtr pDstPicture)
+{
+ CARD32 tmp1;
+
+ /* Check for unsupported compositing operations. */
+ if (op >= sizeof(I965BlendOp) / sizeof(I965BlendOp[0]))
+ I830FALLBACK("Unsupported Composite op 0x%x\n", op);
+
+ if (pMaskPicture != NULL && pMaskPicture->componentAlpha) {
+ /* Check if it's component alpha that relies on a source alpha and on
+ * the source value. We can only get one of those into the single
+ * source value that we get to blend with.
+ */
+ if (I965BlendOp[op].src_alpha &&
+ (I965BlendOp[op].src_blend != BRW_BLENDFACTOR_ZERO))
+ I830FALLBACK("Component alpha not supported with source "
+ "alpha and source value blending.\n");
+ /* XXX: fallback now for mask with componentAlpha */
+ I830FALLBACK("mask componentAlpha not ready.\n");
+ }
+
+ if (!I965CheckCompositeTexture(pSrcPicture, 0))
+ I830FALLBACK("Check Src picture texture\n");
+ if (pMaskPicture != NULL && !I965CheckCompositeTexture(pMaskPicture, 1))
+ I830FALLBACK("Check Mask picture texture\n");
+
+ if (!I965GetDestFormat(pDstPicture, &tmp1))
+ I830FALLBACK("Get Color buffer format\n");
+
+ return TRUE;
+
+}
+
+#define ALIGN(i,m) (((i) + (m) - 1) & ~((m) - 1))
+#define MIN(a,b) ((a) < (b) ? (a) : (b))
+#define BRW_GRF_BLOCKS(nreg) ((nreg + 15) / 16 - 1)
+
+static int urb_vs_start, urb_vs_size;
+static int urb_gs_start, urb_gs_size;
+static int urb_clip_start, urb_clip_size;
+static int urb_sf_start, urb_sf_size;
+static int urb_cs_start, urb_cs_size;
+
+static struct brw_surface_state *dest_surf_state;
+static struct brw_surface_state *src_surf_state;
+static struct brw_surface_state *mask_surf_state;
+static struct brw_sampler_state *src_sampler_state;
+static struct brw_sampler_state *mask_sampler_state;
+static struct brw_sampler_default_color *default_color_state;
+
+static struct brw_vs_unit_state *vs_state;
+static struct brw_sf_unit_state *sf_state;
+static struct brw_wm_unit_state *wm_state;
+static struct brw_cc_unit_state *cc_state;
+static struct brw_cc_viewport *cc_viewport;
+
+static struct brw_instruction *sf_kernel;
+static struct brw_instruction *ps_kernel;
+static struct brw_instruction *sip_kernel;
+
+static CARD32 *binding_table;
+static int binding_table_entries;
+
+static int dest_surf_offset, src_surf_offset, mask_surf_offset;
+static int src_sampler_offset, mask_sampler_offset,vs_offset;
+static int sf_offset, wm_offset, cc_offset, vb_offset, cc_viewport_offset;
+static int sf_kernel_offset, ps_kernel_offset, sip_kernel_offset;
+static int wm_scratch_offset;
+static int binding_table_offset;
+static int default_color_offset;
+static int next_offset, total_state_size;
+static char *state_base;
+static int state_base_offset;
+static float *vb;
+static int vb_size = (4 * 4) * 4 ; /* 4 DWORDS per vertex*/
+
+static CARD32 src_blend, dst_blend;
+
+static const CARD32 sip_kernel_static[][4] = {
+/* wait (1) a0<1>UW a145<0,1,0>UW { align1 + } */
+ { 0x00000030, 0x20000108, 0x00001220, 0x00000000 },
+/* nop (4) g0<1>UD { align1 + } */
+ { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
+/* nop (4) g0<1>UD { align1 + } */
+ { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
+/* nop (4) g0<1>UD { align1 + } */
+ { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
+/* nop (4) g0<1>UD { align1 + } */
+ { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
+/* nop (4) g0<1>UD { align1 + } */
+ { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
+/* nop (4) g0<1>UD { align1 + } */
+ { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
+/* nop (4) g0<1>UD { align1 + } */
+ { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
+/* nop (4) g0<1>UD { align1 + } */
+ { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
+/* nop (4) g0<1>UD { align1 + } */
+ { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
+};
+
+/*
+ * this program computes dA/dx and dA/dy for the texture coordinates along
+ * with the base texture coordinate. It was extracted from the Mesa driver
+ */
+
+#define SF_KERNEL_NUM_GRF 16
+#define SF_MAX_THREADS 1
+
+static const CARD32 sf_kernel_static[][4] = {
+#include "exa_sf_prog.h"
+};
+
+static const CARD32 sf_kernel_static_mask[][4] = {
+#include "exa_sf_mask_prog.h"
+};
+
+/* ps kernels */
+#define PS_KERNEL_NUM_GRF 32
+#define PS_MAX_THREADS 32
+/* 1: no mask */
+static const CARD32 ps_kernel_static_nomask [][4] = {
+#include "exa_wm_nomask_prog.h"
+};
+
+/* 2: mask with componentAlpha, src * mask color, XXX: later */
+static const CARD32 ps_kernel_static_maskca [][4] = {
+/*#include "i965_composite_wm_maskca.h" */
+};
+
+/* 3: mask without componentAlpha, src * mask alpha */
+static const CARD32 ps_kernel_static_masknoca [][4] = {
+#include "exa_wm_masknoca_prog.h"
+};
+
+static CARD32 i965_get_card_format(PicturePtr pPict)
+{
+ int i;
+ for (i = 0; i < sizeof(I965TexFormats) / sizeof(I965TexFormats[0]); i++) {
+ if (I965TexFormats[i].fmt == pPict->format)
+ break;
+ }
+ return I965TexFormats[i].card_fmt;
+}
+
+Bool
+I965EXAPrepareComposite(int op, PicturePtr pSrcPicture,
+ PicturePtr pMaskPicture, PicturePtr pDstPicture,
+ PixmapPtr pSrc, PixmapPtr pMask, PixmapPtr pDst)
+{
+ ScrnInfoPtr pScrn = xf86Screens[pSrcPicture->pDrawable->pScreen->myNum];
+ I830Ptr pI830 = I830PTR(pScrn);
+ CARD32 src_offset, src_pitch;
+ CARD32 mask_offset = 0, mask_pitch = 0;
+ CARD32 dst_format, dst_offset, dst_pitch;
+
+#ifdef XF86DRI
+ if (pI830->directRenderingEnabled) {
+ drmI830Sarea *pSAREAPriv = DRIGetSAREAPrivate(pScrn->pScreen);
+
+ pSAREAPriv->ctxOwner = DRIGetContext(pScrn->pScreen);
+ }
+#endif
+
+ pI830->last_3d = LAST_3D_RENDER;
+
+ src_offset = intel_get_pixmap_offset(pSrc);
+ src_pitch = intel_get_pixmap_pitch(pSrc);
+ dst_offset = intel_get_pixmap_offset(pDst);
+ dst_pitch = intel_get_pixmap_pitch(pDst);
+ if (pMask) {
+ mask_offset = intel_get_pixmap_offset(pMask);
+ mask_pitch = intel_get_pixmap_pitch(pMask);
+ }
+ pI830->scale_units[0][0] = pSrc->drawable.width;
+ pI830->scale_units[0][1] = pSrc->drawable.height;
+
+ pI830->transform[0] = pSrcPicture->transform;
+
+ if (!pMask) {
+ pI830->transform[1] = NULL;
+ pI830->scale_units[1][0] = -1;
+ pI830->scale_units[1][1] = -1;
+ } else {
+ pI830->transform[1] = pMaskPicture->transform;
+ pI830->scale_units[1][0] = pMask->drawable.width;
+ pI830->scale_units[1][1] = pMask->drawable.height;
+ }
+
+ /* setup 3d pipeline state */
+
+ binding_table_entries = 2; /* default no mask */
+
+ /* Wait for sync before we start setting up our new state */
+ i830WaitSync(pScrn);
+
+ /* Set up our layout of state in framebuffer. First the general state: */
+ next_offset = 0;
+ vs_offset = ALIGN(next_offset, 64);
+ next_offset = vs_offset + sizeof(*vs_state);
+
+ sf_offset = ALIGN(next_offset, 32);
+ next_offset = sf_offset + sizeof(*sf_state);
+
+ wm_offset = ALIGN(next_offset, 32);
+ next_offset = wm_offset + sizeof(*wm_state);
+
+ wm_scratch_offset = ALIGN(next_offset, 1024);
+ next_offset = wm_scratch_offset + 1024 * PS_MAX_THREADS;
+
+ cc_offset = ALIGN(next_offset, 32);
+ next_offset = cc_offset + sizeof(*cc_state);
+
+ /* keep current sf_kernel, which will send one setup urb entry to
+ PS kernel */
+ sf_kernel_offset = ALIGN(next_offset, 64);
+ if (pMask)
+ next_offset = sf_kernel_offset + sizeof (sf_kernel_static_mask);
+ else
+ next_offset = sf_kernel_offset + sizeof (sf_kernel_static);
+
+ //XXX: ps_kernel may be seperated, fix with offset
+ ps_kernel_offset = ALIGN(next_offset, 64);
+ if (pMask) {
+ if (pMaskPicture->componentAlpha)
+ next_offset = ps_kernel_offset + sizeof(ps_kernel_static_maskca);
+ else
+ next_offset = ps_kernel_offset + sizeof(ps_kernel_static_masknoca);
+ } else
+ next_offset = ps_kernel_offset + sizeof (ps_kernel_static_nomask);
+
+ sip_kernel_offset = ALIGN(next_offset, 64);
+ next_offset = sip_kernel_offset + sizeof (sip_kernel_static);
+
+ // needed?
+ cc_viewport_offset = ALIGN(next_offset, 32);
+ next_offset = cc_viewport_offset + sizeof(*cc_viewport);
+
+ // for texture sampler
+ src_sampler_offset = ALIGN(next_offset, 32);
+ next_offset = src_sampler_offset + sizeof(*src_sampler_state);
+
+ if (pMask) {
+ mask_sampler_offset = ALIGN(next_offset, 32);
+ next_offset = mask_sampler_offset + sizeof(*mask_sampler_state);
+ }
+ /* Align VB to native size of elements, for safety */
+ vb_offset = ALIGN(next_offset, 8);
+ next_offset = vb_offset + vb_size;
+
+ /* And then the general state: */
+ dest_surf_offset = ALIGN(next_offset, 32);
+ next_offset = dest_surf_offset + sizeof(*dest_surf_state);
+
+ src_surf_offset = ALIGN(next_offset, 32);
+ next_offset = src_surf_offset + sizeof(*src_surf_state);
+
+ if (pMask) {
+ mask_surf_offset = ALIGN(next_offset, 32);
+ next_offset = mask_surf_offset + sizeof(*mask_surf_state);
+ binding_table_entries = 3;
+ }
+
+ binding_table_offset = ALIGN(next_offset, 32);
+ next_offset = binding_table_offset + (binding_table_entries * 4);
+
+ default_color_offset = ALIGN(next_offset, 32);
+ next_offset = default_color_offset + sizeof(*default_color_state);
+
+ total_state_size = next_offset;
+ assert(total_state_size < EXA_LINEAR_EXTRA);
+
+ state_base_offset = pI830->EXAStateMem.Start;
+ state_base_offset = ALIGN(state_base_offset, 64);
+ state_base = (char *)(pI830->FbBase + state_base_offset);
+
+ vs_state = (void *)(state_base + vs_offset);
+ sf_state = (void *)(state_base + sf_offset);
+ wm_state = (void *)(state_base + wm_offset);
+ cc_state = (void *)(state_base + cc_offset);
+ sf_kernel = (void *)(state_base + sf_kernel_offset);
+ ps_kernel = (void *)(state_base + ps_kernel_offset);
+ sip_kernel = (void *)(state_base + sip_kernel_offset);
+
+ cc_viewport = (void *)(state_base + cc_viewport_offset);
+
+ dest_surf_state = (void *)(state_base + dest_surf_offset);
+ src_surf_state = (void *)(state_base + src_surf_offset);
+ if (pMask)
+ mask_surf_state = (void *)(state_base + mask_surf_offset);
+
+ src_sampler_state = (void *)(state_base + src_sampler_offset);
+ if (pMask)
+ mask_sampler_state = (void *)(state_base + mask_sampler_offset);
+
+ binding_table = (void *)(state_base + binding_table_offset);
+
+ vb = (void *)(state_base + vb_offset);
+
+ default_color_state = (void*)(state_base + default_color_offset);
+
+ /* Set up a default static partitioning of the URB, which is supposed to
+ * allow anything we would want to do, at potentially lower performance.
+ */
+#define URB_CS_ENTRY_SIZE 0
+#define URB_CS_ENTRIES 0
+
+#define URB_VS_ENTRY_SIZE 1 // each 512-bit row
+#define URB_VS_ENTRIES 8 // we needs at least 8 entries
+
+#define URB_GS_ENTRY_SIZE 0
+#define URB_GS_ENTRIES 0
+
+#define URB_CLIP_ENTRY_SIZE 0
+#define URB_CLIP_ENTRIES 0
+
+#define URB_SF_ENTRY_SIZE 2
+#define URB_SF_ENTRIES 1
+
+ urb_vs_start = 0;
+ urb_vs_size = URB_VS_ENTRIES * URB_VS_ENTRY_SIZE;
+ urb_gs_start = urb_vs_start + urb_vs_size;
+ urb_gs_size = URB_GS_ENTRIES * URB_GS_ENTRY_SIZE;
+ urb_clip_start = urb_gs_start + urb_gs_size;
+ urb_clip_size = URB_CLIP_ENTRIES * URB_CLIP_ENTRY_SIZE;
+ urb_sf_start = urb_clip_start + urb_clip_size;
+ urb_sf_size = URB_SF_ENTRIES * URB_SF_ENTRY_SIZE;
+ urb_cs_start = urb_sf_start + urb_sf_size;
+ urb_cs_size = URB_CS_ENTRIES * URB_CS_ENTRY_SIZE;
+
+ /* We'll be poking the state buffers that could be in use by the 3d hardware
+ * here, but we should have synced the 3D engine already in I830PutImage.
+ */
+
+ memset (cc_viewport, 0, sizeof (*cc_viewport));
+ cc_viewport->min_depth = -1.e35;
+ cc_viewport->max_depth = 1.e35;
+
+ /* Color calculator state */
+ memset(cc_state, 0, sizeof(*cc_state));
+ cc_state->cc0.stencil_enable = 0; /* disable stencil */
+ cc_state->cc2.depth_test = 0; /* disable depth test */
+ cc_state->cc2.logicop_enable = 0; /* disable logic op */
+ cc_state->cc3.ia_blend_enable = 1; /* blend alpha just like colors */
+ cc_state->cc3.blend_enable = 1; /* enable color blend */
+ cc_state->cc3.alpha_test = 0; /* disable alpha test */
+ cc_state->cc4.cc_viewport_state_offset = (state_base_offset + cc_viewport_offset) >> 5;
+ cc_state->cc5.dither_enable = 0; /* disable dither */
+ cc_state->cc5.logicop_func = 0xc; /* COPY */
+ cc_state->cc5.statistics_enable = 1;
+ cc_state->cc5.ia_blend_function = BRW_BLENDFUNCTION_ADD;
+ I965GetBlendCntl(op, pMaskPicture, pDstPicture->format,
+ &src_blend, &dst_blend);
+ /* XXX: alpha blend factor should be same as color, but check
+ for CA case in future */
+ cc_state->cc5.ia_src_blend_factor = src_blend;
+ cc_state->cc5.ia_dest_blend_factor = dst_blend;
+ cc_state->cc6.blend_function = BRW_BLENDFUNCTION_ADD;
+ cc_state->cc6.src_blend_factor = src_blend;
+ cc_state->cc6.dest_blend_factor = dst_blend;
+ cc_state->cc6.clamp_post_alpha_blend = 1;
+ cc_state->cc6.clamp_pre_alpha_blend = 1;
+ cc_state->cc6.clamp_range = 0; /* clamp range [0,1] */
+
+ /* Upload system kernel */
+ memcpy (sip_kernel, sip_kernel_static, sizeof (sip_kernel_static));
+
+ /* Set up the state buffer for the destination surface */
+ memset(dest_surf_state, 0, sizeof(*dest_surf_state));
+ dest_surf_state->ss0.surface_type = BRW_SURFACE_2D;
+ dest_surf_state->ss0.data_return_format = BRW_SURFACERETURNFORMAT_FLOAT32;
+ I965GetDestFormat(pDstPicture, &dst_format);
+ dest_surf_state->ss0.surface_format = dst_format;
+
+ dest_surf_state->ss0.writedisable_alpha = 0;
+ dest_surf_state->ss0.writedisable_red = 0;
+ dest_surf_state->ss0.writedisable_green = 0;
+ dest_surf_state->ss0.writedisable_blue = 0;
+ dest_surf_state->ss0.color_blend = 1;
+ dest_surf_state->ss0.vert_line_stride = 0;
+ dest_surf_state->ss0.vert_line_stride_ofs = 0;
+ dest_surf_state->ss0.mipmap_layout_mode = 0;
+ dest_surf_state->ss0.render_cache_read_mode = 0;
+
+ dest_surf_state->ss1.base_addr = dst_offset;
+ dest_surf_state->ss2.height = pDst->drawable.height - 1;
+ dest_surf_state->ss2.width = pDst->drawable.width - 1;
+ dest_surf_state->ss2.mip_count = 0;
+ dest_surf_state->ss2.render_target_rotation = 0;
+ dest_surf_state->ss3.pitch = dst_pitch - 1;
+
+ /* Set up the source surface state buffer */
+ memset(src_surf_state, 0, sizeof(*src_surf_state));
+ src_surf_state->ss0.surface_type = BRW_SURFACE_2D;
+ src_surf_state->ss0.surface_format = i965_get_card_format(pSrcPicture);
+
+ src_surf_state->ss0.writedisable_alpha = 0;
+ src_surf_state->ss0.writedisable_red = 0;
+ src_surf_state->ss0.writedisable_green = 0;
+ src_surf_state->ss0.writedisable_blue = 0;
+ src_surf_state->ss0.color_blend = 1;
+ src_surf_state->ss0.vert_line_stride = 0;
+ src_surf_state->ss0.vert_line_stride_ofs = 0;
+ src_surf_state->ss0.mipmap_layout_mode = 0;
+ src_surf_state->ss0.render_cache_read_mode = 0;
+
+ src_surf_state->ss1.base_addr = src_offset;
+ src_surf_state->ss2.width = pSrc->drawable.width - 1;
+ src_surf_state->ss2.height = pSrc->drawable.height - 1;
+ src_surf_state->ss2.mip_count = 0;
+ src_surf_state->ss2.render_target_rotation = 0;
+ src_surf_state->ss3.pitch = src_pitch - 1;
+
+ /* setup mask surface */
+ if (pMask) {
+ memset(mask_surf_state, 0, sizeof(*mask_surf_state));
+ mask_surf_state->ss0.surface_type = BRW_SURFACE_2D;
+ mask_surf_state->ss0.surface_format = i965_get_card_format(pMaskPicture);
+
+ mask_surf_state->ss0.writedisable_alpha = 0;
+ mask_surf_state->ss0.writedisable_red = 0;
+ mask_surf_state->ss0.writedisable_green = 0;
+ mask_surf_state->ss0.writedisable_blue = 0;
+ mask_surf_state->ss0.color_blend = 1;
+ mask_surf_state->ss0.vert_line_stride = 0;
+ mask_surf_state->ss0.vert_line_stride_ofs = 0;
+ mask_surf_state->ss0.mipmap_layout_mode = 0;
+ mask_surf_state->ss0.render_cache_read_mode = 0;
+
+ mask_surf_state->ss1.base_addr = mask_offset;
+ mask_surf_state->ss2.width = pMask->drawable.width - 1;
+ mask_surf_state->ss2.height = pMask->drawable.height - 1;
+ mask_surf_state->ss2.mip_count = 0;
+ mask_surf_state->ss2.render_target_rotation = 0;
+ mask_surf_state->ss3.pitch = mask_pitch - 1;
+ }
+
+ /* Set up a binding table for our surfaces. Only the PS will use it */
+ binding_table[0] = state_base_offset + dest_surf_offset;
+ binding_table[1] = state_base_offset + src_surf_offset;
+ if (pMask)
+ binding_table[2] = state_base_offset + mask_surf_offset;
+
+ /* PS kernel use this sampler */
+ memset(src_sampler_state, 0, sizeof(*src_sampler_state));
+ src_sampler_state->ss0.lod_preclamp = 1; /* GL mode */
+ switch(pSrcPicture->filter) {
+ case PictFilterNearest:
+ src_sampler_state->ss0.min_filter = BRW_MAPFILTER_NEAREST;
+ src_sampler_state->ss0.mag_filter = BRW_MAPFILTER_NEAREST;
+ break;
+ case PictFilterBilinear:
+ src_sampler_state->ss0.min_filter = BRW_MAPFILTER_LINEAR;
+ src_sampler_state->ss0.mag_filter = BRW_MAPFILTER_LINEAR;
+ break;
+ default:
+ I830FALLBACK("Bad filter 0x%x\n", pSrcPicture->filter);
+ }
+
+ memset(default_color_state, 0, sizeof(*default_color_state));
+ default_color_state->color[0] = 0.0; /* R */
+ default_color_state->color[1] = 0.0; /* G */
+ default_color_state->color[2] = 0.0; /* B */
+ default_color_state->color[3] = 1.0; /* A */
+
+ src_sampler_state->ss0.default_color_mode = 0; /* GL mode */
+
+ if (!pSrcPicture->repeat) {
+ src_sampler_state->ss1.r_wrap_mode = BRW_TEXCOORDMODE_CLAMP_BORDER;
+ src_sampler_state->ss1.s_wrap_mode = BRW_TEXCOORDMODE_CLAMP_BORDER;
+ src_sampler_state->ss1.t_wrap_mode = BRW_TEXCOORDMODE_CLAMP_BORDER;
+ src_sampler_state->ss2.default_color_pointer =
+ (state_base_offset + default_color_offset) >> 5;
+ } else {
+ src_sampler_state->ss1.r_wrap_mode = BRW_TEXCOORDMODE_WRAP;
+ src_sampler_state->ss1.s_wrap_mode = BRW_TEXCOORDMODE_WRAP;
+ src_sampler_state->ss1.t_wrap_mode = BRW_TEXCOORDMODE_WRAP;
+ }
+ src_sampler_state->ss3.chroma_key_enable = 0; /* disable chromakey */
+
+ if (pMask) {
+ memset(mask_sampler_state, 0, sizeof(*mask_sampler_state));
+ mask_sampler_state->ss0.lod_preclamp = 1; /* GL mode */
+ switch(pMaskPicture->filter) {
+ case PictFilterNearest:
+ mask_sampler_state->ss0.min_filter = BRW_MAPFILTER_NEAREST;
+ mask_sampler_state->ss0.mag_filter = BRW_MAPFILTER_NEAREST;
+ break;
+ case PictFilterBilinear:
+ mask_sampler_state->ss0.min_filter = BRW_MAPFILTER_LINEAR;
+ mask_sampler_state->ss0.mag_filter = BRW_MAPFILTER_LINEAR;
+ break;
+ default:
+ I830FALLBACK("Bad filter 0x%x\n", pMaskPicture->filter);
+ }
+
+ if (!pMaskPicture->repeat) {
+ mask_sampler_state->ss1.r_wrap_mode = BRW_TEXCOORDMODE_CLAMP_BORDER;
+ mask_sampler_state->ss1.s_wrap_mode = BRW_TEXCOORDMODE_CLAMP_BORDER;
+ mask_sampler_state->ss1.t_wrap_mode = BRW_TEXCOORDMODE_CLAMP_BORDER;
+ mask_sampler_state->ss2.default_color_pointer =
+ (state_base_offset + default_color_offset)>>5;
+ } else {
+ mask_sampler_state->ss1.r_wrap_mode = BRW_TEXCOORDMODE_WRAP;
+ mask_sampler_state->ss1.s_wrap_mode = BRW_TEXCOORDMODE_WRAP;
+ mask_sampler_state->ss1.t_wrap_mode = BRW_TEXCOORDMODE_WRAP;
+ }
+ mask_sampler_state->ss3.chroma_key_enable = 0; /* disable chromakey */
+ }
+
+ /* Set up the vertex shader to be disabled (passthrough) */
+ memset(vs_state, 0, sizeof(*vs_state));
+ vs_state->thread4.nr_urb_entries = URB_VS_ENTRIES;
+ vs_state->thread4.urb_entry_allocation_size = URB_VS_ENTRY_SIZE - 1;
+ vs_state->vs6.vs_enable = 0;
+ vs_state->vs6.vert_cache_disable = 1;
+
+ // XXX: sf_kernel? keep it as now
+ /* Set up the SF kernel to do coord interp: for each attribute,
+ * calculate dA/dx and dA/dy. Hand these interpolation coefficients
+ * back to SF which then hands pixels off to WM.
+ */
+ if (pMask)
+ memcpy (sf_kernel, sf_kernel_static_mask, sizeof (sf_kernel_static));
+ else
+ memcpy (sf_kernel, sf_kernel_static, sizeof (sf_kernel_static));
+
+ memset(sf_state, 0, sizeof(*sf_state));
+ sf_state->thread0.kernel_start_pointer =
+ (state_base_offset + sf_kernel_offset) >> 6;
+ sf_state->thread0.grf_reg_count = BRW_GRF_BLOCKS(SF_KERNEL_NUM_GRF);
+ sf_state->sf1.single_program_flow = 1;
+ sf_state->sf1.binding_table_entry_count = 0;
+ sf_state->sf1.thread_priority = 0;
+ sf_state->sf1.floating_point_mode = 0; /* Mesa does this */
+ sf_state->sf1.illegal_op_exception_enable = 1;
+ sf_state->sf1.mask_stack_exception_enable = 1;
+ sf_state->sf1.sw_exception_enable = 1;
+ sf_state->thread2.per_thread_scratch_space = 0;
+ sf_state->thread2.scratch_space_base_pointer = 0; /* not used in our kernel */
+ sf_state->thread3.const_urb_entry_read_length = 0; /* no const URBs */
+ sf_state->thread3.const_urb_entry_read_offset = 0; /* no const URBs */
+ sf_state->thread3.urb_entry_read_length = 1; /* 1 URB per vertex */
+ sf_state->thread3.urb_entry_read_offset = 0;
+ sf_state->thread3.dispatch_grf_start_reg = 3;
+ sf_state->thread4.max_threads = SF_MAX_THREADS - 1;
+ sf_state->thread4.urb_entry_allocation_size = URB_SF_ENTRY_SIZE - 1;
+ sf_state->thread4.nr_urb_entries = URB_SF_ENTRIES;
+ sf_state->thread4.stats_enable = 1;
+ sf_state->sf5.viewport_transform = FALSE; /* skip viewport */
+ sf_state->sf6.cull_mode = BRW_CULLMODE_NONE;
+ sf_state->sf6.scissor = 0;
+ sf_state->sf7.trifan_pv = 2;
+ sf_state->sf6.dest_org_vbias = 0x8;
+ sf_state->sf6.dest_org_hbias = 0x8;
+
+ /* Set up the PS kernel (dispatched by WM)
+ */
+
+ if (pMask) {
+ if (pMaskPicture->componentAlpha)
+ memcpy (ps_kernel, ps_kernel_static_maskca, sizeof (ps_kernel_static_maskca));
+ else
+ memcpy (ps_kernel, ps_kernel_static_masknoca, sizeof (ps_kernel_static_masknoca));
+ } else
+ memcpy (ps_kernel, ps_kernel_static_nomask, sizeof (ps_kernel_static_nomask));
+
+ memset (wm_state, 0, sizeof (*wm_state));
+ wm_state->thread0.kernel_start_pointer =
+ (state_base_offset + ps_kernel_offset) >> 6;
+ wm_state->thread0.grf_reg_count = BRW_GRF_BLOCKS(PS_KERNEL_NUM_GRF);
+ wm_state->thread1.single_program_flow = 1;
+ if (!pMask)
+ wm_state->thread1.binding_table_entry_count = 2; /* 1 tex and fb */
+ else
+ wm_state->thread1.binding_table_entry_count = 3; /* 2 tex and fb */
+
+ wm_state->thread2.scratch_space_base_pointer = (state_base_offset +
+ wm_scratch_offset)>>10;
+ wm_state->thread2.per_thread_scratch_space = 0;
+ // XXX: urb allocation
+ wm_state->thread3.const_urb_entry_read_length = 0;
+ wm_state->thread3.const_urb_entry_read_offset = 0;
+ if (pMask)
+ wm_state->thread3.urb_entry_read_length = 2; /* two per pair of attrib */
+ else
+ wm_state->thread3.urb_entry_read_length = 1; /* one per pair of attrib */
+ wm_state->thread3.urb_entry_read_offset = 0;
+ // wm kernel use urb from 3, see wm_program in compiler module
+ wm_state->thread3.dispatch_grf_start_reg = 3; /* must match kernel */
+
+ wm_state->wm4.stats_enable = 1; /* statistic */
+ wm_state->wm4.sampler_state_pointer = (state_base_offset + src_sampler_offset) >> 5;
+ wm_state->wm4.sampler_count = 1; /* 1-4 samplers used */
+ wm_state->wm5.max_threads = PS_MAX_THREADS - 1;
+ wm_state->wm5.thread_dispatch_enable = 1;
+ //just use 16-pixel dispatch (4 subspans), don't need to change kernel start point
+ wm_state->wm5.enable_16_pix = 1;
+ wm_state->wm5.enable_8_pix = 0;
+ wm_state->wm5.early_depth_test = 1;
+
+ /* Begin the long sequence of commands needed to set up the 3D
+ * rendering pipe
+ */
+ {
+ BEGIN_LP_RING(2);
+ OUT_RING(MI_FLUSH |
+ MI_STATE_INSTRUCTION_CACHE_FLUSH |
+ BRW_MI_GLOBAL_SNAPSHOT_RESET);
+ OUT_RING(MI_NOOP);
+ ADVANCE_LP_RING();
+ }
+ {
+ BEGIN_LP_RING(12);
+
+ /* Match Mesa driver setup */
+ OUT_RING(BRW_PIPELINE_SELECT | PIPELINE_SELECT_3D);
+
+ OUT_RING(BRW_CS_URB_STATE | 0);
+ OUT_RING((0 << 4) | /* URB Entry Allocation Size */
+ (0 << 0)); /* Number of URB Entries */
+
+ /* Zero out the two base address registers so all offsets are absolute */
+ OUT_RING(BRW_STATE_BASE_ADDRESS | 4);
+ OUT_RING(0 | BASE_ADDRESS_MODIFY); /* Generate state base address */
+ OUT_RING(0 | BASE_ADDRESS_MODIFY); /* Surface state base address */
+ OUT_RING(0 | BASE_ADDRESS_MODIFY); /* media base addr, don't care */
+ OUT_RING(0x10000000 | BASE_ADDRESS_MODIFY); /* general state max addr, disabled */
+ OUT_RING(0x10000000 | BASE_ADDRESS_MODIFY); /* media object state max addr, disabled */
+
+ /* Set system instruction pointer */
+ OUT_RING(BRW_STATE_SIP | 0);
+ OUT_RING(state_base_offset + sip_kernel_offset); /* system instruction pointer */
+ OUT_RING(MI_NOOP);
+ ADVANCE_LP_RING();
+ }
+ {
+ BEGIN_LP_RING(26);
+ /* Pipe control */
+ OUT_RING(BRW_PIPE_CONTROL |
+ BRW_PIPE_CONTROL_NOWRITE |
+ BRW_PIPE_CONTROL_IS_FLUSH |
+ 2);
+ OUT_RING(0); /* Destination address */
+ OUT_RING(0); /* Immediate data low DW */
+ OUT_RING(0); /* Immediate data high DW */
+
+ /* Binding table pointers */
+ OUT_RING(BRW_3DSTATE_BINDING_TABLE_POINTERS | 4);
+ OUT_RING(0); /* vs */
+ OUT_RING(0); /* gs */
+ OUT_RING(0); /* clip */
+ OUT_RING(0); /* sf */
+ /* Only the PS uses the binding table */
+ OUT_RING(state_base_offset + binding_table_offset); /* ps */
+
+ /* The drawing rectangle clipping is always on. Set it to values that
+ * shouldn't do any clipping.
+ */
+ OUT_RING(BRW_3DSTATE_DRAWING_RECTANGLE | 2); /* XXX 3 for BLC or CTG */
+ OUT_RING(0x00000000); /* ymin, xmin */
+ OUT_RING((pScrn->virtualX - 1) |
+ (pScrn->virtualY - 1) << 16); /* ymax, xmax */
+ OUT_RING(0x00000000); /* yorigin, xorigin */
+
+ /* skip the depth buffer */
+ /* skip the polygon stipple */
+ /* skip the polygon stipple offset */
+ /* skip the line stipple */
+
+ /* Set the pointers to the 3d pipeline state */
+ OUT_RING(BRW_3DSTATE_PIPELINED_POINTERS | 5);
+ OUT_RING(state_base_offset + vs_offset); /* 32 byte aligned */
+ OUT_RING(BRW_GS_DISABLE); /* disable GS, resulting in passthrough */
+ OUT_RING(BRW_CLIP_DISABLE); /* disable CLIP, resulting in passthrough */
+ OUT_RING(state_base_offset + sf_offset); /* 32 byte aligned */
+ OUT_RING(state_base_offset + wm_offset); /* 32 byte aligned */
+ OUT_RING(state_base_offset + cc_offset); /* 64 byte aligned */
+
+ /* URB fence */
+ OUT_RING(BRW_URB_FENCE |
+ UF0_CS_REALLOC |
+ UF0_SF_REALLOC |
+ UF0_CLIP_REALLOC |
+ UF0_GS_REALLOC |
+ UF0_VS_REALLOC |
+ 1);
+ OUT_RING(((urb_clip_start + urb_clip_size) << UF1_CLIP_FENCE_SHIFT) |
+ ((urb_gs_start + urb_gs_size) << UF1_GS_FENCE_SHIFT) |
+ ((urb_vs_start + urb_vs_size) << UF1_VS_FENCE_SHIFT));
+ OUT_RING(((urb_cs_start + urb_cs_size) << UF2_CS_FENCE_SHIFT) |
+ ((urb_sf_start + urb_sf_size) << UF2_SF_FENCE_SHIFT));
+
+ /* Constant buffer state */
+ OUT_RING(BRW_CS_URB_STATE | 0);
+ OUT_RING(((URB_CS_ENTRY_SIZE - 1) << 4) | /* URB Entry Allocation Size */
+ (URB_CS_ENTRIES << 0)); /* Number of URB Entries */
+ ADVANCE_LP_RING();
+ }
+ {
+ int nelem = pMask ? 3: 2;
+ BEGIN_LP_RING(pMask?12:10);
+ /* Set up the pointer to our vertex buffer */
+ OUT_RING(BRW_3DSTATE_VERTEX_BUFFERS | 3);
+ OUT_RING((0 << VB0_BUFFER_INDEX_SHIFT) |
+ VB0_VERTEXDATA |
+ ((4 * 2 * nelem) << VB0_BUFFER_PITCH_SHIFT));
+ OUT_RING(state_base_offset + vb_offset);
+ OUT_RING(2); // max index, prim has 4 coords
+ OUT_RING(0); // ignore for VERTEXDATA, but still there
+
+ /* Set up our vertex elements, sourced from the single vertex buffer. */
+ OUT_RING(BRW_3DSTATE_VERTEX_ELEMENTS | ((2 * nelem) - 1));
+ /* offset 0: X,Y -> {X, Y, 1.0, 1.0} */
+ OUT_RING((0 << VE0_VERTEX_BUFFER_INDEX_SHIFT) |
+ VE0_VALID |
+ (BRW_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) |
+ (0 << VE0_OFFSET_SHIFT));
+ OUT_RING((BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT) |
+ (BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT) |
+ (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT) |
+ (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT) |
+ (0 << VE1_DESTINATION_ELEMENT_OFFSET_SHIFT));
+ /* offset 8: S0, T0 -> {S0, T0, 1.0, 1.0} */
+ OUT_RING((0 << VE0_VERTEX_BUFFER_INDEX_SHIFT) |
+ VE0_VALID |
+ (BRW_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) |
+ (8 << VE0_OFFSET_SHIFT));
+ OUT_RING((BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT) |
+ (BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT) |
+ (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT) |
+ (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT) |
+ (4 << VE1_DESTINATION_ELEMENT_OFFSET_SHIFT));
+
+ if (pMask) {
+ OUT_RING((0 << VE0_VERTEX_BUFFER_INDEX_SHIFT) |
+ VE0_VALID |
+ (BRW_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) |
+ (16 << VE0_OFFSET_SHIFT));
+ OUT_RING((BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT) |
+ (BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT) |
+ (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT) |
+ (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT) |
+ (8 << VE1_DESTINATION_ELEMENT_OFFSET_SHIFT));
+ }
+
+ ADVANCE_LP_RING();
+ }
+
+#ifdef I830DEBUG
+ ErrorF("try to sync to show any errors...");
+ I830Sync(pScrn);
+#endif
+ return TRUE;
+}
+
+void
+I965EXAComposite(PixmapPtr pDst, int srcX, int srcY, int maskX, int maskY,
+ int dstX, int dstY, int w, int h)
+{
+ ScrnInfoPtr pScrn = xf86Screens[pDst->drawable.pScreen->myNum];
+ I830Ptr pI830 = I830PTR(pScrn);
+ Bool has_mask;
+ float src_x[3], src_y[3], mask_x[3], mask_y[3];
+ int i;
+
+ i830_get_transformed_coordinates(srcX, srcY,
+ pI830->transform[0],
+ &src_x[0], &src_y[0]);
+ i830_get_transformed_coordinates(srcX, srcY + h,
+ pI830->transform[0],
+ &src_x[1], &src_y[1]);
+ i830_get_transformed_coordinates(srcX + w, srcY + h,
+ pI830->transform[0],
+ &src_x[2], &src_y[2]);
+
+ if (pI830->scale_units[1][0] == -1 || pI830->scale_units[1][1] == -1) {
+ has_mask = FALSE;
+ } else {
+ has_mask = TRUE;
+ i830_get_transformed_coordinates(maskX, maskY,
+ pI830->transform[1],
+ &mask_x[0], &mask_y[0]);
+ i830_get_transformed_coordinates(maskX, maskY + h,
+ pI830->transform[1],
+ &mask_x[1], &mask_y[1]);
+ i830_get_transformed_coordinates(maskX + w, maskY + h,
+ pI830->transform[1],
+ &mask_x[2], &mask_y[2]);
+ }
+
+ /* Wait for any existing composite rectangles to land before we overwrite
+ * the VB with the next one.
+ */
+ i830WaitSync(pScrn);
+
+ i = 0;
+ /* rect (x2,y2) */
+ vb[i++] = src_x[2] / pI830->scale_units[0][0];
+ vb[i++] = src_y[2] / pI830->scale_units[0][1];
+ if (has_mask) {
+ vb[i++] = mask_x[2] / pI830->scale_units[1][0];
+ vb[i++] = mask_y[2] / pI830->scale_units[1][1];
+ }
+ vb[i++] = (float)(dstX + w);
+ vb[i++] = (float)(dstY + h);
+
+ /* rect (x1,y2) */
+ vb[i++] = src_x[1] / pI830->scale_units[0][0];
+ vb[i++] = src_y[1] / pI830->scale_units[0][1];
+ if (has_mask) {
+ vb[i++] = mask_x[1] / pI830->scale_units[1][0];
+ vb[i++] = mask_y[1] / pI830->scale_units[1][1];
+ }
+ vb[i++] = (float)dstX;
+ vb[i++] = (float)(dstY + h);
+
+ /* rect (x1,y1) */
+ vb[i++] = src_x[0] / pI830->scale_units[0][0];
+ vb[i++] = src_y[0] / pI830->scale_units[0][1];
+ if (has_mask) {
+ vb[i++] = mask_x[0] / pI830->scale_units[1][0];
+ vb[i++] = mask_y[0] / pI830->scale_units[1][1];
+ }
+ vb[i++] = (float)dstX;
+ vb[i++] = (float)dstY;
+
+ {
+ BEGIN_LP_RING(6);
+ OUT_RING(BRW_3DPRIMITIVE |
+ BRW_3DPRIMITIVE_VERTEX_SEQUENTIAL |
+ (_3DPRIM_RECTLIST << BRW_3DPRIMITIVE_TOPOLOGY_SHIFT) |
+ (0 << 9) | /* CTG - indirect vertex count */
+ 4);
+ OUT_RING(3); /* vertex count per instance */
+ OUT_RING(0); /* start vertex offset */
+ OUT_RING(1); /* single instance */
+ OUT_RING(0); /* start instance location */
+ OUT_RING(0); /* index buffer offset, ignored */
+ ADVANCE_LP_RING();
+ }
+#ifdef I830DEBUG
+ ErrorF("sync after 3dprimitive");
+ I830Sync(pScrn);
+#endif
+ /* we must be sure that the pipeline is flushed before next exa draw,
+ because that will be new state, binding state and instructions*/
+ {
+ BEGIN_LP_RING(4);
+ OUT_RING(BRW_PIPE_CONTROL |
+ BRW_PIPE_CONTROL_NOWRITE |
+ BRW_PIPE_CONTROL_WC_FLUSH |
+ BRW_PIPE_CONTROL_IS_FLUSH |
+ (1 << 10) | /* XXX texture cache flush for BLC/CTG */
+ 2);
+ OUT_RING(0); /* Destination address */
+ OUT_RING(0); /* Immediate data low DW */
+ OUT_RING(0); /* Immediate data high DW */
+ ADVANCE_LP_RING();
+ }
+
+ /* Mark sync so we can wait for it before setting up the VB on the next
+ * rectangle.
+ */
+ i830MarkSync(pScrn);
+}
diff-tree 72ea0e514dcbebd009833c21f40e9bfb84074628 (from e62751db8b1a631c22ba0f77c932be4ab39ba741)
Author: Eric Anholt <eric at anholt.net>
Date: Wed Jan 31 12:43:38 2007 -0800
Remove custom accelerated rotation code now that it's all done through Render.
diff --git a/src/Makefile.am b/src/Makefile.am
index 02e8576..ba12635 100644
--- a/src/Makefile.am
+++ b/src/Makefile.am
@@ -74,7 +74,6 @@ i810_drv_la_SOURCES = \
i830_video.c \
i830_video.h \
i830_reg.h \
- i830_rotate.c \
i830_randr.c \
i830_sdvo.c \
i830_sdvo.h \
diff --git a/src/i810_driver.c b/src/i810_driver.c
index 3d4c7d3..e7c8507 100644
--- a/src/i810_driver.c
+++ b/src/i810_driver.c
@@ -342,11 +342,8 @@ const char *I810driSymbols[] = {
#endif /* I830_ONLY */
const char *I810shadowSymbols[] = {
- "shadowInit",
"shadowSetup",
"shadowAdd",
- "shadowRemove",
- "shadowUpdateRotatePacked",
NULL
};
diff --git a/src/i830.h b/src/i830.h
index 58e4ec3..4996cdd 100644
--- a/src/i830.h
+++ b/src/i830.h
@@ -297,11 +297,7 @@ typedef struct _I830Rec {
#endif
unsigned long LinearAlloc;
XF86ModReqInfo shadowReq; /* to test for later libshadow */
- I830MemRange RotatedMem;
- I830MemRange RotatedMem2;
- I830MemRange RotateStateMem; /* for G965 state buffer */
Rotation rotation;
- int InitialRotation;
int displayWidth;
void (*PointerMoved)(int, int, int);
CreateScreenResourcesProcPtr CreateScreenResources;
@@ -321,8 +317,6 @@ typedef struct _I830Rec {
unsigned int front_tiled;
unsigned int back_tiled;
unsigned int depth_tiled;
- unsigned int rotated_tiled;
- unsigned int rotated2_tiled;
#endif
Bool NeedRingBufferLow;
@@ -550,8 +544,6 @@ extern void I830InitVideo(ScreenPtr pScr
extern void i830_crtc_dpms_video(xf86CrtcPtr crtc, Bool on);
#endif
-extern Bool I830AllocateRotatedBuffer(ScrnInfoPtr pScrn, const int flags);
-extern Bool I830AllocateRotated2Buffer(ScrnInfoPtr pScrn, const int flags);
#ifdef XF86DRI
extern Bool I830Allocate3DMemory(ScrnInfoPtr pScrn, const int flags);
extern Bool I830AllocateBackBuffer(ScrnInfoPtr pScrn, const int flags);
@@ -606,7 +598,6 @@ extern void I830ReadAllRegisters(I830Ptr
extern void I830ChangeFrontbuffer(ScrnInfoPtr pScrn,int buffer);
extern Bool I830IsPrimary(ScrnInfoPtr pScrn);
-extern Bool I830Rotate(ScrnInfoPtr pScrn, DisplayModePtr mode);
extern Bool I830FixOffset(ScrnInfoPtr pScrn, I830MemRange *mem);
extern Bool I830I2CInit(ScrnInfoPtr pScrn, I2CBusPtr *bus_ptr, int i2c_reg,
char *name);
diff --git a/src/i830_dga.c b/src/i830_dga.c
index c312c6d..6d071ac 100644
--- a/src/i830_dga.c
+++ b/src/i830_dga.c
@@ -397,17 +397,11 @@ I830_CloseFramebuffer(ScrnInfoPtr pScrn)
};
if (I830IsPrimary(pScrn)) {
- if (pI830->rotation != RR_Rotate_0)
- pScrn->fbOffset = pI830->RotatedMem.Start;
- else
- pScrn->fbOffset = pI830->FrontBuffer.Start;
+ pScrn->fbOffset = pI830->FrontBuffer.Start;
} else {
I830Ptr pI8301 = I830PTR(pI830->entityPrivate->pScrn_1);
- if (pI830->rotation != RR_Rotate_0)
- pScrn->fbOffset = pI8301->RotatedMem2.Start;
- else
- pScrn->fbOffset = pI8301->FrontBuffer2.Start;
+ pScrn->fbOffset = pI8301->FrontBuffer2.Start;
}
I830SelectBuffer(pScrn, I830_SELECT_FRONT);
diff --git a/src/i830_dri.c b/src/i830_dri.c
index eeef289..70e7e49 100644
--- a/src/i830_dri.c
+++ b/src/i830_dri.c
@@ -1446,22 +1446,13 @@ I830UpdateDRIBuffers(ScrnInfoPtr pScrn,
sarea->front_tiled = pI830->front_tiled;
sarea->back_tiled = pI830->back_tiled;
sarea->depth_tiled = pI830->depth_tiled;
- sarea->rotated_tiled = pI830->rotated_tiled;
-#if 0
- sarea->rotated2_tiled = pI830->rotated2_tiled;
-#endif
-
- if (pI830->rotation == RR_Rotate_0) {
- sarea->front_offset = pI830->FrontBuffer.Start;
- /* Don't use FrontBuffer.Size here as it includes the pixmap cache area
- * Instead, calculate the entire framebuffer.
- */
- sarea->front_size = pI830->displayWidth * pScrn->virtualY * pI830->cpp;
- } else {
- /* Need to deal with rotated2 once we have dual head DRI */
- sarea->front_offset = pI830->RotatedMem.Start;
- sarea->front_size = pI830->RotatedMem.Size;
- }
+ sarea->rotated_tiled = FALSE;
+
+ sarea->front_offset = pI830->FrontBuffer.Start;
+ /* Don't use FrontBuffer.Size here as it includes the pixmap cache area
+ * Instead, calculate the entire framebuffer.
+ */
+ sarea->front_size = pI830->displayWidth * pScrn->virtualY * pI830->cpp;
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"[drm] init sarea width,height = %d x %d (pitch %d)\n",
@@ -1480,32 +1471,12 @@ I830UpdateDRIBuffers(ScrnInfoPtr pScrn,
sarea->virtualX = pScrn->virtualX;
sarea->virtualY = pScrn->virtualY;
- switch (pI830->rotation) {
- case RR_Rotate_0:
- sarea->rotation = 0;
- break;
- case RR_Rotate_90:
- sarea->rotation = 90;
- break;
- case RR_Rotate_180:
- sarea->rotation = 180;
- break;
- case RR_Rotate_270:
- sarea->rotation = 270;
- break;
- default:
- sarea->rotation = 0;
- }
- if (pI830->rotation == RR_Rotate_0) {
- sarea->rotated_offset = -1;
- sarea->rotated_size = 0;
- }
- else {
- sarea->rotated_offset = pI830->FrontBuffer.Start;
- sarea->rotated_size = pI830->FrontBuffer.Size;
- }
-
- /* This is the original pitch */
+ /* The rotation is now handled entirely by the X Server, so just leave the
+ * DRI unaware.
+ */
+ sarea->rotation = 0;
+ sarea->rotated_offset = -1;
+ sarea->rotated_size = 0;
sarea->rotated_pitch = pI830->displayWidth;
success = I830DRIMapScreenRegions(pScrn, sarea);
diff --git a/src/i830_driver.c b/src/i830_driver.c
index d6d0df0..7c365db 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -276,7 +276,6 @@ typedef enum {
OPTION_MONITOR_LAYOUT,
OPTION_CHECKDEVICES,
OPTION_FIXEDPIPE,
- OPTION_ROTATE,
OPTION_LINEARALLOC,
OPTION_INTELTEXPOOL,
OPTION_INTELMMSIZE
@@ -297,7 +296,6 @@ static OptionInfoRec I830Options[] = {
{OPTION_MONITOR_LAYOUT, "MonitorLayout", OPTV_ANYSTR,{0}, FALSE},
{OPTION_CHECKDEVICES, "CheckDevices",OPTV_BOOLEAN, {0}, FALSE},
{OPTION_FIXEDPIPE, "FixedPipe", OPTV_ANYSTR, {0}, FALSE},
- {OPTION_ROTATE, "Rotate", OPTV_ANYSTR, {0}, FALSE},
{OPTION_LINEARALLOC, "LinearAlloc", OPTV_INTEGER, {0}, FALSE},
{OPTION_INTELTEXPOOL,"Legacy3D", OPTV_BOOLEAN, {0}, FALSE},
{OPTION_INTELMMSIZE, "AperTexSize", OPTV_INTEGER, {0}, FALSE},
@@ -1368,17 +1366,9 @@ I830PreInit(ScrnInfoPtr pScrn, int flags
RestoreHWState(pScrn);
pScrn->displayWidth = (pScrn->virtualX + 63) & ~63;
-
+
+ /* XXX This should go away, replaced by xf86Crtc.c support for it */
pI830->rotation = RR_Rotate_0;
- if ((s = xf86GetOptValString(pI830->Options, OPTION_ROTATE))) {
- pI830->InitialRotation = 0;
- if(!xf86NameCmp(s, "CW") || !xf86NameCmp(s, "270"))
- pI830->InitialRotation = 270;
- if(!xf86NameCmp(s, "CCW") || !xf86NameCmp(s, "90"))
- pI830->InitialRotation = 90;
- if(!xf86NameCmp(s, "180"))
- pI830->InitialRotation = 180;
- }
/*
* Let's setup the mobile systems to check the lid status
@@ -2495,19 +2485,6 @@ I830ScreenInit(int scrnIndex, ScreenPtr
pScrn->displayWidth = pI830->displayWidth;
- if (I830IsPrimary(pScrn)) {
- /* Rotated Buffer */
- memset(&(pI830->RotatedMem), 0, sizeof(pI830->RotatedMem));
- pI830->RotatedMem.Key = -1;
- /* Rotated2 Buffer */
- memset(&(pI830->RotatedMem2), 0, sizeof(pI830->RotatedMem2));
- pI830->RotatedMem2.Key = -1;
- if (IS_I965G(pI830)) {
- memset(&(pI830->RotateStateMem), 0, sizeof(pI830->RotateStateMem));
- pI830->RotateStateMem.Key = -1;
- }
- }
-
#ifdef HAS_MTRR_SUPPORT
{
int fd;
@@ -2906,29 +2883,6 @@ I830ScreenInit(int scrnIndex, ScreenPtr
pI830->closing = FALSE;
pI830->suspended = FALSE;
- switch (pI830->InitialRotation) {
- case 0:
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Rotating to 0 degrees\n");
- pI830->rotation = RR_Rotate_0;
- break;
- case 90:
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Rotating to 90 degrees\n");
- pI830->rotation = RR_Rotate_90;
- break;
- case 180:
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Rotating to 180 degrees\n");
- pI830->rotation = RR_Rotate_180;
- break;
- case 270:
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Rotating to 270 degrees\n");
- pI830->rotation = RR_Rotate_270;
- break;
- default:
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Bad rotation setting - defaulting to 0 degrees\n");
- pI830->rotation = RR_Rotate_0;
- break;
- }
-
#ifdef XF86DRI_MM
if (pI830->directRenderingEnabled && (pI830->mmModeFlags & I830_KERNEL_MM)) {
unsigned long aperEnd = ROUND_DOWN_TO(pI830->FbMapSize, GTT_PAGE_SIZE)
@@ -3187,7 +3141,7 @@ I830EnterVT(int scrnIndex, int flags)
pI830->currentMode = pScrn->currentMode;
- /* Force invarient state when rotated to be emitted */
+ /* Force invarient 3D state to be emitted */
*pI830->used3D = 1<<31;
return TRUE;
diff --git a/src/i830_memory.c b/src/i830_memory.c
index 24f0b29..6ceb05b 100644
--- a/src/i830_memory.c
+++ b/src/i830_memory.c
@@ -471,156 +471,6 @@ IsTileable(ScrnInfoPtr pScrn, int pitch)
}
}
-Bool
-I830AllocateRotatedBuffer(ScrnInfoPtr pScrn, int flags)
-{
- I830Ptr pI830 = I830PTR(pScrn);
- unsigned long size, alloced;
- Bool dryrun = ((flags & ALLOCATE_DRY_RUN) != 0);
- int verbosity = dryrun ? 4 : 1;
- const char *s = dryrun ? "[dryrun] " : "";
- int align;
- Bool tileable;
- int lines;
- int height = (pI830->rotation & (RR_Rotate_0 | RR_Rotate_180)) ? pScrn->virtualY : pScrn->virtualX;
-
- /* Rotated Buffer */
- memset(&(pI830->RotatedMem), 0, sizeof(I830MemRange));
- pI830->RotatedMem.Key = -1;
- tileable = !(flags & ALLOC_NO_TILING) &&
- IsTileable(pScrn, pScrn->displayWidth * pI830->cpp);
- if (tileable) {
- /* Make the height a multiple of the tile height (16) */
- lines = (height + 15) / 16 * 16;
- } else {
- lines = height;
- }
-
- size = ROUND_TO_PAGE(pScrn->displayWidth * lines * pI830->cpp);
- /*
- * Try to allocate on the best tile-friendly boundaries.
- */
- alloced = 0;
- if (tileable) {
- align = GetBestTileAlignment(size);
- for (align = GetBestTileAlignment(size); align >= (IS_I9XX(pI830) ? MB(1) : KB(512)); align >>= 1) {
- alloced = I830AllocVidMem(pScrn, &(pI830->RotatedMem),
- &(pI830->StolenPool), size, align,
- flags | FROM_ANYWHERE | ALLOCATE_AT_TOP |
- ALIGN_BOTH_ENDS);
- if (alloced >= size)
- break;
- }
- }
- if (alloced < size) {
- /* Give up on trying to tile */
- tileable = FALSE;
- size = ROUND_TO_PAGE(pScrn->displayWidth * height * pI830->cpp);
- align = GTT_PAGE_SIZE;
- alloced = I830AllocVidMem(pScrn, &(pI830->RotatedMem),
- &(pI830->StolenPool), size, align,
- flags | FROM_ANYWHERE | ALLOCATE_AT_TOP);
- }
- if (alloced < size) {
- if (!dryrun) {
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
- "Failed to allocate rotated buffer space.\n");
- }
- return FALSE;
- }
- xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity,
- "%sAllocated %ld kB for the rotated buffer at 0x%lx.\n", s,
- alloced / 1024, pI830->RotatedMem.Start);
-
-#define BRW_LINEAR_EXTRA (32*1024)
- if (IS_I965G(pI830)) {
- memset(&(pI830->RotateStateMem), 0, sizeof(I830MemRange));
- pI830->RotateStateMem.Key = -1;
- size = ROUND_TO_PAGE(BRW_LINEAR_EXTRA);
- align = GTT_PAGE_SIZE;
- alloced = I830AllocVidMem(pScrn, &(pI830->RotateStateMem),
- &(pI830->StolenPool), size, align,
- flags | FROM_ANYWHERE | ALLOCATE_AT_TOP);
- if (alloced < size) {
- if (!dryrun) {
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
- "G965: Failed to allocate rotate state buffer space.\n");
- }
- return FALSE;
- }
- xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity,
- "%sAllocated %ld kB for the G965 rotate state buffer at 0x%lx - 0x%lx.\n", s,
- alloced / 1024, pI830->RotateStateMem.Start, pI830->RotateStateMem.End);
- }
-
- return TRUE;
-}
-
-Bool
-I830AllocateRotated2Buffer(ScrnInfoPtr pScrn, int flags)
-{
- I830Ptr pI830 = I830PTR(pScrn);
- unsigned long size, alloced;
- Bool dryrun = ((flags & ALLOCATE_DRY_RUN) != 0);
- int verbosity = dryrun ? 4 : 1;
- const char *s = dryrun ? "[dryrun] " : "";
- int align;
- Bool tileable;
- int lines;
- I830EntPtr pI830Ent = pI830->entityPrivate;
- I830Ptr pI8302 = I830PTR(pI830Ent->pScrn_2);
- int height = (pI8302->rotation & (RR_Rotate_0 | RR_Rotate_180)) ? pI830Ent->pScrn_2->virtualY : pI830Ent->pScrn_2->virtualX;
-
- /* Rotated Buffer */
- memset(&(pI830->RotatedMem2), 0, sizeof(I830MemRange));
- pI830->RotatedMem2.Key = -1;
- tileable = !(flags & ALLOC_NO_TILING) &&
- IsTileable(pScrn, pI830Ent->pScrn_2->displayWidth * pI8302->cpp);
- if (tileable) {
- /* Make the height a multiple of the tile height (16) */
- lines = (height + 15) / 16 * 16;
- } else {
- lines = height;
- }
-
- size = ROUND_TO_PAGE(pI830Ent->pScrn_2->displayWidth * lines * pI8302->cpp);
- /*
- * Try to allocate on the best tile-friendly boundaries.
- */
- alloced = 0;
- if (tileable) {
- align = GetBestTileAlignment(size);
- for (align = GetBestTileAlignment(size); align >= (IS_I9XX(pI830) ? MB(1) : KB(512)); align >>= 1) {
- alloced = I830AllocVidMem(pScrn, &(pI830->RotatedMem2),
- &(pI830->StolenPool), size, align,
- flags | FROM_ANYWHERE | ALLOCATE_AT_TOP |
- ALIGN_BOTH_ENDS);
- if (alloced >= size)
- break;
- }
- }
- if (alloced < size) {
- /* Give up on trying to tile */
- tileable = FALSE;
- size = ROUND_TO_PAGE(pI830Ent->pScrn_2->displayWidth * height * pI8302->cpp);
- align = GTT_PAGE_SIZE;
- alloced = I830AllocVidMem(pScrn, &(pI830->RotatedMem2),
- &(pI830->StolenPool), size, align,
- flags | FROM_ANYWHERE | ALLOCATE_AT_TOP);
- }
- if (alloced < size) {
- if (!dryrun) {
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
- "Failed to allocate rotated2 buffer space.\n");
- }
- return FALSE;
- }
- xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity,
- "%sAllocated %ld kB for the rotated2 buffer at 0x%lx.\n", s,
- alloced / 1024, pI830->RotatedMem2.Start);
- return TRUE;
-}
-
static unsigned long
GetFreeSpace(ScrnInfoPtr pScrn)
{
@@ -1840,8 +1690,6 @@ I830SetupMemoryTiling(ScrnInfoPtr pScrn)
pI830->front_tiled = FENCE_LINEAR;
pI830->back_tiled = FENCE_LINEAR;
pI830->depth_tiled = FENCE_LINEAR;
- pI830->rotated_tiled = FENCE_LINEAR;
- pI830->rotated2_tiled = FENCE_LINEAR;
if (pI830->allowPageFlip) {
if (pI830->allowPageFlip && pI830->FrontBuffer.Alignment >= KB(512)) {
@@ -1888,35 +1736,7 @@ I830SetupMemoryTiling(ScrnInfoPtr pScrn)
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"MakeTiles failed for the depth buffer.\n");
}
- }
-
-/* XXX tiled rotate mem not ready on G965*/
-
- if(!IS_I965G(pI830)) {
- if (pI830->RotatedMem.Alignment >= KB(512)) {
- if (MakeTiles(pScrn, &(pI830->RotatedMem), FENCE_XMAJOR)) {
- xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "Activating tiled memory for the rotated buffer.\n");
- pI830->rotated_tiled = FENCE_XMAJOR;
- } else {
- xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "MakeTiles failed for the rotated buffer.\n");
- }
- }
- }
-#if 0
- if (pI830->RotatedMem2.Alignment >= KB(512)) {
- if (MakeTiles(pScrn, &(pI830->RotatedMem2), FENCE_XMAJOR)) {
- xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "Activating tiled memory for the rotated2 buffer.\n");
- pI830->rotated2_tiled = FENCE_XMAJOR;
- } else {
- xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "MakeTiles failed for the rotated buffer.\n");
- }
- }
-#endif
-}
+ }}
#endif /* XF86DRI */
static Bool
@@ -1987,13 +1807,6 @@ I830BindAGPMemory(ScrnInfoPtr pScrn)
return FALSE;
}
#endif
- if (pI830->RotatedMem.Start)
- if (!BindMemRange(pScrn, &(pI830->RotatedMem)))
- return FALSE;
- if (pI830->entityPrivate && pI830->entityPrivate->pScrn_2 &&
- pI830->RotatedMem2.Start)
- if (!BindMemRange(pScrn, &(pI830->RotatedMem2)))
- return FALSE;
#ifdef XF86DRI
if (pI830->directRenderingEnabled) {
if (!BindMemRange(pScrn, &(pI830->ContextMem)))
@@ -2088,13 +1901,6 @@ I830UnbindAGPMemory(ScrnInfoPtr pScrn)
return FALSE;
}
#endif
- if (pI830->RotatedMem.Start)
- if (!UnbindMemRange(pScrn, &(pI830->RotatedMem)))
- return FALSE;
- if (pI830->entityPrivate && pI830->entityPrivate->pScrn_2 &&
- pI830->RotatedMem2.Start)
- if (!UnbindMemRange(pScrn, &(pI830->RotatedMem2)))
- return FALSE;
#ifdef XF86DRI
if (pI830->directRenderingEnabled) {
if (!UnbindMemRange(pScrn, &(pI830->ContextMem)))
diff --git a/src/i830_rotate.c b/src/i830_rotate.c
deleted file mode 100644
index efa76ed..0000000
--- a/src/i830_rotate.c
+++ /dev/null
@@ -1,1908 +0,0 @@
-/* -*- c-basic-offset: 3 -*- */
-/**************************************************************************
-
-Copyright 2005 Tungsten Graphics, Inc., Cedar Park, Texas.
-
-All Rights Reserved.
-
-Permission is hereby granted, free of charge, to any person obtaining a
-copy of this software and associated documentation files (the
-"Software"), to deal in the Software without restriction, including
-without limitation the rights to use, copy, modify, merge, publish,
-distribute, sub license, and/or sell copies of the Software, and to
-permit persons to whom the Software is furnished to do so, subject to
-the following conditions:
-
-The above copyright notice and this permission notice (including the
-next paragraph) shall be included in all copies or substantial portions
-of the Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
-OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
-MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
-IN NO EVENT SHALL THE COPYRIGHT HOLDERS AND/OR THEIR SUPPLIERS BE LIABLE FOR
-ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
-TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
-SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-
-**************************************************************************/
-
-/*
- * Reformatted with GNU indent (2.2.8), using the following options:
- *
- * -bad -bap -c41 -cd0 -ncdb -ci6 -cli0 -cp0 -ncs -d0 -di3 -i3 -ip3 -l78
- * -lp -npcs -psl -sob -ss -br -ce -sc -hnl
- *
- * This provides a good match with the original i810 code and preferred
- * XFree86 formatting conventions.
- *
- * When editing this driver, please follow the existing formatting, and edit
- * with <TAB> characters expanded at 8-column intervals.
- */
-
-/*
- * Authors:
- * Alan Hourihane <alanh at tungstengraphics.com>
- * Brian Paul <brian.paul at tungstengraphics.com>
- * Keith Whitwell <keith at tungstengraphics.com>
- */
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include <string.h>
-
-#include "xf86.h"
-#include "xf86_OSproc.h"
-#include "servermd.h"
-#include "shadow.h"
-
-#include "i830.h"
-#include "i915_reg.h"
-#include "i915_3d.h"
-#include "brw_defines.h"
-#include "brw_structs.h"
-
-#ifdef XF86DRI
-#include "dri.h"
-#endif
-
-static void *
-I830WindowLinear (ScreenPtr pScreen,
- CARD32 row,
- CARD32 offset,
- int mode,
- CARD32 *size,
- void *closure)
-{
- ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
- I830Ptr pI830 = I830PTR(pScrn);
- CARD8 *ptr;
-
- *size = (pScrn->bitsPerPixel * pI830->displayWidth >> 3);
- if (I830IsPrimary(pScrn))
- ptr = (CARD8 *) (pI830->FbBase + pI830->FrontBuffer.Start) + row * (*size) + offset;
- else {
- I830Ptr pI8301 = I830PTR(pI830->entityPrivate->pScrn_1);
- ptr = (CARD8 *) (pI830->FbBase + pI8301->FrontBuffer2.Start) + row * (*size) + offset;
- }
- return (void *)ptr;
-}
-
-struct matrix23
-{
- int m00, m01, m02;
- int m10, m11, m12;
-};
-
-static void
-matrix23Set(struct matrix23 *m,
- int m00, int m01, int m02,
- int m10, int m11, int m12)
-{
- m->m00 = m00; m->m01 = m01; m->m02 = m02;
- m->m10 = m10; m->m11 = m11; m->m12 = m12;
-}
-
-
-/*
- * Transform (x,y) coordinate by the given matrix.
- */
-static void
-matrix23TransformCoordf(const struct matrix23 *m, float *x, float *y)
-{
- const float x0 = *x;
- const float y0 = *y;
-
- *x = m->m00 * x0 + m->m01 * y0 + m->m02;
- *y = m->m10 * x0 + m->m11 * y0 + m->m12;
-}
-
-/*
- * Make rotation matrix for width X height screen.
- */
-static void
-matrix23Rotate(struct matrix23 *m, int width, int height, int angle)
-{
- switch (angle) {
- case 0:
- matrix23Set(m, 1, 0, 0, 0, 1, 0);
- break;
- case 90:
- matrix23Set(m, 0, 1, 0, -1, 0, width);
- break;
- case 180:
- matrix23Set(m, -1, 0, width, 0, -1, height);
- break;
- case 270:
- matrix23Set(m, 0, -1, height, 1, 0, 0);
- break;
- default:
- break;
- }
-}
-
-/* Doesn't matter on the order for our purposes */
-typedef struct {
- unsigned char red, green, blue, alpha;
-} intel_color_t;
-
-/* Vertex format */
-typedef union {
- struct {
- float x, y, z, w;
- intel_color_t color;
- intel_color_t specular;
- float u0, v0;
- float u1, v1;
- float u2, v2;
- float u3, v3;
- } v;
- float f[24];
- unsigned int ui[24];
- unsigned char ub4[24][4];
-} intelVertex, *intelVertexPtr;
-
-static void draw_poly(CARD32 *vb,
- float verts[][2],
- float texcoords[][2])
-{
- int vertex_size = 8;
- intelVertex tmp;
- int i, k;
-
- /* initial constant vertex fields */
- tmp.v.z = 1.0;
- tmp.v.w = 1.0;
- tmp.v.color.red = 255;
- tmp.v.color.green = 255;
- tmp.v.color.blue = 255;
- tmp.v.color.alpha = 255;
- tmp.v.specular.red = 0;
- tmp.v.specular.green = 0;
- tmp.v.specular.blue = 0;
- tmp.v.specular.alpha = 0;
-
- for (k = 0; k < 4; k++) {
- tmp.v.x = verts[k][0];
- tmp.v.y = verts[k][1];
- tmp.v.u0 = texcoords[k][0];
- tmp.v.v0 = texcoords[k][1];
-
- for (i = 0 ; i < vertex_size ; i++)
- vb[i] = tmp.ui[i];
-
- vb += vertex_size;
- }
-}
-
-
-/* Our PS kernel uses less than 32 GRF registers (about 20) */
-#define PS_KERNEL_NUM_GRF 32
-#define PS_MAX_THREADS 32
-
-#define BRW_GRF_BLOCKS(nreg) ((nreg + 15) / 16 - 1)
-
-static const CARD32 ps_kernel_static0[][4] = {
-#include "rotation_wm_prog0.h"
-};
-
-static const CARD32 ps_kernel_static90[][4] = {
-#include "rotation_wm_prog90.h"
-};
-
-#define ALIGN(i,m) (((i) + (m) - 1) & ~((m) - 1))
-#define MIN(a,b) ((a) < (b) ? (a) : (b))
-#define BRW_LINEAR_EXTRA (32*1024)
-#define WM_BINDING_TABLE_ENTRIES 2
-
-static const CARD32 sip_kernel_static[][4] = {
-/* wait (1) a0<1>UW a145<0,1,0>UW { align1 + } */
- { 0x00000030, 0x20000108, 0x00001220, 0x00000000 },
-/* nop (4) g0<1>UD { align1 + } */
- { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
-/* nop (4) g0<1>UD { align1 + } */
- { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
-/* nop (4) g0<1>UD { align1 + } */
- { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
-/* nop (4) g0<1>UD { align1 + } */
- { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
-/* nop (4) g0<1>UD { align1 + } */
- { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
-/* nop (4) g0<1>UD { align1 + } */
- { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
-/* nop (4) g0<1>UD { align1 + } */
- { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
-/* nop (4) g0<1>UD { align1 + } */
- { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
-/* nop (4) g0<1>UD { align1 + } */
- { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
-};
-
-#define SF_KERNEL_NUM_GRF 16
-#define SF_MAX_THREADS 1
-
-static const CARD32 sf_kernel_static0[][4] = {
-#include "rotation_sf_prog0.h"
-};
-
-
-static const CARD32 sf_kernel_static90[][4] = {
-#include "rotation_sf_prog90.h"
-};
-
-static void
-I965UpdateRotate (ScreenPtr pScreen,
- shadowBufPtr pBuf)
-{
- ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
- I830Ptr pI830 = I830PTR(pScrn);
- ScrnInfoPtr pScrn1 = pScrn;
- I830Ptr pI8301 = NULL;
- RegionPtr damage = shadowDamage(pBuf);
- int nbox = REGION_NUM_RECTS (damage);
- BoxPtr pbox = REGION_RECTS (damage);
- int box_x1, box_x2, box_y1, box_y2;
- float verts[4][2];
- struct matrix23 rotMatrix;
- Bool updateInvarient = FALSE;
-#ifdef XF86DRI
- drmI830Sarea *sarea = NULL;
- drm_context_t myContext = 0;
-#endif
- Bool didLock = FALSE;
-
-/* Gen4 states */
- int urb_vs_start, urb_vs_size;
- int urb_gs_start, urb_gs_size;
- int urb_clip_start, urb_clip_size;
- int urb_sf_start, urb_sf_size;
- int urb_cs_start, urb_cs_size;
- struct brw_surface_state *dest_surf_state;
- struct brw_surface_state *src_surf_state;
- struct brw_sampler_state *src_sampler_state;
- struct brw_vs_unit_state *vs_state;
- struct brw_sf_unit_state *sf_state;
- struct brw_wm_unit_state *wm_state;
- struct brw_cc_unit_state *cc_state;
- struct brw_cc_viewport *cc_viewport;
- struct brw_instruction *sf_kernel;
- struct brw_instruction *ps_kernel;
- struct brw_instruction *sip_kernel;
- float *vb;
- BOOL first_output = TRUE;
- CARD32 *binding_table;
- int dest_surf_offset, src_surf_offset, src_sampler_offset, vs_offset;
- int sf_offset, wm_offset, cc_offset, vb_offset, cc_viewport_offset;
- int wm_scratch_offset;
- int sf_kernel_offset, ps_kernel_offset, sip_kernel_offset;
- int binding_table_offset;
- int next_offset, total_state_size;
- int vb_size = (4 * 4) * 4; /* 4 DWORDS per vertex */
- char *state_base;
- int state_base_offset;
-
- DPRINTF(PFX, "I965UpdateRotate: from (%d x %d) -> (%d x %d)\n",
- pScrn->virtualX, pScrn->virtualY, pScreen->width, pScreen->height);
-
- if (I830IsPrimary(pScrn)) {
- pI8301 = pI830;
- } else {
- pI8301 = I830PTR(pI830->entityPrivate->pScrn_1);
- pScrn1 = pI830->entityPrivate->pScrn_1;
- }
-
- switch (pI830->rotation) {
- case RR_Rotate_90:
- matrix23Rotate(&rotMatrix,
- pScreen->width, pScreen->height,
- 90);
- break;
- case RR_Rotate_180:
- matrix23Rotate(&rotMatrix,
- pScreen->width, pScreen->height,
- 180);
- break;
- case RR_Rotate_270:
- matrix23Rotate(&rotMatrix,
- pScreen->width, pScreen->height,
- 270);
- break;
- default:
- break;
- }
-
-#ifdef XF86DRI
- if (pI8301->directRenderingEnabled) {
- sarea = DRIGetSAREAPrivate(pScrn1->pScreen);
- myContext = DRIGetContext(pScrn1->pScreen);
- didLock = I830DRILock(pScrn1);
- }
-#endif
-
- if (pScrn->scrnIndex != *pI830->used3D)
- updateInvarient = TRUE;
-
-#ifdef XF86DRI
- if (sarea && sarea->ctxOwner != myContext)
- updateInvarient = TRUE;
-#endif
-
- /*XXX we'll always update state */
- *pI830->used3D = pScrn->scrnIndex;
-#ifdef XF86DRI
- if (sarea)
- sarea->ctxOwner = myContext;
-#endif
-
- /* this starts initialize 3D engine for rotation mapping*/
- next_offset = 0;
-
- /* Set up our layout of state in framebuffer. First the general state: */
- vs_offset = ALIGN(next_offset, 64);
- next_offset = vs_offset + sizeof(*vs_state);
- sf_offset = ALIGN(next_offset, 32);
- next_offset = sf_offset + sizeof(*sf_state);
- wm_offset = ALIGN(next_offset, 32);
- next_offset = wm_offset + sizeof(*wm_state);
- wm_scratch_offset = ALIGN(next_offset, 1024);
- next_offset = wm_scratch_offset + 1024 * PS_MAX_THREADS;
- cc_offset = ALIGN(next_offset, 32);
- next_offset = cc_offset + sizeof(*cc_state);
-
- sf_kernel_offset = ALIGN(next_offset, 64);
-
- switch (pI830->rotation) {
- case RR_Rotate_90:
- case RR_Rotate_270:
- next_offset = sf_kernel_offset + sizeof (sf_kernel_static90);
- ps_kernel_offset = ALIGN(next_offset, 64);
- next_offset = ps_kernel_offset + sizeof (ps_kernel_static90);
- break;
- case RR_Rotate_180:
- default:
- next_offset = sf_kernel_offset + sizeof (sf_kernel_static0);
- ps_kernel_offset = ALIGN(next_offset, 64);
- next_offset = ps_kernel_offset + sizeof (ps_kernel_static0);
- break;
- }
-
- sip_kernel_offset = ALIGN(next_offset, 64);
- next_offset = sip_kernel_offset + sizeof (sip_kernel_static);
- cc_viewport_offset = ALIGN(next_offset, 32);
- next_offset = cc_viewport_offset + sizeof(*cc_viewport);
-
- src_sampler_offset = ALIGN(next_offset, 32);
- next_offset = src_sampler_offset + sizeof(*src_sampler_state);
-
- /* Align VB to native size of elements, for safety */
- vb_offset = ALIGN(next_offset, 8);
- next_offset = vb_offset + vb_size;
-
- dest_surf_offset = ALIGN(next_offset, 32);
- next_offset = dest_surf_offset + sizeof(*dest_surf_state);
- src_surf_offset = ALIGN(next_offset, 32);
- next_offset = src_surf_offset + sizeof(*src_surf_state);
- binding_table_offset = ALIGN(next_offset, 32);
- next_offset = binding_table_offset + (WM_BINDING_TABLE_ENTRIES * 4);
-
- total_state_size = next_offset;
- assert (total_state_size < BRW_LINEAR_EXTRA);
-
- state_base_offset = pI830->RotateStateMem.Start;
- state_base_offset = ALIGN(state_base_offset, 64);
- state_base = (char *)(pI830->FbBase + state_base_offset);
- DPRINTF(PFX, "rotate state buffer start 0x%x, addr 0x%x, base 0x%x\n",
- pI830->RotateStateMem.Start, state_base, pI830->FbBase);
-
- vs_state = (void *)(state_base + vs_offset);
- sf_state = (void *)(state_base + sf_offset);
- wm_state = (void *)(state_base + wm_offset);
- cc_state = (void *)(state_base + cc_offset);
- sf_kernel = (void *)(state_base + sf_kernel_offset);
- ps_kernel = (void *)(state_base + ps_kernel_offset);
- sip_kernel = (void *)(state_base + sip_kernel_offset);
-
- cc_viewport = (void *)(state_base + cc_viewport_offset);
- dest_surf_state = (void *)(state_base + dest_surf_offset);
- src_surf_state = (void *)(state_base + src_surf_offset);
- src_sampler_state = (void *)(state_base + src_sampler_offset);
- binding_table = (void *)(state_base + binding_table_offset);
- vb = (void *)(state_base + vb_offset);
-
- /* For 3D, the VS must have 8, 12, 16, 24, or 32 VUEs allocated to it.
- * A VUE consists of a 256-bit vertex header followed by the vertex data,
- * which in our case is 4 floats (128 bits), thus a single 512-bit URB
- * entry.
- */
-#define URB_VS_ENTRIES 8
-#define URB_VS_ENTRY_SIZE 1
-
-#define URB_GS_ENTRIES 0
-#define URB_GS_ENTRY_SIZE 0
-
-#define URB_CLIP_ENTRIES 0
-#define URB_CLIP_ENTRY_SIZE 0
-
- /* The SF kernel we use outputs only 4 256-bit registers, leading to an
- * entry size of 2 512-bit URBs. We don't need to have many entries to
- * output as we're generally working on large rectangles and don't care
- * about having WM threads running on different rectangles simultaneously.
- */
-#define URB_SF_ENTRIES 1
-#define URB_SF_ENTRY_SIZE 2
-
-#define URB_CS_ENTRIES 0
-#define URB_CS_ENTRY_SIZE 0
-
- urb_vs_start = 0;
- urb_vs_size = URB_VS_ENTRIES * URB_VS_ENTRY_SIZE;
- urb_gs_start = urb_vs_start + urb_vs_size;
- urb_gs_size = URB_GS_ENTRIES * URB_GS_ENTRY_SIZE;
- urb_clip_start = urb_gs_start + urb_gs_size;
- urb_clip_size = URB_CLIP_ENTRIES * URB_CLIP_ENTRY_SIZE;
- urb_sf_start = urb_clip_start + urb_clip_size;
- urb_sf_size = URB_SF_ENTRIES * URB_SF_ENTRY_SIZE;
- urb_cs_start = urb_sf_start + urb_sf_size;
- urb_cs_size = URB_CS_ENTRIES * URB_CS_ENTRY_SIZE;
-
- memset (cc_viewport, 0, sizeof (*cc_viewport));
- cc_viewport->min_depth = -1.e35;
- cc_viewport->max_depth = 1.e35;
-
- memset(cc_state, 0, sizeof(*cc_state));
- cc_state->cc0.stencil_enable = 0; /* disable stencil */
- cc_state->cc2.depth_test = 0; /* disable depth test */
- cc_state->cc2.logicop_enable = 1; /* enable logic op */
- cc_state->cc3.ia_blend_enable = 1; /* blend alpha just like colors */
- cc_state->cc3.blend_enable = 0; /* disable color blend */
- cc_state->cc3.alpha_test = 0; /* disable alpha test */
- cc_state->cc4.cc_viewport_state_offset = (state_base_offset + cc_viewport_offset) >> 5;
- cc_state->cc5.dither_enable = 0; /* disable dither */
- cc_state->cc5.logicop_func = 0xc; /* COPY S*/
- cc_state->cc5.statistics_enable = 1;
- cc_state->cc5.ia_blend_function = BRW_BLENDFUNCTION_ADD;
- cc_state->cc5.ia_src_blend_factor = BRW_BLENDFACTOR_ONE;
- cc_state->cc5.ia_dest_blend_factor = BRW_BLENDFACTOR_ZERO;
-
- /* Upload system kernel */
- memcpy (sip_kernel, sip_kernel_static, sizeof (sip_kernel_static));
-
- memset(dest_surf_state, 0, sizeof(*dest_surf_state));
- dest_surf_state->ss0.surface_type = BRW_SURFACE_2D;
- dest_surf_state->ss0.data_return_format = BRW_SURFACERETURNFORMAT_FLOAT32;
- if (pI8301->cpp == 2)
- dest_surf_state->ss0.surface_format = BRW_SURFACEFORMAT_B5G6R5_UNORM;
- else
- dest_surf_state->ss0.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
- dest_surf_state->ss0.writedisable_alpha = 0;
- dest_surf_state->ss0.writedisable_red = 0;
- dest_surf_state->ss0.writedisable_green = 0;
- dest_surf_state->ss0.writedisable_blue = 0;
- dest_surf_state->ss0.color_blend = 0;
- dest_surf_state->ss0.vert_line_stride = 0;
- dest_surf_state->ss0.vert_line_stride_ofs = 0;
- dest_surf_state->ss0.mipmap_layout_mode = 0;
- dest_surf_state->ss0.render_cache_read_mode = 0;
-
- if (I830IsPrimary(pScrn))
- dest_surf_state->ss1.base_addr = pI830->FrontBuffer.Start;
- else
- dest_surf_state->ss1.base_addr = pI8301->FrontBuffer2.Start;
- dest_surf_state->ss2.width = pScrn->virtualX - 1;
- dest_surf_state->ss2.height = pScrn->virtualY - 1;
- dest_surf_state->ss2.mip_count = 0;
- dest_surf_state->ss2.render_target_rotation = 0; /*XXX how to use? */
- dest_surf_state->ss3.pitch = (pI830->displayWidth * pI830->cpp) - 1;
- if (pI830->front_tiled) {
- dest_surf_state->ss3.tiled_surface = 1;
- dest_surf_state->ss3.tile_walk = 0; /* X major */
- }
-
- memset(src_surf_state, 0, sizeof(*src_surf_state));
- src_surf_state->ss0.surface_type = BRW_SURFACE_2D;
-/* src_surf_state->ss0.data_return_format = BRW_SURFACERETURNFORMAT_FLOAT32;*/
- if (pI8301->cpp == 2)
- src_surf_state->ss0.surface_format = BRW_SURFACEFORMAT_B5G6R5_UNORM;
- else
- src_surf_state->ss0.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
- src_surf_state->ss0.writedisable_alpha = 0;
- src_surf_state->ss0.writedisable_red = 0;
- src_surf_state->ss0.writedisable_green = 0;
- src_surf_state->ss0.writedisable_blue = 0;
- src_surf_state->ss0.color_blend = 0;
- src_surf_state->ss0.vert_line_stride = 0;
- src_surf_state->ss0.vert_line_stride_ofs = 0;
- src_surf_state->ss0.mipmap_layout_mode = 0;
- src_surf_state->ss0.render_cache_read_mode = 0;
-
- if (I830IsPrimary(pScrn))
- src_surf_state->ss1.base_addr = pI830->RotatedMem.Start;
- else
- src_surf_state->ss1.base_addr = pI8301->RotatedMem2.Start;
- src_surf_state->ss2.width = pScreen->width - 1;
- src_surf_state->ss2.height = pScreen->height - 1;
- src_surf_state->ss2.mip_count = 0;
- src_surf_state->ss2.render_target_rotation = 0;
- src_surf_state->ss3.pitch = (pScrn->displayWidth * pI830->cpp) - 1;
- if (pI830->rotated_tiled) {
- src_surf_state->ss3.tiled_surface = 1;
- src_surf_state->ss3.tile_walk = 0; /* X major */
- }
-
- binding_table[0] = state_base_offset + dest_surf_offset;
- binding_table[1] = state_base_offset + src_surf_offset;
-
- memset(src_sampler_state, 0, sizeof(*src_sampler_state));
- src_sampler_state->ss0.min_filter = BRW_MAPFILTER_LINEAR;
- src_sampler_state->ss0.mag_filter = BRW_MAPFILTER_LINEAR;
- src_sampler_state->ss1.r_wrap_mode = BRW_TEXCOORDMODE_CLAMP;
- src_sampler_state->ss1.s_wrap_mode = BRW_TEXCOORDMODE_CLAMP;
- src_sampler_state->ss1.t_wrap_mode = BRW_TEXCOORDMODE_CLAMP;
-
- /* Set up the vertex shader to be disabled (passthrough) */
- memset(vs_state, 0, sizeof(*vs_state));
- vs_state->thread4.nr_urb_entries = URB_VS_ENTRIES;
- vs_state->thread4.urb_entry_allocation_size = URB_VS_ENTRY_SIZE - 1;
- vs_state->vs6.vs_enable = 0;
- vs_state->vs6.vert_cache_disable = 1;
-
- /* Set up the SF kernel to do coord interp: for each attribute,
- * calculate dA/dx and dA/dy. Hand these interpolation coefficients
- * back to SF which then hands pixels off to WM.
- */
-
- switch (pI830->rotation) {
- case RR_Rotate_90:
- case RR_Rotate_270:
- memcpy (sf_kernel, sf_kernel_static90, sizeof (sf_kernel_static90));
- memcpy (ps_kernel, ps_kernel_static90, sizeof (ps_kernel_static90));
- break;
- case RR_Rotate_180:
- default:
- memcpy (sf_kernel, sf_kernel_static0, sizeof (sf_kernel_static0));
- memcpy (ps_kernel, ps_kernel_static0, sizeof (ps_kernel_static0));
- break;
- }
-
- memset(sf_state, 0, sizeof(*sf_state));
- sf_state->thread0.kernel_start_pointer =
- (state_base_offset + sf_kernel_offset) >> 6;
- sf_state->thread0.grf_reg_count = BRW_GRF_BLOCKS(SF_KERNEL_NUM_GRF);
- sf_state->sf1.single_program_flow = 1; /* XXX */
- sf_state->sf1.binding_table_entry_count = 0;
- sf_state->sf1.thread_priority = 0;
- sf_state->sf1.floating_point_mode = 0;
- sf_state->sf1.illegal_op_exception_enable = 1;
- sf_state->sf1.mask_stack_exception_enable = 1;
- sf_state->sf1.sw_exception_enable = 1;
- sf_state->thread2.per_thread_scratch_space = 0;
- sf_state->thread2.scratch_space_base_pointer = 0; /* not used in our kernel */
- sf_state->thread3.const_urb_entry_read_length = 0; /* no const URBs */
- sf_state->thread3.const_urb_entry_read_offset = 0; /* no const URBs */
- sf_state->thread3.urb_entry_read_length = 1; /* 1 URB per vertex */
- sf_state->thread3.urb_entry_read_offset = 0;
- sf_state->thread3.dispatch_grf_start_reg = 3;
- sf_state->thread4.max_threads = SF_MAX_THREADS - 1;
- sf_state->thread4.urb_entry_allocation_size = URB_SF_ENTRY_SIZE - 1;
- sf_state->thread4.nr_urb_entries = URB_SF_ENTRIES;
- sf_state->thread4.stats_enable = 1;
- sf_state->sf5.viewport_transform = FALSE; /* skip viewport */
- sf_state->sf6.cull_mode = BRW_CULLMODE_NONE;
- sf_state->sf6.scissor = 0;
- sf_state->sf7.trifan_pv = 2;
- sf_state->sf6.dest_org_vbias = 0x8;
- sf_state->sf6.dest_org_hbias = 0x8;
-
- memset (wm_state, 0, sizeof (*wm_state));
- wm_state->thread0.kernel_start_pointer =
- (state_base_offset + ps_kernel_offset) >> 6;
- wm_state->thread0.grf_reg_count = BRW_GRF_BLOCKS(PS_KERNEL_NUM_GRF);
- wm_state->thread1.single_program_flow = 1; /* XXX */
- wm_state->thread1.binding_table_entry_count = 2;
- /* Though we never use the scratch space in our WM kernel, it has to be
- * set, and the minimum allocation is 1024 bytes.
- */
- wm_state->thread2.scratch_space_base_pointer = (state_base_offset +
- wm_scratch_offset) >> 10;
- wm_state->thread2.per_thread_scratch_space = 0; /* 1024 bytes */
- wm_state->thread3.dispatch_grf_start_reg = 3;
- wm_state->thread3.const_urb_entry_read_length = 0;
- wm_state->thread3.const_urb_entry_read_offset = 0;
- wm_state->thread3.urb_entry_read_length = 1;
- wm_state->thread3.urb_entry_read_offset = 0;
- wm_state->wm4.stats_enable = 1;
- wm_state->wm4.sampler_state_pointer = (state_base_offset + src_sampler_offset) >> 5;
- wm_state->wm4.sampler_count = 1; /* 1-4 samplers used */
- wm_state->wm5.max_threads = PS_MAX_THREADS - 1;
- wm_state->wm5.thread_dispatch_enable = 1;
- wm_state->wm5.enable_16_pix = 1;
- wm_state->wm5.enable_8_pix = 0;
- wm_state->wm5.early_depth_test = 1;
-
-
- {
- BEGIN_LP_RING(2);
- OUT_RING(MI_FLUSH |
- MI_STATE_INSTRUCTION_CACHE_FLUSH |
- BRW_MI_GLOBAL_SNAPSHOT_RESET);
- OUT_RING(MI_NOOP);
- ADVANCE_LP_RING();
- }
-
- {
- BEGIN_LP_RING(12);
- OUT_RING(BRW_PIPELINE_SELECT | PIPELINE_SELECT_3D);
-
- /* Mesa does this. Who knows... */
- OUT_RING(BRW_CS_URB_STATE | 0);
- OUT_RING((0 << 4) | /* URB Entry Allocation Size */
- (0 << 0)); /* Number of URB Entries */
-
- /* Zero out the two base address registers so all offsets are absolute */
- OUT_RING(BRW_STATE_BASE_ADDRESS | 4);
- OUT_RING(0 | BASE_ADDRESS_MODIFY); /* Generate state base address */
- OUT_RING(0 | BASE_ADDRESS_MODIFY); /* Surface state base address */
- OUT_RING(0 | BASE_ADDRESS_MODIFY); /* media base addr, don't care */
- OUT_RING(0x10000000 | BASE_ADDRESS_MODIFY); /* general state max addr, disabled */
- OUT_RING(0x10000000 | BASE_ADDRESS_MODIFY); /* media object state max addr, disabled */
-
- /* Set system instruction pointer */
- OUT_RING(BRW_STATE_SIP | 0);
- OUT_RING(state_base_offset + sip_kernel_offset); /* system instruction pointer */
-
- OUT_RING(MI_NOOP);
- ADVANCE_LP_RING();
- }
-
-
- {
- BEGIN_LP_RING(36);
- /* Enable VF statistics */
- OUT_RING(BRW_3DSTATE_VF_STATISTICS | 1);
-
- /* Pipe control */
- OUT_RING(BRW_PIPE_CONTROL |
- BRW_PIPE_CONTROL_NOWRITE |
- BRW_PIPE_CONTROL_IS_FLUSH |
- 2);
- OUT_RING(0); /* Destination address */
- OUT_RING(0); /* Immediate data low DW */
- OUT_RING(0); /* Immediate data high DW */
-
- /* Binding table pointers */
- OUT_RING(BRW_3DSTATE_BINDING_TABLE_POINTERS | 4);
- OUT_RING(0); /* vs */
- OUT_RING(0); /* gs */
- OUT_RING(0); /* clip */
- OUT_RING(0); /* sf */
- /* Only the PS uses the binding table */
- OUT_RING(state_base_offset + binding_table_offset); /* ps */
-
- /* XXX: Blend constant color (magenta is fun) */
- //OUT_RING(BRW_3DSTATE_CONSTANT_COLOR | 3);
- //OUT_RING(float_to_uint (1.0));
- //OUT_RING(float_to_uint (0.0));
- //OUT_RING(float_to_uint (1.0));
- //OUT_RING(float_to_uint (1.0));
-
- /* The drawing rectangle clipping is always on. Set it to values that
- * shouldn't do any clipping.
- */
- OUT_RING(BRW_3DSTATE_DRAWING_RECTANGLE | 2); /* XXX 3 for BLC or CTG */
- OUT_RING(0x00000000); /* ymin, xmin */
- OUT_RING((pScrn->virtualX - 1) |
- (pScrn->virtualY - 1) << 16); /* ymax, xmax */
- OUT_RING(0x00000000); /* yorigin, xorigin */
-
- /* skip the depth buffer */
- /* skip the polygon stipple */
- /* skip the polygon stipple offset */
- /* skip the line stipple */
-
- /* Set the pointers to the 3d pipeline state */
- OUT_RING(BRW_3DSTATE_PIPELINED_POINTERS | 5);
- OUT_RING(state_base_offset + vs_offset); /* 32 byte aligned */
- OUT_RING(BRW_GS_DISABLE); /* disable GS, resulting in passthrough */
- OUT_RING(BRW_CLIP_DISABLE); /* disable CLIP, resulting in passthrough */
- OUT_RING(state_base_offset + sf_offset); /* 32 byte aligned */
- OUT_RING(state_base_offset + wm_offset); /* 32 byte aligned */
- OUT_RING(state_base_offset + cc_offset); /* 64 byte aligned */
-
- /* URB fence */
- OUT_RING(BRW_URB_FENCE |
- UF0_CS_REALLOC |
- UF0_SF_REALLOC |
- UF0_CLIP_REALLOC |
- UF0_GS_REALLOC |
- UF0_VS_REALLOC |
- 1);
- OUT_RING(((urb_clip_start + urb_clip_size) << UF1_CLIP_FENCE_SHIFT) |
- ((urb_gs_start + urb_gs_size) << UF1_GS_FENCE_SHIFT) |
- ((urb_vs_start + urb_vs_size) << UF1_VS_FENCE_SHIFT));
- OUT_RING(((urb_cs_start + urb_cs_size) << UF2_CS_FENCE_SHIFT) |
- ((urb_sf_start + urb_sf_size) << UF2_SF_FENCE_SHIFT));
-
- /* Constant buffer state */
- OUT_RING(BRW_CS_URB_STATE | 0);
- OUT_RING(((URB_CS_ENTRY_SIZE - 1) << 4) | /* URB Entry Allocation Size */
- (URB_CS_ENTRIES << 0)); /* Number of URB Entries */
-
- /* Set up the pointer to our vertex buffer */
- OUT_RING(BRW_3DSTATE_VERTEX_BUFFERS | 2);
- OUT_RING((0 << VB0_BUFFER_INDEX_SHIFT) |
- VB0_VERTEXDATA |
- ((4 * 4) << VB0_BUFFER_PITCH_SHIFT)); /* four 32-bit floats per vertex */
- OUT_RING(state_base_offset + vb_offset);
- OUT_RING(3); /* four corners to our rectangle */
-
- /* Set up our vertex elements, sourced from the single vertex buffer. */
- OUT_RING(BRW_3DSTATE_VERTEX_ELEMENTS | 3);
- /* offset 0: X,Y -> {X, Y, 1.0, 1.0} */
- OUT_RING((0 << VE0_VERTEX_BUFFER_INDEX_SHIFT) |
- VE0_VALID |
- (BRW_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) |
- (0 << VE0_OFFSET_SHIFT));
- OUT_RING((BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT) |
- (BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT) |
- (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT) |
- (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT) |
- (0 << VE1_DESTINATION_ELEMENT_OFFSET_SHIFT));
- /* offset 8: S0, T0 -> {S0, T0, 1.0, 1.0} */
- OUT_RING((0 << VE0_VERTEX_BUFFER_INDEX_SHIFT) |
- VE0_VALID |
- (BRW_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) |
- (8 << VE0_OFFSET_SHIFT));
- OUT_RING((BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT) |
- (BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT) |
- (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT) |
- (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT) |
- (4 << VE1_DESTINATION_ELEMENT_OFFSET_SHIFT));
-
- //OUT_RING(MI_NOOP); /* pad to quadword */
- ADVANCE_LP_RING();
- }
-
- {
- BEGIN_LP_RING(2);
- OUT_RING(MI_FLUSH |
- MI_STATE_INSTRUCTION_CACHE_FLUSH |
- BRW_MI_GLOBAL_SNAPSHOT_RESET);
- OUT_RING(MI_NOOP);
- ADVANCE_LP_RING();
- }
-
- while (nbox--)
- {
- float src_scale_x, src_scale_y;
- int i;
- box_x1 = pbox->x1;
- box_y1 = pbox->y1;
- box_x2 = pbox->x2;
- box_y2 = pbox->y2;
-
- if (!first_output) {
- /* Since we use the same little vertex buffer over and over, sync for
- * subsequent rectangles.
- */
- i830WaitSync(pScrn);
- }
-
- pbox++;
-
- verts[0][0] = box_x1; verts[0][1] = box_y1;
- verts[1][0] = box_x2; verts[1][1] = box_y1;
- verts[2][0] = box_x2; verts[2][1] = box_y2;
- verts[3][0] = box_x1; verts[3][1] = box_y2;
-
- /* transform coordinates to rotated versions, but leave texcoords unchanged */
- for (i = 0; i < 4; i++)
- matrix23TransformCoordf(&rotMatrix, &verts[i][0], &verts[i][1]);
-
- src_scale_x = (float)1.0 / (float)pScreen->width;
- src_scale_y = (float)1.0 / (float)pScreen->height;
- i = 0;
-
- DPRINTF(PFX, "box size (%d, %d) -> (%d, %d)\n",
- box_x1, box_y1, box_x2, box_y2);
-
- switch (pI830->rotation) {
- case RR_Rotate_90:
- vb[i++] = (float)box_x1 * src_scale_x;
- vb[i++] = (float)box_y2 * src_scale_y;
- vb[i++] = verts[3][0];
- vb[i++] = verts[3][1];
-
- vb[i++] = (float)box_x1 * src_scale_x;
- vb[i++] = (float)box_y1 * src_scale_y;
- vb[i++] = verts[0][0];
- vb[i++] = verts[0][1];
-
- vb[i++] = (float)box_x2 * src_scale_x;
- vb[i++] = (float)box_y1 * src_scale_y;
- vb[i++] = verts[1][0];
- vb[i++] = verts[1][1];
- break;
- case RR_Rotate_270:
- vb[i++] = (float)box_x2 * src_scale_x;
- vb[i++] = (float)box_y1 * src_scale_y;
- vb[i++] = verts[1][0];
- vb[i++] = verts[1][1];
-
- vb[i++] = (float)box_x2 * src_scale_x;
- vb[i++] = (float)box_y2 * src_scale_y;
- vb[i++] = verts[2][0];
- vb[i++] = verts[2][1];
-
- vb[i++] = (float)box_x1 * src_scale_x;
- vb[i++] = (float)box_y2 * src_scale_y;
- vb[i++] = verts[3][0];
- vb[i++] = verts[3][1];
- break;
- case RR_Rotate_180:
- default:
- vb[i++] = (float)box_x1 * src_scale_x;
- vb[i++] = (float)box_y1 * src_scale_y;
- vb[i++] = verts[0][0];
- vb[i++] = verts[0][1];
-
- vb[i++] = (float)box_x2 * src_scale_x;
- vb[i++] = (float)box_y1 * src_scale_y;
- vb[i++] = verts[1][0];
- vb[i++] = verts[1][1];
-
- vb[i++] = (float)box_x2 * src_scale_x;
- vb[i++] = (float)box_y2 * src_scale_y;
- vb[i++] = verts[2][0];
- vb[i++] = verts[2][1];
- break;
- }
-
- BEGIN_LP_RING(6);
- OUT_RING(BRW_3DPRIMITIVE |
- BRW_3DPRIMITIVE_VERTEX_SEQUENTIAL |
- (_3DPRIM_RECTLIST << BRW_3DPRIMITIVE_TOPOLOGY_SHIFT) |
- (0 << 9) | /* CTG - indirect vertex count */
- 4);
- OUT_RING(3); /* vertex count per instance */
- OUT_RING(0); /* start vertex offset */
- OUT_RING(1); /* single instance */
- OUT_RING(0); /* start instance location */
- OUT_RING(0); /* index buffer offset, ignored */
- ADVANCE_LP_RING();
-
- first_output = FALSE;
- i830MarkSync(pScrn);
- }
-
- i830WaitSync(pScrn);
-#ifdef XF86DRI
- if (didLock)
- I830DRIUnlock(pScrn1);
-#endif
-}
-
-
-static void
-I915UpdateRotate (ScreenPtr pScreen,
- shadowBufPtr pBuf)
-{
- ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
- I830Ptr pI830 = I830PTR(pScrn);
- ScrnInfoPtr pScrn1 = pScrn;
- I830Ptr pI8301 = NULL;
- RegionPtr damage = shadowDamage(pBuf);
- int nbox = REGION_NUM_RECTS (damage);
- BoxPtr pbox = REGION_RECTS (damage);
- int box_x1, box_x2, box_y1, box_y2;
- CARD32 vb[32]; /* 32 dword vertex buffer */
- float verts[4][2], tex[4][2];
- struct matrix23 rotMatrix;
- int j;
- int use_fence;
- Bool didLock = FALSE;
-
- if (I830IsPrimary(pScrn)) {
- pI8301 = pI830;
- } else {
- pI8301 = I830PTR(pI830->entityPrivate->pScrn_1);
- pScrn1 = pI830->entityPrivate->pScrn_1;
- }
-
- switch (pI830->rotation) {
- case RR_Rotate_90:
- matrix23Rotate(&rotMatrix,
- pScreen->width, pScreen->height,
- 90);
- break;
- case RR_Rotate_180:
- matrix23Rotate(&rotMatrix,
- pScreen->width, pScreen->height,
- 180);
- break;
- case RR_Rotate_270:
- matrix23Rotate(&rotMatrix,
- pScreen->width, pScreen->height,
- 270);
- break;
- default:
- break;
- }
-
-#ifdef XF86DRI
- if (pI8301->directRenderingEnabled)
- didLock = I830DRILock(pScrn1);
-#endif
-
- /* If another screen was active, we don't know the current state. */
- if (pScrn->scrnIndex != *pI830->used3D)
- pI830->last_3d = LAST_3D_OTHER;
-
- if (pI830->last_3d != LAST_3D_ROTATION) {
- FS_LOCALS(3);
- *pI830->used3D = pScrn->scrnIndex;
-
- BEGIN_LP_RING(34);
- /* invarient state */
-
- /* flush map & render cache */
- OUT_RING(MI_FLUSH | MI_WRITE_DIRTY_STATE | MI_INVALIDATE_MAP_CACHE);
- OUT_RING(0x00000000);
-
- /* draw rect */
- OUT_RING(_3DSTATE_DRAW_RECT_CMD);
- OUT_RING(DRAW_DITHER_OFS_X(0) | DRAW_DITHER_OFS_Y(0));
- OUT_RING(DRAW_XMIN(0) | DRAW_YMIN(0));
- OUT_RING(DRAW_XMAX(pScrn->virtualX - 1) |
- DRAW_YMAX(pScrn->virtualY - 1));
- OUT_RING(DRAW_XORG(0) | DRAW_YORG(0));
-
- OUT_RING(MI_NOOP);
-
- OUT_RING(0x7c000003); /* XXX: magic numbers */
- OUT_RING(0x7d070000);
- OUT_RING(0x00000000);
- OUT_RING(0x68000002);
-
- OUT_RING(_3DSTATE_LOAD_STATE_IMMEDIATE_1 |
- I1_LOAD_S(2) | I1_LOAD_S(4) | I1_LOAD_S(5) | I1_LOAD_S(6) | 3);
-
- OUT_RING(S2_TEXCOORD_FMT(0, TEXCOORDFMT_2D) |
- S2_TEXCOORD_FMT(1, TEXCOORDFMT_NOT_PRESENT) |
- S2_TEXCOORD_FMT(2, TEXCOORDFMT_NOT_PRESENT) |
- S2_TEXCOORD_FMT(3, TEXCOORDFMT_NOT_PRESENT) |
- S2_TEXCOORD_FMT(4, TEXCOORDFMT_NOT_PRESENT) |
- S2_TEXCOORD_FMT(5, TEXCOORDFMT_NOT_PRESENT) |
- S2_TEXCOORD_FMT(6, TEXCOORDFMT_NOT_PRESENT) |
- S2_TEXCOORD_FMT(7, TEXCOORDFMT_NOT_PRESENT));
- OUT_RING((1 << S4_POINT_WIDTH_SHIFT) | S4_LINE_WIDTH_ONE |
- S4_CULLMODE_NONE | S4_VFMT_SPEC_FOG | S4_VFMT_COLOR |
- S4_VFMT_XYZW);
- OUT_RING(0x00000000); /* S5 -- enable bits */
- OUT_RING((2 << S6_DEPTH_TEST_FUNC_SHIFT) |
- (2 << S6_CBUF_SRC_BLEND_FACT_SHIFT) |
- (1 << S6_CBUF_DST_BLEND_FACT_SHIFT) | S6_COLOR_WRITE_ENABLE |
- (2 << S6_TRISTRIP_PV_SHIFT));
-
- OUT_RING(_3DSTATE_CONST_BLEND_COLOR_CMD);
- OUT_RING(0x00000000);
-
- OUT_RING(_3DSTATE_DST_BUF_VARS_CMD);
- if (pI830->cpp == 1) {
- OUT_RING(LOD_PRECLAMP_OGL | DSTORG_HORT_BIAS(0x8) |
- DSTORG_VERT_BIAS(0x8) | COLR_BUF_8BIT);
- } else if (pI830->cpp == 2) {
- OUT_RING(LOD_PRECLAMP_OGL | DSTORG_HORT_BIAS(0x8) |
- DSTORG_VERT_BIAS(0x8) | COLR_BUF_RGB565);
- } else {
- OUT_RING(LOD_PRECLAMP_OGL | DSTORG_HORT_BIAS(0x8) |
- DSTORG_VERT_BIAS(0x8) | COLR_BUF_ARGB8888 |
- DEPTH_FRMT_24_FIXED_8_OTHER);
- }
-
- /* texture sampler state */
- OUT_RING(_3DSTATE_SAMPLER_STATE | 3);
- OUT_RING(0x00000001);
- OUT_RING(0x00000000);
- OUT_RING(0x00000000);
- OUT_RING(0x00000000);
-
- /* front buffer, pitch, offset */
- OUT_RING(_3DSTATE_BUF_INFO_CMD);
- OUT_RING(BUF_3D_ID_COLOR_BACK | BUF_3D_USE_FENCE |
- BUF_3D_PITCH(pI830->displayWidth * pI830->cpp));
- if (I830IsPrimary(pScrn))
- OUT_RING(pI830->FrontBuffer.Start);
- else
- OUT_RING(pI8301->FrontBuffer2.Start);
-
- /* Set the entire frontbuffer up as a texture */
- OUT_RING(_3DSTATE_MAP_STATE | 3);
- OUT_RING(0x00000001);
-
- if (I830IsPrimary(pScrn))
- OUT_RING(pI830->RotatedMem.Start);
- else
- OUT_RING(pI8301->RotatedMem2.Start);
-
- if (pI830->disableTiling)
- use_fence = 0;
- else
- use_fence = MS3_USE_FENCE_REGS;
-
- if (pI830->cpp == 1)
- use_fence |= MAPSURF_8BIT;
- else
- if (pI830->cpp == 2)
- use_fence |= MAPSURF_16BIT;
- else
- use_fence |= MAPSURF_32BIT;
- OUT_RING(use_fence | (pScreen->height - 1) << 21 | (pScreen->width - 1) << 10);
- OUT_RING(((((pScrn->displayWidth * pI830->cpp) / 4) - 1) << 21));
- ADVANCE_LP_RING();
-
- /* fragment program - texture blend replace*/
- FS_BEGIN();
- i915_fs_dcl(FS_S0);
- i915_fs_dcl(FS_T0);
- i915_fs_texld(FS_OC, FS_S0, FS_T0);
- FS_END();
- }
-
- {
- BEGIN_LP_RING(2);
- OUT_RING(MI_FLUSH | MI_WRITE_DIRTY_STATE | MI_INVALIDATE_MAP_CACHE);
- OUT_RING(0x00000000);
- ADVANCE_LP_RING();
- }
-
- while (nbox--)
- {
- box_x1 = pbox->x1;
- box_y1 = pbox->y1;
- box_x2 = pbox->x2;
- box_y2 = pbox->y2;
- pbox++;
-
- BEGIN_LP_RING(40);
- OUT_RING(MI_NOOP);
- OUT_RING(MI_NOOP);
- OUT_RING(MI_NOOP);
- OUT_RING(MI_NOOP);
- OUT_RING(MI_NOOP);
- OUT_RING(MI_NOOP);
- OUT_RING(MI_NOOP);
-
- /* vertex data */
- OUT_RING(PRIM3D_INLINE | PRIM3D_TRIFAN | (32 - 1));
- verts[0][0] = box_x1; verts[0][1] = box_y1;
- verts[1][0] = box_x2; verts[1][1] = box_y1;
- verts[2][0] = box_x2; verts[2][1] = box_y2;
- verts[3][0] = box_x1; verts[3][1] = box_y2;
- tex[0][0] = box_x1; tex[0][1] = box_y1;
- tex[1][0] = box_x2; tex[1][1] = box_y1;
- tex[2][0] = box_x2; tex[2][1] = box_y2;
- tex[3][0] = box_x1; tex[3][1] = box_y2;
-
- /* transform coordinates to rotated versions, but leave texcoords unchanged */
- for (j = 0; j < 4; j++)
- matrix23TransformCoordf(&rotMatrix, &verts[j][0], &verts[j][1]);
-
- /* emit vertex buffer */
- draw_poly(vb, verts, tex);
- for (j = 0; j < 32; j++)
- OUT_RING(vb[j]);
-
- ADVANCE_LP_RING();
- }
-
-#ifdef XF86DRI
- if (didLock)
- I830DRIUnlock(pScrn1);
-#endif
-}
-
-static void
-I830UpdateRotate (ScreenPtr pScreen,
- shadowBufPtr pBuf)
-{
- ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
- I830Ptr pI830 = I830PTR(pScrn);
- I830Ptr pI8301 = NULL;
- ScrnInfoPtr pScrn1 = pScrn;
- RegionPtr damage = shadowDamage(pBuf);
- int nbox = REGION_NUM_RECTS (damage);
- BoxPtr pbox = REGION_RECTS (damage);
- int box_x1, box_x2, box_y1, box_y2;
- CARD32 vb[32]; /* 32 dword vertex buffer */
- float verts[4][2], tex[4][2];
- struct matrix23 rotMatrix;
- int use_fence;
- int j;
- Bool didLock = FALSE;
-
- if (I830IsPrimary(pScrn)) {
- pI8301 = pI830;
- } else {
- pI8301 = I830PTR(pI830->entityPrivate->pScrn_1);
- pScrn1 = pI830->entityPrivate->pScrn_1;
- }
-
- switch (pI830->rotation) {
- case RR_Rotate_90:
- matrix23Rotate(&rotMatrix,
- pScreen->width, pScreen->height,
- 90);
- break;
- case RR_Rotate_180:
- matrix23Rotate(&rotMatrix,
- pScreen->width, pScreen->height,
- 180);
- break;
- case RR_Rotate_270:
- matrix23Rotate(&rotMatrix,
- pScreen->width, pScreen->height,
- 270);
- break;
- default:
- break;
- }
-
-#ifdef XF86DRI
- if (pI8301->directRenderingEnabled)
- didLock = I830DRILock(pScrn1);
-#endif
-
- if (pScrn->scrnIndex != *pI830->used3D)
- pI830->last_3d = LAST_3D_OTHER;
-
- if (pI830->last_3d != LAST_3D_ROTATION) {
- *pI830->used3D = pScrn->scrnIndex;
-
- pI830->last_3d = LAST_3D_ROTATION;
-
- BEGIN_LP_RING(48);
- OUT_RING(0x682008a1);
- OUT_RING(0x6f402100);
- OUT_RING(0x62120aa9);
- OUT_RING(0x76b3ffff);
- OUT_RING(0x6c818a01);
- OUT_RING(0x6ba008a1);
- OUT_RING(0x69802100);
- OUT_RING(0x63a00aaa);
- OUT_RING(0x6423070e);
- OUT_RING(0x66014142);
- OUT_RING(0x75000000);
- OUT_RING(0x7d880000);
- OUT_RING(0x00000000);
- OUT_RING(0x650001c4);
- OUT_RING(0x6a000000);
- OUT_RING(0x7d020000);
- OUT_RING(0x0000ba98);
-
- /* flush map & render cache */
- OUT_RING(MI_FLUSH | MI_WRITE_DIRTY_STATE | MI_INVALIDATE_MAP_CACHE);
- OUT_RING(0x00000000);
- /* draw rect */
- OUT_RING(_3DSTATE_DRAW_RECT_CMD);
- OUT_RING(0x00000000); /* flags */
- OUT_RING(0x00000000); /* ymin, xmin */
- OUT_RING((pScrn->virtualX - 1) | (pScrn->virtualY - 1) << 16); /* ymax, xmax */
- OUT_RING(0x00000000); /* yorigin, xorigin */
- OUT_RING(MI_NOOP);
-
- /* front buffer */
- OUT_RING(_3DSTATE_BUF_INFO_CMD);
- OUT_RING(0x03800000 | (((pI830->displayWidth * pI830->cpp) / 4) << 2));
- if (I830IsPrimary(pScrn))
- OUT_RING(pI830->FrontBuffer.Start);
- else
- OUT_RING(pI8301->FrontBuffer2.Start);
- OUT_RING(0x7d850000);
- if (pI830->cpp == 1)
- OUT_RING(0x00880000);
- else
- if (pI830->cpp == 2)
- OUT_RING(0x00880200);
- else
- OUT_RING(0x00880308);
- /* scissor */
- OUT_RING(0x7c800002);
- OUT_RING(0x7d810001);
- OUT_RING(0x00000000);
- OUT_RING(0x00000000);
- /* stipple */
- OUT_RING(0x7d830000);
- OUT_RING(0x00000000);
-
- /* texture blend replace */
- OUT_RING(0x7c088088);
- OUT_RING(0x00000000);
- OUT_RING(0x6d021181);
- OUT_RING(0x6d060101);
- OUT_RING(0x6e008046);
- OUT_RING(0x6e048046);
-
-
- /* Set the entire frontbuffer up as a texture */
- OUT_RING(0x7d030804);
-
- if (pI830->disableTiling)
- use_fence = 0;
- else
- use_fence = 2;
-
- if (I830IsPrimary(pScrn))
- OUT_RING(pI830->RotatedMem.Start | use_fence);
- else
- OUT_RING(pI8301->RotatedMem2.Start | use_fence);
-
- if (pI830->cpp == 1)
- OUT_RING(0x40 | (pScreen->height - 1) << 21 | (pScreen->width - 1) << 10);
- else if (pI830->cpp == 2)
- OUT_RING(0x80 | (pScreen->height - 1) << 21 | (pScreen->width - 1) << 10);
- else
- OUT_RING(0xc0 | (pScreen->height - 1) << 21 | (pScreen->width - 1) << 10);
-
- OUT_RING((((pScrn->displayWidth * pI830->cpp / 4) - 1) << 21));
- OUT_RING(0x00000000);
- OUT_RING(0x00000000);
-
-
- ADVANCE_LP_RING();
- }
-
- {
- BEGIN_LP_RING(2);
- /* flush map & render cache */
- OUT_RING(MI_FLUSH | MI_WRITE_DIRTY_STATE | MI_INVALIDATE_MAP_CACHE);
- OUT_RING(0x00000000);
- ADVANCE_LP_RING();
- }
-
- while (nbox--)
- {
- box_x1 = pbox->x1;
- box_y1 = pbox->y1;
- box_x2 = pbox->x2;
- box_y2 = pbox->y2;
- pbox++;
-
- BEGIN_LP_RING(40);
-
- OUT_RING(MI_NOOP);
- OUT_RING(MI_NOOP);
- OUT_RING(MI_NOOP);
- OUT_RING(MI_NOOP);
- OUT_RING(MI_NOOP);
-
- /* vertex data */
- OUT_RING(0x7f0c001f);
- verts[0][0] = box_x1; verts[0][1] = box_y1;
- verts[1][0] = box_x2; verts[1][1] = box_y1;
- verts[2][0] = box_x2; verts[2][1] = box_y2;
- verts[3][0] = box_x1; verts[3][1] = box_y2;
- tex[0][0] = box_x1; tex[0][1] = box_y1;
- tex[1][0] = box_x2; tex[1][1] = box_y1;
- tex[2][0] = box_x2; tex[2][1] = box_y2;
- tex[3][0] = box_x1; tex[3][1] = box_y2;
-
- /* transform coordinates to rotated versions, but leave texcoords unchanged */
- for (j = 0; j < 4; j++)
- matrix23TransformCoordf(&rotMatrix, &verts[j][0], &verts[j][1]);
-
- /* emit vertex buffer */
- draw_poly(vb, verts, tex);
- for (j = 0; j < 32; j++)
- OUT_RING(vb[j]);
-
- OUT_RING(0x05000000);
- OUT_RING(0x00000000);
-
- ADVANCE_LP_RING();
- }
-
- {
- BEGIN_LP_RING(2);
- /* flush map & render cache */
- OUT_RING(MI_FLUSH | MI_WRITE_DIRTY_STATE | MI_INVALIDATE_MAP_CACHE);
- OUT_RING(0x00000000);
- ADVANCE_LP_RING();
- }
-
-#ifdef XF86DRI
- if (didLock)
- I830DRIUnlock(pScrn1);
-#endif
-}
-
-Bool
-I830Rotate(ScrnInfoPtr pScrn, DisplayModePtr mode)
-{
- I830Ptr pI830 = I830PTR(pScrn);
- I830Ptr pI8301 = NULL;
- I830Ptr pI8302 = NULL;
- ScrnInfoPtr pScrn1 = NULL;
- ScrnInfoPtr pScrn2 = NULL;
- int i;
- ShadowUpdateProc func = NULL;
- Rotation oldRotation = pI830->rotation; /* save old state */
- int displayWidth = pScrn->displayWidth; /* save displayWidth */
- Bool reAllocate = TRUE;
- Bool didLock = FALSE;
-
- /* Good pitches to allow tiling. Don't care about pitches < 1024. */
- static const int pitches[] = {
-/*
- 128 * 2,
- 128 * 4,
-*/
- 128 * 8,
- 128 * 16,
- 128 * 32,
- 128 * 64,
- 0
- };
-
- if (pI830->noAccel)
- func = LoaderSymbol("shadowUpdateRotatePacked");
- else {
- if (IS_I9XX(pI830)) {
- if (IS_I965G(pI830))
- func = I965UpdateRotate;
- else
- func = I915UpdateRotate;
- } else
- func = I830UpdateRotate;
- }
-
- if (I830IsPrimary(pScrn)) {
- pI8301 = pI830;
- pScrn1 = pScrn;
- if (pI830->entityPrivate) {
- pI8302 = I830PTR(pI830->entityPrivate->pScrn_2);
- pScrn2 = pI830->entityPrivate->pScrn_2;
- }
- } else {
- pI8301 = I830PTR(pI830->entityPrivate->pScrn_1);
- pScrn1 = pI830->entityPrivate->pScrn_1;
- pI8302 = pI830;
- pScrn2 = pScrn;
- }
-
- pI830->rotation = xf86RandR12GetRotation(pScrn->pScreen);
-
- /* Check if we've still got the same orientation, or same mode */
- if (pI830->rotation == oldRotation && pI830->currentMode == mode)
-#if 0
- reAllocate = FALSE;
-#else
- return TRUE;
-#endif
-
- /*
- * We grab the DRI lock when reallocating buffers to avoid DRI clients
- * getting bogus information.
- */
-
-#ifdef XF86DRI
- if (pI8301->directRenderingEnabled && reAllocate) {
- didLock = I830DRILock(pScrn1);
-
- /* Do heap teardown here
- */
- if (pI8301->mmModeFlags & I830_KERNEL_TEX) {
- drmI830MemDestroyHeap destroy;
- destroy.region = I830_MEM_REGION_AGP;
-
- if (drmCommandWrite(pI8301->drmSubFD,
- DRM_I830_DESTROY_HEAP,
- &destroy, sizeof(destroy))) {
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
- "[dri] I830 destroy heap failed\n");
- }
- }
-
- if (pI8301->mmModeFlags & I830_KERNEL_TEX) {
- if (pI8301->TexMem.Key != -1)
- xf86UnbindGARTMemory(pScrn1->scrnIndex, pI8301->TexMem.Key);
- I830FreeVidMem(pScrn1, &(pI8301->TexMem));
- }
- if (pI8301->StolenPool.Allocated.Key != -1) {
- xf86UnbindGARTMemory(pScrn1->scrnIndex, pI8301->StolenPool.Allocated.Key);
- xf86DeallocateGARTMemory(pScrn1->scrnIndex, pI8301->StolenPool.Allocated.Key);
- }
- if (pI8301->DepthBuffer.Key != -1)
- xf86UnbindGARTMemory(pScrn1->scrnIndex, pI8301->DepthBuffer.Key);
- I830FreeVidMem(pScrn1, &(pI8301->DepthBuffer));
- if (pI8301->BackBuffer.Key != -1)
- xf86UnbindGARTMemory(pScrn1->scrnIndex, pI8301->BackBuffer.Key);
- I830FreeVidMem(pScrn1, &(pI8301->BackBuffer));
- }
-#endif
-
- if (reAllocate) {
- *pI830->used3D |= 1<<31; /* use high bit to denote new rotation occured */
-
- if (pI8301->RotatedMem.Key != -1)
- xf86UnbindGARTMemory(pScrn1->scrnIndex, pI8301->RotatedMem.Key);
-
- I830FreeVidMem(pScrn1, &(pI8301->RotatedMem));
- memset(&(pI8301->RotatedMem), 0, sizeof(pI8301->RotatedMem));
- pI8301->RotatedMem.Key = -1;
-
- if (IS_I965G(pI8301)) {
- if (pI8301->RotateStateMem.Key != -1)
- xf86UnbindGARTMemory(pScrn1->scrnIndex, pI8301->RotateStateMem.Key);
-
- I830FreeVidMem(pScrn1, &(pI8301->RotateStateMem));
- memset(&(pI8301->RotateStateMem), 0, sizeof(pI8301->RotateStateMem));
- pI8301->RotateStateMem.Key = -1;
- }
-
- if (pI830->entityPrivate) {
- if (pI8301->RotatedMem2.Key != -1)
- xf86UnbindGARTMemory(pScrn1->scrnIndex, pI8301->RotatedMem2.Key);
-
- I830FreeVidMem(pScrn1, &(pI8301->RotatedMem2));
- memset(&(pI8301->RotatedMem2), 0, sizeof(pI8301->RotatedMem2));
- pI8301->RotatedMem2.Key = -1;
- }
- }
-
- switch (pI830->rotation) {
- case RR_Rotate_0:
- if (reAllocate)
- xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "Rotating Screen to 0 degrees\n");
- pScrn->displayWidth = pI830->displayWidth;
- break;
- case RR_Rotate_90:
- if (reAllocate)
- xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "Rotating Screen to 90 degrees\n");
- pScrn->displayWidth = pScrn->pScreen->width;
- break;
- case RR_Rotate_180:
- if (reAllocate)
- xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "Rotating Screen to 180 degrees\n");
- pScrn->displayWidth = pI830->displayWidth;
- break;
- case RR_Rotate_270:
- if (reAllocate)
- xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "Rotating Screen to 270 degrees\n");
- pScrn->displayWidth = pScrn->pScreen->width;
- break;
- }
-
- /* As DRI doesn't run on the secondary head, we know that disableTiling
- * is always TRUE.
- */
- if (I830IsPrimary(pScrn) && !pI830->disableTiling) {
-#if 0
- int dWidth = pScrn->displayWidth; /* save current displayWidth */
-#endif
-
- for (i = 0; pitches[i] != 0; i++) {
- if (pitches[i] >= pScrn->displayWidth) {
- pScrn->displayWidth = pitches[i];
- break;
- }
- }
-
- /*
- * If the displayWidth is a tilable pitch, test if there's enough
- * memory available to enable tiling.
- */
- if (pScrn->displayWidth == pitches[i]) {
- /* TODO */
- }
- }
-
- if (reAllocate) {
- if (pI830->entityPrivate) {
- if (pI8302->rotation != RR_Rotate_0) {
- if (!I830AllocateRotated2Buffer(pScrn1,
- pI8302->disableTiling ? ALLOC_NO_TILING : 0))
- goto BAIL0;
-
- I830FixOffset(pScrn1, &(pI8301->RotatedMem2));
- if (pI8301->RotatedMem2.Key != -1)
- xf86BindGARTMemory(pScrn1->scrnIndex, pI8301->RotatedMem2.Key, pI8301->RotatedMem2.Offset);
- }
- }
-
- if (pI8301->rotation != RR_Rotate_0) {
- if (!I830AllocateRotatedBuffer(pScrn1,
- pI8301->disableTiling ? ALLOC_NO_TILING : 0))
- goto BAIL1;
-
- I830FixOffset(pScrn1, &(pI8301->RotatedMem));
- if (pI8301->RotatedMem.Key != -1)
- xf86BindGARTMemory(pScrn1->scrnIndex, pI8301->RotatedMem.Key, pI8301->RotatedMem.Offset);
- if (IS_I965G(pI8301)) {
- I830FixOffset(pScrn1, &(pI8301->RotateStateMem));
- if (pI8301->RotateStateMem.Key != -1)
- xf86BindGARTMemory(pScrn1->scrnIndex, pI8301->RotateStateMem.Key,
- pI8301->RotateStateMem.Offset);
- }
- }
- }
-
- shadowRemove (pScrn->pScreen, NULL);
- if (pI830->rotation != RR_Rotate_0)
- shadowAdd (pScrn->pScreen,
- (*pScrn->pScreen->GetScreenPixmap) (pScrn->pScreen),
- func, I830WindowLinear, pI830->rotation, NULL);
-
- if (I830IsPrimary(pScrn)) {
- if (pI830->rotation != RR_Rotate_0)
- pScrn->fbOffset = pI830->RotatedMem.Start;
- else
- pScrn->fbOffset = pI830->FrontBuffer.Start;
- if (pI830->entityPrivate) {
- if (pI8302->rotation != RR_Rotate_0)
- pScrn2->fbOffset = pI8301->RotatedMem2.Start;
- else
- pScrn2->fbOffset = pI8301->FrontBuffer2.Start;
- I830SelectBuffer(pScrn2, I830_SELECT_FRONT);
- }
- } else {
- if (pI830->rotation != RR_Rotate_0)
- pScrn->fbOffset = pI8301->RotatedMem2.Start;
- else
- pScrn->fbOffset = pI8301->FrontBuffer2.Start;
- if (pI8301->rotation != RR_Rotate_0)
- pScrn1->fbOffset = pI8301->RotatedMem.Start;
- else
- pScrn1->fbOffset = pI8301->FrontBuffer.Start;
- I830SelectBuffer(pScrn1, I830_SELECT_FRONT);
- }
- I830SelectBuffer(pScrn, I830_SELECT_FRONT);
-
-#ifdef XF86DRI
- if (pI8301->directRenderingEnabled && reAllocate) {
- if (!I830AllocateBackBuffer(pScrn1,
- pI8301->disableTiling ? ALLOC_NO_TILING : 0))
- goto BAIL2;
-
- if (!I830AllocateDepthBuffer(pScrn1,
- pI8301->disableTiling ? ALLOC_NO_TILING : 0))
- goto BAIL3;
-
- if (pI8301->mmModeFlags & I830_KERNEL_TEX) {
- if (!I830AllocateTextureMemory(pScrn1,
- pI8301->disableTiling ? ALLOC_NO_TILING : 0))
- goto BAIL4;
- }
-
- I830DoPoolAllocation(pScrn1, &(pI8301->StolenPool));
-
- I830FixOffset(pScrn1, &(pI8301->BackBuffer));
- I830FixOffset(pScrn1, &(pI8301->DepthBuffer));
-
- if (pI8301->BackBuffer.Key != -1)
- xf86BindGARTMemory(pScrn1->scrnIndex, pI8301->BackBuffer.Key, pI8301->BackBuffer.Offset);
- if (pI8301->DepthBuffer.Key != -1)
- xf86BindGARTMemory(pScrn1->scrnIndex, pI8301->DepthBuffer.Key, pI8301->DepthBuffer.Offset);
- if (pI8301->StolenPool.Allocated.Key != -1)
- xf86BindGARTMemory(pScrn1->scrnIndex, pI8301->StolenPool.Allocated.Key, pI8301->StolenPool.Allocated.Offset);
- if (pI8301->mmModeFlags & I830_KERNEL_TEX) {
- if (pI8301->TexMem.Key != -1)
- xf86BindGARTMemory(pScrn1->scrnIndex, pI8301->TexMem.Key, pI8301->TexMem.Offset);
- }
- I830SetupMemoryTiling(pScrn1);
- /* update fence registers */
- if (IS_I965G(pI830)) {
- for (i = 0; i < FENCE_NEW_NR; i++) {
- OUTREG(FENCE_NEW + i * 8, pI830->ModeReg.Fence[i]);
- OUTREG(FENCE_NEW + 4 + i * 8, pI830->ModeReg.Fence[i+FENCE_NEW_NR]);
- }
- } else {
- for (i = 0; i < 8; i++)
- OUTREG(FENCE + i * 4, pI8301->ModeReg.Fence[i]);
- }
-
- {
- drmI830Sarea *sarea = DRIGetSAREAPrivate(pScrn1->pScreen);
- I830UpdateDRIBuffers(pScrn1, sarea );
- }
-
- if (didLock)
- I830DRIUnlock(pScrn1);
- }
-#endif
-
-#if 0
- if (I830IsPrimary(pScrn)) {
- pI830->xoffset = (pI830->FrontBuffer.Start / pI830->cpp) % pI830->displayWidth;
- pI830->yoffset = (pI830->FrontBuffer.Start / pI830->cpp) / pI830->displayWidth;
- } else {
- I830Ptr pI8301 = I830PTR(pI830->entityPrivate->pScrn_1);
- pI830->xoffset = (pI8301->FrontBuffer2.Start / pI830->cpp) % pI830->displayWidth;
- pI830->yoffset = (pI8301->FrontBuffer2.Start / pI830->cpp) / pI830->displayWidth;
- }
-#endif
-
- pScrn->pScreen->ModifyPixmapHeader((*pScrn->pScreen->GetScreenPixmap)(pScrn->pScreen), pScrn->pScreen->width,
- pScrn->pScreen->height, pScrn->pScreen->rootDepth, pScrn->bitsPerPixel,
- PixmapBytePad(pScrn->displayWidth, pScrn->pScreen->rootDepth),
- (pointer)(pI8301->FbBase + pScrn->fbOffset));
-
- if (pI830->entityPrivate) {
- if (I830IsPrimary(pScrn)) {
- if (!pI830->starting) {
- pScrn2->pScreen->ModifyPixmapHeader((*pScrn2->pScreen->GetScreenPixmap)(pScrn2->pScreen), pScrn2->pScreen->width,
- pScrn2->pScreen->height, pScrn2->pScreen->rootDepth, pScrn2->bitsPerPixel,
- PixmapBytePad(pScrn2->displayWidth, pScrn2->pScreen->rootDepth),
- (pointer)(pI8301->FbBase + pScrn2->fbOffset));
-
- /* Repaint the second head */
- (*pScrn2->EnableDisableFBAccess) (pScrn2->pScreen->myNum, FALSE);
- (*pScrn2->EnableDisableFBAccess) (pScrn2->pScreen->myNum, TRUE);
- }
- } else {
- if (!pI830->starting) {
- pScrn1->pScreen->ModifyPixmapHeader((*pScrn1->pScreen->GetScreenPixmap)(pScrn1->pScreen), pScrn1->pScreen->width,
- pScrn1->pScreen->height, pScrn1->pScreen->rootDepth, pScrn1->bitsPerPixel,
- PixmapBytePad(pScrn1->displayWidth, pScrn1->pScreen->rootDepth),
- (pointer)(pI8301->FbBase + pScrn1->fbOffset));
-
- /* Repaint the first head */
- (*pScrn1->EnableDisableFBAccess) (pScrn1->pScreen->myNum, FALSE);
- (*pScrn1->EnableDisableFBAccess) (pScrn1->pScreen->myNum, TRUE);
- }
- }
- }
-
-#ifdef I830_USE_XAA
- if (pI830->AccelInfoRec != NULL) {
- /* Don't allow pixmap cache or offscreen pixmaps when rotated */
- /* XAA needs some serious fixing for this to happen */
- if (pI830->rotation == RR_Rotate_0) {
- pI830->AccelInfoRec->Flags = LINEAR_FRAMEBUFFER | OFFSCREEN_PIXMAPS |
- PIXMAP_CACHE;
- pI830->AccelInfoRec->UsingPixmapCache = TRUE;
- /* funny as it seems this will enable XAA's createpixmap */
- pI830->AccelInfoRec->maxOffPixWidth = 0;
- pI830->AccelInfoRec->maxOffPixHeight = 0;
- } else {
- pI830->AccelInfoRec->Flags = LINEAR_FRAMEBUFFER;
- pI830->AccelInfoRec->UsingPixmapCache = FALSE;
- /* funny as it seems this will disable XAA's createpixmap */
- pI830->AccelInfoRec->maxOffPixWidth = 1;
- pI830->AccelInfoRec->maxOffPixHeight = 1;
- }
- }
-#endif
-
- return TRUE;
-
-BAIL4:
-#ifdef XF86DRI
- if (pI8301->directRenderingEnabled)
- I830FreeVidMem(pScrn1, &(pI8301->DepthBuffer));
-#endif
-BAIL3:
-#ifdef XF86DRI
- if (pI8301->directRenderingEnabled)
- I830FreeVidMem(pScrn1, &(pI8301->BackBuffer));
-#endif
-BAIL2:
- if (pI8301->rotation != RR_Rotate_0) {
- if (pI8301->RotatedMem.Key != -1)
- xf86UnbindGARTMemory(pScrn1->scrnIndex, pI8301->RotatedMem.Key);
-
- I830FreeVidMem(pScrn1, &(pI8301->RotatedMem));
- memset(&(pI8301->RotatedMem), 0, sizeof(pI8301->RotatedMem));
- pI8301->RotatedMem.Key = -1;
- }
-BAIL1:
- if (pI830->entityPrivate) {
- if (pI8302->rotation != RR_Rotate_0) {
- if (pI8301->RotatedMem.Key != -1)
- xf86UnbindGARTMemory(pScrn1->scrnIndex, pI8301->RotatedMem.Key);
-
- I830FreeVidMem(pScrn1, &(pI8301->RotatedMem));
- memset(&(pI8301->RotatedMem), 0, sizeof(pI8301->RotatedMem));
- pI8301->RotatedMem.Key = -1;
- }
- }
-BAIL0:
- pScrn->displayWidth = displayWidth;
-
- /* must flip mmWidth & mmHeight */
- if ( ((oldRotation & (RR_Rotate_90 | RR_Rotate_270)) &&
- (pI830->rotation & (RR_Rotate_0 | RR_Rotate_180))) ||
- ((oldRotation & (RR_Rotate_0 | RR_Rotate_180)) &&
- (pI830->rotation & (RR_Rotate_90 | RR_Rotate_270))) ) {
- int tmp = pScrn->pScreen->mmWidth;
- pScrn->pScreen->mmWidth = pScrn->pScreen->mmHeight;
- pScrn->pScreen->mmHeight = tmp;
- }
-
- if (oldRotation & (RR_Rotate_0 | RR_Rotate_180)) {
- pScrn->pScreen->width = pScrn->virtualX;
- pScrn->pScreen->height = pScrn->virtualY;
- } else {
- pScrn->pScreen->width = pScrn->virtualY;
- pScrn->pScreen->height = pScrn->virtualX;
- }
-
- pI830->rotation = oldRotation;
-
- if (pI830->entityPrivate) {
- if (pI8302->rotation != RR_Rotate_0) {
- if (!I830AllocateRotated2Buffer(pScrn1,
- pI8302->disableTiling ? ALLOC_NO_TILING : 0))
- xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "Oh dear, the rotated2 buffer failed - badness\n");
-
- I830FixOffset(pScrn1, &(pI8301->RotatedMem2));
- if (pI8301->RotatedMem2.Key != -1)
- xf86BindGARTMemory(pScrn1->scrnIndex, pI8301->RotatedMem2.Key, pI8301->RotatedMem2.Offset);
- }
- }
-
- if (pI8301->rotation != RR_Rotate_0) {
- if (!I830AllocateRotatedBuffer(pScrn1,
- pI8301->disableTiling ? ALLOC_NO_TILING : 0))
- xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "Oh dear, the rotated buffer failed - badness\n");
-
- I830FixOffset(pScrn1, &(pI8301->RotatedMem));
- if (pI8301->RotatedMem.Key != -1)
- xf86BindGARTMemory(pScrn1->scrnIndex, pI8301->RotatedMem.Key, pI8301->RotatedMem.Offset);
- }
-
- shadowRemove (pScrn->pScreen, NULL);
- if (pI830->rotation != RR_Rotate_0)
- shadowAdd (pScrn->pScreen,
- (*pScrn->pScreen->GetScreenPixmap) (pScrn->pScreen),
- func, I830WindowLinear, pI830->rotation, NULL);
-
- if (I830IsPrimary(pScrn)) {
- if (pI830->rotation != RR_Rotate_0)
- pScrn->fbOffset = pI830->RotatedMem.Start;
- else
- pScrn->fbOffset = pI830->FrontBuffer.Start;
- if (pI830->entityPrivate) {
- if (pI8302->rotation != RR_Rotate_0)
- pScrn2->fbOffset = pI8301->RotatedMem2.Start;
- else
- pScrn2->fbOffset = pI8301->FrontBuffer2.Start;
- I830SelectBuffer(pScrn2, I830_SELECT_FRONT);
- }
- } else {
- if (pI830->rotation != RR_Rotate_0)
- pScrn->fbOffset = pI8301->RotatedMem2.Start;
- else
- pScrn->fbOffset = pI8301->FrontBuffer2.Start;
- if (pI8301->rotation != RR_Rotate_0)
- pScrn1->fbOffset = pI8301->RotatedMem.Start;
- else
- pScrn1->fbOffset = pI8301->FrontBuffer.Start;
- I830SelectBuffer(pScrn1, I830_SELECT_FRONT);
- }
- I830SelectBuffer(pScrn, I830_SELECT_FRONT);
-
- xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "Reverting to previous configured mode\n");
-
- switch (oldRotation) {
- case RR_Rotate_0:
- xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "Rotating Screen back to 0 degrees\n");
- break;
- case RR_Rotate_90:
- xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "Rotating Screen back to 90 degrees\n");
- break;
- case RR_Rotate_180:
- xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "Rotating Screen back to 180 degrees\n");
- break;
- case RR_Rotate_270:
- xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "Rotating Screen back to 270 degrees\n");
- break;
- }
-
-#ifdef XF86DRI
- if (pI8301->directRenderingEnabled) {
- if (!I830AllocateBackBuffer(pScrn1,
- pI8301->disableTiling ? ALLOC_NO_TILING : 0))
- xf86DrvMsg(pScrn1->scrnIndex, X_INFO,
- "Oh dear, the back buffer failed - badness\n");
-
- if (!I830AllocateDepthBuffer(pScrn1,
- pI8301->disableTiling ? ALLOC_NO_TILING : 0))
- xf86DrvMsg(pScrn1->scrnIndex, X_INFO,
- "Oh dear, the depth buffer failed - badness\n");
- if (pI8301->mmModeFlags & I830_KERNEL_TEX) {
- if (!I830AllocateTextureMemory(pScrn1,
- pI8301->disableTiling ? ALLOC_NO_TILING : 0))
- xf86DrvMsg(pScrn1->scrnIndex, X_INFO,
- "Oh dear, the texture cache failed - badness\n");
- }
-
- I830DoPoolAllocation(pScrn1, &(pI8301->StolenPool));
-
- I830FixOffset(pScrn1, &(pI8301->BackBuffer));
- I830FixOffset(pScrn1, &(pI8301->DepthBuffer));
-
- if (pI8301->BackBuffer.Key != -1)
- xf86BindGARTMemory(pScrn1->scrnIndex, pI8301->BackBuffer.Key, pI8301->BackBuffer.Offset);
- if (pI8301->DepthBuffer.Key != -1)
- xf86BindGARTMemory(pScrn1->scrnIndex, pI8301->DepthBuffer.Key, pI8301->DepthBuffer.Offset);
- if (pI8301->StolenPool.Allocated.Key != -1)
- xf86BindGARTMemory(pScrn1->scrnIndex, pI8301->StolenPool.Allocated.Key, pI8301->StolenPool.Allocated.Offset);
- if (pI8301->mmModeFlags & I830_KERNEL_TEX) {
- if (pI8301->TexMem.Key != -1)
- xf86BindGARTMemory(pScrn1->scrnIndex, pI8301->TexMem.Key, pI8301->TexMem.Offset);
- }
- I830SetupMemoryTiling(pScrn1);
- /* update fence registers */
- for (i = 0; i < 8; i++)
- OUTREG(FENCE + i * 4, pI8301->ModeReg.Fence[i]);
- {
- drmI830Sarea *sarea = DRIGetSAREAPrivate(pScrn1->pScreen);
- I830UpdateDRIBuffers(pScrn1, sarea );
- }
-
- if (didLock)
- I830DRIUnlock(pScrn1);
- }
-#endif
-
- pScrn->pScreen->ModifyPixmapHeader((*pScrn->pScreen->GetScreenPixmap)(pScrn->pScreen), pScrn->pScreen->width,
- pScrn->pScreen->height, pScrn->pScreen->rootDepth, pScrn->bitsPerPixel,
- PixmapBytePad(pScrn->displayWidth, pScrn->pScreen->rootDepth),
- (pointer)(pI8301->FbBase + pScrn->fbOffset));
-
- if (pI830->entityPrivate) {
- if (I830IsPrimary(pScrn)) {
- pScrn2->pScreen->ModifyPixmapHeader((*pScrn2->pScreen->GetScreenPixmap)(pScrn2->pScreen), pScrn2->pScreen->width,
- pScrn2->pScreen->height, pScrn2->pScreen->rootDepth, pScrn2->bitsPerPixel,
- PixmapBytePad(pScrn2->displayWidth, pScrn2->pScreen->rootDepth),
- (pointer)(pI8301->FbBase + pScrn2->fbOffset));
-
- /* Repaint the second head */
- (*pScrn2->EnableDisableFBAccess) (pScrn2->pScreen->myNum, FALSE);
- (*pScrn2->EnableDisableFBAccess) (pScrn2->pScreen->myNum, TRUE);
- } else {
- pScrn1->pScreen->ModifyPixmapHeader((*pScrn1->pScreen->GetScreenPixmap)(pScrn1->pScreen), pScrn1->pScreen->width,
- pScrn1->pScreen->height, pScrn1->pScreen->rootDepth, pScrn1->bitsPerPixel,
- PixmapBytePad(pScrn1->displayWidth, pScrn1->pScreen->rootDepth),
- (pointer)(pI8301->FbBase + pScrn1->fbOffset));
-
- /* Repaint the first head */
- (*pScrn1->EnableDisableFBAccess) (pScrn1->pScreen->myNum, FALSE);
- (*pScrn1->EnableDisableFBAccess) (pScrn1->pScreen->myNum, TRUE);
- }
- }
-
- return FALSE;
-}
diff --git a/src/i830_xaa.c b/src/i830_xaa.c
index be1fb83..96b23fa 100644
--- a/src/i830_xaa.c
+++ b/src/i830_xaa.c
@@ -280,8 +280,6 @@ CheckTiling(ScrnInfoPtr pScrn)
if (IS_I965G(pI830)) {
if (pI830->bufferOffset == pScrn->fbOffset && pI830->front_tiled == FENCE_XMAJOR)
tiled = 1;
- if (pI830->bufferOffset == pI830->RotatedMem.Start && pI830->rotated_tiled == FENCE_XMAJOR)
- tiled = 1;
if (pI830->bufferOffset == pI830->BackBuffer.Start && pI830->back_tiled == FENCE_XMAJOR)
tiled = 1;
/* not really supported as it's always YMajor tiled */
diff --git a/src/rotation_sf0.g4a b/src/rotation_sf0.g4a
deleted file mode 100644
index 8c1398f..0000000
--- a/src/rotation_sf0.g4a
+++ /dev/null
@@ -1,17 +0,0 @@
-send (1) 0 g6<1>F g1.12<0,1,0>F math inv scalar mlen 1 rlen 1 { align1 };
-send (1) 0 g6.4<1>F g1.20<0,1,0>F math inv scalar mlen 1 rlen 1 { align1 };
-add (8) g7<1>F g4<8,8,1>F -g3<8,8,1>F { align1 };
-mul (1) g7<1>F g7<0,1,0>F g6<0,1,0>F { align1 };
-mul (1) g7.4<1>F g7.4<0,1,0>F g6.4<0,1,0>F { align1 };
-mov (8) m1<1>F g7<0,1,0>F { align1 };
-mov (8) m2<1>F g7.4<0,1,0>F { align1 };
-mov (8) m3<1>F g3<8,8,1>F { align1 };
-send (8) 0 null g0<8,8,1>F urb 0 transpose used complete mlen 4 rlen 0 { align1 EOT };
-nop;
-nop;
-nop;
-nop;
-nop;
-nop;
-nop;
-nop;
diff --git a/src/rotation_sf90.g4a b/src/rotation_sf90.g4a
deleted file mode 100644
index 2648dff..0000000
--- a/src/rotation_sf90.g4a
+++ /dev/null
@@ -1,17 +0,0 @@
-send (1) 0 g6<1>F g1.20<0,1,0>F math inv scalar mlen 1 rlen 1 { align1 };
-send (1) 0 g6.4<1>F g1.12<0,1,0>F math inv scalar mlen 1 rlen 1 { align1 };
-add (8) g7<1>F g4<8,8,1>F -g3<8,8,1>F { align1 };
-mul (1) g7<1>F g7<0,1,0>F g6<0,1,0>F { align1 };
-mul (1) g7.4<1>F g7.4<0,1,0>F g6.4<0,1,0>F { align1 };
-mov (8) m1<1>F g7<0,1,0>F { align1 };
-mov (8) m2<1>F g7.4<0,1,0>F { align1 };
-mov (8) m3<1>F g3<8,8,1>F { align1 };
-send (8) 0 null g0<8,8,1>F urb 0 transpose used complete mlen 4 rlen 0 { align1 EOT };
-nop;
-nop;
-nop;
-nop;
-nop;
-nop;
-nop;
-nop;
diff --git a/src/rotation_sf_prog0.h b/src/rotation_sf_prog0.h
deleted file mode 100644
index 830d176..0000000
--- a/src/rotation_sf_prog0.h
+++ /dev/null
@@ -1,17 +0,0 @@
- { 0x00000031, 0x20c01fbd, 0x0000002c, 0x01110081 },
- { 0x00000031, 0x20c41fbd, 0x00000034, 0x01110081 },
- { 0x00600040, 0x20e077bd, 0x008d0080, 0x008d4060 },
- { 0x00000041, 0x20e077bd, 0x000000e0, 0x000000c0 },
- { 0x00000041, 0x20e477bd, 0x000000e4, 0x000000c4 },
- { 0x00600001, 0x202003be, 0x000000e0, 0x00000000 },
- { 0x00600001, 0x204003be, 0x000000e4, 0x00000000 },
- { 0x00600001, 0x206003be, 0x008d0060, 0x00000000 },
- { 0x00600031, 0x20001fbc, 0x008d0000, 0x8640c800 },
- { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
- { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
- { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
- { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
- { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
- { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
- { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
- { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
diff --git a/src/rotation_sf_prog90.h b/src/rotation_sf_prog90.h
deleted file mode 100644
index 2e94b8f..0000000
--- a/src/rotation_sf_prog90.h
+++ /dev/null
@@ -1,17 +0,0 @@
- { 0x00000031, 0x20c01fbd, 0x00000034, 0x01110081 },
- { 0x00000031, 0x20c41fbd, 0x0000002c, 0x01110081 },
- { 0x00600040, 0x20e077bd, 0x008d0080, 0x008d4060 },
- { 0x00000041, 0x20e077bd, 0x000000e0, 0x000000c0 },
- { 0x00000041, 0x20e477bd, 0x000000e4, 0x000000c4 },
- { 0x00600001, 0x202003be, 0x000000e0, 0x00000000 },
- { 0x00600001, 0x204003be, 0x000000e4, 0x00000000 },
- { 0x00600001, 0x206003be, 0x008d0060, 0x00000000 },
- { 0x00600031, 0x20001fbc, 0x008d0000, 0x8640c800 },
- { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
- { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
- { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
- { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
- { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
- { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
- { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
- { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
diff --git a/src/rotation_wm0.g4a b/src/rotation_wm0.g4a
deleted file mode 100644
index fe09734..0000000
--- a/src/rotation_wm0.g4a
+++ /dev/null
@@ -1,123 +0,0 @@
-/* The initial payload of the thread is always g0.
- * WM_URB (incoming URB entries) is g3
- * X0_R is g4
- * X1_R is g5
- * Y0_R is g6
- * Y1_R is g7
- */
-
- /* Set up the X/Y screen coordinates of the pixels in our 4 subspans. Each
- * subspan is a 2x2 rectangle, and the screen x/y of the upper left of each
- * subspan are given in GRF register 1.2 through 1.5 (which, with the word
- * addressing below, are 1.4 through 1.11).
- *
- * The result is WM_X*_R and WM_Y*R being:
- *
- * X0: {ss0.x, ss0.x+1, ss0.x, ss0.x+1, ss1.x, ss1.x+1, ss1.x, ss1.x+y}
- * Y0: {ss0.y, ss0.y, ss0.y+1, ss0.y+1, ss1.y, ss1.y, ss1.y+1, ss1.y+1}
- * X1: {ss2.x, ss2.x+1, ss2.x, ss2.x+1, ss3.x, ss3.x+1, ss3.x, ss3.x+y}
- * Y1: {ss2.y, ss2.y, ss2.y+1, ss2.y+1, ss3.y, ss3.y, ss3.y+1, ss3.y+1}
- */
-
- /* Set up ss0.x coordinates*/
-mov (1) g4<1>F g1.8<0,1,0>UW { align1 };
-add (1) g4.4<1>F g1.8<0,1,0>UW 1UB { align1 };
-mov (1) g4.8<1>F g1.8<0,1,0>UW { align1 };
-add (1) g4.12<1>F g1.8<0,1,0>UW 1UB { align1 };
- /* Set up ss0.y coordinates */
-mov (1) g6<1>F g1.10<0,1,0>UW { align1 };
-mov (1) g6.4<1>F g1.10<0,1,0>UW { align1 };
-add (1) g6.8<1>F g1.10<0,1,0>UW 1UB { align1 };
-add (1) g6.12<1>F g1.10<0,1,0>UW 1UB { align1 };
- /* set up ss1.x coordinates */
-mov (1) g4.16<1>F g1.12<0,1,0>UW { align1 };
-add (1) g4.20<1>F g1.12<0,1,0>UW 1UB { align1 };
-mov (1) g4.24<1>F g1.12<0,1,0>UW { align1 };
-add (1) g4.28<1>F g1.12<0,1,0>UW 1UB { align1 };
- /* set up ss1.y coordinates */
-mov (1) g6.16<1>F g1.14<0,1,0>UW { align1 };
-mov (1) g6.20<1>F g1.14<0,1,0>UW { align1 };
-add (1) g6.24<1>F g1.14<0,1,0>UW 1UB { align1 };
-add (1) g6.28<1>F g1.14<0,1,0>UW 1UB { align1 };
- /* Set up ss2.x coordinates */
-mov (1) g5<1>F g1.16<0,1,0>UW { align1 };
-add (1) g5.4<1>F g1.16<0,1,0>UW 1UB { align1 };
-mov (1) g5.8<1>F g1.16<0,1,0>UW { align1 };
-add (1) g5.12<1>F g1.16<0,1,0>UW 1UB { align1 };
- /* Set up ss2.y coordinates */
-mov (1) g7<1>F g1.18<0,1,0>UW { align1 };
-mov (1) g7.4<1>F g1.18<0,1,0>UW { align1 };
-add (1) g7.8<1>F g1.18<0,1,0>UW 1UB { align1 };
-add (1) g7.12<1>F g1.18<0,1,0>UW 1UB { align1 };
- /* Set up ss3.x coordinates */
-mov (1) g5.16<1>F g1.20<0,1,0>UW { align1 };
-add (1) g5.20<1>F g1.20<0,1,0>UW 1UB { align1 };
-mov (1) g5.24<1>F g1.20<0,1,0>UW { align1 };
-add (1) g5.28<1>F g1.20<0,1,0>UW 1UB { align1 };
- /* Set up ss3.y coordinates */
-mov (1) g7.16<1>F g1.22<0,1,0>UW { align1 };
-mov (1) g7.20<1>F g1.22<0,1,0>UW { align1 };
-add (1) g7.24<1>F g1.22<0,1,0>UW 1UB { align1 };
-add (1) g7.28<1>F g1.22<0,1,0>UW 1UB { align1 };
-
- /* Now, map these screen space coordinates into texture coordinates. */
- /* subtract screen-space X origin of vertex 0. */
-add (8) g4<1>F g4<8,8,1>F -g1<0,1,0>F { align1 };
-add (8) g5<1>F g5<8,8,1>F -g1<0,1,0>F { align1 };
- /* scale by texture X increment */
-mul (8) g4<1>F g4<8,8,1>F g3<0,1,0>F { align1 };
-mul (8) g5<1>F g5<8,8,1>F g3<0,1,0>F { align1 };
- /* add in texture X offset */
-add (8) g4<1>F g4<8,8,1>F g3.12<0,1,0>F { align1 };
-add (8) g5<1>F g5<8,8,1>F g3.12<0,1,0>F { align1 };
- /* subtract screen-space Y origin of vertex 0. */
-add (8) g6<1>F g6<8,8,1>F -g1.4<0,1,0>F { align1 };
-add (8) g7<1>F g7<8,8,1>F -g1.4<0,1,0>F { align1 };
- /* scale by texture Y increment */
- /* XXX: double check the fields in Cx,Cy,Co and attributes*/
-mul (8) g6<1>F g6<8,8,1>F g3.20<0,1,0>F { align1 };
-mul (8) g7<1>F g7<8,8,1>F g3.20<0,1,0>F { align1 };
- /* add in texture Y offset */
-add (8) g6<1>F g6<8,8,1>F g3.28<0,1,0>F { align1 };
-add (8) g7<1>F g7<8,8,1>F g3.28<0,1,0>F { align1 };
- /* sampler */
-mov (8) m1<1>F g4<8,8,1>F { align1 };
-mov (8) m2<1>F g5<8,8,1>F { align1 };
-mov (8) m3<1>F g6<8,8,1>F { align1 };
-mov (8) m4<1>F g7<8,8,1>F { align1 };
-
- /*
- * g0 holds the PS thread payload, which (oddly) contains
- * precisely what the sampler wants to see in m0
- */
-send (16) 0 g12<1>UW g0<8,8,1>UW sampler (1,0,F) mlen 5 rlen 8 { align1 };
-mov (8) g19<1>UD g19<8,8,1>UD { align1 };
-
-mov (8) m2<1>F g12<8,8,1>F { align1 };
-mov (8) m3<1>F g14<8,8,1>F { align1 };
-mov (8) m4<1>F g16<8,8,1>F { align1 };
-mov (8) m5<1>F g18<8,8,1>F { align1 };
-mov (8) m6<1>F g13<8,8,1>F { align1 };
-mov (8) m7<1>F g15<8,8,1>F { align1 };
-mov (8) m8<1>F g17<8,8,1>F { align1 };
-mov (8) m9<1>F g19<8,8,1>F { align1 };
-
- /* Pass through control information:
- */
-mov (8) m1<1>UD g1<8,8,1>UD { align1 mask_disable };
- /* Send framebuffer write message: XXX: acc0? */
-send (16) 0 acc0<1>UW g0<8,8,1>UW write (
- 0, /* binding table index 0 */
- 8, /* pixel scoreboard clear */
- 4, /* render target write */
- 0 /* no write commit message */
- ) mlen 10 rlen 0 { align1 EOT };
- /* padding */
-nop;
-nop;
-nop;
-nop;
-nop;
-nop;
-nop;
-nop;
diff --git a/src/rotation_wm90.g4a b/src/rotation_wm90.g4a
deleted file mode 100644
index fd600bf..0000000
--- a/src/rotation_wm90.g4a
+++ /dev/null
@@ -1,127 +0,0 @@
-/* The initial payload of the thread is always g0.
- * WM_URB (incoming URB entries) is g3
- * X0_R is g4
- * X1_R is g5
- * Y0_R is g6
- * Y1_R is g7
- */
-
- /* Set up the X/Y screen coordinates of the pixels in our 4 subspans. Each
- * subspan is a 2x2 rectangle, and the screen x/y of the upper left of each
- * subspan are given in GRF register 1.2 through 1.5 (which, with the word
- * addressing below, are 1.4 through 1.11).
- *
- * The result is WM_X*_R and WM_Y*R being:
- *
- * X0: {ss0.x, ss0.x+1, ss0.x, ss0.x+1, ss1.x, ss1.x+1, ss1.x, ss1.x+y}
- * Y0: {ss0.y, ss0.y, ss0.y+1, ss0.y+1, ss1.y, ss1.y, ss1.y+1, ss1.y+1}
- * X1: {ss2.x, ss2.x+1, ss2.x, ss2.x+1, ss3.x, ss3.x+1, ss3.x, ss3.x+y}
- * Y1: {ss2.y, ss2.y, ss2.y+1, ss2.y+1, ss3.y, ss3.y, ss3.y+1, ss3.y+1}
- */
-
- /* Set up ss0.x coordinates*/
-mov (1) g4<1>F g1.8<0,1,0>UW { align1 };
-add (1) g4.4<1>F g1.8<0,1,0>UW 1UB { align1 };
-mov (1) g4.8<1>F g1.8<0,1,0>UW { align1 };
-add (1) g4.12<1>F g1.8<0,1,0>UW 1UB { align1 };
- /* Set up ss0.y coordinates */
-mov (1) g6<1>F g1.10<0,1,0>UW { align1 };
-mov (1) g6.4<1>F g1.10<0,1,0>UW { align1 };
-add (1) g6.8<1>F g1.10<0,1,0>UW 1UB { align1 };
-add (1) g6.12<1>F g1.10<0,1,0>UW 1UB { align1 };
- /* set up ss1.x coordinates */
-mov (1) g4.16<1>F g1.12<0,1,0>UW { align1 };
-add (1) g4.20<1>F g1.12<0,1,0>UW 1UB { align1 };
-mov (1) g4.24<1>F g1.12<0,1,0>UW { align1 };
-add (1) g4.28<1>F g1.12<0,1,0>UW 1UB { align1 };
- /* set up ss1.y coordinates */
-mov (1) g6.16<1>F g1.14<0,1,0>UW { align1 };
-mov (1) g6.20<1>F g1.14<0,1,0>UW { align1 };
-add (1) g6.24<1>F g1.14<0,1,0>UW 1UB { align1 };
-add (1) g6.28<1>F g1.14<0,1,0>UW 1UB { align1 };
- /* Set up ss2.x coordinates */
-mov (1) g5<1>F g1.16<0,1,0>UW { align1 };
-add (1) g5.4<1>F g1.16<0,1,0>UW 1UB { align1 };
-mov (1) g5.8<1>F g1.16<0,1,0>UW { align1 };
-add (1) g5.12<1>F g1.16<0,1,0>UW 1UB { align1 };
- /* Set up ss2.y coordinates */
-mov (1) g7<1>F g1.18<0,1,0>UW { align1 };
-mov (1) g7.4<1>F g1.18<0,1,0>UW { align1 };
-add (1) g7.8<1>F g1.18<0,1,0>UW 1UB { align1 };
-add (1) g7.12<1>F g1.18<0,1,0>UW 1UB { align1 };
- /* Set up ss3.x coordinates */
-mov (1) g5.16<1>F g1.20<0,1,0>UW { align1 };
-add (1) g5.20<1>F g1.20<0,1,0>UW 1UB { align1 };
-mov (1) g5.24<1>F g1.20<0,1,0>UW { align1 };
-add (1) g5.28<1>F g1.20<0,1,0>UW 1UB { align1 };
- /* Set up ss3.y coordinates */
-mov (1) g7.16<1>F g1.22<0,1,0>UW { align1 };
-mov (1) g7.20<1>F g1.22<0,1,0>UW { align1 };
-add (1) g7.24<1>F g1.22<0,1,0>UW 1UB { align1 };
-add (1) g7.28<1>F g1.22<0,1,0>UW 1UB { align1 };
-
- /* Now, map these screen space coordinates into texture coordinates. */
-/* XXX: convert it to calculate (u,v) in 90 and 270 case */
- /* subtract screen-space Y origin of vertex 0. */
-add (8) g6<1>F g6<8,8,1>F -g1.4<0,1,0>F { align1 };
-add (8) g7<1>F g7<8,8,1>F -g1.4<0,1,0>F { align1 };
-
-/* (Yp - Ystart) * Cx */
-mul (8) g6<1>F g6<8,8,1>F g3<0,1,0>F { align1 };
-mul (8) g7<1>F g7<8,8,1>F g3<0,1,0>F { align1 };
-
- /* scale by texture Y increment */
-add (8) g6<1>F g6<8,8,1>F g3.12<0,1,0>F { align1 };
-add (8) g7<1>F g7<8,8,1>F g3.12<0,1,0>F { align1 };
-
- /* subtract screen-space X origin of vertex 0. */
-add (8) g4<1>F g4<8,8,1>F -g1<0,1,0>F { align1 };
-add (8) g5<1>F g5<8,8,1>F -g1<0,1,0>F { align1 };
- /* scale by texture X increment */
-mul (8) g4<1>F g4<8,8,1>F g3.20<0,1,0>F { align1 };
-mul (8) g5<1>F g5<8,8,1>F g3.20<0,1,0>F { align1 };
- /* add in texture X offset */
-add (8) g4<1>F g4<8,8,1>F g3.28<0,1,0>F { align1 };
-add (8) g5<1>F g5<8,8,1>F g3.28<0,1,0>F { align1 };
-
- /* sampler */
-mov (8) m1<1>F g6<8,8,1>F { align1 };
-mov (8) m2<1>F g7<8,8,1>F { align1 };
-mov (8) m3<1>F g4<8,8,1>F { align1 };
-mov (8) m4<1>F g5<8,8,1>F { align1 };
-
- /*
- * g0 holds the PS thread payload, which (oddly) contains
- * precisely what the sampler wants to see in m0
- */
-send (16) 0 g12<1>UW g0<8,8,1>UW sampler (1,0,F) mlen 5 rlen 8 { align1 };
-mov (8) g19<1>UD g19<8,8,1>UD { align1 };
-
-mov (8) m2<1>F g12<8,8,1>F { align1 };
-mov (8) m3<1>F g14<8,8,1>F { align1 };
-mov (8) m4<1>F g16<8,8,1>F { align1 };
-mov (8) m5<1>F g18<8,8,1>F { align1 };
-mov (8) m6<1>F g13<8,8,1>F { align1 };
-mov (8) m7<1>F g15<8,8,1>F { align1 };
-mov (8) m8<1>F g17<8,8,1>F { align1 };
-mov (8) m9<1>F g19<8,8,1>F { align1 };
-
- /* Pass through control information:
- */
-mov (8) m1<1>UD g1<8,8,1>UD { align1 mask_disable };
- /* Send framebuffer write message: XXX: acc0? */
-send (16) 0 acc0<1>UW g0<8,8,1>UW write (
- 0, /* binding table index 0 */
- 8, /* pixel scoreboard clear */
- 4, /* render target write */
- 0 /* no write commit message */
- ) mlen 10 rlen 0 { align1 EOT };
- /* padding */
-nop;
-nop;
-nop;
-nop;
-nop;
-nop;
-nop;
-nop;
diff --git a/src/rotation_wm_prog0.h b/src/rotation_wm_prog0.h
deleted file mode 100644
index 08269b7..0000000
--- a/src/rotation_wm_prog0.h
+++ /dev/null
@@ -1,68 +0,0 @@
- { 0x00000001, 0x2080013d, 0x00000028, 0x00000000 },
- { 0x00000040, 0x20840d3d, 0x00000028, 0x00000001 },
- { 0x00000001, 0x2088013d, 0x00000028, 0x00000000 },
- { 0x00000040, 0x208c0d3d, 0x00000028, 0x00000001 },
- { 0x00000001, 0x20c0013d, 0x0000002a, 0x00000000 },
- { 0x00000001, 0x20c4013d, 0x0000002a, 0x00000000 },
- { 0x00000040, 0x20c80d3d, 0x0000002a, 0x00000001 },
- { 0x00000040, 0x20cc0d3d, 0x0000002a, 0x00000001 },
- { 0x00000001, 0x2090013d, 0x0000002c, 0x00000000 },
- { 0x00000040, 0x20940d3d, 0x0000002c, 0x00000001 },
- { 0x00000001, 0x2098013d, 0x0000002c, 0x00000000 },
- { 0x00000040, 0x209c0d3d, 0x0000002c, 0x00000001 },
- { 0x00000001, 0x20d0013d, 0x0000002e, 0x00000000 },
- { 0x00000001, 0x20d4013d, 0x0000002e, 0x00000000 },
- { 0x00000040, 0x20d80d3d, 0x0000002e, 0x00000001 },
- { 0x00000040, 0x20dc0d3d, 0x0000002e, 0x00000001 },
- { 0x00000001, 0x20a0013d, 0x00000030, 0x00000000 },
- { 0x00000040, 0x20a40d3d, 0x00000030, 0x00000001 },
- { 0x00000001, 0x20a8013d, 0x00000030, 0x00000000 },
- { 0x00000040, 0x20ac0d3d, 0x00000030, 0x00000001 },
- { 0x00000001, 0x20e0013d, 0x00000032, 0x00000000 },
- { 0x00000001, 0x20e4013d, 0x00000032, 0x00000000 },
- { 0x00000040, 0x20e80d3d, 0x00000032, 0x00000001 },
- { 0x00000040, 0x20ec0d3d, 0x00000032, 0x00000001 },
- { 0x00000001, 0x20b0013d, 0x00000034, 0x00000000 },
- { 0x00000040, 0x20b40d3d, 0x00000034, 0x00000001 },
- { 0x00000001, 0x20b8013d, 0x00000034, 0x00000000 },
- { 0x00000040, 0x20bc0d3d, 0x00000034, 0x00000001 },
- { 0x00000001, 0x20f0013d, 0x00000036, 0x00000000 },
- { 0x00000001, 0x20f4013d, 0x00000036, 0x00000000 },
- { 0x00000040, 0x20f80d3d, 0x00000036, 0x00000001 },
- { 0x00000040, 0x20fc0d3d, 0x00000036, 0x00000001 },
- { 0x00600040, 0x208077bd, 0x008d0080, 0x00004020 },
- { 0x00600040, 0x20a077bd, 0x008d00a0, 0x00004020 },
- { 0x00600041, 0x208077bd, 0x008d0080, 0x00000060 },
- { 0x00600041, 0x20a077bd, 0x008d00a0, 0x00000060 },
- { 0x00600040, 0x208077bd, 0x008d0080, 0x0000006c },
- { 0x00600040, 0x20a077bd, 0x008d00a0, 0x0000006c },
- { 0x00600040, 0x20c077bd, 0x008d00c0, 0x00004024 },
- { 0x00600040, 0x20e077bd, 0x008d00e0, 0x00004024 },
- { 0x00600041, 0x20c077bd, 0x008d00c0, 0x00000074 },
- { 0x00600041, 0x20e077bd, 0x008d00e0, 0x00000074 },
- { 0x00600040, 0x20c077bd, 0x008d00c0, 0x0000007c },
- { 0x00600040, 0x20e077bd, 0x008d00e0, 0x0000007c },
- { 0x00600001, 0x202003be, 0x008d0080, 0x00000000 },
- { 0x00600001, 0x204003be, 0x008d00a0, 0x00000000 },
- { 0x00600001, 0x206003be, 0x008d00c0, 0x00000000 },
- { 0x00600001, 0x208003be, 0x008d00e0, 0x00000000 },
- { 0x00800031, 0x21801d29, 0x008d0000, 0x02580001 },
- { 0x00600001, 0x22600021, 0x008d0260, 0x00000000 },
- { 0x00600001, 0x204003be, 0x008d0180, 0x00000000 },
- { 0x00600001, 0x206003be, 0x008d01c0, 0x00000000 },
- { 0x00600001, 0x208003be, 0x008d0200, 0x00000000 },
- { 0x00600001, 0x20a003be, 0x008d0240, 0x00000000 },
- { 0x00600001, 0x20c003be, 0x008d01a0, 0x00000000 },
- { 0x00600001, 0x20e003be, 0x008d01e0, 0x00000000 },
- { 0x00600001, 0x210003be, 0x008d0220, 0x00000000 },
- { 0x00600001, 0x212003be, 0x008d0260, 0x00000000 },
- { 0x00600201, 0x20200022, 0x008d0020, 0x00000000 },
- { 0x00800031, 0x24001d28, 0x008d0000, 0x85a04800 },
- { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
- { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
- { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
- { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
- { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
- { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
- { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
- { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
diff --git a/src/rotation_wm_prog90.h b/src/rotation_wm_prog90.h
deleted file mode 100644
index 9b87750..0000000
--- a/src/rotation_wm_prog90.h
+++ /dev/null
@@ -1,68 +0,0 @@
- { 0x00000001, 0x2080013d, 0x00000028, 0x00000000 },
- { 0x00000040, 0x20840d3d, 0x00000028, 0x00000001 },
- { 0x00000001, 0x2088013d, 0x00000028, 0x00000000 },
- { 0x00000040, 0x208c0d3d, 0x00000028, 0x00000001 },
- { 0x00000001, 0x20c0013d, 0x0000002a, 0x00000000 },
- { 0x00000001, 0x20c4013d, 0x0000002a, 0x00000000 },
- { 0x00000040, 0x20c80d3d, 0x0000002a, 0x00000001 },
- { 0x00000040, 0x20cc0d3d, 0x0000002a, 0x00000001 },
- { 0x00000001, 0x2090013d, 0x0000002c, 0x00000000 },
- { 0x00000040, 0x20940d3d, 0x0000002c, 0x00000001 },
- { 0x00000001, 0x2098013d, 0x0000002c, 0x00000000 },
- { 0x00000040, 0x209c0d3d, 0x0000002c, 0x00000001 },
- { 0x00000001, 0x20d0013d, 0x0000002e, 0x00000000 },
- { 0x00000001, 0x20d4013d, 0x0000002e, 0x00000000 },
- { 0x00000040, 0x20d80d3d, 0x0000002e, 0x00000001 },
- { 0x00000040, 0x20dc0d3d, 0x0000002e, 0x00000001 },
- { 0x00000001, 0x20a0013d, 0x00000030, 0x00000000 },
- { 0x00000040, 0x20a40d3d, 0x00000030, 0x00000001 },
- { 0x00000001, 0x20a8013d, 0x00000030, 0x00000000 },
- { 0x00000040, 0x20ac0d3d, 0x00000030, 0x00000001 },
- { 0x00000001, 0x20e0013d, 0x00000032, 0x00000000 },
- { 0x00000001, 0x20e4013d, 0x00000032, 0x00000000 },
- { 0x00000040, 0x20e80d3d, 0x00000032, 0x00000001 },
- { 0x00000040, 0x20ec0d3d, 0x00000032, 0x00000001 },
- { 0x00000001, 0x20b0013d, 0x00000034, 0x00000000 },
- { 0x00000040, 0x20b40d3d, 0x00000034, 0x00000001 },
- { 0x00000001, 0x20b8013d, 0x00000034, 0x00000000 },
- { 0x00000040, 0x20bc0d3d, 0x00000034, 0x00000001 },
- { 0x00000001, 0x20f0013d, 0x00000036, 0x00000000 },
- { 0x00000001, 0x20f4013d, 0x00000036, 0x00000000 },
- { 0x00000040, 0x20f80d3d, 0x00000036, 0x00000001 },
- { 0x00000040, 0x20fc0d3d, 0x00000036, 0x00000001 },
- { 0x00600040, 0x20c077bd, 0x008d00c0, 0x00004024 },
- { 0x00600040, 0x20e077bd, 0x008d00e0, 0x00004024 },
- { 0x00600041, 0x20c077bd, 0x008d00c0, 0x00000060 },
- { 0x00600041, 0x20e077bd, 0x008d00e0, 0x00000060 },
- { 0x00600040, 0x20c077bd, 0x008d00c0, 0x0000006c },
- { 0x00600040, 0x20e077bd, 0x008d00e0, 0x0000006c },
- { 0x00600040, 0x208077bd, 0x008d0080, 0x00004020 },
- { 0x00600040, 0x20a077bd, 0x008d00a0, 0x00004020 },
- { 0x00600041, 0x208077bd, 0x008d0080, 0x00000074 },
- { 0x00600041, 0x20a077bd, 0x008d00a0, 0x00000074 },
- { 0x00600040, 0x208077bd, 0x008d0080, 0x0000007c },
- { 0x00600040, 0x20a077bd, 0x008d00a0, 0x0000007c },
- { 0x00600001, 0x202003be, 0x008d00c0, 0x00000000 },
- { 0x00600001, 0x204003be, 0x008d00e0, 0x00000000 },
- { 0x00600001, 0x206003be, 0x008d0080, 0x00000000 },
- { 0x00600001, 0x208003be, 0x008d00a0, 0x00000000 },
- { 0x00800031, 0x21801d29, 0x008d0000, 0x02580001 },
- { 0x00600001, 0x22600021, 0x008d0260, 0x00000000 },
- { 0x00600001, 0x204003be, 0x008d0180, 0x00000000 },
- { 0x00600001, 0x206003be, 0x008d01c0, 0x00000000 },
- { 0x00600001, 0x208003be, 0x008d0200, 0x00000000 },
- { 0x00600001, 0x20a003be, 0x008d0240, 0x00000000 },
- { 0x00600001, 0x20c003be, 0x008d01a0, 0x00000000 },
- { 0x00600001, 0x20e003be, 0x008d01e0, 0x00000000 },
- { 0x00600001, 0x210003be, 0x008d0220, 0x00000000 },
- { 0x00600001, 0x212003be, 0x008d0260, 0x00000000 },
- { 0x00600201, 0x20200022, 0x008d0020, 0x00000000 },
- { 0x00800031, 0x24001d28, 0x008d0000, 0x85a04800 },
- { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
- { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
- { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
- { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
- { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
- { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
- { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
- { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
diff-tree e62751db8b1a631c22ba0f77c932be4ab39ba741 (from 4cd552e8f4851e029e43bf778cd8340f6c2c4881)
Author: Eric Anholt <eric at anholt.net>
Date: Wed Jan 31 12:15:38 2007 -0800
Add an accelerated path for rotation Render operations in XAA.
The now-generic (kind of) EXA code will be cleaned up and moved to generic
files in a later commit.
diff --git a/src/i830.h b/src/i830.h
index 66cfba1..58e4ec3 100644
--- a/src/i830.h
+++ b/src/i830.h
@@ -365,6 +365,18 @@ typedef struct _I830Rec {
Bool cursorOn;
#ifdef I830_USE_XAA
XAAInfoRecPtr AccelInfoRec;
+
+ /* additional XAA accelerated Composite support */
+ CompositeProcPtr saved_composite;
+ Bool (*xaa_check_composite)(int op, PicturePtr pSrc, PicturePtr pMask,
+ PicturePtr pDst);
+ Bool (*xaa_prepare_composite)(int op, PicturePtr pSrc, PicturePtr pMask,
+ PicturePtr pDst, PixmapPtr pSrcPixmap,
+ PixmapPtr pMaskPixmap, PixmapPtr pDstPixmap);
+ void (*xaa_composite)(PixmapPtr pDst, int xSrc, int ySrc,
+ int xMask, int yMask, int xDst, int yDst,
+ int w, int h);
+ void (*xaa_done_composite)(PixmapPtr pDst);
#endif
xf86CursorInfoPtr CursorInfoRec;
CloseScreenProcPtr CloseScreen;
@@ -560,6 +572,8 @@ extern Bool I830DRILock(ScrnInfoPtr pScr
extern Bool I830DRISetVBlankInterrupt (ScrnInfoPtr pScrn, Bool on);
#endif
+unsigned long intel_get_pixmap_offset(PixmapPtr pPix);
+unsigned long intel_get_pixmap_pitch(PixmapPtr pPix);
extern Bool I830AccelInit(ScreenPtr pScreen);
extern void I830SetupForScreenToScreenCopy(ScrnInfoPtr pScrn, int xdir,
int ydir, int rop,
@@ -634,7 +648,6 @@ DisplayModePtr i830_ddc_get_modes(xf86Ou
/* i830_tv.c */
void i830_tv_init(ScrnInfoPtr pScrn);
-#ifdef I830_USE_EXA
extern Bool I830EXACheckComposite(int, PicturePtr, PicturePtr, PicturePtr);
extern Bool I830EXAPrepareComposite(int, PicturePtr, PicturePtr, PicturePtr,
PixmapPtr, PixmapPtr, PixmapPtr);
@@ -647,6 +660,9 @@ extern Bool I965EXAPrepareComposite(int,
PixmapPtr, PixmapPtr, PixmapPtr);
extern void I965EXAComposite(PixmapPtr pDst, int srcX, int srcY, int maskX,
int maskY, int dstX, int dstY, int width, int height);
+void IntelEXAComposite(PixmapPtr pDst, int srcX, int srcY,
+ int maskX, int maskY, int dstX, int dstY, int w, int h);
+void IntelEXADoneComposite(PixmapPtr pDst);
extern Bool
I830EXACheckComposite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture,
@@ -663,7 +679,7 @@ i830_get_transformed_coordinates(int x,
extern const int I830PatternROP[16];
extern const int I830CopyROP[16];
-#endif
+
/* Flags for memory allocation function */
#define FROM_ANYWHERE 0x00000000
#define FROM_POOL_ONLY 0x00000001
diff --git a/src/i830_accel.c b/src/i830_accel.c
index 5fdd101..db3168a 100644
--- a/src/i830_accel.c
+++ b/src/i830_accel.c
@@ -60,6 +60,36 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN
#include "i810_reg.h"
#include "i830_debug.h"
+unsigned long
+intel_get_pixmap_offset(PixmapPtr pPix)
+{
+ ScreenPtr pScreen = pPix->drawable.pScreen;
+ ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+ I830Ptr pI830 = I830PTR(pScrn);
+
+#ifdef I830_USE_EXA
+ if (pI830->useEXA)
+ return exaGetPixmapOffset(pPix);
+#endif
+ return (unsigned long)pPix->devPrivate.ptr - (unsigned long)pI830->FbBase;
+}
+
+unsigned long
+intel_get_pixmap_pitch(PixmapPtr pPix)
+{
+ ScreenPtr pScreen = pPix->drawable.pScreen;
+ ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+ I830Ptr pI830 = I830PTR(pScrn);
+
+#ifdef I830_USE_EXA
+ if (pI830->useEXA)
+ return exaGetPixmapPitch(pPix);
+#endif
+#ifdef I830_USE_XAA
+ return (unsigned long)pPix->devKind;
+#endif
+}
+
int
I830WaitLpRing(ScrnInfoPtr pScrn, int n, int timeout_millis)
{
diff --git a/src/i830_exa.c b/src/i830_exa.c
index b0d886b..02d2dcf 100644
--- a/src/i830_exa.c
+++ b/src/i830_exa.c
@@ -314,7 +314,7 @@ i830_get_transformed_coordinates(int x,
*
* This function is shared between i830 and i915 generation code.
*/
-static void
+void
IntelEXAComposite(PixmapPtr pDst, int srcX, int srcY, int maskX, int maskY,
int dstX, int dstY, int w, int h)
{
@@ -396,7 +396,7 @@ IntelEXAComposite(PixmapPtr pDst, int sr
}
}
-static void
+void
IntelEXADoneComposite(PixmapPtr pDst)
{
#if ALWAYS_SYNC
diff --git a/src/i830_exa_render.c b/src/i830_exa_render.c
index 98a444f..bf521b4 100644
--- a/src/i830_exa_render.c
+++ b/src/i830_exa_render.c
@@ -256,8 +256,8 @@ I830TextureSetup(PicturePtr pPict, Pixma
int w, h, i;
CARD32 wrap_mode = TEXCOORDMODE_CLAMP;
- offset = exaGetPixmapOffset(pPix);
- pitch = exaGetPixmapPitch(pPix);
+ offset = intel_get_pixmap_offset(pPix);
+ pitch = intel_get_pixmap_pitch(pPix);
w = pPict->pDrawable->width;
h = pPict->pDrawable->height;
pI830->scale_units[unit][0] = pPix->drawable.width;
@@ -381,8 +381,8 @@ I830EXAPrepareComposite(int op, PictureP
CARD32 dst_format, dst_offset, dst_pitch;
I830GetDestFormat(pDstPicture, &dst_format);
- dst_offset = exaGetPixmapOffset(pDst);
- dst_pitch = exaGetPixmapPitch(pDst);
+ dst_offset = intel_get_pixmap_offset(pDst);
+ dst_pitch = intel_get_pixmap_pitch(pDst);
pI830->last_3d = LAST_3D_RENDER;
diff --git a/src/i830_xaa.c b/src/i830_xaa.c
index 13ba743..be1fb83 100644
--- a/src/i830_xaa.c
+++ b/src/i830_xaa.c
@@ -52,6 +52,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN
#include "xaarop.h"
#include "i830.h"
#include "i810_reg.h"
+#include "mipict.h"
#ifndef DO_SCANLINE_IMAGE_WRITE
#define DO_SCANLINE_IMAGE_WRITE 0
@@ -91,11 +92,26 @@ static void I830SubsequentImageWriteScan
#endif
static void I830RestoreAccelState(ScrnInfoPtr pScrn);
+void
+i830_xaa_composite(CARD8 op,
+ PicturePtr pSrc,
+ PicturePtr pMask,
+ PicturePtr pDst,
+ INT16 xSrc,
+ INT16 ySrc,
+ INT16 xMask,
+ INT16 yMask,
+ INT16 xDst,
+ INT16 yDst,
+ CARD16 width,
+ CARD16 height);
+
Bool
I830XAAInit(ScreenPtr pScreen)
{
XAAInfoRecPtr infoPtr;
ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+ PictureScreenPtr ps = GetPictureScreenIfSet(pScreen);
I830Ptr pI830 = I830PTR(pScrn);
int i;
int width = 0;
@@ -220,7 +236,37 @@ I830XAAInit(ScreenPtr pScreen)
I830SelectBuffer(pScrn, I830_SELECT_FRONT);
- return XAAInit(pScreen, infoPtr);
+ if (!XAAInit(pScreen, infoPtr))
+ return FALSE;
+
+ if (ps != NULL) {
+ if (IS_I915G(pI830) || IS_I915GM(pI830) ||
+ IS_I945G(pI830) || IS_I945GM(pI830))
+ {
+ pI830->xaa_check_composite = I915EXACheckComposite;
+ pI830->xaa_prepare_composite = I915EXAPrepareComposite;
+ pI830->xaa_composite = IntelEXAComposite;
+ pI830->xaa_done_composite = IntelEXADoneComposite;
+ } else if (IS_I865G(pI830) || IS_I855(pI830) ||
+ IS_845G(pI830) || IS_I830(pI830)) {
+ pI830->xaa_check_composite = I830EXACheckComposite;
+ pI830->xaa_prepare_composite = I830EXAPrepareComposite;
+ pI830->xaa_composite = IntelEXAComposite;
+ pI830->xaa_done_composite = IntelEXADoneComposite;
+ } else if (IS_I965G(pI830)) {
+ pI830->xaa_check_composite = I965EXACheckComposite;
+ pI830->xaa_prepare_composite = I965EXAPrepareComposite;
+ pI830->xaa_composite = I965EXAComposite;
+ pI830->xaa_done_composite = IntelEXADoneComposite;
+ } else {
+ return TRUE;
+ }
+
+ pI830->saved_composite = ps->Composite;
+ ps->Composite = i830_xaa_composite;
+ }
+
+ return TRUE;
}
#ifdef XF86DRI
@@ -694,6 +740,126 @@ I830SubsequentImageWriteScanline(ScrnInf
#endif /* DO_SCANLINE_IMAGE_WRITE */
/* Support for multiscreen */
+/**
+ * Special case acceleration for Render acceleration of rotation operations
+ * by xf86Rotate.c
+ */
+void
+i830_xaa_composite(CARD8 op,
+ PicturePtr pSrc,
+ PicturePtr pMask,
+ PicturePtr pDst,
+ INT16 xSrc,
+ INT16 ySrc,
+ INT16 xMask,
+ INT16 yMask,
+ INT16 xDst,
+ INT16 yDst,
+ CARD16 width,
+ CARD16 height)
+{
+ ScreenPtr pScreen = pDst->pDrawable->pScreen;
+ ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+ I830Ptr pI830 = I830PTR(pScrn);
+ xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
+ PictureScreenPtr ps;
+ PixmapPtr pSrcPixmap, pDstPixmap;
+ RegionRec region;
+ BoxPtr pbox;
+ int nbox;
+ int i;
+
+ /* Throw out cases that aren't going to be our rotation first */
+ if (pMask != NULL || op != PictOpSrc || pSrc->pDrawable == NULL)
+ goto fallback;
+
+ if (pSrc->pDrawable->type != DRAWABLE_PIXMAP ||
+ pDst->pDrawable->type != DRAWABLE_PIXMAP)
+ {
+ goto fallback;
+ }
+ pSrcPixmap = (PixmapPtr)pSrc->pDrawable;
+ pDstPixmap = (PixmapPtr)pDst->pDrawable;
+
+ /* Check if the dest is one of our shadow pixmaps */
+ for (i = 0; i < xf86_config->num_crtc; i++) {
+ xf86CrtcPtr crtc = xf86_config->crtc[i];
+
+ if (crtc->rotatedPixmap == pDstPixmap)
+ break;
+ }
+ if (i == xf86_config->num_crtc)
+ goto fallback;
+
+ if (pSrcPixmap != pScreen->GetScreenPixmap(pScreen))
+ goto fallback;
+
+ /* OK, so we've got a Render operation on one of our shadow pixmaps, with
+ * the source being the real framebuffer. We know that both of these are
+ * in framebuffer, with no x/y offsets, i.e. normal pixmaps like our EXA-
+ * based Render acceleration code expects.
+ */
+ assert(pSrcPixmap->drawable.x == 0);
+ assert(pSrcPixmap->drawable.y == 0);
+ assert(pDstPixmap->drawable.x == 0);
+ assert(pDstPixmap->drawable.y == 0);
+
+ if (!miComputeCompositeRegion (®ion, pSrc, NULL, pDst,
+ xSrc, ySrc, 0, 0, xDst, yDst,
+ width, height))
+ return;
+
+ if (!pI830->xaa_check_composite(op, pSrc, NULL, pDst)) {
+ REGION_UNINIT(pScreen, ®ion);
+ goto fallback;
+ }
+
+ if (!pI830->xaa_prepare_composite(op, pSrc, NULL, pDst,
+ pSrcPixmap, NULL, pDstPixmap))
+ {
+ REGION_UNINIT(pScreen, ®ion);
+ goto fallback;
+ }
+
+ nbox = REGION_NUM_RECTS(®ion);
+ pbox = REGION_RECTS(®ion);
+
+ xSrc -= xDst;
+ ySrc -= yDst;
+
+ while (nbox--)
+ {
+ pI830->xaa_composite(pDstPixmap,
+ pbox->x1 + xSrc,
+ pbox->y1 + ySrc,
+ 0, 0,
+ pbox->x1,
+ pbox->y1,
+ pbox->x2 - pbox->x1,
+ pbox->y2 - pbox->y1);
+ pbox++;
+ }
+
+ REGION_UNINIT(pDst->pDrawable->pScreen, ®ion);
+
+ pI830->xaa_done_composite(pDstPixmap);
+ i830MarkSync(pScrn);
+
+ return;
+
+fallback:
+ /* Fallback path: Call down to the next level (XAA) */
+ ps = GetPictureScreenIfSet(pScreen);
+
+ ps->Composite = pI830->saved_composite;
+
+ ps->Composite(op, pSrc, pMask, pDst, xSrc, ySrc, xMask, yMask, xDst, yDst,
+ width, height);
+
+ pI830->saved_composite = ps->Composite;
+ ps->Composite = i830_xaa_composite;
+}
+
static void
I830RestoreAccelState(ScrnInfoPtr pScrn)
{
diff --git a/src/i915_exa_render.c b/src/i915_exa_render.c
index 8705c6d..2fb41ad 100644
--- a/src/i915_exa_render.c
+++ b/src/i915_exa_render.c
@@ -248,8 +248,8 @@ I915TextureSetup(PicturePtr pPict, Pixma
int w, h, i;
CARD32 wrap_mode = TEXCOORDMODE_CLAMP_BORDER;
- offset = exaGetPixmapOffset(pPix);
- pitch = exaGetPixmapPitch(pPix);
+ offset = intel_get_pixmap_offset(pPix);
+ pitch = intel_get_pixmap_pitch(pPix);
w = pPict->pDrawable->width;
h = pPict->pDrawable->height;
pI830->scale_units[unit][0] = pPix->drawable.width;
@@ -318,8 +318,8 @@ I915EXAPrepareComposite(int op, PictureP
pI830->last_3d = LAST_3D_RENDER;
I915GetDestFormat(pDstPicture, &dst_format);
- dst_offset = exaGetPixmapOffset(pDst);
- dst_pitch = exaGetPixmapPitch(pDst);
+ dst_offset = intel_get_pixmap_offset(pDst);
+ dst_pitch = intel_get_pixmap_pitch(pDst);
FS_LOCALS(20);
if (!I915TextureSetup(pSrcPicture, pSrc, 0))
diff --git a/src/i965_exa_render.c b/src/i965_exa_render.c
index 1dbccc6..99bd628 100644
--- a/src/i965_exa_render.c
+++ b/src/i965_exa_render.c
@@ -379,13 +379,13 @@ I965EXAPrepareComposite(int op, PictureP
pI830->last_3d = LAST_3D_RENDER;
- src_offset = exaGetPixmapOffset(pSrc);
- src_pitch = exaGetPixmapPitch(pSrc);
- dst_offset = exaGetPixmapOffset(pDst);
- dst_pitch = exaGetPixmapPitch(pDst);
+ src_offset = intel_get_pixmap_offset(pSrc);
+ src_pitch = intel_get_pixmap_pitch(pSrc);
+ dst_offset = intel_get_pixmap_offset(pDst);
+ dst_pitch = intel_get_pixmap_pitch(pDst);
if (pMask) {
- mask_offset = exaGetPixmapOffset(pMask);
- mask_pitch = exaGetPixmapPitch(pMask);
+ mask_offset = intel_get_pixmap_offset(pMask);
+ mask_pitch = intel_get_pixmap_pitch(pMask);
}
pI830->scale_units[0][0] = pSrc->drawable.width;
pI830->scale_units[0][1] = pSrc->drawable.height;
More information about the xorg-commit
mailing list