xf86-video-ati: Branch 'master'

[Alex Deucher]

 src/radeon_reg.h |    4 ++--
 src/radeon_tv.c  |    4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

New commits:
commit 2b1fae668ddabbc72e5fc31365302ea722174df1
Author: Alex Deucher <alex at t41p.hsd1.va.comcast.net>
Date:   Wed Dec 26 02:04:06 2007 -0500

    RADEON: fix PAL tv-out
    
    Many thanks to Andrew Randrianasulu for providing me with
    pll reg dumps

diff --git a/src/radeon_reg.h b/src/radeon_reg.h
index dce29e2..d1ef0a9 100644
--- a/src/radeon_reg.h
+++ b/src/radeon_reg.h
@@ -3244,9 +3244,9 @@
 #define RADEON_TV_PLL_FINE_CNTL			     0x0020	/* PLL */
 #define RADEON_TV_PLL_CNTL                           0x0021	/* PLL */
 #       define RADEON_TV_M0LO_MASK               0xff
-#       define RADEON_TV_M0HI_MASK               0x3
+#       define RADEON_TV_M0HI_MASK               0x7
 #       define RADEON_TV_M0HI_SHIFT              18
-#       define RADEON_TV_N0LO_MASK               0xff
+#       define RADEON_TV_N0LO_MASK               0x1ff
 #       define RADEON_TV_N0LO_SHIFT              8
 #       define RADEON_TV_N0HI_MASK               0x3
 #       define RADEON_TV_N0HI_SHIFT              21
diff --git a/src/radeon_tv.c b/src/radeon_tv.c
index 9959295..ab95a30 100644
--- a/src/radeon_tv.c
+++ b/src/radeon_tv.c
@@ -869,13 +869,13 @@ void RADEONInitTVRegisters(xf86OutputPtr output, RADEONSavePtr save,
 	save->tv_pll_cntl = (NTSC_TV_PLL_M & RADEON_TV_M0LO_MASK) |
 	    (((NTSC_TV_PLL_M >> 8) & RADEON_TV_M0HI_MASK) << RADEON_TV_M0HI_SHIFT) |
 	    ((NTSC_TV_PLL_N & RADEON_TV_N0LO_MASK) << RADEON_TV_N0LO_SHIFT) |
-	    (((NTSC_TV_PLL_N >> 8) & RADEON_TV_N0HI_MASK) << RADEON_TV_N0HI_SHIFT) |
+	    (((NTSC_TV_PLL_N >> 9) & RADEON_TV_N0HI_MASK) << RADEON_TV_N0HI_SHIFT) |
 	    ((NTSC_TV_PLL_P & RADEON_TV_P_MASK) << RADEON_TV_P_SHIFT);
     else
 	save->tv_pll_cntl = (PAL_TV_PLL_M & RADEON_TV_M0LO_MASK) |
 	    (((PAL_TV_PLL_M >> 8) & RADEON_TV_M0HI_MASK) << RADEON_TV_M0HI_SHIFT) |
 	    ((PAL_TV_PLL_N & RADEON_TV_N0LO_MASK) << RADEON_TV_N0LO_SHIFT) |
-	    (((PAL_TV_PLL_N >> 8) & RADEON_TV_N0HI_MASK) << RADEON_TV_N0HI_SHIFT) |
+	    (((PAL_TV_PLL_N >> 9) & RADEON_TV_N0HI_MASK) << RADEON_TV_N0HI_SHIFT) |
 	    ((PAL_TV_PLL_P & RADEON_TV_P_MASK) << RADEON_TV_P_SHIFT);
 
     save->tv_pll_cntl1 =  (((4 & RADEON_TVPCP_MASK)<< RADEON_TVPCP_SHIFT) |