xf86-video-ati: Branch 'master' - 9 commits
Michel Daenzer
daenzer at kemper.freedesktop.org
Thu Aug 23 03:18:10 PDT 2007
src/radeon.h | 22 +++++++++++++
src/radeon_bios.c | 20 +++++-------
src/radeon_dri.c | 85 ++++++++++++++++++++++++++++++++++++++++++----------
src/radeon_driver.c | 29 +++++++----------
src/radeon_output.c | 35 ++++++++-------------
src/radeon_reg.h | 1
src/radeon_tv.c | 6 +--
src/radeon_video.c | 27 +++++++---------
8 files changed, 143 insertions(+), 82 deletions(-)
New commits:
diff-tree ac54c0e4360099697755d14b1030def73d8235b0 (from de26e406f52b3b13f03eee2b8023924ec6406f0a)
Author: Michel Dänzer <michel at tungstengraphics.com>
Date: Wed Aug 22 14:33:59 2007 +0200
radeon: Warning fixes.
diff --git a/src/radeon_bios.c b/src/radeon_bios.c
index 975fc07..7dcb5d5 100644
--- a/src/radeon_bios.c
+++ b/src/radeon_bios.c
@@ -619,8 +619,7 @@ Bool RADEONGetTVInfoFromBIOS (xf86Output
ErrorF("\n");
return TRUE;
- } else
- return FALSE;
+ }
}
}
return FALSE;
@@ -1077,7 +1076,7 @@ RADEONRestoreBIOSRegBlock(ScrnInfoPtr pS
case RADEON_TABLE_FLAG_WRITE_INDEXED:
val = RADEON_BIOS32(offset);
ErrorF("WRITE INDEXED: 0x%x 0x%x\n",
- index, val);
+ index, (unsigned)val);
OUTREG(RADEON_MM_INDEX, index);
OUTREG(RADEON_MM_DATA, val);
offset += 4;
@@ -1085,7 +1084,7 @@ RADEONRestoreBIOSRegBlock(ScrnInfoPtr pS
case RADEON_TABLE_FLAG_WRITE_DIRECT:
val = RADEON_BIOS32(offset);
- ErrorF("WRITE DIRECT: 0x%x 0x%x\n", index, val);
+ ErrorF("WRITE DIRECT: 0x%x 0x%x\n", index, (unsigned)val);
OUTREG(index, val);
offset += 4;
break;
@@ -1096,7 +1095,7 @@ RADEONRestoreBIOSRegBlock(ScrnInfoPtr pS
ormask = RADEON_BIOS32(offset);
offset += 4;
ErrorF("MASK INDEXED: 0x%x 0x%x 0x%x\n",
- index, andmask, ormask);
+ index, (unsigned)andmask, (unsigned)ormask);
OUTREG(RADEON_MM_INDEX, index);
val = INREG(RADEON_MM_DATA);
val = (val & andmask) | ormask;
@@ -1109,7 +1108,7 @@ RADEONRestoreBIOSRegBlock(ScrnInfoPtr pS
ormask = RADEON_BIOS32(offset);
offset += 4;
ErrorF("MASK DIRECT: 0x%x 0x%x 0x%x\n",
- index, andmask, ormask);
+ index, (unsigned)andmask, (unsigned)ormask);
val = INREG(index);
val = (val & andmask) | ormask;
OUTREG(index, val);
@@ -1198,7 +1197,7 @@ RADEONRestoreBIOSMemBlock(ScrnInfoPtr pS
offset += 2;
ErrorF("INDEX RADEON_MEM_SDRAM_MODE_REG %x %x\n",
- RADEON_SDRAM_MODE_MASK, ormask);
+ RADEON_SDRAM_MODE_MASK, (unsigned)ormask);
/* can this use direct access? */
OUTREG(RADEON_MM_INDEX, RADEON_MEM_SDRAM_MODE_REG);
@@ -1209,7 +1208,7 @@ RADEONRestoreBIOSMemBlock(ScrnInfoPtr pS
ormask = (CARD32)index << 24;
ErrorF("INDEX RADEON_MEM_SDRAM_MODE_REG %x %x\n",
- RADEON_B3MEM_RESET_MASK, ormask);
+ RADEON_B3MEM_RESET_MASK, (unsigned)ormask);
/* can this use direct access? */
OUTREG(RADEON_MM_INDEX, RADEON_MEM_SDRAM_MODE_REG);
@@ -1224,7 +1223,6 @@ static void
RADEONRestoreBIOSPllBlock(ScrnInfoPtr pScrn, CARD16 table_offset)
{
RADEONInfoPtr info = RADEONPTR (pScrn);
- unsigned char *RADEONMMIO = info->MMIO;
CARD16 offset = table_offset;
CARD8 index, shift;
CARD32 andmask, ormask, val, clk_pwrmgt_cntl;
@@ -1298,7 +1296,7 @@ RADEONRestoreBIOSPllBlock(ScrnInfoPtr pS
offset++;
ErrorF("PLL_MASK_BYTE 0x%x 0x%x 0x%x 0x%x\n",
- index, shift, andmask, ormask);
+ index, shift, (unsigned)andmask, (unsigned)ormask);
val = INPLL(pScrn, index);
val = (val & andmask) | ormask;
OUTPLL(pScrn, index, val);
@@ -1306,7 +1304,7 @@ RADEONRestoreBIOSPllBlock(ScrnInfoPtr pS
case RADEON_PLL_FLAG_WRITE:
val = RADEON_BIOS32(offset);
- ErrorF("PLL_WRITE 0x%x 0x%x\n", index, val);
+ ErrorF("PLL_WRITE 0x%x 0x%x\n", index, (unsigned)val);
OUTPLL(pScrn, index, val);
offset += 4;
break;
diff --git a/src/radeon_output.c b/src/radeon_output.c
index 940bb01..b9e01a1 100644
--- a/src/radeon_output.c
+++ b/src/radeon_output.c
@@ -654,8 +654,6 @@ static Bool
radeon_mode_fixup(xf86OutputPtr output, DisplayModePtr mode,
DisplayModePtr adjusted_mode)
{
- ScrnInfoPtr pScrn = output->scrn;
- RADEONInfoPtr info = RADEONPTR(pScrn);
RADEONOutputPrivatePtr radeon_output = output->driver_private;
if (radeon_output->MonType == MT_LCD || radeon_output->MonType == MT_DFP) {
@@ -1229,12 +1227,9 @@ radeon_detect_tv_dac(ScrnInfoPtr pScrn,
/* save the regs we need */
pixclks_cntl = INPLL(pScrn, RADEON_PIXCLKS_CNTL);
- if (IS_R300_VARIANT) {
- gpiopad_a = INREG(RADEON_GPIOPAD_A);
- disp_output_cntl = INREG(RADEON_DISP_OUTPUT_CNTL);
- } else {
- disp_hw_debug = INREG(RADEON_DISP_HW_DEBUG);
- }
+ gpiopad_a = IS_R300_VARIANT ? INREG(RADEON_GPIOPAD_A) : 0;
+ disp_output_cntl = IS_R300_VARIANT ? INREG(RADEON_DISP_OUTPUT_CNTL) : 0;
+ disp_hw_debug = !IS_R300_VARIANT ? INREG(RADEON_DISP_HW_DEBUG) : 0;
crtc2_gen_cntl = INREG(RADEON_CRTC2_GEN_CNTL);
tv_dac_cntl = INREG(RADEON_TV_DAC_CNTL);
dac_ext_cntl = INREG(RADEON_DAC_EXT_CNTL);
@@ -2286,10 +2281,7 @@ RADEONGetTMDSInfo(xf86OutputPtr output)
static void
RADEONGetTVInfo(xf86OutputPtr output)
{
- ScrnInfoPtr pScrn = output->scrn;
- RADEONInfoPtr info = RADEONPTR(pScrn);
RADEONOutputPrivatePtr radeon_output = output->driver_private;
- int i;
radeon_output->hPos = 0;
radeon_output->vPos = 0;
diff --git a/src/radeon_tv.c b/src/radeon_tv.c
index 522f7ed..bc2905a 100644
--- a/src/radeon_tv.c
+++ b/src/radeon_tv.c
@@ -187,9 +187,7 @@ static long SLOPE_limit[5] = { 6, 5, 4,
static Bool RADEONInitTVRestarts(xf86OutputPtr output, RADEONSavePtr save,
DisplayModePtr mode)
{
- ScrnInfoPtr pScrn = output->scrn;
RADEONOutputPrivatePtr radeon_output = output->driver_private;
- RADEONInfoPtr info = RADEONPTR(pScrn);
int restart;
unsigned hTotal;
unsigned vTotal;
@@ -274,7 +272,8 @@ static Bool RADEONInitTVRestarts(xf86Out
save->tv_frestart = restart % fTotal;
ErrorF("computeRestarts: F/H/V=%u,%u,%u\n",
- save->tv_frestart , save->tv_vrestart , save->tv_hrestart);
+ (unsigned)save->tv_frestart, (unsigned)save->tv_vrestart,
+ (unsigned)save->tv_hrestart);
/* Compute H_INC from hSize */
if (radeon_output->tvStd == TV_STD_NTSC ||
@@ -570,7 +569,6 @@ void RADEONUpdateHVPosition(xf86OutputPt
ScrnInfoPtr pScrn = output->scrn;
RADEONInfoPtr info = RADEONPTR(pScrn);
unsigned char *RADEONMMIO = info->MMIO;
- RADEONOutputPrivatePtr radeon_output = output->driver_private;
Bool reloadTable;
RADEONSavePtr restore = &info->ModeReg;
diff --git a/src/radeon_video.c b/src/radeon_video.c
index 15e2101..7231c1e 100644
--- a/src/radeon_video.c
+++ b/src/radeon_video.c
@@ -2587,20 +2587,19 @@ RADEONDisplayVideo(
y_mult = 2;
}
+ v_inc = (src_h << v_inc_shift) / drw_h;
+
for (i = 0; i < xf86_config->num_output; i++) {
output = xf86_config->output[i];
if (output->crtc == crtc) {
radeon_output = output->driver_private;
+ if (radeon_output->Flags & RADEON_USE_RMX)
+ v_inc = ((src_h * mode->CrtcVDisplay /
+ radeon_output->PanelYRes) << v_inc_shift) / drw_h;
break;
}
}
- if (radeon_output->Flags & RADEON_USE_RMX) {
- v_inc = ((src_h * mode->CrtcVDisplay / radeon_output->PanelYRes) << v_inc_shift) / drw_h;
- } else {
- v_inc = (src_h << v_inc_shift) / drw_h;
- }
-
h_inc = (1 << (12 + ecp_div));
step_by_y = 1;
@@ -2860,7 +2859,6 @@ RADEONPutImage(
DrawablePtr pDraw
){
RADEONInfoPtr info = RADEONPTR(pScrn);
- xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
RADEONPortPrivPtr pPriv = (RADEONPortPrivPtr)data;
INT32 xa, xb, ya, yb;
unsigned char *dst_start;
@@ -3259,7 +3257,6 @@ RADEONDisplaySurface(
){
OffscreenPrivPtr pPriv = (OffscreenPrivPtr)surface->devPrivate.ptr;
ScrnInfoPtr pScrn = surface->pScrn;
- xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
RADEONInfoPtr info = RADEONPTR(pScrn);
RADEONPortPrivPtr portPriv = info->adaptor->pPortPrivates[0].ptr;
@@ -3362,7 +3359,6 @@ RADEONPutVideo(
){
RADEONInfoPtr info = RADEONPTR(pScrn);
RADEONPortPrivPtr pPriv = (RADEONPortPrivPtr)data;
- xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
unsigned char *RADEONMMIO = info->MMIO;
INT32 xa, xb, ya, yb, top;
unsigned int pitch, new_size, alloc_size;
@@ -3376,7 +3372,6 @@ RADEONPutVideo(
int mult;
int vbi_line_width, vbi_start, vbi_end;
xf86CrtcPtr crtc;
- RADEONCrtcPrivatePtr radeon_crtc;
RADEON_SYNC(info, pScrn);
/*
diff-tree de26e406f52b3b13f03eee2b8023924ec6406f0a (from c66e5de26ae93caa368213f3cce139aacec955d2)
Author: Alon Ziv <alonz at nolaviz.org>
Date: Mon Jul 30 22:47:59 2007 +0300
radeon: Sane handling of timeouts in WaitForVerticalSync(2).
RADEONWaitForVerticalSync() and RADEONWaitForVerticalSync2() need to wait
for a timeout specified in milliseconds; looping around usleep() causes
the timeout to be unnecessarily long, as the OS may sleep longer than
requested (on Linux the minimum actual sleep value may be several ms).
The new logic uses gettimeofday() in the loop to see when the (absolute)
timeout has arrived.
Signed-off-by: Alon Ziv <alonz at nolaviz.org>
diff --git a/src/radeon.h b/src/radeon.h
index bf1444c..8babf39 100644
--- a/src/radeon.h
+++ b/src/radeon.h
@@ -39,6 +39,8 @@
#include <stdlib.h> /* For abs() */
#include <unistd.h> /* For usleep() */
+#include <sys/time.h> /* For
+#include <time.h> * gettimeofday() */
#include "xf86str.h"
#include "compiler.h"
@@ -159,6 +161,8 @@ typedef enum {
#define RADEON_IDLE_RETRY 16 /* Fall out of idle loops after this count */
#define RADEON_TIMEOUT 2000000 /* Fall out of wait loops after this count */
+#define RADEON_VSYNC_TIMEOUT 20000 /* Maximum wait for VSYNC (in usecs) */
+
/* Buffer are aligned on 4096 byte boundaries */
#define RADEON_BUFFER_ALIGN 0x00000fff
#define RADEON_VBIOS_SIZE 0x00010000
@@ -1224,4 +1228,21 @@ static __inline__ void RADEON_SYNC(RADEO
#endif
}
+static __inline__ void radeon_init_timeout(struct timeval *endtime,
+ unsigned int timeout)
+{
+ gettimeofday(endtime, NULL);
+ endtime->tv_usec += timeout;
+ endtime->tv_sec += endtime->tv_usec / 1000000;
+ endtime->tv_usec %= 1000000;
+}
+
+static __inline__ int radeon_timedout(const struct timeval *endtime)
+{
+ struct timeval now;
+ gettimeofday(&now, NULL);
+ return now.tv_sec == endtime->tv_sec ?
+ now.tv_usec > endtime->tv_usec : now.tv_sec > endtime->tv_sec;
+}
+
#endif /* _RADEON_H_ */
diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index 87f1405..469e7bc 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -724,7 +724,7 @@ void RADEONWaitForVerticalSync(ScrnInfoP
RADEONInfoPtr info = RADEONPTR(pScrn);
unsigned char *RADEONMMIO = info->MMIO;
CARD32 crtc_gen_cntl;
- int i;
+ struct timeval timeout;
crtc_gen_cntl = INREG(RADEON_CRTC_GEN_CNTL);
if ((crtc_gen_cntl & RADEON_CRTC_DISP_REQ_EN_B) ||
@@ -735,10 +735,10 @@ void RADEONWaitForVerticalSync(ScrnInfoP
OUTREG(RADEON_CRTC_STATUS, RADEON_CRTC_VBLANK_SAVE_CLEAR);
/* Wait for it to go back up */
- for (i = 0; i < RADEON_TIMEOUT/1000; i++) {
- if (INREG(RADEON_CRTC_STATUS) & RADEON_CRTC_VBLANK_SAVE) break;
- usleep(1);
- }
+ radeon_init_timeout(&timeout, RADEON_VSYNC_TIMEOUT);
+ while (!(INREG(RADEON_CRTC_STATUS) & RADEON_CRTC_VBLANK_SAVE) &&
+ !radeon_timedout(&timeout))
+ usleep(100);
}
/* Wait for vertical sync on secondary CRTC */
@@ -747,7 +747,7 @@ void RADEONWaitForVerticalSync2(ScrnInfo
RADEONInfoPtr info = RADEONPTR(pScrn);
unsigned char *RADEONMMIO = info->MMIO;
CARD32 crtc2_gen_cntl;
- int i;
+ struct timeval timeout;
crtc2_gen_cntl = INREG(RADEON_CRTC2_GEN_CNTL);
if ((crtc2_gen_cntl & RADEON_CRTC2_DISP_REQ_EN_B) ||
@@ -758,10 +758,10 @@ void RADEONWaitForVerticalSync2(ScrnInfo
OUTREG(RADEON_CRTC2_STATUS, RADEON_CRTC2_VBLANK_SAVE_CLEAR);
/* Wait for it to go back up */
- for (i = 0; i < RADEON_TIMEOUT/1000; i++) {
- if (INREG(RADEON_CRTC2_STATUS) & RADEON_CRTC2_VBLANK_SAVE) break;
- usleep(1);
- }
+ radeon_init_timeout(&timeout, RADEON_VSYNC_TIMEOUT);
+ while (!(INREG(RADEON_CRTC2_STATUS) & RADEON_CRTC2_VBLANK_SAVE) &&
+ !radeon_timedout(&timeout))
+ usleep(100);
}
diff-tree c66e5de26ae93caa368213f3cce139aacec955d2 (from 633c1fff10a3be4c9f48c1995e330d60bf6abbb2)
Author: Sascha Sommer <saschasommer at freenet.de>
Date: Thu Aug 23 12:11:51 2007 +0200
radeon: Round down RMX stretch ratios.
Fixes issues with RMX scaling, see
https://bugs.freedesktop.org/show_bug.cgi?id=8983 .
diff --git a/src/radeon_output.c b/src/radeon_output.c
index 9650a39..940bb01 100644
--- a/src/radeon_output.c
+++ b/src/radeon_output.c
@@ -848,21 +848,22 @@ static void RADEONInitRMXRegisters(xf86O
if (Hratio == 1.0 || !(mode->Flags & RADEON_USE_RMX)) {
save->fp_horz_stretch |= ((xres/8-1)<<16);
} else {
- save->fp_horz_stretch |= ((((unsigned long)(Hratio * RADEON_HORZ_STRETCH_RATIO_MAX +
- 0.5)) & RADEON_HORZ_STRETCH_RATIO_MASK) |
- RADEON_HORZ_STRETCH_BLEND |
- RADEON_HORZ_STRETCH_ENABLE |
- ((radeon_output->PanelXRes/8-1)<<16));
+ save->fp_horz_stretch |= ((((unsigned long)
+ (Hratio * RADEON_HORZ_STRETCH_RATIO_MAX)) &
+ RADEON_HORZ_STRETCH_RATIO_MASK) |
+ RADEON_HORZ_STRETCH_BLEND |
+ RADEON_HORZ_STRETCH_ENABLE |
+ ((radeon_output->PanelXRes/8-1)<<16));
}
if (Vratio == 1.0 || !(mode->Flags & RADEON_USE_RMX)) {
save->fp_vert_stretch |= ((yres-1)<<12);
} else {
- save->fp_vert_stretch |= ((((unsigned long)(Vratio * RADEON_VERT_STRETCH_RATIO_MAX +
- 0.5)) & RADEON_VERT_STRETCH_RATIO_MASK) |
- RADEON_VERT_STRETCH_ENABLE |
- RADEON_VERT_STRETCH_BLEND |
- ((radeon_output->PanelYRes-1)<<12));
+ save->fp_vert_stretch |= ((((unsigned long)(Vratio * RADEON_VERT_STRETCH_RATIO_MAX)) &
+ RADEON_VERT_STRETCH_RATIO_MASK) |
+ RADEON_VERT_STRETCH_ENABLE |
+ RADEON_VERT_STRETCH_BLEND |
+ ((radeon_output->PanelYRes-1)<<12));
}
}
diff-tree 633c1fff10a3be4c9f48c1995e330d60bf6abbb2 (from 4f8010ce22043c0f8d60c0f49d270ce98c9d2466)
Author: Michel Dänzer <michel at tungstengraphics.com>
Date: Thu Aug 23 12:11:41 2007 +0200
radeon: Sync pages when enabling page flipping with EXA as well.
Exclude the DRI window(s) though to avoid scribbling over 3D rendering.
diff --git a/src/radeon_dri.c b/src/radeon_dri.c
index 0ad0f7f..24018e8 100644
--- a/src/radeon_dri.c
+++ b/src/radeon_dri.c
@@ -69,7 +69,7 @@ static void RADEONDRITransitionMultiToSi
static void RADEONDRITransitionSingleToMulti3d(ScreenPtr pScreen);
#ifdef DAMAGE
-static void RADEONDRIRefreshArea(ScrnInfoPtr pScrn, int num, BoxPtr pbox);
+static void RADEONDRIRefreshArea(ScrnInfoPtr pScrn, RegionPtr pReg);
#if (DRIINFO_MAJOR_VERSION > 5 || \
(DRIINFO_MAJOR_VERSION == 5 && DRIINFO_MINOR_VERSION >= 1))
@@ -406,16 +406,7 @@ static void RADEONLeaveServer(ScreenPtr
int nrects = pDamageReg ? REGION_NUM_RECTS(pDamageReg) : 0;
if (nrects) {
- RegionRec region;
-
- REGION_NULL(pScreen, ®ion);
- REGION_SUBTRACT(pScreen, ®ion, pDamageReg, &info->driRegion);
-
- nrects = REGION_NUM_RECTS(®ion);
-
- if (nrects) {
- RADEONDRIRefreshArea(pScrn, nrects, REGION_RECTS(®ion));
- }
+ RADEONDRIRefreshArea(pScrn, pDamageReg);
}
}
#endif
@@ -1871,15 +1862,17 @@ void RADEONDRICloseScreen(ScreenPtr pScr
*/
-static void RADEONDRIRefreshArea(ScrnInfoPtr pScrn, int num, BoxPtr pbox)
+static void RADEONDRIRefreshArea(ScrnInfoPtr pScrn, RegionPtr pReg)
{
RADEONInfoPtr info = RADEONPTR(pScrn);
- int i;
+ int i, num;
ScreenPtr pScreen = pScrn->pScreen;
RADEONSAREAPrivPtr pSAREAPriv = DRIGetSAREAPrivate(pScreen);
#ifdef USE_EXA
PixmapPtr pPix = pScreen->GetScreenPixmap(pScreen);
#endif
+ RegionRec region;
+ BoxPtr pbox;
if (!info->directRenderingInited || !info->CPStarted)
return;
@@ -1890,6 +1883,17 @@ static void RADEONDRIRefreshArea(ScrnInf
if (!pSAREAPriv->pfAllowPageFlip && pSAREAPriv->pfCurrentPage == 0)
return;
+ REGION_NULL(pScreen, ®ion);
+ REGION_SUBTRACT(pScreen, ®ion, pReg, &info->driRegion);
+
+ num = REGION_NUM_RECTS(®ion);
+
+ if (!num) {
+ goto out;
+ }
+
+ pbox = REGION_RECTS(®ion);
+
/* pretty much a hack. */
#ifdef USE_EXA
@@ -1910,7 +1914,7 @@ static void RADEONDRIRefreshArea(ScrnInf
if (!info->useEXA) {
/* Make sure accel has been properly inited */
if (info->accel == NULL || info->accel->SetupForScreenToScreenCopy == NULL)
- return;
+ goto out;
if (info->tilingEnabled)
info->dst_pitch_offset |= RADEON_DST_TILE_MACRO;
(*info->accel->SetupForScreenToScreenCopy)(pScrn,
@@ -1946,6 +1950,8 @@ static void RADEONDRIRefreshArea(ScrnInf
info->dst_pitch_offset &= ~RADEON_DST_TILE_MACRO;
#endif
+out:
+ REGION_NULL(pScreen, ®ion);
DamageEmpty(info->pDamage);
}
@@ -1959,16 +1965,13 @@ static void RADEONEnablePageFlip(ScreenP
if (info->allowPageFlip) {
RADEONSAREAPrivPtr pSAREAPriv = DRIGetSAREAPrivate(pScreen);
+ BoxRec box = { .x1 = 0, .y1 = 0, .x2 = pScrn->virtualX - 1,
+ .y2 = pScrn->virtualY - 1 };
+ RegionPtr pReg = REGION_CREATE(pScreen, &box, 1);
pSAREAPriv->pfAllowPageFlip = 1;
-
-#ifdef USE_XAA
- if (!info->useEXA) {
- BoxRec box = { .x1 = 0, .y1 = 0, .x2 = pScrn->virtualX - 1,
- .y2 = pScrn->virtualY - 1 };
- RADEONDRIRefreshArea(pScrn, 1, &box);
- }
-#endif
+ RADEONDRIRefreshArea(pScrn, pReg);
+ REGION_DESTROY(pScreen, pReg);
}
#endif
}
diff-tree 4f8010ce22043c0f8d60c0f49d270ce98c9d2466 (from 7b527054a7c81d1d1dbc79d41b9e53064dab68cb)
Author: Michel Dänzer <michel at tungstengraphics.com>
Date: Thu Aug 23 12:11:12 2007 +0200
radeon: Don't synchronize DRI windows between pages when possible.
diff --git a/src/radeon.h b/src/radeon.h
index 1a91cfd..bf1444c 100644
--- a/src/radeon.h
+++ b/src/radeon.h
@@ -605,6 +605,7 @@ typedef struct {
Bool allowPageFlip; /* Enable 3d page flipping */
#ifdef DAMAGE
DamagePtr pDamage;
+ RegionRec driRegion;
#endif
Bool have3DWindows; /* Are there any 3d clients? */
diff --git a/src/radeon_dri.c b/src/radeon_dri.c
index f057bdf..0ad0f7f 100644
--- a/src/radeon_dri.c
+++ b/src/radeon_dri.c
@@ -70,6 +70,11 @@ static void RADEONDRITransitionSingleToM
#ifdef DAMAGE
static void RADEONDRIRefreshArea(ScrnInfoPtr pScrn, int num, BoxPtr pbox);
+
+#if (DRIINFO_MAJOR_VERSION > 5 || \
+ (DRIINFO_MAJOR_VERSION == 5 && DRIINFO_MINOR_VERSION >= 1))
+static void RADEONDRIClipNotify(ScreenPtr pScreen, WindowPtr *ppWin, int num);
+#endif
#endif
/* Initialize the visual configs that are supported by the hardware.
@@ -401,7 +406,16 @@ static void RADEONLeaveServer(ScreenPtr
int nrects = pDamageReg ? REGION_NUM_RECTS(pDamageReg) : 0;
if (nrects) {
- RADEONDRIRefreshArea(pScrn, nrects, REGION_RECTS(pDamageReg));
+ RegionRec region;
+
+ REGION_NULL(pScreen, ®ion);
+ REGION_SUBTRACT(pScreen, ®ion, pDamageReg, &info->driRegion);
+
+ nrects = REGION_NUM_RECTS(®ion);
+
+ if (nrects) {
+ RADEONDRIRefreshArea(pScrn, nrects, REGION_RECTS(®ion));
+ }
}
}
#endif
@@ -1490,6 +1504,11 @@ Bool RADEONDRIScreenInit(ScreenPtr pScre
pDRIInfo->TransitionTo3d = RADEONDRITransitionTo3d;
pDRIInfo->TransitionSingleToMulti3D = RADEONDRITransitionSingleToMulti3d;
pDRIInfo->TransitionMultiToSingle3D = RADEONDRITransitionMultiToSingle3d;
+#if defined(DAMAGE) && (DRIINFO_MAJOR_VERSION > 5 || \
+ (DRIINFO_MAJOR_VERSION == 5 && \
+ DRIINFO_MINOR_VERSION >= 1))
+ pDRIInfo->ClipNotify = RADEONDRIClipNotify;
+#endif
pDRIInfo->createDummyCtx = TRUE;
pDRIInfo->createDummyCtxPriv = FALSE;
@@ -1753,7 +1772,11 @@ void RADEONDRICloseScreen(ScreenPtr pScr
xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG,
"RADEONDRICloseScreen\n");
-
+
+#ifdef DAMAGE
+ REGION_UNINIT(pScreen, &info->driRegion);
+#endif
+
if (info->irq) {
RADEONDRISetVBlankInterrupt (pScrn, FALSE);
drmCtlUninstHandler(info->drmFD);
@@ -2101,6 +2124,33 @@ static void RADEONDRITransitionTo2d(Scre
xf86ForceHWCursor (pScreen, FALSE);
}
+#if defined(DAMAGE) && (DRIINFO_MAJOR_VERSION > 5 || \
+ (DRIINFO_MAJOR_VERSION == 5 && \
+ DRIINFO_MINOR_VERSION >= 1))
+static void
+RADEONDRIClipNotify(ScreenPtr pScreen, WindowPtr *ppWin, int num)
+{
+ ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+ RADEONInfoPtr info = RADEONPTR(pScrn);
+
+ REGION_UNINIT(pScreen, &info->driRegion);
+ REGION_NULL(pScreen, &info->driRegion);
+
+ if (num > 0) {
+ int i;
+
+ for (i = 0; i < num; i++) {
+ WindowPtr pWin = ppWin[i];
+
+ if (pWin) {
+ REGION_UNION(pScreen, &info->driRegion, &pWin->clipList,
+ &info->driRegion);
+ }
+ }
+ }
+}
+#endif
+
void RADEONDRIAllocatePCIGARTTable(ScreenPtr pScreen)
{
ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
diff-tree 7b527054a7c81d1d1dbc79d41b9e53064dab68cb (from d7ba9f001c0ab645984526afd0e64d1c6a6d654a)
Author: Michel Dänzer <michel at tungstengraphics.com>
Date: Thu Aug 23 12:10:33 2007 +0200
radeon: Restore memmap registers even if only AGP location changed.
diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index 1d5cc36..87f1405 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -3982,13 +3982,11 @@ static void RADEONAdjustMemMapRegisters(
RADEONInfoPtr info = RADEONPTR(pScrn);
unsigned char *RADEONMMIO = info->MMIO;
CARD32 fb, agp;
- int fb_loc_changed;
fb = INREG(RADEON_MC_FB_LOCATION);
agp = INREG(RADEON_MC_AGP_LOCATION);
- fb_loc_changed = (fb != info->mc_fb_location);
- if (fb_loc_changed || agp != info->mc_agp_location) {
+ if (fb != info->mc_fb_location || agp != info->mc_agp_location) {
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
"DRI init changed memory map, adjusting ...\n");
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
@@ -4007,9 +4005,8 @@ static void RADEONAdjustMemMapRegisters(
RADEONInitMemMapRegisters(pScrn, save, info);
- /* If MC_FB_LOCATION was changed, adjust the various offsets */
- if (fb_loc_changed)
- RADEONRestoreMemMapRegisters(pScrn, save);
+ /* Adjust the various offsets */
+ RADEONRestoreMemMapRegisters(pScrn, save);
}
#ifdef USE_EXA
diff-tree d7ba9f001c0ab645984526afd0e64d1c6a6d654a (from 8c7c22e22b6076abc80e4e1aaa8d1f4cf2f3ed14)
Author: Michel Dänzer <michel at tungstengraphics.com>
Date: Thu Aug 23 11:39:54 2007 +0200
radeon: Change a test to info->IsIGP from several IGP families.
diff --git a/src/radeon_video.c b/src/radeon_video.c
index 73c9efc..15e2101 100644
--- a/src/radeon_video.c
+++ b/src/radeon_video.c
@@ -1437,9 +1437,7 @@ RADEONAllocAdaptor(ScrnInfoPtr pScrn)
info->ecp_div = 1;
ecp = (INPLL(pScrn, RADEON_VCLK_ECP_CNTL) & 0xfffffCff) | (info->ecp_div << 8);
- if ((info->ChipFamily == CHIP_FAMILY_RS100) ||
- (info->ChipFamily == CHIP_FAMILY_RS200) ||
- (info->ChipFamily == CHIP_FAMILY_RS300)) {
+ if (info->IsIGP) {
/* Force the overlay clock on for integrated chips
*/
ecp |= (1<<18);
diff-tree 8c7c22e22b6076abc80e4e1aaa8d1f4cf2f3ed14 (from 92fa7cc00688d7bfc1fb72e645ac30c6d92669c6)
Author: Michel Dänzer <michel at tungstengraphics.com>
Date: Thu Aug 23 11:38:17 2007 +0200
radeon: Wait for pending overlay flip to finish before emitting new one.
diff --git a/src/radeon_reg.h b/src/radeon_reg.h
index 9eae40d..af62a69 100644
--- a/src/radeon_reg.h
+++ b/src/radeon_reg.h
@@ -1094,6 +1094,7 @@
# define RADEON_REG_LD_CTL_VBLANK_DURING_LOCK 0x00000002L
# define RADEON_REG_LD_CTL_STALL_GUI_UNTIL_FLIP 0x00000004L
# define RADEON_REG_LD_CTL_LOCK_READBACK 0x00000008L
+# define RADEON_REG_LD_CTL_FLIP_READBACK 0x00000010L
#define RADEON_OV0_SCALE_CNTL 0x0420
# define RADEON_SCALER_HORZ_PICK_NEAREST 0x00000004L
# define RADEON_SCALER_VERT_PICK_NEAREST 0x00000008L
diff --git a/src/radeon_video.c b/src/radeon_video.c
index 7b85108..73c9efc 100644
--- a/src/radeon_video.c
+++ b/src/radeon_video.c
@@ -2966,8 +2966,14 @@ RADEONPutImage(
offset = (pPriv->video_offset) + (top * dstPitch);
- if(pPriv->doubleBuffer)
+ if(pPriv->doubleBuffer) {
+ unsigned char *RADEONMMIO = info->MMIO;
+
+ /* Wait for last flip to take effect */
+ while(!(INREG(RADEON_OV0_REG_LOAD_CNTL) & RADEON_REG_LD_CTL_FLIP_READBACK));
+
offset += pPriv->currentBuffer * new_size;
+ }
dst_start = info->FB + offset;
diff-tree 92fa7cc00688d7bfc1fb72e645ac30c6d92669c6 (from 5cb20c2dc5eca9d7d7d78e9924ea1b90076e7253)
Author: Michel Dänzer <michel at tungstengraphics.com>
Date: Thu Aug 23 11:38:16 2007 +0200
radeon: Don't call RADEONDRIRefreshArea when the damaged region is empty.
diff --git a/src/radeon_dri.c b/src/radeon_dri.c
index 7949c5b..f057bdf 100644
--- a/src/radeon_dri.c
+++ b/src/radeon_dri.c
@@ -398,10 +398,10 @@ static void RADEONLeaveServer(ScreenPtr
#ifdef DAMAGE
if (info->pDamage) {
RegionPtr pDamageReg = DamageRegion(info->pDamage);
+ int nrects = pDamageReg ? REGION_NUM_RECTS(pDamageReg) : 0;
- if (pDamageReg) {
- RADEONDRIRefreshArea(pScrn, REGION_NUM_RECTS(pDamageReg),
- REGION_RECTS(pDamageReg));
+ if (nrects) {
+ RADEONDRIRefreshArea(pScrn, nrects, REGION_RECTS(pDamageReg));
}
}
#endif
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