xf86-video-intel: src/i830_display.c src/i830_dri.c src/i830_exa.c src/i830.h src/i830_memory.c src/i830_xaa.c src/i915_render.c src/i915_video.c
Eric Anholt
anholt at kemper.freedesktop.org
Fri Aug 10 17:12:26 PDT 2007
src/i830.h | 14 +++---
src/i830_display.c | 8 +--
src/i830_dri.c | 11 +++--
src/i830_exa.c | 25 ++++++++---
src/i830_memory.c | 112 +++++++++++++++++++----------------------------------
src/i830_xaa.c | 110 +++++++++++++++++++++++++++-------------------------
src/i915_render.c | 3 -
src/i915_video.c | 16 +------
8 files changed, 142 insertions(+), 157 deletions(-)
New commits:
diff-tree cb36635a053d4ac3971fea05060d31dbd3d382d2 (from ed1b106fabf3a18489bdb3083326f27387a9cb72)
Author: Eric Anholt <eric at anholt.net>
Date: Fri Aug 10 14:16:59 2007 -0700
Attempt to fix several front buffer tiling failure cases.
Front buffer tiling is now disabled with G965 and XAA. Some of the acceleration
that i830_xaa.c does can't be supported on tiled buffers.
Adds a tiling field to struct i830_memory, and uses it instead of separate
variables for each potential tiled buffer.
diff --git a/src/i830.h b/src/i830.h
index f72e1d6..7ae17b4 100644
--- a/src/i830.h
+++ b/src/i830.h
@@ -117,6 +117,12 @@ typedef CARD8(*I830ReadIndexedByteFunc)(
typedef void (*I830WriteByteFunc)(I830Ptr pI830, IOADDRESS addr, CARD8 value);
typedef CARD8(*I830ReadByteFunc)(I830Ptr pI830, IOADDRESS addr);
+enum tile_format {
+ TILE_NONE,
+ TILE_XMAJOR,
+ TILE_YMAJOR
+};
+
/** Record of a linear allocation in the aperture. */
typedef struct _i830_memory i830_memory;
struct _i830_memory {
@@ -148,6 +154,8 @@ struct _i830_memory {
*/
unsigned long agp_offset;
+ enum tile_format tiling;
+
/** Description of the allocation, for logging */
char *name;
@@ -316,8 +324,6 @@ typedef struct _I830Rec {
i830_memory *logical_context;
- unsigned int front_tiled;
-
#ifdef XF86DRI
i830_memory *back_buffer;
i830_memory *third_buffer;
@@ -331,10 +337,6 @@ typedef struct _I830Rec {
int mmModeFlags;
int mmSize;
- unsigned int back_tiled;
- unsigned int third_tiled;
- unsigned int depth_tiled;
-
Bool want_vblank_interrupts;
#ifdef DAMAGE
DamagePtr pDamage;
diff --git a/src/i830_display.c b/src/i830_display.c
index d5f7586..a77da1b 100644
--- a/src/i830_display.c
+++ b/src/i830_display.c
@@ -505,14 +505,14 @@ i830_display_tiled(xf86CrtcPtr crtc)
ScrnInfoPtr pScrn = crtc->scrn;
I830Ptr pI830 = I830PTR(pScrn);
- if (!pI830->tiling)
- return FALSE;
-
/* Rotated data is currently linear, allocated either via XAA or EXA */
if (crtc->rotatedData)
return FALSE;
- return TRUE;
+ if (pI830->front_buffer->tiling != TILE_NONE)
+ return TRUE;
+
+ return FALSE;
}
static Bool
diff --git a/src/i830_dri.c b/src/i830_dri.c
index ca1190c..a4fc97c 100644
--- a/src/i830_dri.c
+++ b/src/i830_dri.c
@@ -1658,10 +1658,13 @@ I830UpdateDRIBuffers(ScrnInfoPtr pScrn,
I830DRIUnmapScreenRegions(pScrn, sarea);
- sarea->front_tiled = pI830->front_tiled;
- sarea->back_tiled = pI830->back_tiled;
- sarea->third_tiled = pI830->third_tiled;
- sarea->depth_tiled = pI830->depth_tiled;
+ sarea->front_tiled = (pI830->front_buffer->tiling != TILE_NONE);
+ sarea->back_tiled = (pI830->back_buffer->tiling != TILE_NONE);
+ if (pI830->third_buffer != NULL)
+ sarea->third_tiled = (pI830->third_buffer->tiling != TILE_NONE);
+ else
+ sarea->third_tiled = FALSE;
+ sarea->depth_tiled = (pI830->depth_buffer->tiling != TILE_NONE);
sarea->rotated_tiled = FALSE;
sarea->front_offset = pI830->front_buffer->offset;
diff --git a/src/i830_exa.c b/src/i830_exa.c
index 023a845..fdf94d7 100644
--- a/src/i830_exa.c
+++ b/src/i830_exa.c
@@ -97,19 +97,30 @@ const int I830PatternROP[16] =
ROP_1
};
-/* FIXME: use pixmap private instead */
+/**
+ * Returns whether a given pixmap is tiled or not.
+ *
+ * Currently, we only have one pixmap that might be tiled, which is the front
+ * buffer. At the point where we are tiling some pixmaps managed by the
+ * general allocator, we should move this to using pixmap privates.
+ */
Bool
-i830_pixmap_tiled(PixmapPtr p)
+i830_pixmap_tiled(PixmapPtr pPixmap)
{
- ScreenPtr pScreen = p->drawable.pScreen;
+ ScreenPtr pScreen = pPixmap->drawable.pScreen;
ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
I830Ptr pI830 = I830PTR(pScrn);
+ unsigned long offset;
- if (!pI830->tiling)
- return FALSE;
-
- if (p == pScreen->GetScreenPixmap(pScreen))
+ /* Don't use exaGetPixmapOffset becuase we might be called from XAA code. */
+ offset = (long)pPixmap->devPrivate.ptr -
+ (long)pI830->FbBase;
+ if (offset == pI830->front_buffer->offset &&
+ pI830->front_buffer->tiling != TILE_NONE)
+ {
return TRUE;
+ }
+
return FALSE;
}
diff --git a/src/i830_memory.c b/src/i830_memory.c
index 93b054c..6ba2cd1 100644
--- a/src/i830_memory.c
+++ b/src/i830_memory.c
@@ -108,12 +108,6 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN
#define ALIGN(i,m) (((i) + (m) - 1) & ~((m) - 1))
-enum tile_format {
- TILING_NONE,
- TILING_XMAJOR,
- TILING_YMAJOR
-};
-
static void i830_set_fence(ScrnInfoPtr pScrn, int nr, unsigned int offset,
unsigned int pitch, unsigned int size,
enum tile_format tile_format);
@@ -536,6 +530,8 @@ i830_allocate_memory(ScrnInfoPtr pScrn,
return NULL;
}
+ mem->tiling = TILE_NONE;
+
return mem;
}
@@ -560,7 +556,7 @@ i830_allocate_memory_tiled(ScrnInfoPtr p
i830_memory *mem;
int fence_divide, i;
- if (tile_format == TILING_NONE)
+ if (tile_format == TILE_NONE)
return i830_allocate_memory(pScrn, name, size, alignment, flags);
/* Only allocate page-sized increments. */
@@ -637,19 +633,11 @@ i830_allocate_memory_tiled(ScrnInfoPtr p
}
mem->size = size;
+ mem->tiling = tile_format;
return mem;
}
-static void
-i830_describe_tiling(ScrnInfoPtr pScrn, int verbosity, const char *prefix,
- i830_memory *mem, unsigned int tiling_mode)
-{
- xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity,
- "%s%s is %stiled\n", prefix, mem->name,
- (tiling_mode == FENCE_LINEAR) ? "not " : "");
-}
-
void
i830_describe_allocations(ScrnInfoPtr pScrn, int verbosity, const char *prefix)
{
@@ -672,6 +660,8 @@ i830_describe_allocations(ScrnInfoPtr pS
"%sMemory allocation layout:\n", prefix);
for (mem = pI830->memory_list->next; mem->next != NULL; mem = mem->next) {
+ char phys_suffix[30] = "";
+ char *tile_suffix = "";
if (mem->offset >= pI830->stolen_size &&
mem->prev->offset < pI830->stolen_size)
@@ -681,42 +671,21 @@ i830_describe_allocations(ScrnInfoPtr pS
prefix, pI830->stolen_size);
}
- if (mem->bus_addr == 0) {
- xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity,
- "%s0x%08lx-0x%08lx: %s (%ld kB)\n", prefix,
- mem->offset, mem->end - 1, mem->name,
- mem->size / 1024);
- } else {
- xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity,
- "%s0x%08lx-0x%08lx: %s "
- "(%ld kB, 0x%16llx physical)\n",
- prefix,
- mem->offset, mem->end - 1, mem->name,
- mem->size / 1024, mem->bus_addr);
- }
+ if (mem->bus_addr != 0)
+ sprintf(phys_suffix, ", 0x%16llx physical\n", mem->bus_addr);
+ if (mem->tiling == TILE_XMAJOR)
+ tile_suffix = " X tiled";
+ else if (mem->tiling == TILE_YMAJOR)
+ tile_suffix = " Y tiled";
+
+ xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity,
+ "%s0x%08lx-0x%08lx: %s (%ld kB%s)%s\n", prefix,
+ mem->offset, mem->end - 1, mem->name,
+ mem->size / 1024, phys_suffix, tile_suffix);
}
xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity,
"%s0x%08lx: end of aperture\n",
prefix, pI830->FbMapSize);
-
- if (pI830->front_buffer != NULL) {
- i830_describe_tiling(pScrn, verbosity, prefix, pI830->front_buffer,
- pI830->front_tiled);
- }
-#ifdef XF86DRI
- if (pI830->back_buffer != NULL) {
- i830_describe_tiling(pScrn, verbosity, prefix, pI830->back_buffer,
- pI830->back_tiled);
- }
- if (pI830->third_buffer != NULL) {
- i830_describe_tiling(pScrn, verbosity, prefix, pI830->third_buffer,
- pI830->third_tiled);
- }
- if (pI830->depth_buffer != NULL) {
- i830_describe_tiling(pScrn, verbosity, prefix, pI830->depth_buffer,
- pI830->depth_tiled);
- }
-#endif
}
static Bool
@@ -835,6 +804,7 @@ i830_allocate_framebuffer(ScrnInfoPtr pS
long size, fb_height;
char *name;
i830_memory *front_buffer = NULL;
+ Bool tiling;
/* Clear everything first. */
memset(FbMemBox, 0, sizeof(*FbMemBox));
@@ -903,8 +873,17 @@ i830_allocate_framebuffer(ScrnInfoPtr pS
name = secondary ? "secondary front buffer" : "front buffer";
+ /* Front buffer tiling has to be disabled with G965 XAA because some of the
+ * acceleration operations (non-XY COLOR_BLT) can't be done to tiled
+ * buffers.
+ */
+ if (!pI830->useEXA && IS_I965G(pI830))
+ tiling = FALSE;
+ else
+ tiling = pI830->tiling;
+
/* Attempt to allocate it tiled first if we have page flipping on. */
- if (pI830->tiling && IsTileable(pScrn, pitch)) {
+ if (tiling && IsTileable(pScrn, pitch)) {
/* XXX: probably not the case on 965 */
if (IS_I9XX(pI830))
align = MB(1);
@@ -912,14 +891,12 @@ i830_allocate_framebuffer(ScrnInfoPtr pS
align = KB(512);
front_buffer = i830_allocate_memory_tiled(pScrn, name, size,
pitch, align,
- 0, TILING_XMAJOR);
- pI830->front_tiled = FENCE_XMAJOR;
+ 0, TILE_XMAJOR);
}
/* If not, attempt it linear */
if (front_buffer == NULL) {
front_buffer = i830_allocate_memory(pScrn, name, size, KB(64), flags);
- pI830->front_tiled = FENCE_LINEAR;
}
if (front_buffer == NULL) {
@@ -1240,7 +1217,7 @@ myLog2(unsigned int n)
static Bool
i830_allocate_backbuffer(ScrnInfoPtr pScrn, i830_memory **buffer,
- unsigned int *tiled, const char *name)
+ const char *name)
{
I830Ptr pI830 = I830PTR(pScrn);
unsigned int pitch = pScrn->displayWidth * pI830->cpp;
@@ -1258,8 +1235,7 @@ i830_allocate_backbuffer(ScrnInfoPtr pSc
size = ROUND_TO_PAGE(pitch * ALIGN(height, 16));
*buffer = i830_allocate_memory_tiled(pScrn, name, size, pitch,
GTT_PAGE_SIZE, ALIGN_BOTH_ENDS,
- TILING_XMAJOR);
- *tiled = FENCE_XMAJOR;
+ TILE_XMAJOR);
}
/* Otherwise, just allocate it linear */
@@ -1267,7 +1243,6 @@ i830_allocate_backbuffer(ScrnInfoPtr pSc
size = ROUND_TO_PAGE(pitch * height);
*buffer = i830_allocate_memory(pScrn, name, size, GTT_PAGE_SIZE,
ALIGN_BOTH_ENDS);
- *tiled = FENCE_LINEAR;
}
if (*buffer == NULL) {
@@ -1303,14 +1278,12 @@ i830_allocate_depthbuffer(ScrnInfoPtr pS
/* The 965 requires that the depth buffer be in Y Major format, while
* the rest appear to fail when handed that format.
*/
- tile_format = IS_I965G(pI830) ? TILING_YMAJOR: TILING_XMAJOR;
+ tile_format = IS_I965G(pI830) ? TILE_YMAJOR: TILE_XMAJOR;
pI830->depth_buffer =
i830_allocate_memory_tiled(pScrn, "depth buffer", size, pitch,
GTT_PAGE_SIZE, ALIGN_BOTH_ENDS,
tile_format);
- pI830->depth_tiled = (tile_format == TILING_YMAJOR) ? FENCE_YMAJOR :
- FENCE_XMAJOR;
}
/* Otherwise, allocate it linear. */
@@ -1319,7 +1292,6 @@ i830_allocate_depthbuffer(ScrnInfoPtr pS
pI830->depth_buffer =
i830_allocate_memory(pScrn, "depth buffer", size, GTT_PAGE_SIZE,
0);
- pI830->depth_tiled = FENCE_LINEAR;
}
if (pI830->depth_buffer == NULL) {
@@ -1405,13 +1377,11 @@ i830_allocate_3d_memory(ScrnInfoPtr pScr
return FALSE;
}
- if (!i830_allocate_backbuffer(pScrn, &pI830->back_buffer,
- &pI830->back_tiled, "back buffer"))
+ if (!i830_allocate_backbuffer(pScrn, &pI830->back_buffer, "back buffer"))
return FALSE;
if (pI830->TripleBuffer && !i830_allocate_backbuffer(pScrn,
&pI830->third_buffer,
- &pI830->third_tiled,
"third buffer")) {
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
"Failed to allocate third buffer, triple buffering "
@@ -1447,7 +1417,7 @@ i830_set_fence(ScrnInfoPtr pScrn, int nr
DPRINTF(PFX, "i830_set_fence(): %d, 0x%08x, %d, %d kByte\n",
nr, offset, pitch, size / 1024);
- assert(tile_format != TILING_NONE);
+ assert(tile_format != TILE_NONE);
if (IS_I965G(pI830)) {
if (nr < 0 || nr >= FENCE_NEW_NR) {
@@ -1457,18 +1427,18 @@ i830_set_fence(ScrnInfoPtr pScrn, int nr
}
switch (tile_format) {
- case TILING_XMAJOR:
+ case TILE_XMAJOR:
pI830->fence[nr] = (((pitch / 128) - 1) << 2) | offset | 1;
pI830->fence[nr] |= I965_FENCE_X_MAJOR;
break;
- case TILING_YMAJOR:
+ case TILE_YMAJOR:
/* YMajor can be 128B aligned but the current code dictates
* otherwise. This isn't a problem apart from memory waste.
* FIXME */
pI830->fence[nr] = (((pitch / 128) - 1) << 2) | offset | 1;
pI830->fence[nr] |= I965_FENCE_Y_MAJOR;
break;
- case TILING_NONE:
+ case TILE_NONE:
break;
}
@@ -1516,13 +1486,13 @@ i830_set_fence(ScrnInfoPtr pScrn, int nr
val = offset | FENCE_VALID;
switch (tile_format) {
- case TILING_XMAJOR:
+ case TILE_XMAJOR:
val |= FENCE_X_MAJOR;
break;
- case TILING_YMAJOR:
+ case TILE_YMAJOR:
val |= FENCE_Y_MAJOR;
break;
- case TILING_NONE:
+ case TILE_NONE:
break;
}
@@ -1590,7 +1560,7 @@ i830_set_fence(ScrnInfoPtr pScrn, int nr
}
if ((IS_I945G(pI830) || IS_I945GM(pI830) || IS_G33CLASS(pI830))
- && tile_format == TILING_YMAJOR)
+ && tile_format == TILE_YMAJOR)
fence_pitch = pitch / 128;
else if (IS_I9XX(pI830))
fence_pitch = pitch / 512;
diff --git a/src/i830_xaa.c b/src/i830_xaa.c
index aa06a80..fabac20 100644
--- a/src/i830_xaa.c
+++ b/src/i830_xaa.c
@@ -269,40 +269,39 @@ I830XAAInit(ScreenPtr pScreen)
return TRUE;
}
-#ifdef XF86DRI
static unsigned int
-CheckTiling(ScrnInfoPtr pScrn)
+I830CheckTiling(ScrnInfoPtr pScrn)
{
I830Ptr pI830 = I830PTR(pScrn);
- unsigned int tiled = 0;
- /* Check tiling */
- if (IS_I965G(pI830)) {
- if (pI830->bufferOffset == pScrn->fbOffset && pI830->front_tiled == FENCE_XMAJOR)
- tiled = 1;
- if (pI830->back_buffer != NULL &&
- pI830->bufferOffset == pI830->back_buffer->offset &&
- pI830->back_tiled == FENCE_XMAJOR) {
- tiled = 1;
- }
- if (pI830->third_buffer != NULL &&
- pI830->bufferOffset == pI830->third_buffer->offset &&
- pI830->third_tiled == FENCE_XMAJOR) {
- tiled = 1;
- }
- /* not really supported as it's always YMajor tiled */
- if (pI830->depth_buffer != NULL &&
- pI830->bufferOffset == pI830->depth_buffer->offset &&
- pI830->depth_tiled == FENCE_XMAJOR) {
- tiled = 1;
- }
+ if (pI830->bufferOffset == pI830->front_buffer->offset &&
+ pI830->front_buffer->tiling != TILE_NONE)
+ {
+ return TRUE;
+ }
+#ifdef XF86DRI
+ if (pI830->back_buffer != NULL &&
+ pI830->bufferOffset == pI830->back_buffer->offset &&
+ pI830->back_buffer->tiling != TILE_NONE)
+ {
+ return TRUE;
}
+ if (pI830->depth_buffer != NULL &&
+ pI830->bufferOffset == pI830->depth_buffer->offset &&
+ pI830->depth_buffer->tiling != TILE_NONE)
+ {
+ return TRUE;
+ }
+ if (pI830->third_buffer != NULL &&
+ pI830->bufferOffset == pI830->third_buffer->offset &&
+ pI830->third_buffer->tiling != TILE_NONE)
+ {
+ return TRUE;
+ }
+#endif
- return tiled;
+ return FALSE;
}
-#else
-#define CheckTiling(pScrn) 0
-#endif
void
I830SetupForSolidFill(ScrnInfoPtr pScrn, int color, int rop,
@@ -314,16 +313,20 @@ I830SetupForSolidFill(ScrnInfoPtr pScrn,
ErrorF("I830SetupForFillRectSolid color: %x rop: %x mask: %x\n",
color, rop, planemask);
+ if (IS_I965G(pI830) && I830CheckTiling(pScrn)) {
+ pI830->BR[13] = (pScrn->displayWidth * pI830->cpp) >> 4;
+ } else {
+ pI830->BR[13] = (pScrn->displayWidth * pI830->cpp);
+ }
+
#ifdef I830_USE_EXA
/* This function gets used by I830DRIInitBuffers(), and we might not have
* XAAGetPatternROP() available. So just use the ROPs from our EXA code
* if available.
*/
- pI830->BR[13] = ((I830PatternROP[rop] << 16) |
- (pScrn->displayWidth * pI830->cpp));
+ pI830->BR[13] |= (I830PatternROP[rop] << 16);
#else
- pI830->BR[13] = ((XAAGetPatternROP(rop) << 16) |
- (pScrn->displayWidth * pI830->cpp));
+ pI830->BR[13] |= ((XAAGetPatternROP(rop) << 16);
#endif
pI830->BR[16] = color;
@@ -381,7 +384,12 @@ I830SetupForScreenToScreenCopy(ScrnInfoP
ErrorF("I830SetupForScreenToScreenCopy %d %d %x %x %d\n",
xdir, ydir, rop, planemask, transparency_color);
- pI830->BR[13] = (pScrn->displayWidth * pI830->cpp);
+ if (IS_I965G(pI830) && I830CheckTiling(pScrn)) {
+ pI830->BR[13] = (pScrn->displayWidth * pI830->cpp) >> 4;
+ } else {
+ pI830->BR[13] = (pScrn->displayWidth * pI830->cpp);
+ }
+
#ifdef I830_USE_EXA
/* This function gets used by I830DRIInitBuffers(), and we might not have
* XAAGetCopyROP() available. So just use the ROPs from our EXA code
@@ -411,7 +419,7 @@ I830SubsequentScreenToScreenCopy(ScrnInf
{
I830Ptr pI830 = I830PTR(pScrn);
int dst_x2, dst_y2;
- unsigned int tiled = CheckTiling(pScrn);
+ unsigned int tiled = I830CheckTiling(pScrn);
if (I810_DEBUG & DEBUG_VERBOSE_ACCEL)
ErrorF("I830SubsequentScreenToScreenCopy %d,%d - %d,%d %dx%d\n",
@@ -420,10 +428,6 @@ I830SubsequentScreenToScreenCopy(ScrnInf
dst_x2 = dst_x1 + w;
dst_y2 = dst_y1 + h;
- if (tiled)
- pI830->BR[13] = ((pI830->BR[13] & 0xFFFF) >> 2) |
- (pI830->BR[13] & 0xFFFF0000);
-
{
BEGIN_LP_RING(8);
@@ -463,7 +467,11 @@ I830SetupForMono8x8PatternFill(ScrnInfoP
pI830->BR[18] = bg;
pI830->BR[19] = fg;
- pI830->BR[13] = (pScrn->displayWidth * pI830->cpp); /* In bytes */
+ if (IS_I965G(pI830) && I830CheckTiling(pScrn)) {
+ pI830->BR[13] = (pScrn->displayWidth * pI830->cpp) >> 4;
+ } else {
+ pI830->BR[13] = (pScrn->displayWidth * pI830->cpp);
+ }
pI830->BR[13] |= XAAGetPatternROP(rop) << 16;
if (bg == -1)
pI830->BR[13] |= (1 << 28);
@@ -487,7 +495,7 @@ I830SubsequentMono8x8PatternFillRect(Scr
{
I830Ptr pI830 = I830PTR(pScrn);
int x1, x2, y1, y2;
- unsigned int tiled = CheckTiling(pScrn);
+ unsigned int tiled = I830CheckTiling(pScrn);
x1 = x;
x2 = x + w;
@@ -497,10 +505,6 @@ I830SubsequentMono8x8PatternFillRect(Scr
if (I810_DEBUG & DEBUG_VERBOSE_ACCEL)
ErrorF("I830SubsequentMono8x8PatternFillRect\n");
- if (tiled)
- pI830->BR[13] = ((pI830->BR[13] & 0xFFFF) >> 2) |
- (pI830->BR[13] & 0xFFFF0000);
-
{
BEGIN_LP_RING(10);
@@ -560,7 +564,11 @@ I830SetupForScanlineCPUToScreenColorExpa
fg, bg, rop, planemask);
/* Fill out register values */
- pI830->BR[13] = (pScrn->displayWidth * pI830->cpp);
+ if (IS_I965G(pI830) && I830CheckTiling(pScrn)) {
+ pI830->BR[13] = (pScrn->displayWidth * pI830->cpp) >> 4;
+ } else {
+ pI830->BR[13] = (pScrn->displayWidth * pI830->cpp);
+ }
pI830->BR[13] |= XAAGetCopyROP(rop) << 16;
if (bg == -1)
pI830->BR[13] |= (1 << 29);
@@ -603,7 +611,7 @@ static void
I830SubsequentColorExpandScanline(ScrnInfoPtr pScrn, int bufno)
{
I830Ptr pI830 = I830PTR(pScrn);
- unsigned int tiled = CheckTiling(pScrn);
+ unsigned int tiled = I830CheckTiling(pScrn);
if (pI830->init == 0) {
pI830->BR[12] = (pI830->AccelInfoRec->ScanlineColorExpandBuffers[0] -
@@ -621,10 +629,6 @@ I830SubsequentColorExpandScanline(ScrnIn
ErrorF("I830SubsequentColorExpandScanline %d (addr %x)\n",
bufno, pI830->BR[12]);
- if (tiled)
- pI830->BR[13] = ((pI830->BR[13] & 0xFFFF) >> 2) |
- (pI830->BR[13] & 0xFFFF0000);
-
{
BEGIN_LP_RING(8);
@@ -666,7 +670,11 @@ I830SetupForScanlineImageWrite(ScrnInfoP
ErrorF("I830SetupForScanlineImageWrite %x %x\n", rop, planemask);
/* Fill out register values */
- pI830->BR[13] = (pScrn->displayWidth * pI830->cpp);
+ if (IS_I965G(pI830) && I830CheckTiling(pScrn)) {
+ pI830->BR[13] = (pScrn->displayWidth * pI830->cpp) >> 4;
+ } else {
+ pI830->BR[13] = (pScrn->displayWidth * pI830->cpp);
+ }
pI830->BR[13] |= XAAGetCopyROP(rop) << 16;
switch (pScrn->bitsPerPixel) {
@@ -703,7 +711,7 @@ static void
I830SubsequentImageWriteScanline(ScrnInfoPtr pScrn, int bufno)
{
I830Ptr pI830 = I830PTR(pScrn);
- unsigned int tiled = CheckTiling(pScrn);
+ unsigned int tiled = I830CheckTiling(pScrn);
if (pI830->init == 0) {
pI830->BR[12] = (pI830->AccelInfoRec->ScanlineColorExpandBuffers[0] -
diff --git a/src/i915_render.c b/src/i915_render.c
index 9c937f2..7f25d90 100644
--- a/src/i915_render.c
+++ b/src/i915_render.c
@@ -285,10 +285,9 @@ i915_texture_setup(PicturePtr pPict, Pix
pI830->mapstate[unit * 3 + 0] = offset;
pI830->mapstate[unit * 3 + 1] = format |
+ MS3_USE_FENCE_REGS |
((pPix->drawable.height - 1) << MS3_HEIGHT_SHIFT) |
((pPix->drawable.width - 1) << MS3_WIDTH_SHIFT);
- if (pI830->tiling)
- pI830->mapstate[unit * 3 + 1] |= MS3_USE_FENCE_REGS;
pI830->mapstate[unit * 3 + 2] = ((pitch / 4) - 1) << MS4_PITCH_SHIFT;
pI830->samplerstate[unit * 3 + 0] = (MIPFILTER_NONE <<
diff --git a/src/i915_video.c b/src/i915_video.c
index e116fe2..a6447b1 100644
--- a/src/i915_video.c
+++ b/src/i915_video.c
@@ -149,7 +149,7 @@ I915DisplayVideoTextured(ScrnInfoPtr pSc
OUT_RING(_3DSTATE_MAP_STATE | 3);
OUT_RING(0x00000001); /* texture map #1 */
OUT_RING(pPriv->YBuf0offset);
- ms3 = MAPSURF_422;
+ ms3 = MAPSURF_422 | MS3_USE_FENCE_REGS;
switch (id) {
case FOURCC_YUY2:
ms3 |= MT_422_YCRCB_NORMAL;
@@ -160,8 +160,6 @@ I915DisplayVideoTextured(ScrnInfoPtr pSc
}
ms3 |= (height - 1) << MS3_HEIGHT_SHIFT;
ms3 |= (width - 1) << MS3_WIDTH_SHIFT;
- if (pI830->tiling)
- ms3 |= MS3_USE_FENCE_REGS;
OUT_RING(ms3);
OUT_RING(((video_pitch / 4) - 1) << MS4_PITCH_SHIFT);
ADVANCE_LP_RING();
@@ -248,29 +246,23 @@ I915DisplayVideoTextured(ScrnInfoPtr pSc
OUT_RING(0x00000007);
OUT_RING(pPriv->YBuf0offset);
- ms3 = MAPSURF_8BIT | MT_8BIT_I8;
+ ms3 = MAPSURF_8BIT | MT_8BIT_I8 | MS3_USE_FENCE_REGS;
ms3 |= (height - 1) << MS3_HEIGHT_SHIFT;
ms3 |= (width - 1) << MS3_WIDTH_SHIFT;
- if (pI830->tiling)
- ms3 |= MS3_USE_FENCE_REGS;
OUT_RING(ms3);
OUT_RING(((video_pitch * 2 / 4) - 1) << MS4_PITCH_SHIFT);
OUT_RING(pPriv->UBuf0offset);
- ms3 = MAPSURF_8BIT | MT_8BIT_I8;
+ ms3 = MAPSURF_8BIT | MT_8BIT_I8 | MS3_USE_FENCE_REGS;
ms3 |= (height / 2 - 1) << MS3_HEIGHT_SHIFT;
ms3 |= (width / 2 - 1) << MS3_WIDTH_SHIFT;
- if (pI830->tiling)
- ms3 |= MS3_USE_FENCE_REGS;
OUT_RING(ms3);
OUT_RING(((video_pitch / 4) - 1) << MS4_PITCH_SHIFT);
OUT_RING(pPriv->VBuf0offset);
- ms3 = MAPSURF_8BIT | MT_8BIT_I8;
+ ms3 = MAPSURF_8BIT | MT_8BIT_I8 | MS3_USE_FENCE_REGS;
ms3 |= (height / 2 - 1) << MS3_HEIGHT_SHIFT;
ms3 |= (width / 2 - 1) << MS3_WIDTH_SHIFT;
- if (pI830->tiling)
- ms3 |= MS3_USE_FENCE_REGS;
OUT_RING(ms3);
OUT_RING(((video_pitch / 4) - 1) << MS4_PITCH_SHIFT);
ADVANCE_LP_RING();
More information about the xorg-commit
mailing list