xf86-video-intel: src/i830_exa.c

[Jesse Barnes]

 src/i830_exa.c |    8 ++++++++
 1 files changed, 8 insertions(+)

New commits:
diff-tree ffbab2ee5dc227b2a8a5ffd1717ae00e8e37f956 (from 019dbfda294aaafb28d8bea0fe2f5dadc2ea3e0b)
Author: Jesse Barnes <jesse.barnes at intel.com>
Date:   Fri Aug 3 21:27:52 2007 -0700

    Limit Solid & Copy offsets to 4k when rendering to tiled targets

diff --git a/src/i830_exa.c b/src/i830_exa.c
index 5da153e..88853a7 100644
--- a/src/i830_exa.c
+++ b/src/i830_exa.c
@@ -147,6 +147,8 @@ I830EXAPrepareSolid(PixmapPtr pPixmap, i
 	I830FALLBACK("pixmap offset not aligned");
     if ( pitch % pI830->EXADriverPtr->pixmapPitchAlign != 0)
 	I830FALLBACK("pixmap pitch not aligned");
+    if ( pI830->tiling && offset > 4096)
+	I830FALLBACK("offset limited to 4k for tiled targets");
 
     pI830->BR[13] = (pitch & 0xffff);
     switch (pPixmap->drawable.bitsPerPixel) {
@@ -231,6 +233,12 @@ I830EXAPrepareCopy(PixmapPtr pSrcPixmap,
     pI830->copy_src_tiled = (pI830->tiling &&
 			     exaPixmapInFrontbuffer(pSrcPixmap));
 
+    if (pI830->copy_src_tiled && pI830->copy_src_off > 4096)
+	I830FALLBACK("offset limited to 4k for tiled targets");
+    if (pI830->tiling && exaPixmapInFrontbuffer(pDstPixmap) &&
+	exaGetPixmapOffset(pDstPixmap) > 4096)
+	I830FALLBACK("offset limited to 4k for tiled targets");
+
     pI830->BR[13] = exaGetPixmapPitch(pDstPixmap);
     pI830->BR[13] |= I830CopyROP[alu] << 16;