xf86-video-ati: Branch 'master'

[Dave Airlie]

 src/radeon_driver.c |   16 ++++++++++++++++
 1 files changed, 16 insertions(+)

New commits:
diff-tree 4b1904017caa976c138594a86e75feaf470e72b5 (from c5d8c8db3e75976687bfb364f0a7b235c7ae8793)
Author: Dave Airlie <airlied at linux.ie>
Date:   Mon Jun 26 20:34:34 2006 +1000

    radeon: force CP and VIP clocks on some r300 and rv100 chips.
    
    fglrx appears to do this on r300 and Jerome Glisse has spent most of his
    life tracking down what caused the 9800 to lockup. This is my attempt to
    fix this. Please report if it works for you.
    
    Signed-off-by: Dave Airlie <airlied at linux.ie>

diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index 2381831..753b1ab 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -133,6 +133,7 @@ static void RADEONInitDispBandwidth(Scrn
 static void RADEONGetMergedFBOptions(ScrnInfoPtr pScrn);
 static int RADEONValidateMergeModes(ScrnInfoPtr pScrn);
 static void RADEONSetDynamicClock(ScrnInfoPtr pScrn, int mode);
+static void RADEONForceSomeClocks(ScrnInfoPtr pScrn);
 static void RADEONUpdatePanelSize(ScrnInfoPtr pScrn);
 static void RADEONSaveMemMapRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save);
 
@@ -5738,6 +5739,9 @@ _X_EXPORT Bool RADEONScreenInit(int scrn
         }
     }
 
+    if ((!info->IsSecondary) && (IS_R300_VARIANT || IS_RV100_VARIANT))
+      RADEONForceSomeClocks(pScrn);
+
     if (info->allowColorTiling && (pScrn->virtualX > info->MaxSurfaceWidth)) {
 	xf86DrvMsg(pScrn->scrnIndex, X_INFO,
 		   "Color tiling not supported with virtual x resolutions larger than %d, disabling\n",
@@ -9751,6 +9755,18 @@ RADEONGetMergedFBOptions(ScrnInfoPtr pSc
     }
 }
 
+static void RADEONForceSomeClocks(ScrnInfoPtr pScrn)
+{
+    /* It appears from r300 and rv100 may need some clocks forced-on */
+     RADEONInfoPtr info        = RADEONPTR(pScrn);
+     unsigned char *RADEONMMIO = info->MMIO;
+     CARD32 tmp;
+
+     tmp = INPLL(pScrn, RADEON_SCLK_CNTL);
+     tmp |= RADEON_SCLK_FORCE_CP | RADEON_SCLK_FORCE_VIP;
+     OUTPLL(pScrn, RADEON_SCLK_CNTL, tmp);
+}
+
 static void RADEONSetDynamicClock(ScrnInfoPtr pScrn, int mode)
 {
     RADEONInfoPtr  info       = RADEONPTR(pScrn);