xf86-video-intel: Branch 'modesetting' - src/i830_driver.c src/i830_memory.c
Eric Anholt
anholt at kemper.freedesktop.org
Fri Dec 29 22:19:50 EET 2006
src/i830_driver.c | 48 +++++++++++++++++++++++-------------------------
src/i830_memory.c | 43 ++++++++++++++++++++++++++++---------------
2 files changed, 51 insertions(+), 40 deletions(-)
New commits:
diff-tree 4ed79a2ba6250354ffc24fa1f7a21ca914ad157e (from b8692e646227e56c9ae4f72b9aaa75457b4c0f5f)
Author: Eric Anholt <eric at anholt.net>
Date: Fri Dec 29 12:19:41 2006 -0800
Relax tiling requirements on G965.
For the 965, we can tile with the pitch at any integer multiple of a tile size
(128 or 512B), up to 128KB.
diff --git a/src/i830_driver.c b/src/i830_driver.c
index 8ca79f1..7f535ac 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -1663,9 +1663,6 @@ I830PreInit(ScrnInfoPtr pScrn, int flags
pScrn->currentMode = pScrn->modes;
-#ifndef USE_PITCHES
-#define USE_PITCHES 1
-#endif
pI830->disableTiling = FALSE;
/*
@@ -1685,18 +1682,7 @@ I830PreInit(ScrnInfoPtr pScrn, int flags
if (I830IsPrimary(pScrn) && !pI830->directRenderingDisabled) {
int savedDisplayWidth = pScrn->displayWidth;
int memNeeded = 0;
- /* Good pitches to allow tiling. Don't care about pitches < 1024. */
- static const int pitches[] = {
-/*
- 128 * 2,
- 128 * 4,
-*/
- 128 * 8,
- 128 * 16,
- 128 * 32,
- 128 * 64,
- 0
- };
+ Bool tiled = FALSE;
#ifdef I830_XV
/*
@@ -1706,16 +1692,28 @@ I830PreInit(ScrnInfoPtr pScrn, int flags
pI830->XvEnabled = !pI830->XvDisabled;
#endif
- for (i = 0; pitches[i] != 0; i++) {
-#if USE_PITCHES
- if (pitches[i] >= pScrn->displayWidth) {
- pScrn->displayWidth = pitches[i];
- break;
+ if (IS_I965G(pI830)) {
+ int tile_pixels = 512 / pI830->cpp;
+ pScrn->displayWidth = (pScrn->displayWidth + tile_pixels - 1) &
+ ~(tile_pixels - 1);
+ tiled = TRUE;
+ } else {
+ /* Good pitches to allow tiling. Don't care about pitches < 1024. */
+ static const int pitches[] = {
+ KB(1),
+ KB(2),
+ KB(4),
+ KB(8),
+ 0
+ };
+
+ for (i = 0; pitches[i] != 0; i++) {
+ if (pitches[i] >= pScrn->displayWidth) {
+ pScrn->displayWidth = pitches[i];
+ tiled = TRUE;
+ break;
+ }
}
-#else
- if (pitches[i] == pScrn->displayWidth)
- break;
-#endif
}
/*
@@ -1723,7 +1721,7 @@ I830PreInit(ScrnInfoPtr pScrn, int flags
* memory available to enable tiling.
*/
savedMMSize = pI830->mmSize;
- if (pScrn->displayWidth == pitches[i]) {
+ if (tiled) {
retry_dryrun:
I830ResetAllocations(pScrn, 0);
if (I830Allocate2DMemory(pScrn, ALLOCATE_DRY_RUN | ALLOC_INITIAL) &&
diff --git a/src/i830_memory.c b/src/i830_memory.c
index 3264a2d..5bbf3e3 100644
--- a/src/i830_memory.c
+++ b/src/i830_memory.c
@@ -438,20 +438,33 @@ AllocateOverlay(ScrnInfoPtr pScrn, int f
#endif
static Bool
-IsTileable(int pitch)
+IsTileable(ScrnInfoPtr pScrn, int pitch)
{
+ I830Ptr pI830 = I830PTR(pScrn);
+
+ if (IS_I965G(pI830)) {
+ if (pitch / 512 * 512 == pitch && pitch <= KB(128))
+ return TRUE;
+ else
+ return FALSE;
+ }
+
/*
* Allow tiling for pitches that are a power of 2 multiple of 128 bytes,
* up to 64 * 128 (= 8192) bytes.
*/
switch (pitch) {
- case 128 * 1:
- case 128 * 2:
- case 128 * 4:
- case 128 * 8:
- case 128 * 16:
- case 128 * 32:
- case 128 * 64:
+ case 128:
+ case 256:
+ if (IS_I945G(pI830) || IS_I945GM(pI830))
+ return TRUE;
+ else
+ return FALSE;
+ case 512:
+ case KB(1):
+ case KB(2):
+ case KB(4):
+ case KB(8):
return TRUE;
default:
return FALSE;
@@ -475,7 +488,7 @@ I830AllocateRotatedBuffer(ScrnInfoPtr pS
memset(&(pI830->RotatedMem), 0, sizeof(I830MemRange));
pI830->RotatedMem.Key = -1;
tileable = !(flags & ALLOC_NO_TILING) &&
- IsTileable(pScrn->displayWidth * pI830->cpp);
+ IsTileable(pScrn, pScrn->displayWidth * pI830->cpp);
if (tileable) {
/* Make the height a multiple of the tile height (16) */
lines = (height + 15) / 16 * 16;
@@ -540,7 +553,7 @@ I830AllocateRotated2Buffer(ScrnInfoPtr p
memset(&(pI830->RotatedMem2), 0, sizeof(I830MemRange));
pI830->RotatedMem2.Key = -1;
tileable = !(flags & ALLOC_NO_TILING) &&
- IsTileable(pI830Ent->pScrn_2->displayWidth * pI8302->cpp);
+ IsTileable(pScrn, pI830Ent->pScrn_2->displayWidth * pI8302->cpp);
if (tileable) {
/* Make the height a multiple of the tile height (16) */
lines = (height + 15) / 16 * 16;
@@ -699,7 +712,7 @@ I830AllocateFramebuffer(ScrnInfoPtr pScr
}
tileable = !(flags & ALLOC_NO_TILING) && pI830->allowPageFlip &&
- IsTileable(pScrn->displayWidth * pI830->cpp);
+ IsTileable(pScrn, pScrn->displayWidth * pI830->cpp);
if (tileable) {
if (IS_I9XX(pI830))
align = MB(1);
@@ -886,7 +899,7 @@ I830Allocate2DMemory(ScrnInfoPtr pScrn,
maxFb / lineSize - pScrn->virtualY);
pI830->FbMemBox.y2 = maxFb / lineSize;
tileable = !(flags & ALLOC_NO_TILING) && pI830->allowPageFlip &&
- IsTileable(pScrn->displayWidth * pI830->cpp);
+ IsTileable(pScrn, pScrn->displayWidth * pI830->cpp);
if (tileable) {
if (IS_I9XX(pI830))
align = MB(1);
@@ -1113,7 +1126,7 @@ I830AllocateBackBuffer(ScrnInfoPtr pScrn
memset(&(pI830->BackBuffer), 0, sizeof(pI830->BackBuffer));
pI830->BackBuffer.Key = -1;
tileable = !(flags & ALLOC_NO_TILING) &&
- IsTileable(pScrn->displayWidth * pI830->cpp);
+ IsTileable(pScrn, pScrn->displayWidth * pI830->cpp);
if (tileable) {
/* Make the height a multiple of the tile height (16) */
lines = (height + 15) / 16 * 16;
@@ -1176,7 +1189,7 @@ I830AllocateDepthBuffer(ScrnInfoPtr pScr
memset(&(pI830->DepthBuffer), 0, sizeof(pI830->DepthBuffer));
pI830->DepthBuffer.Key = -1;
tileable = !(flags & ALLOC_NO_TILING) &&
- IsTileable(pScrn->displayWidth * pI830->cpp);
+ IsTileable(pScrn, pScrn->displayWidth * pI830->cpp);
if (tileable) {
/* Make the height a multiple of the tile height (16) */
lines = (height + 15) / 16 * 16;
@@ -1714,7 +1727,7 @@ I830SetupMemoryTiling(ScrnInfoPtr pScrn)
if (!pI830->directRenderingEnabled)
return;
- if (!IsTileable(pScrn->displayWidth * pI830->cpp)) {
+ if (!IsTileable(pScrn, pScrn->displayWidth * pI830->cpp)) {
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"I830SetupMemoryTiling: Not tileable 0x%x\n",
pScrn->displayWidth * pI830->cpp);
More information about the xorg-commit
mailing list