xf86-video-ati: Branch 'master' - 2 commits
Michel Daenzer
daenzer at kemper.freedesktop.org
Tue Dec 19 12:31:53 EET 2006
man/radeon.man | 17 +++++++-----
src/radeon_dri.c | 67 ++++++++++++++++++++++++++++++++++++++-----------
src/radeon_dri.h | 7 -----
src/radeon_driver.c | 32 -----------------------
src/radeon_exa_funcs.c | 6 ++--
5 files changed, 65 insertions(+), 64 deletions(-)
New commits:
diff-tree 97df0a32b14e34f22dce9cd3b375c1ac5fb1c5eb (from 295823d0879a5b574bb79843a6acd43adb9259e5)
Author: Michel Dänzer <michel at tungstengraphics.com>
Date: Tue Dec 19 11:28:21 2006 +0100
radeon: Advertise 2D engine limits to EXA when we're not using the 3D engine.
Also round up to the maximum width and height, as that's what EXA compares.
diff --git a/src/radeon_exa_funcs.c b/src/radeon_exa_funcs.c
index f018e55..0d847d1 100644
--- a/src/radeon_exa_funcs.c
+++ b/src/radeon_exa_funcs.c
@@ -517,9 +517,6 @@ Bool FUNC_NAME(RADEONDrawInit)(ScreenPtr
info->exa->pixmapOffsetAlign = RADEON_BUFFER_ALIGN + 1;
info->exa->pixmapPitchAlign = 64;
- info->exa->maxX = 2047;
- info->exa->maxY = 2047;
-
#ifdef RENDER
if (info->RenderAccel) {
if (info->ChipFamily >= CHIP_FAMILY_R300) {
@@ -548,6 +545,9 @@ Bool FUNC_NAME(RADEONDrawInit)(ScreenPtr
}
#endif
+ info->exa->maxX = info->exa->Composite ? 2048 : 8192;
+ info->exa->maxY = info->exa->Composite ? 2048 : 8192;
+
RADEONEngineInit(pScrn);
if (!exaDriverInit(pScreen, info->exa)) {
diff-tree 295823d0879a5b574bb79843a6acd43adb9259e5 (from 81f3b4070b70483d6da4f7587e52a64ac69c8ca0)
Author: Michel Dänzer <michel at tungstengraphics.com>
Date: Tue Dec 19 11:19:20 2006 +0100
radeon: Default to leaving AGP transfer mode and fast writes unchanged.
Based on the assumption that firmware should have set up the card and host
bridge appropriately for these settings, this may actually be safer, at least
for the transfer rate; leaving fast writes enabled is hopefully safe as well,
it certainly is on my sytem.
See https://bugs.freedesktop.org/show_bug.cgi?id=9284 .
diff --git a/man/radeon.man b/man/radeon.man
index ddfd0ff..b0a4f04 100644
--- a/man/radeon.man
+++ b/man/radeon.man
@@ -163,22 +163,25 @@ The default is
Set AGP data transfer rate.
(used only when DRI is enabled)
.br
-1 \-\- x1 (default)
+1 \-\- 1x (before AGPv3 only)
.br
-2 \-\- x2
+2 \-\- 2x (before AGPv3 only)
.br
-4 \-\- x4
+4 \-\- 4x
.br
-8 \-\- x8
+8 \-\- 8x (AGPv3 only)
.br
others \-\- invalid
+.br
+The default is to
+.B leave it unchanged.
.TP
.BI "Option \*qAGPFastWrite\*q \*q" boolean \*q
-Enable AGP fast write. Enabling this option is frequently the cause of
+Enable or disable AGP fast writes. Enabling this is frequently the cause of
instability. Used only when the DRI is enabled.
.br
-The default is
-.B off.
+The default is to
+.B leave it unchanged.
.TP
.BI "Option \*qBusType\*q \*q" string \*q
Used to replace previous ForcePCIMode option.
diff --git a/src/radeon_dri.c b/src/radeon_dri.c
index e223825..35e4154 100644
--- a/src/radeon_dri.c
+++ b/src/radeon_dri.c
@@ -723,10 +723,60 @@ static Bool RADEONSetAgpMode(RADEONInfoP
unsigned long mode = drmAgpGetMode(info->drmFD); /* Default mode */
unsigned int vendor = drmAgpVendorId(info->drmFD);
unsigned int device = drmAgpDeviceId(info->drmFD);
+ CARD32 agp_status = INREG(RADEON_AGP_STATUS) & mode;
+ Bool is_v3 = (agp_status & RADEON_AGPv3_MODE);
+ unsigned int defaultMode;
+ MessageType from;
+
+ if (is_v3) {
+ defaultMode = (agp_status & RADEON_AGPv3_8X_MODE) ? 8 : 4;
+ } else {
+ if (agp_status & RADEON_AGP_4X_MODE) defaultMode = 4;
+ else if (agp_status & RADEON_AGP_2X_MODE) defaultMode = 2;
+ else defaultMode = 1;
+ }
+
+ from = X_DEFAULT;
+
+ if (xf86GetOptValInteger(info->Options, OPTION_AGP_MODE, &info->agpMode)) {
+ if (info->agpMode < is_v3 ? 4 : 1 || info->agpMode > is_v3 ? 8 : 4 ||
+ info->agpMode & (info->agpMode - 1)) {
+ xf86DrvMsg(pScreen->myNum, X_ERROR,
+ "Illegal AGP Mode: %d (valid values: %s), leaving at "
+ "%dx\n", info->agpMode, is_v3 ? "4, 8" : "1, 2, 4",
+ defaultMode);
+ info->agpMode = defaultMode;
+ } else
+ from = X_CONFIG;
+ } else
+ info->agpMode = defaultMode;
+
+ xf86DrvMsg(pScreen->myNum, from, "Using AGP %dx\n", info->agpMode);
+
+ info->agpFastWrite = (agp_status & RADEON_AGP_FW_MODE);
+
+ from = xf86GetOptValInteger(info->Options, OPTION_AGP_FW,
+ &info->agpFastWrite) ? X_CONFIG : X_DEFAULT;
+
+ if (info->agpFastWrite &&
+ (vendor == PCI_VENDOR_AMD) &&
+ (device == PCI_CHIP_AMD761)) {
+
+ /* Disable fast write for AMD 761 chipset, since they cause
+ * lockups when enabled.
+ */
+ info->agpFastWrite = FALSE;
+ from = X_DEFAULT;
+ xf86DrvMsg(pScreen->myNum, X_WARNING,
+ "[agp] Not enabling Fast Writes on AMD 761 chipset to avoid "
+ "lockups");
+ }
+
+ xf86DrvMsg(pScreen->myNum, from, "AGP Fast Writes %sabled\n",
+ info->agpFastWrite ? "en" : "dis");
mode &= ~RADEON_AGP_MODE_MASK;
- if ((mode & RADEON_AGPv3_MODE) &&
- (INREG(RADEON_AGP_STATUS) & RADEON_AGPv3_MODE)) {
+ if (is_v3) {
/* only set one mode bit for AGPv3 */
switch (info->agpMode) {
case 8: mode |= RADEON_AGPv3_8X_MODE; break;
@@ -743,19 +793,6 @@ static Bool RADEONSetAgpMode(RADEONInfoP
}
}
- if (info->agpFastWrite &&
- (vendor == PCI_VENDOR_AMD) &&
- (device == PCI_CHIP_AMD761)) {
-
- /* Disable fast write for AMD 761 chipset, since they cause
- * lockups when enabled.
- */
- info->agpFastWrite = FALSE;
- xf86DrvMsg(pScreen->myNum, X_WARNING,
- "[agp] Not enabling Fast Writes on AMD 761 chipset to avoid "
- "lockups");
- }
-
if (info->agpFastWrite) mode |= RADEON_AGP_FW_MODE;
xf86DrvMsg(pScreen->myNum, X_INFO,
diff --git a/src/radeon_dri.h b/src/radeon_dri.h
index b4788ca..6fa7e35 100644
--- a/src/radeon_dri.h
+++ b/src/radeon_dri.h
@@ -41,11 +41,6 @@
/* DRI Driver defaults */
#define RADEON_DEFAULT_CP_PIO_MODE RADEON_CSQ_PRIPIO_INDPIO
#define RADEON_DEFAULT_CP_BM_MODE RADEON_CSQ_PRIBM_INDBM
-/* Default to AGP 4x mode for IGP chips, there are some problems with 1x and 2x
- * modes on AGP master side
- */
-#define RADEON_DEFAULT_AGP_MODE (info->IsIGP ? 4 : 1)
-#define RADEON_DEFAULT_AGP_FAST_WRITE 0
#define RADEON_DEFAULT_GART_SIZE 8 /* MB (must be 2^n and > 4MB) */
#define RADEON_DEFAULT_RING_SIZE 1 /* MB (must be page aligned) */
#define RADEON_DEFAULT_BUFFER_SIZE 2 /* MB (must be page aligned) */
@@ -55,8 +50,6 @@
#define RADEON_PCIGART_TABLE_SIZE 32768
-#define RADEON_AGP_MAX_MODE 8
-
#define RADEON_CARD_TYPE_RADEON 1
#define RADEONCP_USE_RING_BUFFER(m) \
diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index ab19b22..87d60e8 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -2552,45 +2552,13 @@ static Bool RADEONPreInitDRI(ScrnInfoPtr
info->CPMode = RADEON_DEFAULT_CP_BM_MODE;
}
- info->agpMode = RADEON_DEFAULT_AGP_MODE;
info->gartSize = RADEON_DEFAULT_GART_SIZE;
info->ringSize = RADEON_DEFAULT_RING_SIZE;
info->bufSize = RADEON_DEFAULT_BUFFER_SIZE;
info->gartTexSize = RADEON_DEFAULT_GART_TEX_SIZE;
- info->agpFastWrite = RADEON_DEFAULT_AGP_FAST_WRITE;
info->CPusecTimeout = RADEON_DEFAULT_CP_TIMEOUT;
- if (info->cardType==CARD_AGP) {
- if (xf86GetOptValInteger(info->Options,
- OPTION_AGP_MODE, &(info->agpMode))) {
- if (info->agpMode < 1 || info->agpMode > RADEON_AGP_MAX_MODE) {
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
- "Illegal AGP Mode: %dx, set to default %dx mode\n",
- info->agpMode, RADEON_DEFAULT_AGP_MODE);
- info->agpMode = RADEON_DEFAULT_AGP_MODE;
- }
-
- /* AGP_MAX_MODE is changed to allow v3 8x mode.
- * At this time we don't know if the AGP bridge supports
- * 8x mode. This will later be verified on both
- * AGP master and target sides.
- */
- xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
- "AGP %dx mode is configured\n", info->agpMode);
- }
-
- if ((info->agpFastWrite = xf86ReturnOptValBool(info->Options,
- OPTION_AGP_FW,
- FALSE))) {
- xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
- "Enabling AGP Fast Write\n");
- } else {
- xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "AGP Fast Write disabled by default\n");
- }
- }
-
if ((xf86GetOptValInteger(info->Options,
OPTION_GART_SIZE, (int *)&(info->gartSize))) ||
(xf86GetOptValInteger(info->Options,
More information about the xorg-commit
mailing list