xf86-video-intel: Branch 'modesetting' - src/i830_display.c src/i830_sdvo.c

[Keith Packard]

 src/i830_display.c |    8 +++-----
 src/i830_sdvo.c    |    4 +---
 2 files changed, 4 insertions(+), 8 deletions(-)

New commits:
diff-tree 4cdcaac26b3f425ec8fcc2fd3eaa9bfb7a137422 (from 9dd1520421dcb8c7f36a684f3d2ffb6b42a6671a)
Author: Keith Packard <keithp at mandolin.keithp.com>
Date:   Tue Dec 12 23:26:00 2006 -0800

    Write dpll_md register while updating dpll as that appears to be required.
    
    SDVO multiplier on 965 is in the dpll_md register; for some reason, that
    needs to be written along with the dpll value or the multiplier doesn't get
    set correctly.

diff --git a/src/i830_display.c b/src/i830_display.c
index 8da5131..e4d8e9f 100644
--- a/src/i830_display.c
+++ b/src/i830_display.c
@@ -752,11 +752,9 @@ i830_crtc_mode_set(xf86CrtcPtr crtc, Dis
     OUTREG(fp_reg, fp);
     OUTREG(dpll_reg, dpll);
     if (IS_I965G(pI830)) {
-	/* Set the SDVO multiplier/divider to 1x for the sake of analog output.
-	 * It will be updated by the SDVO code if SDVO had fixed up the clock
-	 * for a higher multiplier.
-	 */
-	OUTREG(dpll_md_reg, 0);
+	int sdvo_pixel_multiply = adjusted_mode->Clock / mode->Clock;
+	OUTREG(dpll_md_reg, (0 << DPLL_MD_UDI_DIVIDER_SHIFT) |
+	       ((sdvo_pixel_multiply - 1) << DPLL_MD_UDI_MULTIPLIER_SHIFT));
     }
 
     OUTREG(htot_reg, (adjusted_mode->CrtcHDisplay - 1) |
diff --git a/src/i830_sdvo.c b/src/i830_sdvo.c
index 68ee941..da4df92 100644
--- a/src/i830_sdvo.c
+++ b/src/i830_sdvo.c
@@ -557,7 +557,6 @@ i830_sdvo_mode_set(xf86OutputPtr output,
     xf86CrtcPtr	    crtc = output->crtc;
     I830CrtcPrivatePtr	    intel_crtc = crtc->driver_private;
     CARD32 sdvox;
-    int dpll_md_reg = (intel_crtc->pipe == 0) ? DPLL_A_MD : DPLL_B_MD;
     int sdvo_pixel_multiply;
     CARD16 width, height;
     CARD16 h_blank_len, h_sync_len, v_blank_len, v_sync_len;
@@ -663,8 +662,7 @@ i830_sdvo_mode_set(xf86OutputPtr output,
 
     sdvo_pixel_multiply = i830_sdvo_get_pixel_multiplier(mode);
     if (IS_I965G(pI830)) {
-	OUTREG(dpll_md_reg, (0 << DPLL_MD_UDI_DIVIDER_SHIFT) |
-	       ((sdvo_pixel_multiply - 1) << DPLL_MD_UDI_MULTIPLIER_SHIFT));
+	/* done in crtc_mode_set as the dpll_md reg must be written early */
     } else if (IS_I945G(pI830) || IS_I945GM(pI830)) {
 	/* done in crtc_mode_set as it lives inside the dpll register */
     } else {