[ANNOUNCE] xf86-video-intel 2.99.903

Chris Wilson chris at chris-wilson.co.uk
Sat Sep 28 11:03:20 PDT 2013

Snapshot 2.99.903 (2013-09-28)
Lots more stabilization work, not yet peaceful enough to christen 3.0. We
have everything ranging from build fixes for systems like Suse Linux
Enterprise Desktop that like to backport hardware enablement to ancient
packages, to fixes for hardware enabling, and some more performance tuning.

 * Fix VSync on Haswell.

 * Disable Y-tiling on gen4 - it too frequently leads to instability.

 * Disable same EDID detection based on property id - the kernel likes
   to reuse ids leading to a failure to detect the right modes on a monitor

 * Avoid issuing multiple DPMS requests to the same encoder (alised to
   multiple connectors) to avoid upsetting Haswell and leaving the
   screens blank.

 * Honour the user preferrence for the initial mode, even if they are
   being silly

 * Clear the clear hint when apply DRI updates - to prevent some
   screenshots from GL windows being left blank.

 * Prevent a NULL dereference from trying to undo an non-existent buffer

 * Handle out-of-memory conditions far more gracefully. If the system is
   hard against the memory wall, then the kernel will start issuing
   SIGBUS even for CPU mmaps. Untrapped these will cause X to die.

Complete list of changes since 2.99.902

Chris Wilson (72):
      NEWS: Fix release dates, missed the transition to September
      sna: Split get_drawable_deltas()
      sna: Only update the CRTCs after a resize if master
      intel-virtual-output: Debug option for forcing full redraws
      configure: Only assert DRI2 requirements not met if the DRI2 package is missing
      sna/gen7: Prefer the BLT for gt1 systems
      sna/gen6: Prefer the RCS on large GT systems
      sna/gen4+: Flush batch if idle on filling vbo
      sna: Remember to offset the box before asserting damage
      sna: Call the new __offset functions in the last commit
      sna/gen6+: Only apply the BLT copy w/a for self-copies
      sna/hsw: Fix the event selection for scanline waits on pipe A
      sna/hsw: Scanline waits require both DERRMR and forcewake
      sna: Disable use of Y-tiling for gen4
      sna/gen4: Always try the BLT composite routines first
      sna/gen4+: Rebalance creation of vbo during batch flushing
      sna: Fix declaration of write intent for can_map__cpu in PutImage
      test: Exercise flips/blit swaps on each pipe
      intel: Make the option to control VSync and PageFlip explict
      sna: Clamp the possible-crtc mask to the real CRTCs
      sna: Disable same-edid detection
      sna: Fix off-by-one in computation of valid CRTC mask
      intel: Compile fixes for base install of SLED11.sp3
      sna: Wrap use of dixPrivateKeyRegistered for uevents
      sna: Pushed dixPrivateKeyRegistered wrapper into compat-api.h
      intel: Fix includes for intel_options
      sna/gen4: Remove long dead code for forced batch emission between CA passes
      sna: Add output names to DBG dpms changes
      sna: Do not change DPMS mode on unconnected outputs
      uxa: Do not change DPMS mode on unconnected outputs
      intel-virtual-output: Hide the remote cursor on initial connection
      sna: Prevent invalid use of set-write-domain on scanouts when debugging
      sna: Don't set the mapped hint for inplace tiled accesses
      sna: ImageGlyphs completely overwrite the destination
      sna: Undo region translation after failing to begin ImageGlyphs
      sna: Both clear PolyGlyph and ImageGlyph are no-ops
      intel-virtual-overlay: Grab the server around mode manipulations
      sna: Track CPU/GTT maps independently
      sna/dri: Fix SwapbufferWait
      sna/dri: Report saner target_msc values for vblank_mode=0
      sna/dri: Sanitize the backbuffer flip cache
      sna: Fix cast from u64 to pointer for 32-bit hosts
      sna/video: Add always-on-top to the list of Xv attributes
      sna: Check OPTION_PREFERRED_MODE rather than M_T_USERPREF
      sna/dri: Clear the clear hint upon applying DRI damage
      sna/dri: Prevent a NULL dereference in a DBG msg
      sna: Separate out copy preferrence from operating in place decision
      sna: Add some DBG for early flushes
      sna: Clear CPU damage when uploading partial images inplace
      sna/gen6+: Fallback to BLT composite if fallback is forced
      sna/gen[35]: Remove dead code for choosing between BLT/render composite
      sna: Add a few more asserts around tracking of bo->exec vs bo->request
      sna: Check that the bo exists before attempting to undo it
      sna: Micro-optimise copies
      sna: Promote self-copies to the GPU
      sna: Eliminate a DBG compile warn for 32-bit builds
      sna: Remove a bogus assert
      sna: Simplify the clearing of a transformed frontbuffer
      sna: Drop the REPLACES hint for a pinned target bo
      sna: In desperation, query the actual available aperture space
      sna/gen4+: Handle very large copies more gracefully
      sna: Trigger fallback after intermediate pixmap allocation failure
      sna: Make sure the transformed CRTC box is clipped correctly.
      sna: Mark all large cached buffers as purgeable
      sna: Catch SIGBUS to prevent X death
      sna: Disable the promotion of large bo as flush
      sna: Make sure we do not try to upload indirectly if the GPU is wedged
      sna: Only flush the scanout if we successfully upload it to the GPU
      sna: Fix regression in picture extraction
      sna: OsSigHandler expects 0 on handled
      sna: Avoid reads from a GTT mmapped upload buffer
      2.99.903 snapshot

Ross Burton (1):
      test: only build DRI2 tests if DRI2 is enabled

git tag: 2.99.903

MD5:  dbb0d62a455be5d2a1af2398cae9915c  xf86-video-intel-2.99.903.tar.bz2
SHA1: 44b0e65196bb6ce9fcd52bcac6eeed54b4b959f2  xf86-video-intel-2.99.903.tar.bz2
SHA256: a7582d80962f6052fb72b570cce53249dce6e1291d2d7df4f0384f73692eb32e  xf86-video-intel-2.99.903.tar.bz2

MD5:  7c69f69b045aa0c318363c2e981ab46a  xf86-video-intel-2.99.903.tar.gz
SHA1: 7557dbd071aea5ce17adb82afa2457c567607555  xf86-video-intel-2.99.903.tar.gz
SHA256: db75a4bad8b801b404812c8fbf0e7e3010b52e1ffcdbc3f48d916941af6239c1  xf86-video-intel-2.99.903.tar.gz

Chris Wilson, Intel Open Source Technology Centre
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