[ANNOUNCE] xf86-video-intel 2.21.11

Chris Wilson chris at chris-wilson.co.uk
Sun Jun 30 16:04:32 PDT 2013

Release 2.21.11 (2013-06-30)
An eventful week. What started with a regression with some builds of
firefox on some machines lead ultimately to the discovery of an older
kernel bug. Aside from the work to fix the image bug and a few other
older bugs that were reported and resolved this week, there is also a
(hopefully) subtle change to the initial configuration of displays. In
the absence of user overrides in xorg.conf, the DDX will try to preserve
the same display configuration as used by the kernel, which hopefully
will be the same configuration as setup by the BIOS. The result should
be a boot sequence that does not resize at all (aka fastboot) - until
the display manager takes over and loads a completely different

 * Add reference counting of drmMaster for ZaphodHeads

 * Add a GPU flush before changing blend modes on Ironlake

 * Fix occasional missing images for inplace uploads
   [regression from 2.21.10]

 * Add missing utility files to the tarball and remove a few unused ones

 * Initialise PolyPoint operand state before calling miWideDash

 * Fix redirection handling for rendering into large surfaces

 * Fix compilation of UXA with xorg-xserver < 1.10
   [regression from 2.20.0]

 * Fix consideration of gradients for deciding when to migrate render
   [performance regression from 2.21.10, the bug itself is older]

Also fixed this week was:

commit 22fd5ca947b58901927d100d2b1aa0f1672b3435
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date:   Fri Jun 28 16:54:08 2013 +0100

    drm/i915: Only clear write-domains after a successful wait-seqno

which affects kernels 3.7 - 3.10, coming to a stable kernel near you soon.

Complete list of changes since 2.21.10

Chris Wilson (70):
      sna: Add reference counting to drmMaster for Zaphod
      sna: Only open the /dev/dri/cardX device once
      Tidy version query for i915.ko
      sna/gen5: Force a write flush when changing blend modes
      sna/gen5: Elide the forced flush after a drawrect
      sna: Allow tiled uploads to accumulate damage
      sna: Document swizzling for DBG
      sna: Discard overwritten incomplete operations before migrating
      sna: Discard proxy upload buffers before overwritting for PutImage
      sna: Clear 'clear' hint upon uploading into tiled
      sna: Move the reset bo to the right list
      sna: Check for a request to create an inactive scanout
      sna: Remove unused brw_eu_debug.c
      sna: Initialise gc->ops->PolyPoint for miWideDash
      Add the nickle utility scripts to the tarball
      sna: Don't flag IGNORE_CPU for partial overwritten blocks
      intel: Use the correct errno value for reporting the drmSetVersion failure
      sna: Drop master when closing the screen
      sna: Be explicit when creating tiled-x pixmaps for manual tiling uplaods
      sna: Do not perform tiling inplace if the destination is busy
      sna: Optimize clears to white
      sna: Rearrange tiled x upload so that damage accumulation is last
      sna: Free just-allocated bo if we fail to set-tiling on CREATE_EXACT
      sna: Do not force creation of CPU maps on !llc
      sna: Clear mapped state after performing manual tiling
      sna: Avoid allocating a temporary if using rendercpy tiles
      sna/gen4+: Fix determination of intermediate extents
      sna: Use the existing configuration for initial modes
      sna: Fallback to xf86InitialConfiguration if nothing is connected
      sna: Set RR_Rotate_0 instead of 0 as desired initial rotation
      sna: Explicitly initialise the probed transform for a CRTC
      sna: Correct typo s/\j/\n/
      sna: Se the default gamma if left uninitialized by the driver
      sna: Detect and handle cloned pixels for manual tiled uploads
      sna: Refactor freeing gpu_bo in manual tiled upload
      sna: Fix DBG printing of can_upload_tiled_x()
      sna: Tweak ordering of userptr temporary mappings for uploads
      sna: We can read from cloned pixmaps inplace - so long as we don't write
      sna: Support operations inplace on CPU mappings of a region
      sna: Fake the output physical width/height from the CRTC size
      sna: Set the current mode when initialising CRTCs
      sna: Add the probed CRTC mode to the list of output modes
      sna: Implement memcpy_from_tiled functions (for X-tiling only atm)
      sna: Add a fast path for reading back from tiled X bo
      sna: Prefer operating inplace with a very large GPU bo
      sna: Trim the large object threshold
      configure: SNA supports the old Xorgs
      sna: Enable memcpy_from_tiled for the IO paths
      intel: #ifdef O_CLOEXEC for compilation on squeeze
      intel: Use fcntl to try and set CLOEXEC if the open(O_CLOEXEC) fails
      sna/blt: Refine op placement logic for handling current source location
      sna: Compensate redirect drawing subrectangle inside an offset pixmap
      sna/blt: Remove a pair of leftover asserts
      sna: Markup when a gradient is opaque
      sna/gen2+: Consider precision in render operation placement
      sna: Assert that the kernel tiling mode matches our bo
      sna: Add debug control for disabling accelerated GetImage
      sna: Use inplace CPU mapping readback for GetImage on linear buffers
      sna: Add asserts around applying clears
      sna: Promote assert(!priv->mapped) along migration paths
      sna: Inspect the dirty boxes when querying whether damage contains a rectangle
      sna: Improve checks for coherent access through CPU mappings
      sna: Move the clone discard into free-gpu
      sna: Fix get_image_inplace to use the pixmap offset
      sna: Add the Ofast option to the critical memcpy routines
      sna: Allow tiled memcpy on i386
      sna: Replace conflicting drmDropMaster
      sna: Store the path used to open the device and pass to DRI
      intel: Fix failure code for reporting !drmCheckModesetingSupported
      2.21.11 release

Jonathan Gray (1):
      intel: replace direct ioctl use with drm{Set, Drop}Master

Roy.Li (1):
      uxa: fix the compilation error with xorg-xserver <= 1.10

git tag: 2.21.11

MD5:  739b5671df7a29590234ffb5535c9f7f  xf86-video-intel-2.21.11.tar.bz2
SHA1: 83ee55b482875ae2fb641bbadfd4eadf46e8cc40  xf86-video-intel-2.21.11.tar.bz2
SHA256: 523aa13f2ba65f0be871de338956a5acccb0d3a3d9c195ed3cd47abc2c025e22  xf86-video-intel-2.21.11.tar.bz2

MD5:  0f5ef204c5b5e2483aab77805c5d0e70  xf86-video-intel-2.21.11.tar.gz
SHA1: 152928f074c494d3fd6ce96f63422e6b1ae46bf9  xf86-video-intel-2.21.11.tar.gz
SHA256: 8bb1a62b32218fb1b72af3da1511b1ec9370c6e4fee79fa16c29731736da8f83  xf86-video-intel-2.21.11.tar.gz

Chris Wilson, Intel Open Source Technology Centre

More information about the xorg-announce mailing list